Liphen
|
11dff5ca0f
|
refactor(dcache): 删除cache data forward
|
2023-12-28 13:40:54 +08:00 |
|
Liphen
|
b45e0194fa
|
refactor(cache): 进行部分变量替换
|
2023-12-28 13:40:25 +08:00 |
|
Liphen
|
4355bc3b5d
|
fix(fu): 提前访存地址生成错误
|
2023-12-26 14:56:25 +08:00 |
|
Liphen
|
c112df3e35
|
style(cache): use next addr信号名修改
|
2023-12-26 14:56:02 +08:00 |
|
Liphen
|
51debc4d27
|
fix(idu): inst1的ebreak生成有误
|
2023-12-26 14:27:10 +08:00 |
|
Liphen
|
e6a6f250c9
|
fix(exe): 在exe提前访存
|
2023-12-25 21:19:31 +08:00 |
|
Liphen
|
35ca9a1732
|
refactor: 移动文件，优化结构
|
2023-12-25 20:14:51 +08:00 |
|
Liphen
|
108c529698
|
fix(cache): 将save状态改成wait，更符合作用
|
2023-12-25 15:45:30 +08:00 |
|
Liphen
|
ac6aefff8a
|
style(tlb): 加上p的前缀表示物理地址
|
2023-12-25 14:08:54 +08:00 |
|
Liphen
|
90bc47c48b
|
fix(dcache): 修复显著的问题，目前仍存在bug
|
2023-12-25 14:02:01 +08:00 |
|
Liphen
|
e1639e6f8b
|
fix(tlb): 修复数据宽度问题
|
2023-12-25 14:01:31 +08:00 |
|
Liphen
|
e646ee4a4c
|
docs(cache): 增加注释
|
2023-12-24 16:21:53 +08:00 |
|
Liphen
|
c1cf6f8b7d
|
perf(CacheConfig): 将所有的定义搬至config中
|
2023-12-24 15:20:27 +08:00 |
|
Liphen
|
03ccee30f6
|
style(icache): module使用小驼峰命名法
|
2023-12-24 14:14:40 +08:00 |
|
Liphen
|
881b1eca3c
|
refactor: 删除PC_WID
|
2023-12-24 14:13:05 +08:00 |
|
Liphen
|
82b0912046
|
fix(icache): 修复lru、valid存在的问题
|
2023-12-24 14:04:29 +08:00 |
|
Liphen
|
812a371571
|
refactor(issue): 修改变量名方便看波形
|
2023-12-24 13:33:08 +08:00 |
|
Liphen
|
a94958d7c9
|
refactor: 调整变量名，删除fuNum
|
2023-12-24 13:17:55 +08:00 |
|
Liphen
|
61f0692e2a
|
docs: 增加AXI文档
|
2023-12-23 20:44:37 +08:00 |
|
Liphen
|
f67f96976a
|
fix(icache): 配置成任意取指
|
2023-12-23 13:44:45 +08:00 |
|
Liphen
|
442f51d5a4
|
fix(icache): 修复之前icache遗留的问题
|
2023-12-23 11:47:35 +08:00 |
|
Liphen
|
f4e0e1b5be
|
refactor: nset改为nindex
|
2023-12-22 18:12:56 +08:00 |
|
Liphen
|
969237a09f
|
fix: 修复dcache的size
|
2023-12-22 17:57:19 +08:00 |
|
Liphen
|
faa9fca6b9
|
refactor(axi): 将常量移动到cache-axi中
|
2023-12-22 14:56:31 +08:00 |
|
Liphen
|
c0bdc5a097
|
refactor: 部分常量换成XLEN
|
2023-12-22 14:28:13 +08:00 |
|
Liphen
|
76c0f446da
|
feat: 增加dcache
|
2023-12-22 14:18:32 +08:00 |
|
Liphen
|
9001ab435c
|
修改commit信号
|
2023-12-21 16:33:20 +08:00 |
|
Liphen
|
8a9b71ab4c
|
Merge branch 'cache' into icache
|
2023-12-21 15:38:16 +08:00 |
|
Liphen
|
9d597adfa1
|
refactor(csr): mem改为单输入
|
2023-12-21 15:38:02 +08:00 |
|
Liphen
|
301199c756
|
feat: 添加icache成功生成Verilog
|
2023-12-21 15:24:57 +08:00 |
|
Liphen
|
f13b9f009f
|
refactor(const): 删除无用信号
|
2023-12-19 15:47:11 +08:00 |
|
Liphen
|
3134b79c54
|
增加puamips的cache文件
|
2023-12-19 15:08:24 +08:00 |
|
Liphen
|
41da1f4c3e
|
refactor: 修改info内信号名
|
2023-12-19 14:47:40 +08:00 |
|
Liphen
|
90efc32bca
|
feat(csr): 修改misa的ext段
|
2023-12-18 16:59:25 +08:00 |
|
Liphen
|
534e608337
|
feat: 修改PC初值
|
2023-12-18 15:26:45 +08:00 |
|
Liphen
|
ef9db0c29d
|
feat: 下一步添加cache
|
2023-12-13 19:54:44 +08:00 |
|
Liphen
|
6f065a9c67
|
perf: 缩减op信号，增加bru
|
2023-12-13 19:40:01 +08:00 |
|
Liphen
|
908fd0a377
|
增加mmio
|
2023-12-13 17:59:38 +08:00 |
|
Liphen
|
6bd22ee617
|
refactor(issue): 美化代码
|
2023-12-13 16:31:36 +08:00 |
|
Liphen
|
0fdfec4323
|
refactor(mdu): 删除无用代码
|
2023-12-13 14:19:34 +08:00 |
|
Liphen
|
5101abc727
|
refactor: 删去无用信号
|
2023-12-13 13:00:35 +08:00 |
|
Liphen
|
6678952dde
|
Remove unused code and update variable assignment in Core and Ctrl classes
|
2023-12-11 15:20:40 +08:00 |
|
Liphen
|
cface2454d
|
Remove unused variables in Core and Csr classes
|
2023-12-11 15:08:56 +08:00 |
|
Liphen
|
7df36c2c38
|
refactor: 美化代码
|
2023-12-11 15:04:58 +08:00 |
|
Liphen
|
de26a56cc2
|
feat(csr): 增加tvec模式功能
|
2023-12-11 11:23:46 +08:00 |
|
Liphen
|
452b8ad995
|
删除mem_wreg
|
2023-12-10 22:23:22 +08:00 |
|
Liphen
|
5fa965062f
|
Refactor DecoderUnit and Csr classes
|
2023-12-10 22:02:16 +08:00 |
|
Liphen
|
2ff3d1c000
|
fix: mem有例外时，exe不应当读写csr
|
2023-12-09 17:53:56 +08:00 |
|
Liphen
|
86add2c2c8
|
将mou搬到mem级
|
2023-12-09 17:48:49 +08:00 |
|
Liphen
|
2a16d26278
|
feat: 通过所有测试用例
|
2023-12-07 21:14:40 +08:00 |
|
Liphen
|
87fc0f60ee
|
fix(issue): 修复双发时inst1不能为跳转
|
2023-12-07 17:42:11 +08:00 |
|
Liphen
|
44ac8853b8
|
fix: 修复访存ready信号
|
2023-12-07 17:41:47 +08:00 |
|
Liphen
|
9524ee9919
|
fix(dcache): 解决写请求发生了两次的问题
|
2023-12-07 17:04:04 +08:00 |
|
Liphen
|
ff56c013ef
|
fix(mem): addr错误
|
2023-12-07 16:42:18 +08:00 |
|
Liphen
|
f6412b0e8c
|
fix(mem): 修复access
|
2023-12-07 16:23:42 +08:00 |
|
Liphen
|
f7ee8c4c87
|
成功生成verilog
|
2023-12-07 16:08:45 +08:00 |
|
Liphen
|
6f02672358
|
refactor: 将访存全部重构一下
|
2023-12-07 15:02:22 +08:00 |
|
Liphen
|
681162954f
|
Fix register write-after-read and load stall
issues in Issue.scala
|
2023-12-06 15:14:51 +08:00 |
|
Liphen
|
ecbaa40d88
|
Fix memory write enable in Decoder.scala
|
2023-12-06 15:14:41 +08:00 |
|
Liphen
|
f6ac8ed72a
|
perf: 将例外判断打包为函数
|
2023-12-06 14:50:59 +08:00 |
|
Liphen
|
5f75a0ac89
|
feat(mdu): 增加M拓展
|
2023-12-03 16:03:39 +08:00 |
|
Liphen
|
bda65bef5b
|
refactor(exe): alu不会产生例外
|
2023-12-03 14:34:52 +08:00 |
|
Liphen
|
1952e5f963
|
fix(id): inst1的lui特例
|
2023-12-01 16:49:02 +08:00 |
|
Liphen
|
f3a2d4e522
|
fix(id): 修复breakpoint信号错误
|
2023-12-01 16:45:33 +08:00 |
|
Liphen
|
651f8319dd
|
feat: 增加MOU用于处理fence相关指令
|
2023-12-01 16:35:59 +08:00 |
|
Liphen
|
005880f152
|
refactor: 修改exe级跳转为flush
|
2023-12-01 16:22:49 +08:00 |
|
Liphen
|
36840d6abe
|
refactor(exe): 重构部分跳转信号
|
2023-12-01 16:12:30 +08:00 |
|
Liphen
|
a08eb20f88
|
fix(exe): 修复tval更新错误
|
2023-12-01 15:24:35 +08:00 |
|
Liphen
|
ed6c3221e8
|
fix(jalr): 忽略最低位
|
2023-12-01 15:15:25 +08:00 |
|
Liphen
|
fb799d5e7f
|
feat: 增加mtval相关信号
|
2023-12-01 14:42:41 +08:00 |
|
Liphen
|
8a3e85b201
|
删除addr_err
|
2023-12-01 14:14:14 +08:00 |
|
Liphen
|
55b5cc7907
|
fix(ExeAccessMem): 例外信号逻辑错误
|
2023-12-01 13:44:47 +08:00 |
|
Liphen
|
efc80cf223
|
fix(id): 修复lui指令问题
|
2023-11-30 19:15:33 +08:00 |
|
Liphen
|
8c88660498
|
style: inst_info改为info
|
2023-11-30 18:51:47 +08:00 |
|
Liphen
|
5512fb26ec
|
fix(csr): 修复mpp写问题
|
2023-11-30 18:43:53 +08:00 |
|
Liphen
|
69f5974661
|
fix(csr): 修复例外传递bug
|
2023-11-30 17:56:14 +08:00 |
|
Liphen
|
6728817004
|
fix(mem): 修改csr交互信号
|
2023-11-30 16:42:31 +08:00 |
|
Liphen
|
ec946d5def
|
revert(icache): 回退取指read next addr
|
2023-11-30 15:45:40 +08:00 |
|
Liphen
|
145be03700
|
feat(csr): 增加cycle，修复写csr信号
|
2023-11-30 15:30:17 +08:00 |
|
Liphen
|
10b720d322
|
feat(csr): 增加debug用csr
|
2023-11-30 14:02:43 +08:00 |
|
Liphen
|
ea283c3f20
|
fix(exe): 修复csr读数据问题
|
2023-11-29 21:32:17 +08:00 |
|
Liphen
|
160daec1e2
|
fix(icache): 修复无cache时的取指问题
|
2023-11-29 21:31:54 +08:00 |
|
Liphen
|
1aeb3180ce
|
style(cache): 优化了下acc err写法
|
2023-11-29 21:12:58 +08:00 |
|
Liphen
|
31a35d4ff0
|
fix(mem acc): 修复错误数据宽
|
2023-11-29 17:41:14 +08:00 |
|
Liphen
|
1b3ce1e739
|
feat(mem): 增加acc例外
|
2023-11-29 17:20:45 +08:00 |
|
Liphen
|
b170d374ee
|
fix(csr): ret信号错误
|
2023-11-29 16:46:25 +08:00 |
|
Liphen
|
a4247ae490
|
feat(csr): 增加exc、int和mret的信号处理
|
2023-11-29 16:37:51 +08:00 |
|
Liphen
|
610323dec9
|
fix: 例外判断缺少了int
|
2023-11-29 15:37:45 +08:00 |
|
Liphen
|
7195770448
|
fix(icache): acc err时应该把valid置为1
|
2023-11-28 16:46:33 +08:00 |
|
Liphen
|
66420825a1
|
fix(csr): 增加m info寄存器
|
2023-11-28 16:34:09 +08:00 |
|
Liphen
|
5f9cbbbb6f
|
fix(idu): 数据前递时将0寄存器前递的问题
|
2023-11-28 16:04:43 +08:00 |
|
Liphen
|
8c2bc3e4a7
|
fix(issue): 修复双发策略逻辑问题
|
2023-11-28 15:49:12 +08:00 |
|
Liphen
|
eab5da04cf
|
fix(mem): ld相关读错误
|
2023-11-28 15:24:00 +08:00 |
|
Liphen
|
588d94988b
|
fix(id): 输出的addr条件错误
|
2023-11-28 15:14:19 +08:00 |
|
Liphen
|
aac7d1ccb8
|
fix(mem): 修复wstrb错误
|
2023-11-27 17:16:46 +08:00 |
|
Liphen
|
e3366efc56
|
fix(icache): 修复stall逻辑
|
2023-11-27 16:01:17 +08:00 |
|
Liphen
|
96899c5243
|
fix(bpu): 跳转addr计算错误
|
2023-11-27 15:49:07 +08:00 |
|
Liphen
|
ca37a0a4ac
|
fix(wb): 修改commit信号逻辑
|
2023-11-27 15:37:54 +08:00 |
|
Liphen
|
b30026d57c
|
fix(dcache): 修改stall逻辑
|
2023-11-27 15:22:49 +08:00 |
|
Liphen
|
53860c99c6
|
fix(exe): 修复mem addr错误
|
2023-11-27 14:55:04 +08:00 |
|
Liphen
|
4c8b004029
|
修改commit信号
|
2023-11-27 14:18:11 +08:00 |
|
Liphen
|
152bc91507
|
fix(dcache): 修复取数据问题
|
2023-11-27 14:14:19 +08:00 |
|
Liphen
|
94352e1687
|
fix(ExeAccessMem): 修复mem en信号错误
|
2023-11-26 15:43:30 +08:00 |
|
Liphen
|
10cca9929b
|
fix(id): 修复lui译码信号错
|
2023-11-26 15:06:51 +08:00 |
|
Liphen
|
fbeb9413ab
|
fix(icache): 修复取指bug
|
2023-11-26 14:49:22 +08:00 |
|
Liphen
|
703b70adf4
|
修改变量名
|
2023-11-26 12:15:14 +08:00 |
|
Liphen
|
7daed5b3a5
|
修改信号名
|
2023-11-26 11:29:59 +08:00 |
|
Liphen
|
68055ff745
|
fix(jump ctrl): 修改jump target问题
|
2023-11-24 16:54:41 +08:00 |
|
Liphen
|
2c59111fbf
|
fix(id): 修复指令错误判断条件
|
2023-11-24 16:23:10 +08:00 |
|
Liphen
|
a761e8ebad
|
fix: 增加valid标识
|
2023-11-24 16:09:51 +08:00 |
|
Liphen
|
3000c5b424
|
fix: 可以正常取指令了
|
2023-11-24 12:05:47 +08:00 |
|
Liphen
|
31eadb3bf3
|
feat: 成功读取到指令
|
2023-11-23 21:51:57 +08:00 |
|
Liphen
|
54f477b966
|
修改commit信号
|
2023-11-23 16:41:27 +08:00 |
|
Liphen
|
fa9c7afce3
|
Merge branch 'main' of github.com:Ciliphen/DC-CA-SA-Lab
|
2023-11-23 16:40:46 +08:00 |
|
Liphen
|
66b42d13f4
|
可以实现差分测试
|
2023-11-23 16:38:49 +08:00 |
|
Liphen
|
24baf95dd7
|
可以实现差分测试
|
2023-11-23 16:17:15 +08:00 |
|
Liphen
|
6fbb02fffc
|
生成verilog
|
2023-11-23 16:08:39 +08:00 |
|
Liphen
|
a1f7cd92d0
|
去除大部分类型错误
|
2023-11-23 14:08:40 +08:00 |
|
Liphen
|
a8fe6f7a9c
|
修改异常相关信号名
|
2023-11-23 13:40:17 +08:00 |
|
Liphen
|
392026c13f
|
修改commit的wdata信号量
|
2023-11-22 16:34:26 +08:00 |
|
Liphen
|
640f13a7c6
|
删除flush req、csr debug信号
|
2023-11-22 15:04:07 +08:00 |
|
Liphen
|
28d319f3cc
|
去除无用信号，修改函数名
|
2023-11-22 14:53:49 +08:00 |
|
Liphen
|
cc842aff6e
|
id级增加更多例外
|
2023-11-22 14:48:00 +08:00 |
|
Liphen
|
e909de6dfb
|
增加instrAddrMisaligned
|
2023-11-22 13:42:59 +08:00 |
|
Liphen
|
fe0aa71511
|
修改util
|
2023-11-22 11:14:32 +08:00 |
|
Liphen
|
b75c49177e
|
增加需要实现的csr
|
2023-11-21 15:10:58 +08:00 |
|
Liphen
|
eecedc6659
|
修改访存
|
2023-11-21 12:01:51 +08:00 |
|
Liphen
|
d9b66b2468
|
修改exu
|
2023-11-20 22:31:03 +08:00 |
|
Liphen
|
2d36926238
|
修改ex access mem ctrl模块
|
2023-11-20 20:52:08 +08:00 |
|
Liphen
|
90654aac2f
|
修改fu
|
2023-11-20 16:23:46 +08:00 |
|
Liphen
|
2865b6e64c
|
修改mul div
|
2023-11-20 15:51:13 +08:00 |
|
Liphen
|
6d165c916c
|
修改branch ctrl
|
2023-11-20 15:16:48 +08:00 |
|
Liphen
|
d74e4da0ae
|
修改alu
|
2023-11-20 15:15:53 +08:00 |
|
Liphen
|
bb3942d119
|
修改bpu
|
2023-11-20 14:44:23 +08:00 |
|
Liphen
|
79b8387218
|
增加取指错例外
|
2023-11-20 14:30:14 +08:00 |
|
Liphen
|
b657c0c7f0
|
ICache改为双取指
|
2023-11-20 13:58:08 +08:00 |
|
Liphen
|
7ecb175c6d
|
生成idu
|
2023-11-19 16:17:59 +08:00 |
|
Liphen
|
b509674610
|
修改jump ctrl
|
2023-11-19 15:48:37 +08:00 |
|
Liphen
|
1646a4d75d
|
修改issue unit
|
2023-11-19 15:34:14 +08:00 |
|
Liphen
|
8cc7e38b8b
|
完成对idu的修改
|
2023-11-19 15:24:10 +08:00 |
|
Liphen
|
ec63ebc747
|
feat: 修改Decode模块
|
2023-11-17 15:59:02 +08:00 |
|
Liphen
|
77aca76b74
|
增加指令集
|
2023-11-17 15:33:19 +08:00 |
|
Liphen
|
aa601e6fe9
|
增加特权指令
|
2023-11-17 14:20:18 +08:00 |
|
Liphen
|
dafbea5ee6
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增加指令定义
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2023-11-16 16:17:49 +08:00 |
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Liphen
|
9d777a6a13
|
增加rv指令
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2023-11-15 20:05:29 +08:00 |
|
Liphen
|
ebbdd5b3b7
|
重构了下core
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2023-11-14 12:11:53 +08:00 |
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Liphen
|
61930afee6
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文件结构调整
|
2023-11-13 20:10:19 +08:00 |
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Liphen
|
f229789a12
|
feat: 修改并成功生成无cache的axi
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2023-11-13 17:56:41 +08:00 |
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Liphen
|
401149f111
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feat: 增加cache至axi的转接桥
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2023-11-13 15:55:16 +08:00 |
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Liphen
|
e266678e90
|
修改cache代码
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2023-11-12 16:27:30 +08:00 |