Commit Graph

254 Commits

Author SHA1 Message Date
Liphen 9ac5f99e1f 通过了rv虚存测试,开始进行os测试 2024-01-20 16:35:38 +08:00
Liphen 704d4f7e97 fix(fu): lr提前访存地址错误 2024-01-20 15:32:40 +08:00
Liphen efb713dce3 fix(lsu): lr、sc、amo指令异常类型修正 2024-01-20 15:11:49 +08:00
Liphen ee3b3bddcd fix(ptw): 修复working逻辑 2024-01-20 14:41:42 +08:00
Liphen 3b330cf8d7 fix(cache): 修复fault信号的wait阶段复位 2024-01-20 14:32:18 +08:00
Liphen 6fb565b51f fix(tlb): 修复vma指令错误 2024-01-20 14:18:53 +08:00
Liphen a035dc5028 fix(dcache): 修复fence.i指令 2024-01-20 14:03:11 +08:00
Liphen 1ce49a39b3 fix(dcache): 修复replace时写回逻辑问题 2024-01-20 13:36:25 +08:00
Liphen a99cf13f87 tlb支持巨页 2024-01-18 16:10:59 +08:00
Liphen f182d9b1b1 fix: ptw的windex问题 2024-01-18 13:30:40 +08:00
Liphen df72450747 fix(idu): 增加tval来源 2024-01-17 16:10:00 +08:00
Liphen 2ee4b18581 fix(ptw): 修改working逻辑 2024-01-17 15:53:24 +08:00
Liphen 0b91cc5bea fix(lsu,csr): 地址全用XLEN的长度 2024-01-17 15:43:16 +08:00
Liphen 7d795f6d80 fix(cache): sv39高位需要一致 2024-01-17 15:30:25 +08:00
Liphen 39d5e8e043 fix(csr): 修复exe的valid 2024-01-17 15:18:24 +08:00
Liphen 8f9fe9362f fix: 修复tlb的2选1锁的逻辑 2024-01-17 15:05:38 +08:00
Liphen 21b73762a5 fix: ret相关指令只进行单发射 2024-01-17 14:25:35 +08:00
Liphen e897b0f00f 提交缓存大小修改至128 2024-01-17 14:03:30 +08:00
Liphen 4e300502db feat: 增加TLB,通过si-p测试 2024-01-17 13:00:01 +08:00
Liphen 404e0d64e6 使得ptw可以从cache中取数 2024-01-16 17:15:20 +08:00
Liphen 3490a3005a 增加tlbl1的d位检查 2024-01-15 17:29:35 +08:00
Liphen e37a05f5db 修改csr的status掩码 2024-01-15 16:58:37 +08:00
Liphen b16eff1ba7 增加lsu的例外处理 2024-01-15 16:01:22 +08:00
Liphen 7a3a3417c7 增加dtlb的权限检查 2024-01-15 15:09:12 +08:00
Liphen cd4345690b 增加sfence.vma 2024-01-15 14:59:55 +08:00
Liphen 2f3ff6e5dd 完成除vma指令外的框架 2024-01-15 13:36:44 +08:00
Liphen 3a3680fb02 增加ptw的大致框架 2024-01-14 17:20:16 +08:00
Liphen 07490e0f13 搭了下itlb的框架 2024-01-13 17:09:01 +08:00
Liphen 6ca4ffcd86 refactor: 重构tlb 2024-01-13 13:13:31 +08:00
Liphen 08def4d1a0 refactor: decoder级重命名为decode 2024-01-07 16:57:36 +08:00
Liphen 60b247c5ec docs: 增加实验文档 2024-01-07 16:49:54 +08:00
Liphen eeb076b060 增加tlb相关常量定义 2024-01-03 16:17:36 +08:00
Liphen 78ca79384e style: config统一为cpuConfig 2024-01-03 14:29:19 +08:00
Liphen aa189bb985 fix(CacheConfig): cache容量不能超过4kb 2024-01-03 12:02:49 +08:00
Liphen f3d5b5cd1e refactor: 将所有的地址宽度调为XLEN 2024-01-03 10:54:44 +08:00
Liphen 69e8b45484 perf(idu): 增加保留指令的tval 2024-01-02 15:06:08 +08:00
Liphen 287cc5479d feat(csr): 增加写satp及其flush的操作 2024-01-02 13:56:03 +08:00
Liphen 526450efd9 feat(csr): 增加delegation 2024-01-01 19:14:35 +08:00
Liphen 895f1e2697 feat(csr): 增加s模式的csr 2024-01-01 17:17:38 +08:00
Liphen d9f73ff104 fix(dcache): dirty table逻辑修复 2023-12-31 11:05:49 +08:00
Liphen 71543700c8 perf(lsu): 修改完成信号的逻辑 2023-12-29 12:07:18 +08:00
Liphen e81d0d2b8c feat(lsu): 实现amo指令 2023-12-29 11:56:37 +08:00
Liphen b21a26f947 feat(cache): 实现了fence 2023-12-29 11:14:04 +08:00
Liphen 0275ea313d fix(dcache): 修复wstrb的索引问题 2023-12-29 10:46:51 +08:00
Liphen 7470c6fb5f 增加fence,修复dcache的一处bug 2023-12-28 22:21:38 +08:00
Liphen 277c3d31ad fix(dcache): bankoffset及时更新 2023-12-28 20:16:51 +08:00
Liphen fa41d30146 fix(dcache): 修复读数据时data的索引错误 2023-12-28 18:39:43 +08:00
Liphen 6f5df6895e fix(dcache): 修复wstrb,修复cache大小限制 2023-12-28 18:30:02 +08:00
Liphen 1e11239281 fix(dcache): 目前可以生成verilog 2023-12-28 17:03:11 +08:00
Liphen 82f9573fad refactor(cache): 删去无用信号,修改cache大小 2023-12-28 16:06:54 +08:00
Liphen 11dff5ca0f refactor(dcache): 删除cache data forward 2023-12-28 13:40:54 +08:00
Liphen b45e0194fa refactor(cache): 进行部分变量替换 2023-12-28 13:40:25 +08:00
Liphen 4355bc3b5d fix(fu): 提前访存地址生成错误 2023-12-26 14:56:25 +08:00
Liphen c112df3e35 style(cache): use next addr信号名修改 2023-12-26 14:56:02 +08:00
Liphen 51debc4d27 fix(idu): inst1的ebreak生成有误 2023-12-26 14:27:10 +08:00
Liphen e6a6f250c9 fix(exe): 在exe提前访存 2023-12-25 21:19:31 +08:00
Liphen 35ca9a1732 refactor: 移动文件,优化结构 2023-12-25 20:14:51 +08:00
Liphen 108c529698 fix(cache): 将save状态改成wait,更符合作用 2023-12-25 15:45:30 +08:00
Liphen ac6aefff8a style(tlb): 加上p的前缀表示物理地址 2023-12-25 14:08:54 +08:00
Liphen 90bc47c48b fix(dcache): 修复显著的问题,目前仍存在bug 2023-12-25 14:02:01 +08:00
Liphen e1639e6f8b fix(tlb): 修复数据宽度问题 2023-12-25 14:01:31 +08:00
Liphen e646ee4a4c docs(cache): 增加注释 2023-12-24 16:21:53 +08:00
Liphen c1cf6f8b7d perf(CacheConfig): 将所有的定义搬至config中 2023-12-24 15:20:27 +08:00
Liphen 03ccee30f6 style(icache): module使用小驼峰命名法 2023-12-24 14:14:40 +08:00
Liphen 881b1eca3c refactor: 删除PC_WID 2023-12-24 14:13:05 +08:00
Liphen 82b0912046 fix(icache): 修复lru、valid存在的问题 2023-12-24 14:04:29 +08:00
Liphen 812a371571 refactor(issue): 修改变量名方便看波形 2023-12-24 13:33:08 +08:00
Liphen a94958d7c9 refactor: 调整变量名,删除fuNum 2023-12-24 13:17:55 +08:00
Liphen 61f0692e2a docs: 增加AXI文档 2023-12-23 20:44:37 +08:00
Liphen f67f96976a fix(icache): 配置成任意取指 2023-12-23 13:44:45 +08:00
Liphen 442f51d5a4 fix(icache): 修复之前icache遗留的问题 2023-12-23 11:47:35 +08:00
Liphen f4e0e1b5be refactor: nset改为nindex 2023-12-22 18:12:56 +08:00
Liphen 969237a09f fix: 修复dcache的size 2023-12-22 17:57:19 +08:00
Liphen faa9fca6b9 refactor(axi): 将常量移动到cache-axi中 2023-12-22 14:56:31 +08:00
Liphen c0bdc5a097 refactor: 部分常量换成XLEN 2023-12-22 14:28:13 +08:00
Liphen 76c0f446da feat: 增加dcache 2023-12-22 14:18:32 +08:00
Liphen 9001ab435c 修改commit信号 2023-12-21 16:33:20 +08:00
Liphen 8a9b71ab4c Merge branch 'cache' into icache 2023-12-21 15:38:16 +08:00
Liphen 9d597adfa1 refactor(csr): mem改为单输入 2023-12-21 15:38:02 +08:00
Liphen 301199c756 feat: 添加icache成功生成Verilog 2023-12-21 15:24:57 +08:00
Liphen f13b9f009f refactor(const): 删除无用信号 2023-12-19 15:47:11 +08:00
Liphen 3134b79c54 增加puamips的cache文件 2023-12-19 15:08:24 +08:00
Liphen 41da1f4c3e refactor: 修改info内信号名 2023-12-19 14:47:40 +08:00
Liphen 90efc32bca feat(csr): 修改misa的ext段 2023-12-18 16:59:25 +08:00
Liphen 534e608337 feat: 修改PC初值 2023-12-18 15:26:45 +08:00
Liphen ef9db0c29d feat: 下一步添加cache 2023-12-13 19:54:44 +08:00
Liphen 6f065a9c67 perf: 缩减op信号,增加bru 2023-12-13 19:40:01 +08:00
Liphen 908fd0a377 增加mmio 2023-12-13 17:59:38 +08:00
Liphen 6bd22ee617 refactor(issue): 美化代码 2023-12-13 16:31:36 +08:00
Liphen 0fdfec4323 refactor(mdu): 删除无用代码 2023-12-13 14:19:34 +08:00
Liphen 5101abc727 refactor: 删去无用信号 2023-12-13 13:00:35 +08:00
Liphen 6678952dde Remove unused code and update variable assignment in Core and Ctrl classes 2023-12-11 15:20:40 +08:00
Liphen cface2454d Remove unused variables in Core and Csr classes 2023-12-11 15:08:56 +08:00
Liphen 7df36c2c38 refactor: 美化代码 2023-12-11 15:04:58 +08:00
Liphen de26a56cc2 feat(csr): 增加tvec模式功能 2023-12-11 11:23:46 +08:00
Liphen 452b8ad995 删除mem_wreg 2023-12-10 22:23:22 +08:00
Liphen 5fa965062f Refactor DecoderUnit and Csr classes 2023-12-10 22:02:16 +08:00
Liphen 2ff3d1c000 fix: mem有例外时,exe不应当读写csr 2023-12-09 17:53:56 +08:00
Liphen 86add2c2c8 将mou搬到mem级 2023-12-09 17:48:49 +08:00
Liphen 2a16d26278 feat: 通过所有测试用例 2023-12-07 21:14:40 +08:00