Merge branch 'main' of github.com:Ciliphen/DC-CA-SA-Lab

2023-11-23 16:40:46 +08:00 · 2023-11-23 16:40:46 +08:00 · fa9c7afce3
parent 66b42d13f4 24baf95dd7
commit fa9c7afce3
1 changed files with 1 additions and 0 deletions
--- a/chisel/playground/src/pipeline/writeback/WriteBackUnit.scala
+++ b/chisel/playground/src/pipeline/writeback/WriteBackUnit.scala
@ -64,4 +64,5 @@ class WriteBackUnit(implicit val config: CpuConfig) extends Module {
      io.regfile(1).wdata
    )
  }
+  io.debug.wb_rf_wen := io.ctrl.allow_to_go
 }