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Fix memory write enable in Decoder.scala

This commit is contained in:
Liphen 2023-12-06 15:14:41 +08:00
parent f6ac8ed72a
commit ecbaa40d88
2 changed files with 12 additions and 12 deletions
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2
chisel/playground/src/pipeline/decoder/Decoder.scala
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@ -58,5 +58,5 @@ class Decoder extends Module with HasInstrType {
) )
) )
io.out.info.inst := inst io.out.info.inst := inst
io.out.info.mem_wreg := fuType === FuType.lsu && LSUOpType.isLoad(fuOpType) io.out.info.mem_wreg := fuType === FuType.lsu && io.out.info.reg_wen
} }