!671 在riscv32_virt中新增graphic适配，将riscv32_virt编译从musl调整为newlib

Merge pull request !671 from xiexg-dc/riscv32-virt

Kconfig

@@ -1,5 +1,5 @@
 # Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
-# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
+# Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without modification,
 # are permitted provided that the following conditions are met:
@@ -91,19 +91,20 @@ menu "Platform"
 ######################### config options of bsp #####################
 config PLATFORM
     string
-    default "virt"            if PLATFORM_QEMU_ARM_VIRT_CM7 || PLATFORM_QEMU_ARM_VIRT_CM4 || PRODUCT_QEMU_RISCV32_VIRT || PLATFORM_QEMU_CSKY_SMARTL || PLATFORM_QEMU_XTENSA_ESP32
+    default "virt"            if PLATFORM_QEMU_ARM_VIRT_CM7 || PLATFORM_QEMU_ARM_VIRT_CM4 || PLATFORM_QEMU_ARM_VIRT_CM55 || PRODUCT_QEMU_RISCV32_VIRT || PLATFORM_QEMU_CSKY_SMARTL || PLATFORM_QEMU_XTENSA_ESP32
 
 config PRODUCT_NAME
     string
     default "arm_virt" if PRODUCT_QEMU_ARM
     default "arm_mps2_an386" if PRODUCT_QEMU_ARM_MPS2_AN386
+    default "arm_mps3_an547" if PRODUCT_QEMU_ARM_MPS3_AN547
     default "riscv32_virt" if PRODUCT_QEMU_RISCV32_VIRT
     default "csky_smartl_e802" if PRODUCT_QEMU_CSKY_SMARTL_E802
     default "xtensa_esp32" if PRODUCT_QEMU_XTENSA_ESP32
 
 config DEVICE_COMPANY
     string
-    default "qemu" if PLATFORM_QEMU_ARM_VIRT_CM7 || PLATFORM_QEMU_ARM_VIRT_CM4 || PRODUCT_QEMU_RISCV32_VIRT || PLATFORM_QEMU_CSKY_SMARTL || PLATFORM_QEMU_XTENSA_ESP32
+    default "qemu" if PLATFORM_QEMU_ARM_VIRT_CM7 || PLATFORM_QEMU_ARM_VIRT_CM4 || PLATFORM_QEMU_ARM_VIRT_CM55 || PRODUCT_QEMU_RISCV32_VIRT || PLATFORM_QEMU_CSKY_SMARTL || PLATFORM_QEMU_XTENSA_ESP32
 
 choice
     prompt "Chip"
@@ -128,6 +129,12 @@ config PLATFORM_QEMU_ARM_VIRT_CM4
     help
         QEMU ARM Virtual Platform using Cortex-M4 CPU.
 
+config PLATFORM_QEMU_ARM_VIRT_CM55
+    bool "qemu_arm_virt_cm55"
+    select ARCH_CORTEX_M55
+    help
+        QEMU ARM Virtual Platform using Cortex-M55 CPU.
+
 config PLATFORM_QEMU_RISCV32_VIRT
     bool "qemu_riscv32_virt"
     select ARCH_RISCV32
@@ -159,6 +166,9 @@ config PRODUCT_QEMU_ARM
 config PRODUCT_QEMU_ARM_MPS2_AN386
     bool "arm_mps2_an386" if PLATFORM_QEMU_ARM_VIRT_CM4
 
+config PRODUCT_QEMU_ARM_MPS3_AN547
+    bool "arm_mps3_an547" if PLATFORM_QEMU_ARM_VIRT_CM55
+
 config PRODUCT_QEMU_RISCV32_VIRT
     bool "riscv32_virt" if PLATFORM_QEMU_RISCV32_VIRT
 
@@ -307,7 +317,7 @@ config CPUP_INCLUDE_IRQ
     help
       If you wish to include irq usage for cpup.
 
-config DYNLINK
+config KERNEL_DYNLINK
     bool "Enable Dynamic Link Feature"
     default n
     depends on KERNEL_EXTKERNEL && ARCH_ARM
@@ -359,7 +369,7 @@ config KERNEL_LMK
     default n
     depends on KERNEL_EXTKERNEL
     help
-      Configuration item for low momery killer tailoring.
+      Configuration item for low memory killer tailoring.
       If you wish to build LiteOS with support for low memory killer.
 
 config KERNEL_LMK_DEBUG
@@ -564,7 +574,7 @@ config MEM_LEAKCHECK
     depends on DEBUG_VERSION && MEM_DEBUG
     select KERNEL_BACKTRACE
     help
-      Answer Y to enable record the LR of Function call stack of Mem operation, it can check the mem leak through the infomations of mem node.
+      Answer Y to enable record the LR of Function call stack of Mem operation, it can check the mem leak through the informations of mem node.
 config BASE_MEM_NODE_INTEGRITY_CHECK
     bool "Enable integrity check or not"
     default n
@@ -590,11 +600,11 @@ endmenu
 
 ######################## config options os security #######################
 menu "Security"
-osource "security/Kconfig"
 config SECURE_TRUSTZONE
     bool "Enable ARM TrustZone"
     default n
     depends on ARCH_ARM
+    depends on ARCH_ARM_V8M
 config SECURE_HEAP_SIZE
     int "TrustZone Heap Size (bytes)"
     default 2048
@@ -605,6 +615,13 @@ config SECURE_STACK_DEFAULT_SIZE
     depends on SECURE_TRUSTZONE
     help
       The secure stack must be allocated before the task calls non-secure functions.
+config SECURE
+    bool "Enable Security"
+    default n
+    select MPU_ENABLE
+config MPU_ENABLE
+    bool "Enable MPU"
+    default n
 endmenu
 
 menu "Test"

README.md

@@ -85,11 +85,11 @@ Before setting up the environment for a development board, you must set up the b
 
 For details about how to obtain the source code, see [Source Code Acquisition](https://gitee.com/openharmony/docs/blob/HEAD/en/device-dev/get-code/sourcecode-acquire.md). This document assumes that the clone directory is `~/openHarmony` after the complete OpenHarmony repository code is obtained.
 
-### Example projects that are already supported
+### Example projects
 
-Qemu simulator: `arm_mps2_an386、esp32、riscv32_virt、SmartL_E802`, For details about how to compile and run, see [qemu guide](https://gitee.com/openharmony/device_qemu)
+Qemu simulator: `arm_mps2_an386、esp32、riscv32_virt、SmartL_E802`. For details about how to compile and run, see [qemu guide](https://gitee.com/openharmony/device_qemu).
 
-Bestechnic: `bes2600`, For details about how to compile and run, see [Bestechnic developer guide](https://gitee.com/openharmony/device_soc_bestechnic)
+Bestechnic: `bes2600`. For details about how to compile and run, see [Bestechnic developer guide](https://gitee.com/openharmony/device_soc_bestechnic).
 
 ### Community Porting Project Links
 
@@ -131,4 +131,4 @@ How to contribute a chip based on Liteos-M kernel:
 
 [Kernel Subsystem](https://gitee.com/openharmony/docs/blob/HEAD/en/readme/kernel-subsystem.md)
 
-**kernel\_liteos\_m**
+[kernel\_liteos\_m](https://gitee.com/openharmony/kernel_liteos_m/blob/master/README.md)

README_zh.md

@@ -131,5 +131,5 @@ LiteOS-M内核移植的具体开发板的工程由社区开发者提供，可以
 
 [内核子系统](https://gitee.com/openharmony/docs/blob/HEAD/zh-cn/readme/%E5%86%85%E6%A0%B8%E5%AD%90%E7%B3%BB%E7%BB%9F.md)
 
-**kernel\_liteos\_m**
+[kernel\_liteos\_m](https://gitee.com/openharmony/kernel_liteos_m/blob/master/README_zh.md)
 

arch/BUILD.gn

@@ -37,9 +37,10 @@ module_group("arch") {
   modules = []
   if ("$board_cpu" == "arm9" || "$board_cpu" == "cortex-m3" ||
       "$board_cpu" == "cortex-m4" || "$board_cpu" == "cortex-m7" ||
-      "$board_cpu" == "cortex-m33") {
+      "$board_cpu" == "cortex-m33" || "$board_cpu" == "cortex-m55") {
     modules += [ "arm" ]
-  } else if ("$board_cpu" == "ck802" || "$board_cpu" == "e802") {
+  } else if ("$board_cpu" == "ck802" || "$board_cpu" == "e802" ||
+             "$board_cpu" == "ck804ef") {
     modules += [ "csky" ]
   } else if ("$board_cpu" == "") {
     if ("$board_arch" == "rv32imac" || "$board_arch" == "rv32imafdc") {

arch/arm/Kconfig

@@ -16,12 +16,16 @@ config ARCH_ARM_AARCH32
 config ARCH_ARM_V7M
     bool
 
+config ARCH_ARM_V8M
+    bool
+
 config ARCH_ARM_V5TE
     bool
 
 config ARCH_ARM_VER
     string
     default "armv7-m" if ARCH_ARM_V7M
+    default "armv8-m" if ARCH_ARM_V8M
     default "armv5te" if ARCH_ARM_V5TE
 
 #
@@ -84,15 +88,20 @@ config ARCH_CORTEX_M7
     select ARCH_ARM_AARCH32
     select ARCH_FPU_VFP_V4
     select ARCH_FPU_VFP_D32
-    select ARCH_FPU_VFP_NEON
 
 config ARCH_CORTEX_M33
     bool
-    select ARCH_ARM_V7M
+    select ARCH_ARM_V8M
+    select ARCH_ARM_AARCH32
+    select ARCH_FPU_VFP_V4
+    select ARCH_FPU_VFP_D32
+
+config ARCH_CORTEX_M55
+    bool
+    select ARCH_ARM_V8M
     select ARCH_ARM_AARCH32
     select ARCH_FPU_VFP_V4
     select ARCH_FPU_VFP_D32
-    select ARCH_FPU_VFP_NEON
 
 config ARCH_ARM9
     bool
@@ -105,4 +114,5 @@ config ARCH_CPU
     default "cortex-m4" if ARCH_CORTEX_M4
     default "cortex-m7" if ARCH_CORTEX_M7
     default "cortex-m33" if ARCH_CORTEX_M33
+    default "cortex-m55" if ARCH_CORTEX_M55
     default "arm9" if ARCH_ARM9

arch/arm/arm9/gcc/los_context.c

@@ -76,6 +76,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
     TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
+    LosTaskCB *taskCB = OS_TCB_FROM_TID(taskID);
 
     context->r0 = taskID;
     context->r1 = 0x01010101L;

arch/arm/arm9/gcc/los_interrupt.c

@@ -163,21 +163,21 @@ inline UINT32 ArchIsIntActive(VOID)
  Output      : None
  Return      : None
  **************************************************************************** */
-/*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -231,21 +231,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler  --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINT32 intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -259,9 +260,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask(hwiNum);
     LOS_IntRestore(intSave);
@@ -273,11 +279,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {

arch/arm/arm9/gcc/los_timer.c

@@ -52,7 +52,7 @@
 #define OS_TIMER_READ_VAL_ADDR      (OS_TIMER_REG_BASE + 20)
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -60,6 +60,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = OS_TIMER_IRQ_NUM,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -107,12 +108,17 @@ STATIC VOID SysTickClockIrqClear(VOID)
     } while (status & mask);
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
+
     SysTickLock();
-    WRITE_UINT32(nextResponseTime, OS_TIMER_PERIOD_REG_ADDR);
+    WRITE_UINT32((UINT32)nextResponseTime, OS_TIMER_PERIOD_REG_ADDR);
     SysTickClockIrqClear();
     SysTickUnlock();
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/arm/cortex-m3/keil/los_exc.S

@@ -190,7 +190,7 @@ _hwiActiveCheck
     CMP   R3, #0
     BEQ   _hwiActiveCheckNext
 
-    ; exc occured in IRQ
+    ; exc occurred in IRQ
     ORR   R0, R0, #FLAG_HWI_ACTIVE
     RBIT  R2, R3
     CLZ   R2, R2
@@ -228,19 +228,19 @@ _hwiActiveCheckNext
     AND   R2, R2,R3
     CMP   R2,#0
     BNE   _ExcInMSP
-    ; exc occured in Task or Init or exc
+    ; exc occurred in Task or Init or exc
     ; reserved for register info from task stack
 
     LDR  R2, =g_taskScheduled
     LDR  R2, [R2]
     TST  R2, #1         ; OS_FLG_BGD_ACTIVE
-    BEQ  _ExcInMSP                      ; if exc occured in Init then branch
+    BEQ  _ExcInMSP                      ; if exc occurred in Init then branch
 
 
     CMP   LR, #0xFFFFFFED               ;auto push floating registers
     BNE   _NoFloatInPsp
 
-    ; exc occured in Task
+    ; exc occurred in Task
     MOV   R2,  R13
     SUB   R13, #96                      ; add 8 Bytes reg(for STMFD)
 

arch/arm/cortex-m3/keil/los_interrupt.c

@@ -40,14 +40,12 @@
 #include "los_memory.h"
 #include "los_membox.h"
 
-/*lint -save -e40 -e522 -e533*/
 UINT32 g_intCount = 0;
 
-/*lint -restore*/
 #ifdef __ICCARM__
 #pragma location = ".data.vector"
 #elif defined(__CC_ARM) || defined(__GNUC__)
-#pragma data_alignment=LOSCFG_ARCH_HWI_VECTOR_ALIGN
+#pragma data_alignment = LOSCFG_ARCH_HWI_VECTOR_ALIGN
 LITE_OS_SEC_VEC
 #endif
 /* *
@@ -198,21 +196,21 @@ inline UINT32 ArchIsIntActive(VOID)
  Output      : None
  Return      : None
  **************************************************************************** */
-/*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -266,21 +264,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINT32 intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -298,9 +297,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask((IRQn_Type)hwiNum);
     HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
@@ -314,11 +318,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {
@@ -593,7 +599,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
-	
+
     /* Enable DIV 0 and unaligned exception */
 #ifdef LOSCFG_ARCH_UNALIGNED_EXC
     *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);

arch/arm/cortex-m3/keil/los_timer.c

@@ -37,7 +37,7 @@
 #include "los_debug.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -45,6 +45,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = SysTick_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -76,13 +77,19 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
+
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
     NVIC_ClearPendingIRQ(SysTick_IRQn);
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/arm/cortex-m33/gcc/NTZ/los_exc.S

@@ -263,7 +263,7 @@ _hwiActiveCheck:
     CMP   R3, #0
     BEQ   _hwiActiveCheckNext
 
-    // exc occured in IRQ
+    // exc occurred in IRQ
     ORR   R0, R0, #FLAG_HWI_ACTIVE
     RBIT  R2, R3
     CLZ   R2, R2
@@ -316,19 +316,19 @@ _hwiActiveCheckNext:
     AND   R2, R2,R3
     CMP   R2,#0
     BNE   _ExcInMSP
-    // exc occured in Task or Init or exc
+    // exc occurred in Task or Init or exc
     // reserved for register info from task stack
 
     LDR  R2, =g_taskScheduled
     LDR  R2, [R2]
     TST  R2, #1                         // OS_FLG_BGD_ACTIVE
-    BEQ  _ExcInMSP                      // if exc occured in Init then branch
+    BEQ  _ExcInMSP                      // if exc occurred in Init then branch
 
 
     CMP   LR, #0xFFFFFFED               //auto push floating registers
     BNE   _NoFloatInPsp
 
-    // exc occured in Task
+    // exc occurred in Task
     MOV   R2,  R13
     SUB   R13, #96                      // add 8 Bytes reg(for STMFD)
 

arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c

@@ -41,10 +41,8 @@
 #include "los_membox.h"
 
 #define DEF_HANDLER_START_INDEX 2
-/*lint -save -e40 -e522 -e533*/
 UINT32 g_intCount = 0;
 
-/*lint -restore*/
 
 /* *
  * @ingroup los_hwi
@@ -189,21 +187,21 @@ inline UINT32 ArchIsIntActive(VOID)
  Output      : None
  Return      : None
  **************************************************************************** */
-/*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -257,21 +255,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINT32 intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -289,9 +288,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask((IRQn_Type)hwiNum);
     HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
@@ -305,11 +309,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {
@@ -584,7 +590,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
-	
+
     /* Enable DIV 0 and unaligned exception */
 #ifdef LOSCFG_ARCH_UNALIGNED_EXC
     *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);

arch/arm/cortex-m33/gcc/NTZ/los_timer.c

@@ -36,7 +36,7 @@
 #include "los_debug.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -44,6 +44,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = SysTick_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -75,13 +76,18 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
+
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
     NVIC_ClearPendingIRQ(SysTick_IRQn);
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/arm/cortex-m33/gcc/TZ/non_secure/los_exc.S

@@ -247,7 +247,7 @@ _hwiActiveCheck:
     CMP   R3, #0
     BEQ   _hwiActiveCheckNext
 
-    // exc occured in IRQ
+    // exc occurred in IRQ
     ORR   R0, R0, #FLAG_HWI_ACTIVE
     RBIT  R2, R3
     CLZ   R2, R2
@@ -300,19 +300,19 @@ _hwiActiveCheckNext:
     AND   R2, R2,R3
     CMP   R2,#0
     BNE   _ExcInMSP
-    // exc occured in Task or Init or exc
+    // exc occurred in Task or Init or exc
     // reserved for register info from task stack
 
     LDR  R2, =g_taskScheduled
     LDR  R2, [R2]
     TST  R2, #1                         // OS_FLG_BGD_ACTIVE
-    BEQ  _ExcInMSP                      // if exc occured in Init then branch
+    BEQ  _ExcInMSP                      // if exc occurred in Init then branch
 
 
     CMP   LR, #0xFFFFFFED               //auto push floating registers
     BNE   _NoFloatInPsp
 
-    // exc occured in Task
+    // exc occurred in Task
     MOV   R2,  R13
     SUB   R13, #96                      // add 8 Bytes reg(for STMFD)
 

arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c

@@ -41,11 +41,8 @@
 #include "los_membox.h"
 
 #define DEF_HANDLER_START_INDEX 2
-/*lint -save -e40 -e522 -e533*/
 UINT32 g_intCount = 0;
 
-/*lint -restore*/
-
 /* *
  * @ingroup los_hwi
  * Hardware interrupt form mapping handling function array.
@@ -192,18 +189,19 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -257,21 +255,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINT32 intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -289,9 +288,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask((IRQn_Type)hwiNum);
     HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
@@ -305,11 +309,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {
@@ -584,7 +590,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
-	
+
     /* Enable DIV 0 and unaligned exception */
 #ifdef LOSCFG_ARCH_UNALIGNED_EXC
     *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);

arch/arm/cortex-m33/gcc/TZ/non_secure/los_timer.c

@@ -35,7 +35,7 @@
 #include "los_arch_interrupt.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -43,6 +43,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = SysTick_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -74,13 +75,18 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
+
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
     NVIC_ClearPendingIRQ(SysTick_IRQn);
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/arm/cortex-m33/iar/NTZ/los_exc.S

@@ -56,8 +56,8 @@ FLAG_ADDR_VALID             EQU   0x10000
 FLAG_HWI_ACTIVE             EQU   0x20000
 FLAG_NO_FLOAT               EQU   0x10000000
 
-OS_NVIC_FSR                 EQU   0xE000ED28      ;include BusFault/MemFault/UsageFault State Regeister
-OS_NVIC_HFSR                EQU   0xE000ED2C      ;HardFault State Regeister
+OS_NVIC_FSR                 EQU   0xE000ED28      ;include BusFault/MemFault/UsageFault State Register
+OS_NVIC_HFSR                EQU   0xE000ED2C      ;HardFault State Register
 OS_NVIC_BFAR                EQU   0xE000ED38
 OS_NVIC_MMAR                EQU   0xE000ED34
 OS_NVIC_ACT_BASE            EQU   0xE000E300
@@ -190,7 +190,7 @@ _hwiActiveCheck
     CMP   R3, #0
     BEQ   _hwiActiveCheckNext
 
-    ; exc occured in IRQ
+    ; exc occurred in IRQ
     ORR   R0, R0, #FLAG_HWI_ACTIVE
     RBIT  R2, R3
     CLZ   R2, R2
@@ -228,19 +228,19 @@ _hwiActiveCheckNext
     AND   R2, R2,R3
     CMP   R2,#0
     BNE   _ExcInMSP
-    ; exc occured in Task or Init or exc
+    ; exc occurred in Task or Init or exc
     ; reserved for register info from task stack
 
     LDR  R2, =g_taskScheduled
     LDR  R2, [R2]
     TST  R2, #1         ; OS_FLG_BGD_ACTIVE
-    BEQ  _ExcInMSP                      ; if exc occured in Init then branch
+    BEQ  _ExcInMSP                      ; if exc occurred in Init then branch
 
 
     CMP   LR, #0xFFFFFFED               ;auto push floating registers
     BNE   _NoFloatInPsp
 
-    ; exc occured in Task
+    ; exc occurred in Task
     MOV   R2,  R13
     SUB   R13, #96                      ; add 8 Bytes reg(for STMFD)
 

arch/arm/cortex-m33/iar/NTZ/los_interrupt.c

@@ -46,7 +46,7 @@ UINT32 g_intCount = 0;
 
 /*lint -restore*/
 #pragma location = ".data.vector"
-#pragma data_alignment=LOSCFG_ARCH_HWI_VECTOR_ALIGN
+#pragma data_alignment = LOSCFG_ARCH_HWI_VECTOR_ALIGN
 /* *
  * @ingroup los_hwi
  * hardware interrupt form mapping handling function array.
@@ -198,18 +198,19 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -265,21 +266,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINTPTR intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -297,9 +299,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask((IRQn_Type)hwiNum);
     HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
@@ -313,11 +320,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {

arch/arm/cortex-m33/iar/NTZ/los_timer.c

@@ -36,7 +36,7 @@
 #include "los_debug.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -44,6 +44,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = SysTick_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -75,13 +76,17 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
     NVIC_ClearPendingIRQ(SysTick_IRQn);
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/arm/cortex-m33/iar/TZ/non_secure/los_exc.S

@@ -55,8 +55,8 @@ FLAG_ADDR_VALID             EQU   0x10000
 FLAG_HWI_ACTIVE             EQU   0x20000
 FLAG_NO_FLOAT               EQU   0x10000000
 
-OS_NVIC_FSR                 EQU   0xE000ED28      ;include BusFault/MemFault/UsageFault State Regeister
-OS_NVIC_HFSR                EQU   0xE000ED2C      ;HardFault State Regeister
+OS_NVIC_FSR                 EQU   0xE000ED28      ;include BusFault/MemFault/UsageFault State Register
+OS_NVIC_HFSR                EQU   0xE000ED2C      ;HardFault State Register
 OS_NVIC_BFAR                EQU   0xE000ED38
 OS_NVIC_MMAR                EQU   0xE000ED34
 OS_NVIC_ACT_BASE            EQU   0xE000E300
@@ -179,7 +179,7 @@ _hwiActiveCheck
     CMP   R3, #0
     BEQ   _hwiActiveCheckNext
 
-    ; exc occured in IRQ
+    ; exc occurred in IRQ
     ORR   R0, R0, #FLAG_HWI_ACTIVE
     RBIT  R2, R3
     CLZ   R2, R2
@@ -217,19 +217,19 @@ _hwiActiveCheckNext
     AND   R2, R2,R3
     CMP   R2,#0
     BNE   _ExcInMSP
-    ; exc occured in Task or Init or exc
+    ; exc occurred in Task or Init or exc
     ; reserved for register info from task stack
 
     LDR  R2, =g_taskScheduled
     LDR  R2, [R2]
     TST  R2, #1         ; OS_FLG_BGD_ACTIVE
-    BEQ  _ExcInMSP                      ; if exc occured in Init then branch
+    BEQ  _ExcInMSP                      ; if exc occurred in Init then branch
 
 
     CMP   LR, #0xFFFFFFED               ;auto push floating registers
     BNE   _NoFloatInPsp
 
-    ; exc occured in Task
+    ; exc occurred in Task
     MOV   R2,  R13
     SUB   R13, #96                      ; add 8 Bytes reg(for STMFD)
 

arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c

@@ -46,7 +46,7 @@ UINT32 g_intCount = 0;
 
 /*lint -restore*/
 #pragma location = ".data.vector"
-#pragma data_alignment=LOSCFG_ARCH_HWI_VECTOR_ALIGN
+#pragma data_alignment = LOSCFG_ARCH_HWI_VECTOR_ALIGN
 /* *
  * @ingroup los_hwi
  * hardware interrupt form mapping handling function array.
@@ -198,18 +198,19 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -265,21 +266,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINTPTR intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -297,9 +299,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask((IRQn_Type)hwiNum);
     HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
@@ -313,11 +320,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {

arch/arm/cortex-m33/iar/TZ/non_secure/los_timer.c

@@ -36,7 +36,7 @@
 #include "los_debug.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -44,6 +44,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = SysTick_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -75,13 +76,18 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
+
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
     NVIC_ClearPendingIRQ(SysTick_IRQn);
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/arm/cortex-m33/iar/TZ/secure/los_secure_heap.c

@@ -34,7 +34,7 @@
 #include "los_config.h"
 #include "los_list.h"
 
-#pragma data_alignment=0x4
+#pragma data_alignment = 0x4
 STATIC UINT8 g_secureHeap[LOSCFG_SECURE_HEAP_SIZE] = {0};
 STATIC LOS_DL_LIST g_secureHeapFreeList = {NULL, NULL};
 

arch/arm/cortex-m4/gcc/los_arch_context.h

@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
+ * Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
@@ -121,6 +121,29 @@ typedef struct TagTskContext {
  */
 extern VOID HalStartToRun(VOID);
 
+#if (LOSCFG_SECURE == 1)
+/**
+ * @ingroup  los_config
+ * @brief: User Task Stack Initialize.
+ *
+ * @par Description:
+ * This API is used to init a user task stack.
+ *
+ * @attention:
+ * <ul><li>None.</li></ul>
+ *
+ * @param: context      [IN] Task context.
+ * @param: taskEntry    [IN] Task entry function address.
+ * @param: stack        [IN] Task stack address.
+ *
+ * @retval None.
+ *
+ * @par Dependency: <ul><li>los_config.h: the header file that contains the API declaration.</li></ul>
+ * @see None.
+ */
+extern VOID HalUserTaskStackInit(TaskContext *context, UINTPTR taskEntry, UINTPTR stack);
+#endif
+
 #ifdef __cplusplus
 #if __cplusplus
 }

arch/arm/cortex-m4/gcc/los_context.c

@@ -148,6 +148,15 @@ VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandl
     return (VOID *)context;
 }
 
+#if (LOSCFG_SECURE == 1)
+VOID HalUserTaskStackInit(TaskContext *context, UINTPTR taskEntry, UINTPTR stack)
+{
+    context->uwR0 = stack;
+    context->uwPC = (UINT32)taskEntry;
+    context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
+}
+#endif
+
 LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
 {
     (VOID)LOS_IntLock();

arch/arm/cortex-m4/gcc/los_dispatch.S

@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
+ * Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
@@ -40,6 +40,12 @@
 .equ    OS_NVIC_PENDSV_PRI,          0xF0F00000
 .equ    OS_NVIC_PENDSVSET,           0x10000000
 .equ    OS_TASK_STATUS_RUNNING,      0x0010
+.equ    OS_CONTROL_FPCA_ENABLE,      0x4
+.equ    OS_CONTROL_KERNEL_MODE,      0x2
+#if (LOSCFG_SECURE == 1)
+.equ    OS_CONTROL_USER_MODE,        0x3
+.equ    OS_TASK_FLAG_USER_TASK,      0x0200
+#endif
 
     .section .text
     .thumb
@@ -63,7 +69,7 @@ HalStartToRun:
     ldr     r5, =OS_NVIC_PENDSV_PRI
     str     r5, [r4]
 
-    mov     r0, #2
+    mov     r0, #OS_CONTROL_KERNEL_MODE
     msr     CONTROL, r0
 
     ldr     r1, =g_losTask
@@ -141,7 +147,7 @@ ArchTaskSchedule:
     bx      lr
     dsb
     isb
-   .fnend
+    .fnend
 
     .type HalPendSV, %function
     .global HalPendSV
@@ -194,6 +200,14 @@ SignalContextRestore:
     vldmia  r1!, {d8-d15}
 
 __DisabledFPU2:
+#if (LOSCFG_SECURE == 1)
+    ldrh    r7, [r0, #4]
+    tst     r7, #OS_TASK_FLAG_USER_TASK
+    ite     eq
+    moveq   r3, #OS_CONTROL_KERNEL_MODE
+    movne   r3, #OS_CONTROL_USER_MODE
+    msr     CONTROL, r3
+#endif
     ldmfd   r1!, {r4-r12}
     msr     psp,  r1
 

arch/arm/cortex-m4/gcc/los_exc.S

@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
- * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
+ * Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
@@ -57,15 +57,15 @@
 
 .equ FLAG_ADDR_VALID,   0x10000
 .equ FLAG_HWI_ACTIVE,   0x20000
-.equ FLAG_NO_FLOAT,   0x10000000
+.equ FLAG_NO_FLOAT,     0x10000000
 
-.equ OS_NVIC_FSR                 ,   0xE000ED28      //include BusFault/MemFault/UsageFault State Register
-.equ OS_NVIC_HFSR                ,   0xE000ED2C      //HardFault State Register
-.equ OS_NVIC_BFAR                ,   0xE000ED38
-.equ OS_NVIC_MMAR                ,   0xE000ED34
-.equ OS_NVIC_ACT_BASE            ,   0xE000E300
-.equ OS_NVIC_SHCSRS              ,   0xE000ED24
-.equ OS_NVIC_SHCSR_MASK          ,   0xC00
+.equ OS_NVIC_FSR,           0xE000ED28      //include BusFault/MemFault/UsageFault State Register
+.equ OS_NVIC_HFSR,          0xE000ED2C      //HardFault State Register
+.equ OS_NVIC_BFAR,          0xE000ED38
+.equ OS_NVIC_MMAR,          0xE000ED34
+.equ OS_NVIC_ACT_BASE,      0xE000E300
+.equ OS_NVIC_SHCSRS,        0xE000ED24
+.equ OS_NVIC_SHCSR_MASK,    0xC00
 
     .type HalExcNMI, %function
     .global HalExcNMI
@@ -155,10 +155,25 @@ HalExcSvcCall:
     .cantunwind
     TST   LR, #0x4
     ITE   EQ
-    MRSEQ R0, MSP
-    MRSNE R0, PSP
-    LDR   R1, [R0,#24]
-    LDRB  R0, [R1,#-2]
+    MRSEQ R1, MSP
+    BNE   _svcCallFromPsp
+    B     _svcCall
+_svcCallFromPsp:
+#ifdef LOSCFG_SECURE
+    PUSH  {R0-R12, LR}
+    MOV   R0, SP
+    CPSIE I
+    BL    OsSyscallHandle
+    CPSID I
+    MRS   R12, PSP
+    STM   R12, {R0-R1}
+    POP   {R0-R12, LR}
+    BX    LR
+#endif
+    MRS   R1, PSP
+_svcCall:
+    LDR   R0, [R1,#24]
+    LDRB  R0, [R0,#-2]
     MOV   R1, #0
     B     osExcDispatch
     .fnend
@@ -263,7 +278,7 @@ _hwiActiveCheck:
     CMP   R3, #0
     BEQ   _hwiActiveCheckNext
 
-    // exc occured in IRQ
+    // exc occurred in IRQ
     ORR   R0, R0, #FLAG_HWI_ACTIVE
     RBIT  R2, R3
     CLZ   R2, R2
@@ -284,7 +299,7 @@ _ExcInMSP:
     PUSH {R4-R12}                       // store message-->exc: {R4-R12}
     VPUSH {D8-D15}                      // FPU
     B     _handleEntry
-  .fnend
+    .fnend
 
     .type _NoFloatInMsp, %function
     .global _NoFloatInMsp
@@ -298,7 +313,7 @@ _NoFloatInMsp:
     PUSH {R4-R12}                        // store message-->exc: {R4-R12}
     ORR   R0, R0, #FLAG_NO_FLOAT
     B     _handleEntry
-  .fnend
+    .fnend
 
     .type _hwiActiveCheckNext, %function
     .global _hwiActiveCheckNext
@@ -316,19 +331,19 @@ _hwiActiveCheckNext:
     AND   R2, R2,R3
     CMP   R2,#0
     BNE   _ExcInMSP
-    // exc occured in Task or Init or exc
+    // exc occurred in Task or Init or exc
     // reserved for register info from task stack
 
     LDR  R2, =g_taskScheduled
     LDR  R2, [R2]
     TST  R2, #1                         // OS_FLG_BGD_ACTIVE
-    BEQ  _ExcInMSP                      // if exc occured in Init then branch
+    BEQ  _ExcInMSP                      // if exc occurred in Init then branch
 
 
     CMP   LR, #0xFFFFFFED               //auto push floating registers
     BNE   _NoFloatInPsp
 
-    // exc occured in Task
+    // exc occurred in Task
     MOV   R2,  R13
     SUB   R13, #96                      // add 8 Bytes reg(for STMFD)
 
@@ -347,7 +362,7 @@ _hwiActiveCheckNext:
     VSTMDB  R2!, {D8-D15}               // FPU
     STMFD R2!, {R4-R11}
     B     _handleEntry
-  .fnend
+    .fnend
 
     .type _NoFloatInPsp, %function
     .global _NoFloatInPsp
@@ -367,7 +382,7 @@ _NoFloatInPsp:
     LDMFD R3, {R4-R11}                  // R4-R11 store PSP reg(auto push when exc in task)
     STMFD R2!, {R4-R11}
     ORR   R0, R0, #FLAG_NO_FLOAT
-  .fnend
+    .fnend
 
     .type _handleEntry, %function
     .global _handleEntry
@@ -380,4 +395,4 @@ _handleEntry:
     B  HalExcHandleEntry
 
     NOP
-  .fnend
+    .fnend

arch/arm/cortex-m4/gcc/los_interrupt.c

@@ -40,11 +40,8 @@
 #include "los_memory.h"
 #include "los_membox.h"
 
-/*lint -save -e40 -e522 -e533*/
 UINT32 g_intCount = 0;
 
-/*lint -restore*/
-
 /* *
  * @ingroup los_hwi
  * Hardware interrupt form mapping handling function array.
@@ -193,21 +190,21 @@ inline UINT32 ArchIsIntActive(VOID)
  Output      : None
  Return      : None
  **************************************************************************** */
-/*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -261,21 +258,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINT32 intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -293,9 +291,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask((IRQn_Type)hwiNum);
     HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
@@ -309,11 +312,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {
@@ -598,7 +603,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
-	
+
     /* Enable DIV 0 and unaligned exception */
 #ifdef LOSCFG_ARCH_UNALIGNED_EXC
     *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);

arch/arm/cortex-m4/gcc/los_timer.c

@@ -36,7 +36,7 @@
 #include "los_debug.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -44,6 +44,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = SysTick_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -75,13 +76,17 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
     NVIC_ClearPendingIRQ(SysTick_IRQn);
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/arm/cortex-m4/iar/los_exc.S

@@ -190,7 +190,7 @@ _hwiActiveCheck
     CMP   R3, #0
     BEQ   _hwiActiveCheckNext
 
-    ; exc occured in IRQ
+    ; exc occurred in IRQ
     ORR   R0, R0, #FLAG_HWI_ACTIVE
     RBIT  R2, R3
     CLZ   R2, R2
@@ -228,19 +228,19 @@ _hwiActiveCheckNext
     AND   R2, R2,R3
     CMP   R2,#0
     BNE   _ExcInMSP
-    ; exc occured in Task or Init or exc
+    ; exc occurred in Task or Init or exc
     ; reserved for register info from task stack
 
     LDR  R2, =g_taskScheduled
     LDR  R2, [R2]
     TST  R2, #1         ; OS_FLG_BGD_ACTIVE
-    BEQ  _ExcInMSP                      ; if exc occured in Init then branch
+    BEQ  _ExcInMSP                      ; if exc occurred in Init then branch
 
 
     CMP   LR, #0xFFFFFFED               ;auto push floating registers
     BNE   _NoFloatInPsp
 
-    ; exc occured in Task
+    ; exc occurred in Task
     MOV   R2,  R13
     SUB   R13, #96                      ; add 8 Bytes reg(for STMFD)
 

arch/arm/cortex-m4/iar/los_interrupt.c

@@ -41,13 +41,11 @@
 #include "los_memory.h"
 #include "los_membox.h"
 
-/*lint -save -e40 -e522 -e533*/
 UINT32 g_intCount = 0;
 
-/*lint -restore*/
 #ifdef __ICCARM__
 #pragma location = ".data.vector"
-#pragma data_alignment=LOSCFG_ARCH_HWI_VECTOR_ALIGN
+#pragma data_alignment = LOSCFG_ARCH_HWI_VECTOR_ALIGN
 #elif defined(__CC_ARM) || defined(__GNUC__)
 LITE_OS_SEC_VEC
 #endif
@@ -202,18 +200,19 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -267,21 +266,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINT32 intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -299,9 +299,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask((IRQn_Type)hwiNum);
     HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
@@ -315,11 +320,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {
@@ -594,7 +601,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
-	
+
     /* Enable DIV 0 and unaligned exception */
 #ifdef LOSCFG_ARCH_UNALIGNED_EXC
     *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);

arch/arm/cortex-m4/iar/los_timer.c

@@ -36,7 +36,7 @@
 #include "los_debug.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -44,6 +44,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = SysTick_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -75,13 +76,17 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
     NVIC_ClearPendingIRQ(SysTick_IRQn);
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/arm/cortex-m55/gcc/BUILD.gn

@@ -0,0 +1,37 @@
+# Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without modification,
+# are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice, this list of
+#    conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright notice, this list
+#    of conditions and the following disclaimer in the documentation and/or other materials
+#    provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its contributors may be used
+#    to endorse or promote products derived from this software without specific prior written
+#    permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+import("//kernel/liteos_m/liteos.gni")
+
+module_group("gcc") {
+  if (defined(LOSCFG_SECURE_TRUSTZONE)) {
+    modules = [ "TZ" ]
+  } else {
+    modules = [ "NTZ" ]
+  }
+}

arch/arm/cortex-m55/gcc/NTZ/BUILD.gn

@@ -0,0 +1,45 @@
+# Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without modification,
+# are permitted provided that the following conditions are met:
+#
+# 1. Redistributions of source code must retain the above copyright notice, this list of
+#    conditions and the following disclaimer.
+#
+# 2. Redistributions in binary form must reproduce the above copyright notice, this list
+#    of conditions and the following disclaimer in the documentation and/or other materials
+#    provided with the distribution.
+#
+# 3. Neither the name of the copyright holder nor the names of its contributors may be used
+#    to endorse or promote products derived from this software without specific prior written
+#    permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+import("//kernel/liteos_m/liteos.gni")
+
+module_name = "arch"
+kernel_module(module_name) {
+  sources = [
+    "los_context.c",
+    "los_dispatch.S",
+    "los_exc.S",
+    "los_interrupt.c",
+    "los_timer.c",
+  ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
+}
+
+config("public") {
+  include_dirs = [ "." ]
+}

arch/arm/cortex-m55/gcc/NTZ/los_arch_atomic.h

@@ -0,0 +1,295 @@
+/*
+ * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LOS_ARCH_ATOMIC_H
+#define _LOS_ARCH_ATOMIC_H
+
+#include "los_compiler.h"
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+
+STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
+{
+    INT32 val;
+
+    __asm__ __volatile__("ldrex %0, [%1]\n"
+                         : "=&r"(val)
+                         : "r"(v)
+                         : "cc");
+
+    return val;
+}
+
+STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
+{
+    UINT32 status;
+
+    do {
+        __asm__ __volatile__("ldrex %0, [%1]\n"
+                             "strex %0, %2, [%1]\n"
+                             : "=&r"(status)
+                             : "r"(v), "r"(setVal)
+                             : "cc");
+    } while (__builtin_expect(status != 0, 0));
+}
+
+STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
+{
+    INT32 val;
+    UINT32 status;
+
+    do {
+        __asm__ __volatile__("ldrex %1, [%2]\n"
+                             "add %1, %1, %3\n"
+                             "strex %0, %1, [%2]"
+                             : "=&r"(status), "=&r"(val)
+                             : "r"(v), "r"(addVal)
+                             : "cc");
+    } while (__builtin_expect(status != 0, 0));
+
+    return val;
+}
+
+STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
+{
+    INT32 val;
+    UINT32 status;
+
+    do {
+        __asm__ __volatile__("ldrex %1, [%2]\n"
+                             "sub %1, %1, %3\n"
+                             "strex %0, %1, [%2]"
+                             : "=&r"(status), "=&r"(val)
+                             : "r"(v), "r"(subVal)
+                             : "cc");
+    } while (__builtin_expect(status != 0, 0));
+
+    return val;
+}
+
+STATIC INLINE VOID ArchAtomicInc(Atomic *v)
+{
+    (VOID)ArchAtomicAdd(v, 1);
+}
+
+STATIC INLINE VOID ArchAtomicDec(Atomic *v)
+{
+    (VOID)ArchAtomicSub(v, 1);
+}
+
+STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
+{
+    return ArchAtomicAdd(v, 1);
+}
+
+STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
+{
+    return ArchAtomicSub(v, 1);
+}
+
+/**
+ * @ingroup  los_arch_atomic
+ * @brief Atomic exchange for 32-bit variable.
+ *
+ * @par Description:
+ * This API is used to implement the atomic exchange for 32-bit variable
+ * and return the previous value of the atomic variable.
+ * @attention
+ * <ul>The pointer v must not be NULL.</ul>
+ *
+ * @param  v       [IN] The variable pointer.
+ * @param  val     [IN] The exchange value.
+ *
+ * @retval #INT32       The previous value of the atomic variable
+ * @par Dependency:
+ * <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
+ * @see
+ */
+STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
+{
+    INT32 prevVal = 0;
+    UINT32 status = 0;
+
+    do {
+        __asm__ __volatile__("ldrex %0, [%3]\n"
+                             "strex %1, %4, [%3]"
+                             : "=&r"(prevVal), "=&r"(status), "+m"(*v)
+                             : "r"(v), "r"(val)
+                             : "cc");
+    } while (__builtin_expect(status != 0, 0));
+
+    return prevVal;
+}
+
+/**
+ * @ingroup  los_arch_atomic
+ * @brief Atomic exchange for 32-bit variable with compare.
+ *
+ * @par Description:
+ * This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
+ * @attention
+ * <ul>The pointer v must not be NULL.</ul>
+ *
+ * @param  v       [IN] The variable pointer.
+ * @param  val     [IN] The new value.
+ * @param  oldVal  [IN] The old value.
+ *
+ * @retval TRUE  The previous value of the atomic variable is not equal to oldVal.
+ * @retval FALSE The previous value of the atomic variable is equal to oldVal.
+ * @par Dependency:
+ * <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
+ * @see
+ */
+STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
+{
+    INT32 prevVal = 0;
+    UINT32 status = 0;
+
+    do {
+        __asm__ __volatile__("ldrex %0, %2\n"
+                             "mov %1, #0\n"
+                             "cmp %0, %3\n"
+                             "bne 1f\n"
+                             "strex %1, %4, %2\n"
+                             "1:"
+                             : "=&r"(prevVal), "=&r"(status), "+Q"(*v)
+                             : "r"(oldVal), "r"(val)
+                             : "cc");
+    } while (__builtin_expect(status != 0, 0));
+
+    return prevVal != oldVal;
+}
+
+STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
+{
+    INT64 val;
+    UINT32 intSave;
+
+    intSave = LOS_IntLock();
+    val = *v;
+    LOS_IntRestore(intSave);
+
+    return val;
+}
+
+STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
+{
+    UINT32 intSave;
+
+    intSave = LOS_IntLock();
+    *v = setVal;
+    LOS_IntRestore(intSave);
+}
+
+STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
+{
+    INT64 val;
+    UINT32 intSave;
+
+    intSave = LOS_IntLock();
+    *v += addVal;
+    val = *v;
+    LOS_IntRestore(intSave);
+
+    return val;
+}
+
+STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
+{
+    INT64 val;
+    UINT32 intSave;
+
+    intSave = LOS_IntLock();
+    *v -= subVal;
+    val = *v;
+    LOS_IntRestore(intSave);
+
+    return val;
+}
+
+STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
+{
+    (VOID)ArchAtomic64Add(v, 1);
+}
+
+STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
+{
+    return ArchAtomic64Add(v, 1);
+}
+
+STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
+{
+    (VOID)ArchAtomic64Sub(v, 1);
+}
+
+STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
+{
+    return ArchAtomic64Sub(v, 1);
+}
+
+STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
+{
+    INT64 prevVal;
+    UINT32 intSave;
+
+    intSave = LOS_IntLock();
+    prevVal = *v;
+    *v = val;
+    LOS_IntRestore(intSave);
+
+    return prevVal;
+}
+
+STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
+{
+    INT64 prevVal;
+    UINT32 intSave;
+
+    intSave = LOS_IntLock();
+    prevVal = *v;
+    if (prevVal == oldVal) {
+        *v = val;
+    }
+    LOS_IntRestore(intSave);
+
+    return prevVal != oldVal;
+}
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+
+#endif /* _LOS_ARCH_ATOMIC_H */

arch/arm/cortex-m55/gcc/NTZ/los_arch_context.h

@@ -0,0 +1,131 @@
+/*
+ * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LOS_ARCH_CONTEXT_H
+#define _LOS_ARCH_CONTEXT_H
+
+#include "los_config.h"
+#include "los_compiler.h"
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+
+typedef struct TagTskContext {
+    UINT32 uwPspLim;
+    UINT32 uwExcLR;
+    UINT32 uwR4;
+    UINT32 uwR5;
+    UINT32 uwR6;
+    UINT32 uwR7;
+    UINT32 uwR8;
+    UINT32 uwR9;
+    UINT32 uwR10;
+    UINT32 uwR11;
+    UINT32 uwPriMask;
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
+    UINT32 S16;
+    UINT32 S17;
+    UINT32 S18;
+    UINT32 S19;
+    UINT32 S20;
+    UINT32 S21;
+    UINT32 S22;
+    UINT32 S23;
+    UINT32 S24;
+    UINT32 S25;
+    UINT32 S26;
+    UINT32 S27;
+    UINT32 S28;
+    UINT32 S29;
+    UINT32 S30;
+    UINT32 S31;
+#endif
+    UINT32 uwR0;
+    UINT32 uwR1;
+    UINT32 uwR2;
+    UINT32 uwR3;
+    UINT32 uwR12;
+    UINT32 uwLR;
+    UINT32 uwPC;
+    UINT32 uwxPSR;
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
+    UINT32 S0;
+    UINT32 S1;
+    UINT32 S2;
+    UINT32 S3;
+    UINT32 S4;
+    UINT32 S5;
+    UINT32 S6;
+    UINT32 S7;
+    UINT32 S8;
+    UINT32 S9;
+    UINT32 S10;
+    UINT32 S11;
+    UINT32 S12;
+    UINT32 S13;
+    UINT32 S14;
+    UINT32 S15;
+    UINT32 FPSCR;
+    UINT32 NO_NAME;
+#endif
+} TaskContext;
+
+/**
+ * @ingroup  los_config
+ * @brief: Task start running function.
+ *
+ * @par Description:
+ * This API is used to start a task.
+ *
+ * @attention:
+ * <ul><li>None.</li></ul>
+ *
+ * @param: None.
+ *
+ * @retval None.
+ *
+ * @par Dependency:
+ * <ul><li>los_config.h: the header file that contains the API declaration.</li></ul>
+ * @see None.
+ */
+extern VOID HalStartToRun(VOID);
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+
+#endif /* _LOS_ARCH_CONTEXT_H */

arch/arm/cortex-m55/gcc/NTZ/los_arch_interrupt.h

@@ -0,0 +1,693 @@
+/*
+ * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LOS_ARCH_INTERRUPT_H
+#define _LOS_ARCH_INTERRUPT_H
+
+#include "los_config.h"
+#include "los_compiler.h"
+#include "los_interrupt.h"
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Maximum number of used hardware interrupts.
+ */
+#ifndef OS_HWI_MAX_NUM
+#define OS_HWI_MAX_NUM                        LOSCFG_PLATFORM_HWI_LIMIT
+#endif
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Highest priority of a hardware interrupt.
+ */
+#ifndef OS_HWI_PRIO_HIGHEST
+#define OS_HWI_PRIO_HIGHEST                   0
+#endif
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Lowest priority of a hardware interrupt.
+ */
+#ifndef OS_HWI_PRIO_LOWEST
+#define OS_HWI_PRIO_LOWEST                    7
+#endif
+
+
+/* *
+ * @ingroup  los_arch_interrupt
+ * Define the type of a hardware interrupt vector table function.
+ */
+typedef VOID (**HWI_VECTOR_FUNC)(void);
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Count of interrupts.
+ */
+extern UINT32 g_intCount;
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Count of M-Core system interrupt vector.
+ */
+#define OS_SYS_VECTOR_CNT                     16
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Count of M-Core interrupt vector.
+ */
+#define OS_VECTOR_CNT                         (OS_SYS_VECTOR_CNT + OS_HWI_MAX_NUM)
+
+/* *
+ * @ingroup los_arch_interrupt
+ * AIRCR register priority group parameter .
+ */
+#define OS_NVIC_AIRCR_PRIGROUP                7
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Hardware interrupt error code: Invalid interrupt number.
+ *
+ * Value: 0x02000900
+ *
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a Cortex-M33 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ */
+#define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Hardware interrupt error code: Null hardware interrupt handling function.
+ *
+ * Value: 0x02000901
+ *
+ * Solution: Pass in a valid non-null hardware interrupt handling function.
+ */
+#define OS_ERRNO_HWI_PROC_FUNC_NULL           LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x01)
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Hardware interrupt error code: Insufficient interrupt resources for hardware interrupt creation.
+ *
+ * Value: 0x02000902
+ *
+ * Solution: Increase the configured maximum number of supported hardware interrupts.
+ */
+#define OS_ERRNO_HWI_CB_UNAVAILABLE           LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x02)
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Hardware interrupt error code: Insufficient memory for hardware interrupt initialization.
+ *
+ * Value: 0x02000903
+ *
+ * Solution: Expand the configured memory.
+ */
+#define OS_ERRNO_HWI_NO_MEMORY                LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x03)
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Hardware interrupt error code: The interrupt has already been created.
+ *
+ * Value: 0x02000904
+ *
+ * Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
+ */
+#define OS_ERRNO_HWI_ALREADY_CREATED          LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x04)
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Hardware interrupt error code: Invalid interrupt priority.
+ *
+ * Value: 0x02000905
+ *
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a Cortex-M33 platform is [0,15].
+ */
+#define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Hardware interrupt error code: Incorrect interrupt creation mode.
+ *
+ * Value: 0x02000906
+ *
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ */
+#define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Hardware interrupt error code: The interrupt has already been created as a fast interrupt.
+ *
+ * Value: 0x02000907
+ *
+ * Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
+ */
+#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07)
+
+/* *
+ * @ingroup los_arch_interrupt
+ * SysTick control and status register.
+ */
+#define OS_SYSTICK_CONTROL_REG                0xE000E010
+
+/* *
+ * @ingroup los_hw
+ * SysTick current value register.
+ */
+#define OS_SYSTICK_CURRENT_REG                0xE000E018
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt Priority-Level Registers.
+ */
+#define OS_NVIC_PRI_BASE                      0xE000E400
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt enable register for 0-31.
+ */
+#define OS_NVIC_SETENA_BASE                   0xE000E100
+
+/* *
+ * @ingroup los_arch_interrupt
+ * interrupt pending register.
+ */
+#define OS_NVIC_SETPEND_BASE                  0xE000E200
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt active register.
+ */
+#define OS_NVIC_INT_ACT_BASE                  0xE000E300
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt disable register for 0-31.
+ */
+#define OS_NVIC_CLRENA_BASE                   0xE000E180
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt control and status register.
+ */
+#define OS_NVIC_INT_CTRL                      0xE000ED04
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Vector table offset register.
+ */
+#define OS_NVIC_VTOR                          0xE000ED08
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Application interrupt and reset control register
+ */
+#define OS_NVIC_AIRCR                         0xE000ED0C
+
+/* *
+ * @ingroup los_arch_interrupt
+ * System exception priority register.
+ */
+#define OS_NVIC_EXCPRI_BASE                   0xE000ED18
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt No. 1 :reset.
+ */
+#define OS_EXC_RESET                          1
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt No. 2 :Non-Maskable Interrupt.
+ */
+#define OS_EXC_NMI                            2
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt No. 3 :(hard)fault.
+ */
+#define OS_EXC_HARD_FAULT                     3
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt No. 4 :MemManage fault.
+ */
+#define OS_EXC_MPU_FAULT                      4
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt No. 5 :Bus fault.
+ */
+#define OS_EXC_BUS_FAULT                      5
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt No. 6 :Usage fault.
+ */
+#define OS_EXC_USAGE_FAULT                    6
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt No. 11 :SVCall.
+ */
+#define OS_EXC_SVC_CALL                       11
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt No. 12 :Debug monitor.
+ */
+#define OS_EXC_DBG_MONITOR                    12
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt No. 14 :PendSV.
+ */
+#define OS_EXC_PEND_SV                        14
+
+/* *
+ * @ingroup los_arch_interrupt
+ * Interrupt No. 15 :SysTick.
+ */
+#define OS_EXC_SYS_TICK                       15
+
+#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
+/* *
+ * @ingroup los_arch_interrupt
+ * Set interrupt vector table.
+ */
+extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg);
+#else
+/* *
+ * @ingroup los_arch_interrupt
+ * Set interrupt vector table.
+ */
+extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
+#endif
+
+/* *
+ * @ingroup  los_arch_interrupt
+ * @brief: Hardware interrupt entry function.
+ *
+ * @par Description:
+ * This API is used as all hardware interrupt handling function entry.
+ *
+ * @attention:
+ * <ul><li>None.</li></ul>
+ *
+ * @param:None.
+ *
+ * @retval:None.
+ * @par Dependency:
+ * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
+ * @see None.
+ */
+extern VOID HalInterrupt(VOID);
+
+/* *
+ * @ingroup  los_arch_interrupt
+ * @brief: Default vector handling function.
+ *
+ * @par Description:
+ * This API is used to configure interrupt for null function.
+ *
+ * @attention:
+ * <ul><li>None.</li></ul>
+ *
+ * @param:None.
+ *
+ * @retval:None.
+ * @par Dependency:
+ * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
+ * @see None.
+ */
+extern VOID HalHwiDefaultHandler(VOID);
+
+/* *
+ * @ingroup  los_arch_interrupt
+ * @brief: Reset the vector table.
+ *
+ * @par Description:
+ * This API is used to reset the vector table.
+ *
+ * @attention:
+ * <ul><li>None.</li></ul>
+ *
+ * @param:None.
+ *
+ * @retval:None.
+ * @par Dependency:
+ * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
+ * @see None.
+ */
+extern VOID Reset_Handler(VOID);
+
+/* *
+ * @ingroup  los_arch_interrupt
+ * @brief: Pended System Call.
+ *
+ * @par Description:
+ * PendSV can be pended and is useful for an OS to pend an exception
+ * so that an action can be performed after other important tasks are completed.
+ *
+ * @attention:
+ * <ul><li>None.</li></ul>
+ *
+ * @param:None.
+ *
+ * @retval:None.
+ * @par Dependency:
+ * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
+ * @see None.
+ */
+extern VOID HalPendSV(VOID);
+
+
+#define OS_EXC_IN_INIT                      0
+#define OS_EXC_IN_TASK                      1
+#define OS_EXC_IN_HWI                       2
+
+#define OS_EXC_MAX_BUF_LEN                  25
+#define OS_EXC_MAX_NEST_DEPTH               1
+
+#define OS_NVIC_SHCSR                       0xE000ED24
+#define OS_NVIC_CCR                         0xE000ED14
+
+#define OS_NVIC_INT_ENABLE_SIZE             0x20
+#define OS_NVIC_INT_PRI_SIZE                0xF0
+#define OS_NVIC_EXCPRI_SIZE                 0xC
+#define OS_NVIC_INT_CTRL_SIZE               4
+#define OS_NVIC_SHCSR_SIZE                  4
+
+#define OS_NVIC_INT_PEND_SIZE               OS_NVIC_INT_ACT_SIZE
+#define OS_NVIC_INT_ACT_SIZE                OS_NVIC_INT_ENABLE_SIZE
+
+#define OS_EXC_FLAG_NO_FLOAT                0x10000000
+#define OS_EXC_FLAG_FAULTADDR_VALID         0x01
+#define OS_EXC_FLAG_IN_HWI                  0x02
+
+#define OS_EXC_IMPRECISE_ACCESS_ADDR        0xABABABAB
+
+#define OS_EXC_EVENT                        0x00000001
+
+/**
+ * @ingroup los_exc
+ * the struct of register files
+ *
+ * description: the register files that saved when exception triggered
+ *
+ * notes:the following register with prefix 'uw'  correspond to the registers in the cpu  data sheet.
+ */
+typedef struct TagExcContext {
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+    UINT32 S16;
+    UINT32 S17;
+    UINT32 S18;
+    UINT32 S19;
+    UINT32 S20;
+    UINT32 S21;
+    UINT32 S22;
+    UINT32 S23;
+    UINT32 S24;
+    UINT32 S25;
+    UINT32 S26;
+    UINT32 S27;
+    UINT32 S28;
+    UINT32 S29;
+    UINT32 S30;
+    UINT32 S31;
+#endif
+    UINT32 uwR4;
+    UINT32 uwR5;
+    UINT32 uwR6;
+    UINT32 uwR7;
+    UINT32 uwR8;
+    UINT32 uwR9;
+    UINT32 uwR10;
+    UINT32 uwR11;
+    UINT32 uwPriMask;
+    /* auto save */
+    UINT32 uwSP;
+    UINT32 uwR0;
+    UINT32 uwR1;
+    UINT32 uwR2;
+    UINT32 uwR3;
+    UINT32 uwR12;
+    UINT32 uwLR;
+    UINT32 uwPC;
+    UINT32 uwxPSR;
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED) && (__FPU_USED== 1U)))
+    UINT32 S0;
+    UINT32 S1;
+    UINT32 S2;
+    UINT32 S3;
+    UINT32 S4;
+    UINT32 S5;
+    UINT32 S6;
+    UINT32 S7;
+    UINT32 S8;
+    UINT32 S9;
+    UINT32 S10;
+    UINT32 S11;
+    UINT32 S12;
+    UINT32 S13;
+    UINT32 S14;
+    UINT32 S15;
+    UINT32 FPSCR;
+    UINT32 NO_NAME;
+#endif
+} EXC_CONTEXT_S;
+
+typedef VOID (*EXC_PROC_FUNC)(UINT32, EXC_CONTEXT_S *);
+VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr);
+
+VOID HalExcNMI(VOID);
+VOID HalExcHardFault(VOID);
+VOID HalExcMemFault(VOID);
+VOID HalExcBusFault(VOID);
+VOID HalExcUsageFault(VOID);
+VOID HalSVCHandler(VOID);
+VOID HalHwiInit(VOID);
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Record whether a precise BusFault occurred during floating-point lazy state preservation.
+ */
+#define OS_EXC_BF_LSPERR           1
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: An error occurred while the bus status register was being pushed.
+ */
+#define OS_EXC_BF_STKERR           2
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: An error occurred while the bus status register was out of the stack.
+ */
+#define OS_EXC_BF_UNSTKERR         3
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Bus status register imprecise data access violation.
+ */
+#define OS_EXC_BF_IMPRECISERR      4
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Bus status register exact data access violation.
+ */
+#define OS_EXC_BF_PRECISERR        5
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Bus status register access violation while pointing.
+ */
+#define OS_EXC_BF_IBUSERR          6
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Record whether a MemManage fault occurred during floating-point lazy state preservation.
+ */
+#define OS_EXC_MF_MLSPERR          7
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: An error occurred while the memory management status register was being pushed.
+ */
+#define OS_EXC_MF_MSTKERR          8
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: An error occurred while the memory management status register was out of the stack.
+ */
+#define OS_EXC_MF_MUNSTKERR        9
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Memory management status register data access violation.
+ */
+#define OS_EXC_MF_DACCVIOL         10
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Memory management status register access violation.
+ */
+#define OS_EXC_MF_IACCVIOL         11
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Incorrect usage indicating that the divisor is zero during the division operation.
+ */
+#define OS_EXC_UF_DIVBYZERO        12
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Usage error, error caused by unaligned access.
+ */
+#define OS_EXC_UF_UNALIGNED        13
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Sticky flag indicating whether a stack overflow error has occurred.
+ */
+#define OS_EXC_UF_STKOF            14
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Incorrect usage attempting to execute coprocessor related instruction.
+ */
+#define OS_EXC_UF_NOCP             15
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Usage error attempting to load EXC_RETURN to PC illegally on exception return.
+ */
+#define OS_EXC_UF_INVPC            16
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Incorrect usage, attempting to cut to ARM state.
+ */
+#define OS_EXC_UF_INVSTATE         17
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Incorrect usage. Executed instruction whose code is undefined.
+ */
+#define OS_EXC_UF_UNDEFINSTR       18
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: NMI
+ */
+
+#define OS_EXC_CAUSE_NMI           19
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: hard fault
+ */
+#define OS_EXC_CAUSE_HARDFAULT     20
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: The task handler exits.
+ */
+#define OS_EXC_CAUSE_TASK_EXIT     21
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: A fatal error.
+ */
+#define OS_EXC_CAUSE_FATAL_ERR     22
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: Hard Fault caused by a debug event.
+ */
+#define OS_EXC_CAUSE_DEBUGEVT      23
+
+/**
+ * @ingroup los_exc
+ * Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
+ */
+#define OS_EXC_CAUSE_VECTBL        24
+
+/**
+ * @ingroup los_exc
+ * Exception information structure
+ *
+ * Description: Exception information saved when an exception is triggered on the Cortex-M33 platform.
+ *
+ */
+typedef struct TagExcInfo {
+    /**< Exception occurrence phase: 0 means that an exception occurs in initialization,
+     * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
+    UINT16 phase;
+    /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
+    UINT16 type;
+    /**< If the exact address access error indicates the wrong access address when the exception occurred */
+    UINT32 faultAddr;
+    /**< An exception occurs in an interrupt, indicating the interrupt number.
+     * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
+    UINT32 thrdPid;
+    /**< Number of nested exceptions. Currently only registered hook functions are supported
+     * when an exception is entered for the first time */
+    UINT16 nestCnt;
+    /**< reserve */
+    UINT16 reserved;
+    /**< Hardware context at the time an exception to the automatic stack floating-point register occurs */
+    EXC_CONTEXT_S *context;
+} ExcInfo;
+
+extern UINT32 g_curNestCount;
+extern UINT32 g_intCount;
+extern UINT8 g_uwExcTbl[32];
+extern ExcInfo g_excInfo;
+
+#define MAX_INT_INFO_SIZE       (8 + 0x164)
+
+#ifdef __cplusplus
+#if __cplusplus
+}
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+
+#endif /* _LOS_ARCH_INTERRUPT_H */

arch/arm/cortex-m55/gcc/NTZ/los_arch_timer.h

@@ -28,9 +28,23 @@
  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <pthread.h>
+#ifndef _LOS_ARCH_TIMER_H
+#define _LOS_ARCH_TIMER_H
 
-int pthread_equal(pthread_t __t1, pthread_t __t2)
-{
-    return (int)(__t1 == __t2);
+#include "los_config.h"
+#include "los_compiler.h"
+#include "los_timer.h"
+
+#ifdef __cplusplus
+#if __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+
+#ifdef __cplusplus
+#if __cplusplus
 }
+#endif /* __cplusplus */
+#endif /* __cplusplus */
+
+#endif /* _LOS_ARCH_TIMER_H */

arch/arm/cortex-m55/gcc/NTZ/los_context.c

@@ -0,0 +1,162 @@
+/*
+ * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "los_context.h"
+#include "securec.h"
+#include "los_arch_context.h"
+#include "los_arch_interrupt.h"
+#include "los_task.h"
+#include "los_sched.h"
+#include "los_interrupt.h"
+#include "los_debug.h"
+
+/* ****************************************************************************
+ Function    : ArchInit
+ Description : arch init function
+ Input       : None
+ Output      : None
+ Return      : None
+ **************************************************************************** */
+LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
+{
+    HalHwiInit();
+}
+
+/* ****************************************************************************
+ Function    : ArchSysExit
+ Description : Task exit function
+ Input       : None
+ Output      : None
+ Return      : None
+ **************************************************************************** */
+LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
+{
+    LOS_IntLock();
+    while (1) {
+    }
+}
+
+/* ****************************************************************************
+ Function    : ArchTskStackInit
+ Description : Task stack initialization function
+ Input       : taskID     --- TaskID
+               stackSize  --- Total size of the stack
+               topStack   --- Top of task's stack
+ Output      : None
+ Return      : Context pointer
+ **************************************************************************** */
+LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
+{
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
+
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
+    context->S16 = 0xAA000010;
+    context->S17 = 0xAA000011;
+    context->S18 = 0xAA000012;
+    context->S19 = 0xAA000013;
+    context->S20 = 0xAA000014;
+    context->S21 = 0xAA000015;
+    context->S22 = 0xAA000016;
+    context->S23 = 0xAA000017;
+    context->S24 = 0xAA000018;
+    context->S25 = 0xAA000019;
+    context->S26 = 0xAA00001A;
+    context->S27 = 0xAA00001B;
+    context->S28 = 0xAA00001C;
+    context->S29 = 0xAA00001D;
+    context->S30 = 0xAA00001E;
+    context->S31 = 0xAA00001F;
+    context->S0 = 0xAA000000;
+    context->S1 = 0xAA000001;
+    context->S2 = 0xAA000002;
+    context->S3 = 0xAA000003;
+    context->S4 = 0xAA000004;
+    context->S5 = 0xAA000005;
+    context->S6 = 0xAA000006;
+    context->S7 = 0xAA000007;
+    context->S8 = 0xAA000008;
+    context->S9 = 0xAA000009;
+    context->S10 = 0xAA00000A;
+    context->S11 = 0xAA00000B;
+    context->S12 = 0xAA00000C;
+    context->S13 = 0xAA00000D;
+    context->S14 = 0xAA00000E;
+    context->S15 = 0xAA00000F;
+    context->FPSCR = 0x00000000;
+    context->NO_NAME = 0xAA000011;
+    context->uwExcLR = 0xFFFFFFEDL;
+#else
+    context->uwExcLR = 0xFFFFFFFDL;
+#endif
+    context->uwPspLim = (UINT32)topStack;
+    context->uwR4 = 0x04040404L;
+    context->uwR5 = 0x05050505L;
+    context->uwR6 = 0x06060606L;
+    context->uwR7 = 0x07070707L;
+    context->uwR8 = 0x08080808L;
+    context->uwR9 = 0x09090909L;
+    context->uwR10 = 0x10101010L;
+    context->uwR11 = 0x11111111L;
+    context->uwPriMask = 0;
+    context->uwR0 = taskID;
+    context->uwR1 = 0x01010101L;
+    context->uwR2 = 0x02020202L;
+    context->uwR3 = 0x03030303L;
+    context->uwR12 = 0x12121212L;
+    context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
+    context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
+    context->uwxPSR = 0x01000000L;
+
+    return (VOID *)context;
+}
+
+#if (LOSCFG_KERNEL_SIGNAL == 1)
+VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
+{
+    UNUSED(stackTop);
+    TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
+    (VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
+
+    context->uwR0 = param;
+    context->uwPC = sigHandler;
+    context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
+
+    return (VOID *)context;
+}
+#endif
+
+LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
+{
+    (VOID)LOS_IntLock();
+    OsSchedStart();
+    HalStartToRun();
+    return LOS_OK; /* never return */
+}

arch/arm/cortex-m55/gcc/NTZ/los_dispatch.S

@@ -0,0 +1,191 @@
+/*
+ * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ .syntax unified
+ .arch armv8.1-m.main
+ .fpu vfpv3-d16-fp16
+ .thumb
+
+.equ    OS_NVIC_INT_CTRL,            0xE000ED04
+.equ    OS_NVIC_SYSPRI3,             0xE000ED20
+.equ    OS_NVIC_PENDSV_PRI,          0xF0F00000
+.equ    OS_NVIC_PENDSVSET,           0x10000000
+
+    .section .text
+    .thumb
+
+.macro SIGNAL_CONTEXT_RESTORE
+    push    {r12, lr}
+    blx     OsSignalTaskContextRestore
+    pop     {r12, lr}
+    cmp     r0, #0
+    mov     r1, r0
+    bne     SignalContextRestore
+.endm
+
+    .type HalStartToRun, %function
+    .global HalStartToRun
+HalStartToRun:
+    .fnstart
+    .cantunwind
+
+    ldr     r4, =OS_NVIC_SYSPRI3
+    ldr     r5, =OS_NVIC_PENDSV_PRI
+    str     r5, [r4]
+
+    mov     r0, #2
+    msr     CONTROL, r0
+
+    ldr     r1, =g_losTask
+    ldr     r0, [r1, #4]
+    ldr     r12, [r0]
+
+    ldr     r2, [r12, #4]
+    tst     r2, #0x10
+    it      ne
+    bne     __DisabledFPU
+
+    add     r12, r12, #108
+    ldmfd   r12!, {r0-r7}
+    add     r12, r12, #72
+    msr     psp, r12
+    vpush   {s0}
+    vpop    {s0}
+
+    mov     lr, r5
+    cpsie   I
+    bx      r6
+
+__DisabledFPU:
+    add     r12, r12, #44
+
+    ldmfd   r12!, {r0-r7}
+    msr     psp, r12
+    mov     lr, r5
+    cpsie   I
+    bx      r6
+    .fnend
+
+    .type ArchIntLock, %function
+    .global ArchIntLock
+ArchIntLock:
+    .fnstart
+    .cantunwind
+
+    mrs     r0, PRIMASK
+    cpsid   I
+    bx      lr
+    .fnend
+
+    .type ArchIntUnLock, %function
+    .global ArchIntUnLock
+ArchIntUnLock:
+    .fnstart
+    .cantunwind
+
+    mrs     r0, PRIMASK
+    cpsie   I
+    bx      lr
+    .fnend
+
+    .type ArchIntRestore, %function
+    .global ArchIntRestore
+ArchIntRestore:
+    .fnstart
+    .cantunwind
+
+    msr     PRIMASK, r0
+    bx      lr
+    .fnend
+
+    .type ArchTaskSchedule, %function
+    .global ArchTaskSchedule
+ArchTaskSchedule:
+    .fnstart
+    .cantunwind
+
+    ldr     r0, =OS_NVIC_INT_CTRL
+    ldr     r1, =OS_NVIC_PENDSVSET
+    str     r1, [r0]
+    dsb
+    isb
+    bx      lr
+   .fnend
+
+    .type HalPendSV, %function
+    .global HalPendSV
+HalPendSV:
+    .fnstart
+    .cantunwind
+
+    mrs     r12, PRIMASK
+    cpsid   I
+
+HalTaskSwitch:
+    SIGNAL_CONTEXT_RESTORE
+
+    push    {r12, lr}
+    blx     OsSchedTaskSwitch
+    pop     {r12, lr}
+    cmp     r0, #0
+    mov     r0, lr
+    bne     TaskContextSwitch
+    msr     PRIMASK, r12
+    bx      lr
+
+TaskContextSwitch:
+    mov      lr, r0
+    mrs      r0, psp
+    tst      lr, #0x10
+    it       eq
+    vstmdbeq r0!, {d8-d15}
+    mrs      r2, psplim
+    mov      r3, lr
+    stmfd    r0!, {r2-r12}
+
+    ldr      r5, =g_losTask
+    ldr      r6, [r5]
+    str      r0, [r6]
+
+    ldr      r0, [r5, #4]
+    str      r0, [r5]
+    ldr      r1, [r0]
+
+SignalContextRestore:
+    ldmfd    r1!, {r2-r12}
+    msr      psplim, r2
+    tst      r3, #0x10
+    it       eq
+    vldmiaeq r1!, {d8-d15}
+    msr      psp, r1
+    msr      PRIMASK, r12
+
+    bx       lr
+    .fnend

arch/arm/cortex-m55/gcc/NTZ/los_exc.S

@@ -0,0 +1,381 @@
+/*
+ * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+ .syntax unified
+ .arch armv8.1-m.main
+ .fpu vfpv3-d16-fp16
+ .thumb
+.section .text
+
+    .global  HalExcNMI
+    .global  HalExcHardFault
+    .global  HalExcMemFault
+    .global  HalExcBusFault
+    .global  HalExcUsageFault
+    .global  HalSVCHandler
+
+    .extern  HalExcHandleEntry
+    .extern  g_uwExcTbl
+    .extern  g_taskScheduled
+
+.equ OS_FLG_BGD_ACTIVE,        0x0002
+.equ OS_EXC_CAUSE_NMI,         19
+.equ OS_EXC_CAUSE_HARDFAULT,   20
+
+.equ HF_DEBUGEVT,              23
+.equ HF_VECTBL,                24
+
+.equ FLAG_ADDR_VALID,          0x10000
+.equ FLAG_HWI_ACTIVE,          0x20000
+.equ FLAG_NO_FLOAT,            0x10000000
+
+.equ OS_NVIC_FSR,              0xE000ED28      //include BusFault/MemFault/UsageFault State Register
+.equ OS_NVIC_HFSR,             0xE000ED2C      //HardFault State Register
+.equ OS_NVIC_BFAR,             0xE000ED38
+.equ OS_NVIC_MMAR,             0xE000ED34
+.equ OS_NVIC_ACT_BASE,         0xE000E300
+.equ OS_NVIC_SHCSRS,           0xE000ED24
+.equ OS_NVIC_SHCSR_MASK,       0xC00
+
+    .type HalExcNMI, %function
+    .global HalExcNMI
+HalExcNMI:
+    .fnstart
+    .cantunwind
+    MOV  R0, #OS_EXC_CAUSE_NMI
+    MOV  R1, #0
+    B    osExcDispatch
+    .fnend
+
+    .type HalExcHardFault, %function
+    .global HalExcHardFault
+HalExcHardFault:
+    .fnstart
+    .cantunwind
+    MOV  R0, #OS_EXC_CAUSE_HARDFAULT
+    LDR  R2, =OS_NVIC_HFSR
+    LDR  R2, [R2]
+
+    MOV  R1, #HF_DEBUGEVT
+    ORR  R0, R0, R1, LSL #0x8
+    TST  R2, #0x80000000
+    BNE  osExcDispatch     // DEBUGEVT
+
+    AND  R0, R0, #0x000000FF
+    MOV  R1, #HF_VECTBL
+    ORR  R0, R0, R1, LSL #0x8
+    TST  R2, #0x00000002
+    BNE  osExcDispatch     // VECTBL
+
+    //if not DEBUGEVT and VECTBL then is FORCED
+    AND  R0, R0, #0x000000FF
+
+    LDR  R2, =OS_NVIC_FSR
+    LDR  R2, [R2]
+
+    TST  R2, #0x8000     // BFARVALID
+    BNE  _HFBusFault     // BusFault
+
+    TST  R2, #0x80       // MMARVALID
+    BNE  _HFMemFault     // MemFault
+
+    MOV  R12, #0
+    B    osHFExcCommonBMU
+    .fnend
+
+    .type _HFBusFault, %function
+
+_HFBusFault:
+    .fnstart
+    .cantunwind
+    LDR  R1, =OS_NVIC_BFAR
+    LDR  R1, [R1]
+    MOV  R12, #FLAG_ADDR_VALID
+    B    osHFExcCommonBMU
+    .fnend
+
+    .type _HFMemFault, %function
+
+_HFMemFault:
+    .fnstart
+    .cantunwind
+    LDR  R1, =OS_NVIC_MMAR
+    LDR  R1, [R1]
+    MOV  R12, #FLAG_ADDR_VALID
+    .fnend
+
+    .type osHFExcCommonBMU, %function
+    .global osHFExcCommonBMU
+osHFExcCommonBMU:
+    .fnstart
+    .cantunwind
+    CLZ  R2, R2
+    LDR  R3, =g_uwExcTbl
+    ADD  R3, R3, R2
+    LDRB R2, [R3]
+    ORR  R0, R0, R2, LSL #0x8
+    ORR  R0, R0, R12
+    B    osExcDispatch
+    .fnend
+
+    .type HalSVCHandler, %function
+    .global HalSVCHandler
+HalSVCHandler:
+    .fnstart
+    .cantunwind
+    TST   LR, #0x4
+    ITE   EQ
+    MRSEQ R0, MSP
+    MRSNE R0, PSP
+    LDR   R1, [R0,#24]
+    LDRB  R0, [R1,#-2]
+    MOV   R1, #0
+    B     osExcDispatch
+    .fnend
+
+    .type HalExcBusFault, %function
+    .global HalExcBusFault
+HalExcBusFault:
+    .fnstart
+    .cantunwind
+    LDR  R0, =OS_NVIC_FSR
+    LDR  R0, [R0]
+
+    TST  R0, #0x8000  // BFARVALID
+    BEQ  _ExcBusNoADDR
+    LDR  R1, =OS_NVIC_BFAR
+    LDR  R1, [R1]
+    MOV  R12, #FLAG_ADDR_VALID
+    AND  R0, R0, #0x1F00
+
+    B    osExcCommonBMU
+    .fnend
+
+    .type _ExcBusNoADDR, %function
+    .global _ExcBusNoADDR
+_ExcBusNoADDR:
+    .fnstart
+    .cantunwind
+    MOV  R12, #0
+    B    osExcCommonBMU
+    .fnend
+
+    .type HalExcMemFault, %function
+    .global HalExcMemFault
+HalExcMemFault:
+    .fnstart
+    .cantunwind
+    LDR  R0, =OS_NVIC_FSR
+    LDR  R0, [R0]
+
+    TST  R0, #0x80 // MMARVALID
+    BEQ  _ExcMemNoADDR
+    LDR  R1, =OS_NVIC_MMAR
+    LDR  R1, [R1]
+    MOV  R12, #FLAG_ADDR_VALID
+    AND  R0, R0, #0x1B
+
+    B    osExcCommonBMU
+    .fnend
+
+    .type _ExcMemNoADDR, %function
+    .global _ExcMemNoADDR
+_ExcMemNoADDR:
+    .fnstart
+    .cantunwind
+    MOV  R12, #0
+    B    osExcCommonBMU
+    .fnend
+
+    .type HalExcUsageFault, %function
+    .global HalExcUsageFault
+HalExcUsageFault:
+    .fnstart
+    .cantunwind
+    LDR  R0, =OS_NVIC_FSR
+    LDR  R0, [R0]
+
+    MOVW R1, #0x031F
+    LSL  R1, R1, #16
+    AND  R0, R0, R1
+    MOV  R12, #0
+
+    .fnend
+
+    .type osExcCommonBMU, %function
+    .global osExcCommonBMU
+osExcCommonBMU:
+    .fnstart
+    .cantunwind
+    CLZ  R0, R0
+    LDR  R3, =g_uwExcTbl
+    ADD  R3, R3, R0
+    LDRB R0, [R3]
+    ORR  R0, R0, R12
+    .fnend
+// R0 -- EXCCAUSE(bit 16 is 1 if EXCADDR valid),  R1 -- EXCADDR
+
+    .type osExcDispatch, %function
+    .global osExcDispatch
+osExcDispatch:
+    .fnstart
+    .cantunwind
+    LDR   R2, =OS_NVIC_ACT_BASE
+    MOV   R12, #16                      // R12 is hwi check loop counter
+    .fnend
+
+    .type _hwiActiveCheck, %function
+    .global _hwiActiveCheck
+_hwiActiveCheck:
+    .fnstart
+    .cantunwind
+    LDR   R3, [R2]                      // R3 store active hwi register when exc
+    CMP   R3, #0
+    BEQ   _hwiActiveCheckNext
+
+    // exc occurred in IRQ
+    ORR   R0, R0, #FLAG_HWI_ACTIVE
+    RBIT  R2, R3
+    CLZ   R2, R2
+    AND   R12, R12, #1
+    ADD   R2, R2, R12, LSL #5               // calculate R2 (hwi number) as pid
+    .fnend
+
+    .type _ExcInMSP, %function
+    .global _ExcInMSP
+_ExcInMSP:
+    .fnstart
+    .cantunwind
+    CMP   LR, #0xFFFFFFE9
+    BNE   _NoFloatInMsp
+    ADD   R3, R13, #104
+    PUSH  {R3}
+    MRS   R12, PRIMASK                   // store message-->exc: disable int?
+    PUSH  {R4-R12}                       // store message-->exc: {R4-R12}
+    VPUSH {D8-D15}
+    B     _handleEntry
+  .fnend
+
+    .type _NoFloatInMsp, %function
+    .global _NoFloatInMsp
+_NoFloatInMsp:
+    .fnstart
+    .cantunwind
+    ADD   R3, R13, #32
+    PUSH  {R3} // save IRQ SP            // store message-->exc: MSP(R13)
+
+    MRS   R12, PRIMASK                   // store message-->exc: disable int?
+    PUSH  {R4-R12}                       // store message-->exc: {R4-R12}
+    ORR   R0, R0, #FLAG_NO_FLOAT
+    B     _handleEntry
+  .fnend
+
+    .type _hwiActiveCheckNext, %function
+    .global _hwiActiveCheckNext
+_hwiActiveCheckNext:
+    .fnstart
+    .cantunwind
+    ADD   R2, R2, #4                        // next NVIC ACT ADDR
+    SUBS  R12, R12, #1
+    BNE   _hwiActiveCheck
+
+    /*NMI interrupt excption*/
+    LDR   R2, =OS_NVIC_SHCSRS
+    LDRH  R2, [R2]
+    LDR   R3, =OS_NVIC_SHCSR_MASK
+    AND   R2, R2, R3
+    CMP   R2, #0
+    BNE   _ExcInMSP
+    // exc occurred in Task or Init or exc
+    // reserved for register info from task stack
+
+    LDR   R2, =g_taskScheduled
+    LDR   R2, [R2]
+    TST   R2, #1                         // OS_FLG_BGD_ACTIVE
+    BEQ   _ExcInMSP                      // if exc occurred in Init then branch
+
+
+    CMP   LR, #0xFFFFFFED                //auto push floating registers
+    BNE   _NoFloatInPsp
+
+    // exc occurred in Task
+    MOV   R2, R13
+    SUB   R13, #96                       // add 8 Bytes reg(for STMFD)
+
+    MRS   R3, PSP
+    ADD   R12, R3, #104
+    PUSH  {R12}                          // save task SP
+
+    MRS   R12, PRIMASK
+    PUSH  {R4-R12}
+    VPUSH {D8-D15}
+
+    // copy auto saved task register
+
+    LDMFD   R3!, {R4-R11}                  // R4-R11 store PSP reg(auto push when exc in task)
+    VLDMIA  R3!, {D8-D15}
+    VSTMDB  R2!, {D8-D15}
+    STMFD   R2!, {R4-R11}
+    B       _handleEntry
+  .fnend
+
+    .type _NoFloatInPsp, %function
+    .global _NoFloatInPsp
+_NoFloatInPsp:
+    .fnstart
+    .cantunwind
+    MOV   R2, R13                       // no auto push floating registers
+    SUB   R13, #32                      // add 8 Bytes reg(for STMFD)
+
+    MRS   R3, PSP
+    ADD   R12, R3, #32
+    PUSH  {R12}                         // save task SP
+
+    MRS   R12, PRIMASK
+    PUSH  {R4-R12}
+
+    LDMFD R3, {R4-R11}                  // R4-R11 store PSP reg(auto push when exc in task)
+    STMFD R2!, {R4-R11}
+    ORR   R0, R0, #FLAG_NO_FLOAT
+  .fnend
+
+    .type _handleEntry, %function
+    .global _handleEntry
+_handleEntry:
+    .fnstart
+    .cantunwind
+    MOV   R3, R13                         // R13:the 4th param
+    CPSID I
+    CPSID F
+    B     HalExcHandleEntry
+
+    NOP
+  .fnend
+

arch/arm/cortex-m55/gcc/NTZ/los_interrupt.c

@@ -0,0 +1,611 @@
+/*
+ * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "los_interrupt.h"
+#include <stdarg.h>
+#include "securec.h"
+#include "los_context.h"
+#include "los_arch_interrupt.h"
+#include "los_debug.h"
+#include "los_hook.h"
+#include "los_task.h"
+#include "los_sched.h"
+#include "los_memory.h"
+#include "los_membox.h"
+
+#define DEF_HANDLER_START_INDEX 2
+UINT32 g_intCount = 0;
+
+
+/* *
+ * @ingroup los_hwi
+ * Hardware interrupt form mapping handling function array.
+ */
+STATIC HWI_PROC_FUNC __attribute__((aligned(LOSCFG_ARCH_HWI_VECTOR_ALIGN))) g_hwiForm[OS_VECTOR_CNT] = {0};
+
+#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
+
+typedef struct {
+    HWI_PROC_FUNC pfnHandler;
+    VOID *pParm;
+} HWI_HANDLER_FUNC;
+
+/* *
+ * @ingroup los_hwi
+ * Hardware interrupt handler form mapping handling function array.
+ */
+STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
+
+/* *
+ * @ingroup los_hwi
+ * Set interrupt vector table.
+ */
+VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
+{
+    if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
+        g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt;
+        g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
+        g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
+    }
+}
+
+#else
+/* *
+ * @ingroup los_hwi
+ * hardware interrupt handler form mapping handling function array.
+ */
+STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
+
+/* *
+ * @ingroup los_hwi
+ * Set interrupt vector table.
+ */
+VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
+{
+    if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
+        g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt;
+        g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
+    }
+}
+#endif
+
+WEAK VOID SysTick_Handler(VOID)
+{
+    return;
+}
+
+/* ****************************************************************************
+ Function    : HwiNumGet
+ Description : Get an interrupt number
+ Input       : None
+ Output      : None
+ Return      : Interrupt Indexes number
+ **************************************************************************** */
+STATIC UINT32 HwiNumGet(VOID)
+{
+    return __get_IPSR();
+}
+
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    NVIC_SetPriority((IRQn_Type)hwiNum, priority);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .triggerIrq     = HwiPending,
+    .clearIrq       = HwiClear,
+};
+
+inline UINT32 ArchIsIntActive(VOID)
+{
+    return (g_intCount > 0);
+}
+/* ****************************************************************************
+ Function    : HalHwiDefaultHandler
+ Description : default handler of the hardware interrupt
+ Input       : None
+ Output      : None
+ Return      : None
+ **************************************************************************** */
+LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
+{
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
+    while (1) {}
+}
+
+WEAK VOID HalPreInterruptHandler(UINT32 arg)
+{
+    (VOID)arg;
+    return;
+}
+
+WEAK VOID HalAftInterruptHandler(UINT32 arg)
+{
+    (VOID)arg;
+    return;
+}
+
+/* ****************************************************************************
+ Function    : HalInterrupt
+ Description : Hardware interrupt entry function
+ Input       : None
+ Output      : None
+ Return      : None
+ **************************************************************************** */
+LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
+{
+    UINT32 hwiIndex;
+    UINT32 intSave;
+
+#if (LOSCFG_KERNEL_RUNSTOP == 1)
+    SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk);
+#endif
+
+    intSave = LOS_IntLock();
+    g_intCount++;
+    LOS_IntRestore(intSave);
+
+    hwiIndex = HwiNumGet();
+
+    OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
+
+    HalPreInterruptHandler(hwiIndex);
+
+#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
+    if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
+        g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
+    }
+#else
+    if (g_hwiHandlerForm[hwiIndex] != 0) {
+        g_hwiHandlerForm[hwiIndex]();
+    }
+#endif
+
+    HalAftInterruptHandler(hwiIndex);
+
+    OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
+
+    intSave = LOS_IntLock();
+    g_intCount--;
+    LOS_IntRestore(intSave);
+}
+
+/* ****************************************************************************
+ Function    : ArchHwiCreate
+ Description : create hardware interrupt
+ Input       : hwiNum   --- hwi num to create
+               hwiPrio  --- priority of the hwi
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
+ Output      : None
+ Return      : LOS_OK on success or error code on failure
+ **************************************************************************** */
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
+                                           HWI_PRIOR_T hwiPrio,
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
+{
+    (VOID)hwiMode;
+    UINT32 intSave;
+
+    if (hwiHandler == NULL) {
+        return OS_ERRNO_HWI_PROC_FUNC_NULL;
+    }
+
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
+        return OS_ERRNO_HWI_ALREADY_CREATED;
+    }
+
+    if (hwiPrio > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    intSave = LOS_IntLock();
+#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
+#else
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
+#endif
+    HwiUnmask((IRQn_Type)hwiNum);
+    HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
+
+    LOS_IntRestore(intSave);
+
+    return LOS_OK;
+}
+
+/* ****************************************************************************
+ Function    : ArchHwiDelete
+ Description : Delete hardware interrupt
+ Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
+ Output      : None
+ Return      : LOS_OK on success or error code on failure
+ **************************************************************************** */
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
+{
+    (VOID)irqParam;
+    UINT32 intSave;
+
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    HwiMask((IRQn_Type)hwiNum);
+
+    intSave = LOS_IntLock();
+
+    g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
+
+    LOS_IntRestore(intSave);
+
+    return LOS_OK;
+}
+
+#define FAULT_STATUS_REG_BIT            32
+#define USGFAULT                        (1 << 18)
+#define BUSFAULT                        (1 << 17)
+#define MEMFAULT                        (1 << 16)
+#define DIV0FAULT                       (1 << 4)
+#define UNALIGNFAULT                    (1 << 3)
+#define HARDFAULT_IRQN                  (-13)
+
+ExcInfo g_excInfo = {0};
+
+UINT8 g_uwExcTbl[FAULT_STATUS_REG_BIT] = {
+    0, 0, 0, 0,
+    0, 0, OS_EXC_UF_DIVBYZERO, OS_EXC_UF_UNALIGNED,
+    0, 0, 0, OS_EXC_UF_STKOF,
+    OS_EXC_UF_NOCP, OS_EXC_UF_INVPC, OS_EXC_UF_INVSTATE, OS_EXC_UF_UNDEFINSTR,
+    0, 0, OS_EXC_BF_LSPERR, OS_EXC_BF_STKERR,
+    OS_EXC_BF_UNSTKERR, OS_EXC_BF_IMPRECISERR, OS_EXC_BF_PRECISERR, OS_EXC_BF_IBUSERR,
+    0, 0, OS_EXC_MF_MLSPERR, OS_EXC_MF_MSTKERR,
+    OS_EXC_MF_MUNSTKERR, 0, OS_EXC_MF_DACCVIOL, OS_EXC_MF_IACCVIOL
+};
+
+#if (LOSCFG_KERNEL_PRINTF != 0)
+STATIC VOID OsExcNvicDump(VOID)
+{
+#define OS_NR_NVIC_EXC_DUMP_TYPES   7
+    UINT32 *base = NULL;
+    UINT32 len, i, j;
+    UINT32 rgNvicBases[OS_NR_NVIC_EXC_DUMP_TYPES] = {
+        OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
+        OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
+    };
+    UINT32 rgNvicLens[OS_NR_NVIC_EXC_DUMP_TYPES] = {
+        OS_NVIC_INT_ENABLE_SIZE, OS_NVIC_INT_PEND_SIZE, OS_NVIC_INT_ACT_SIZE,
+        OS_NVIC_INT_PRI_SIZE, OS_NVIC_EXCPRI_SIZE, OS_NVIC_SHCSR_SIZE,
+        OS_NVIC_INT_CTRL_SIZE
+    };
+    CHAR strRgEnable[] = "enable";
+    CHAR strRgPending[] = "pending";
+    CHAR strRgActive[] = "active";
+    CHAR strRgPriority[] = "priority";
+    CHAR strRgException[] = "exception";
+    CHAR strRgShcsr[] = "shcsr";
+    CHAR strRgIntCtrl[] = "control";
+    CHAR *strRgs[] = {
+        strRgEnable, strRgPending, strRgActive, strRgPriority,
+        strRgException, strRgShcsr, strRgIntCtrl
+    };
+
+    PRINTK("\r\nOS exception NVIC dump:\n");
+    for (i = 0; i < OS_NR_NVIC_EXC_DUMP_TYPES; i++) {
+        base = (UINT32 *)rgNvicBases[i];
+        len = rgNvicLens[i];
+        PRINTK("interrupt %s register, base address: %p, size: 0x%x\n", strRgs[i], base, len);
+        len = (len >> 2); /* 2: Gets the next register offset */
+        for (j = 0; j < len; j++) {
+            PRINTK("0x%x ", *(base + j));
+            if ((j != 0) && ((j % 16) == 0)) { /* 16: print wrap line */
+                PRINTK("\n");
+            }
+        }
+        PRINTK("\n");
+    }
+}
+
+STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
+{
+    CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
+
+    PRINTK("Type      = %d\n", excInfo->type);
+    PRINTK("ThrdPid   = %d\n", excInfo->thrdPid);
+    PRINTK("Phase     = %s\n", phaseStr[excInfo->phase]);
+    PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
+}
+
+STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
+{
+    PRINTK("Current task info:\n");
+    if (excInfo->phase == OS_EXC_IN_TASK) {
+        LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
+        PRINTK("Task name = %s\n", taskCB->taskName);
+        PRINTK("Task ID   = %d\n", taskCB->taskID);
+        PRINTK("Task SP   = %p\n", taskCB->stackPointer);
+        PRINTK("Task ST   = 0x%x\n", taskCB->topOfStack);
+        PRINTK("Task SS   = 0x%x\n", taskCB->stackSize);
+    } else if (excInfo->phase == OS_EXC_IN_HWI) {
+        PRINTK("Exception occur in interrupt phase!\n");
+    } else {
+        PRINTK("Exception occur in system init phase!\n");
+    }
+}
+
+STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
+{
+    PRINTK("Exception reg dump:\n");
+    PRINTK("PC        = 0x%x\n", excInfo->context->uwPC);
+    PRINTK("LR        = 0x%x\n", excInfo->context->uwLR);
+    PRINTK("SP        = 0x%x\n", excInfo->context->uwSP);
+    PRINTK("R0        = 0x%x\n", excInfo->context->uwR0);
+    PRINTK("R1        = 0x%x\n", excInfo->context->uwR1);
+    PRINTK("R2        = 0x%x\n", excInfo->context->uwR2);
+    PRINTK("R3        = 0x%x\n", excInfo->context->uwR3);
+    PRINTK("R4        = 0x%x\n", excInfo->context->uwR4);
+    PRINTK("R5        = 0x%x\n", excInfo->context->uwR5);
+    PRINTK("R6        = 0x%x\n", excInfo->context->uwR6);
+    PRINTK("R7        = 0x%x\n", excInfo->context->uwR7);
+    PRINTK("R8        = 0x%x\n", excInfo->context->uwR8);
+    PRINTK("R9        = 0x%x\n", excInfo->context->uwR9);
+    PRINTK("R10       = 0x%x\n", excInfo->context->uwR10);
+    PRINTK("R11       = 0x%x\n", excInfo->context->uwR11);
+    PRINTK("R12       = 0x%x\n", excInfo->context->uwR12);
+    PRINTK("PriMask   = 0x%x\n", excInfo->context->uwPriMask);
+    PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
+}
+
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
+STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
+{
+    UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
+    UINT32 index;
+
+    OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->uwSP);
+
+    PRINTK("----- backtrace start -----\n");
+    for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
+        if (LR[index] == 0) {
+            break;
+        }
+        PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
+    }
+    PRINTK("----- backtrace end -----\n");
+}
+#endif
+
+STATIC VOID OsExcMemPoolCheckInfo(VOID)
+{
+    PRINTK("\r\nmemory pools check:\n");
+#if (LOSCFG_PLATFORM_EXC == 1)
+    MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
+    UINT32 errCnt;
+    UINT32 i;
+
+    (VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
+
+    errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
+    if (errCnt < OS_SYS_MEM_NUM) {
+        errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
+    }
+
+    if (errCnt == 0) {
+        PRINTK("all memory pool check passed!\n");
+        return;
+    }
+
+    for (i = 0; i < errCnt; i++) {
+        PRINTK("pool num    = %d\n", i);
+        PRINTK("pool type   = %d\n", memExcInfo[i].type);
+        PRINTK("pool addr   = 0x%x\n", memExcInfo[i].startAddr);
+        PRINTK("pool size   = 0x%x\n", memExcInfo[i].size);
+        PRINTK("pool free   = 0x%x\n", memExcInfo[i].free);
+        PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
+        PRINTK("pool error node addr  = 0x%x\n", memExcInfo[i].errorAddr);
+        PRINTK("pool error node len   = 0x%x\n", memExcInfo[i].errorLen);
+        PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
+    }
+#endif
+    UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
+    if (ret == LOS_OK) {
+        PRINTK("system heap memcheck over, all passed!\n");
+    }
+
+    PRINTK("memory pool check end!\n");
+}
+#endif
+
+STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
+{
+#if (LOSCFG_KERNEL_PRINTF != 0)
+    PRINTK("*************Exception Information**************\n");
+    OsExcTypeInfo(excInfo);
+    OsExcCurTaskInfo(excInfo);
+    OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
+    OsExcBackTraceInfo(excInfo);
+#endif
+    OsGetAllTskInfo();
+    OsExcNvicDump();
+    OsExcMemPoolCheckInfo();
+#endif
+}
+
+LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr)
+{
+    UINT16 tmpFlag = (excType >> 16) & OS_NULL_SHORT; /* 16: Get Exception Type */
+    g_intCount++;
+    g_excInfo.nestCnt++;
+
+    g_excInfo.type = excType & OS_NULL_SHORT;
+
+    if (tmpFlag & OS_EXC_FLAG_FAULTADDR_VALID) {
+        g_excInfo.faultAddr = faultAddr;
+    } else {
+        g_excInfo.faultAddr = OS_EXC_IMPRECISE_ACCESS_ADDR;
+    }
+    if (g_losTask.runTask != NULL) {
+        if (tmpFlag & OS_EXC_FLAG_IN_HWI) {
+            g_excInfo.phase = OS_EXC_IN_HWI;
+            g_excInfo.thrdPid = pid;
+        } else {
+            g_excInfo.phase = OS_EXC_IN_TASK;
+            g_excInfo.thrdPid = g_losTask.runTask->taskID;
+        }
+    } else {
+        g_excInfo.phase = OS_EXC_IN_INIT;
+        g_excInfo.thrdPid = OS_NULL_INT;
+    }
+    if (excType & OS_EXC_FLAG_NO_FLOAT) {
+        g_excInfo.context = (EXC_CONTEXT_S *)((CHAR *)excBufAddr - LOS_OFF_SET_OF(EXC_CONTEXT_S, uwR4));
+    } else {
+        g_excInfo.context = excBufAddr;
+    }
+
+    OsDoExcHook(EXC_INTERRUPT);
+    OsExcInfoDisplay(&g_excInfo);
+    ArchSysExit();
+}
+
+/* ****************************************************************************
+ Function    : HalHwiInit
+ Description : initialization of the hardware interrupt
+ Input       : None
+ Output      : None
+ Return      : None
+ **************************************************************************** */
+LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
+{
+#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
+    UINT32 index;
+    g_hwiForm[0] = 0;             /* [0] Top of Stack */
+    g_hwiForm[1] = 0; /* [1] reset */
+    for (index = DEF_HANDLER_START_INDEX; index < OS_VECTOR_CNT; index++) {
+        g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
+    }
+    /* Exception handler register */
+    g_hwiForm[NonMaskableInt_IRQn + OS_SYS_VECTOR_CNT]   = HalExcNMI;
+    g_hwiForm[HARDFAULT_IRQN + OS_SYS_VECTOR_CNT]        = HalExcHardFault;
+    g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = HalExcMemFault;
+    g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT]         = HalExcBusFault;
+    g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT]       = HalExcUsageFault;
+    g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT]           = HalSVCHandler;
+    g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT]           = HalPendSV;
+    g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT]          = OsTickHandler;
+
+    /* Interrupt vector table location */
+    SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
+#endif
+#if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
+    NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
+#endif
+
+    /* Enable USGFAULT, BUSFAULT, MEMFAULT */
+    *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
+
+    /* Enable DIV 0 and unaligned exception */
+#ifdef LOSCFG_ARCH_UNALIGNED_EXC
+    *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
+#else
+    *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT);
+#endif
+
+    return;
+}
+

arch/arm/cortex-m55/gcc/NTZ/los_timer.c

@@ -0,0 +1,127 @@
+/*
+ * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "los_timer.h"
+#include "los_config.h"
+#include "los_tick.h"
+#include "los_arch_interrupt.h"
+#include "los_debug.h"
+
+STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickCycleGet(UINT32 *period);
+STATIC VOID SysTickLock(VOID);
+STATIC VOID SysTickUnlock(VOID);
+
+STATIC ArchTickTimer g_archTickTimer = {
+    .freq = 0,
+    .irqNum = SysTick_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
+    .init = SysTickStart,
+    .getCycle = SysTickCycleGet,
+    .reload = SysTickReload,
+    .lock = SysTickLock,
+    .unlock = SysTickUnlock,
+    .tickHandler = NULL,
+};
+
+STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
+{
+    UINT32 ret;
+    ArchTickTimer *tick = &g_archTickTimer;
+
+    tick->freq = OS_SYS_CLOCK;
+
+#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
+#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
+    OsSetVector(tick->irqNum, handler, NULL);
+#else
+    OsSetVector(tick->irqNum, handler);
+#endif
+#endif
+
+    ret = SysTick_Config(LOSCFG_BASE_CORE_TICK_RESPONSE_MAX);
+    if (ret == 1) {
+        return LOS_ERRNO_TICK_PER_SEC_TOO_SMALL;
+    }
+
+    return LOS_OK;
+}
+
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
+{
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
+
+    SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
+    SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
+    SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
+    NVIC_ClearPendingIRQ(SysTick_IRQn);
+    SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+    return nextResponseTime;
+}
+
+STATIC UINT64 SysTickCycleGet(UINT32 *period)
+{
+    UINT32 hwCycle = 0;
+    UINT32 intSave = LOS_IntLock();
+    UINT32 val = SysTick->VAL;
+    *period = SysTick->LOAD;
+    if (val != 0) {
+        hwCycle = *period - val;
+    }
+    LOS_IntRestore(intSave);
+    return (UINT64)hwCycle;
+}
+
+STATIC VOID SysTickLock(VOID)
+{
+    SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
+}
+
+STATIC VOID SysTickUnlock(VOID)
+{
+    SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+}
+
+ArchTickTimer *ArchSysTickTimerGet(VOID)
+{
+    return &g_archTickTimer;
+}
+
+UINT32 ArchEnterSleep(VOID)
+{
+    __DSB();
+    __WFI();
+    __ISB();
+
+    return LOS_OK;
+}

arch/arm/cortex-m7/gcc/los_dispatch.S

@@ -137,7 +137,7 @@ ArchTaskSchedule:
     dsb
     isb
     bx      lr
-   .fnend
+    .fnend
 
     .type HalPendSV, %function
     .global HalPendSV
@@ -178,7 +178,7 @@ TaskContextSwitch:
     str     r0, [r5]
     ldr     r1, [r0]
 
- SignalContextRestore:
+SignalContextRestore:
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))
     vldmia   r1!, {d8-d15}

arch/arm/cortex-m7/gcc/los_exc.S

@@ -29,9 +29,9 @@
  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
- .syntax unified
- .arch armv7e-m
- .thumb
+.syntax unified
+.arch armv7e-m
+.thumb
 .fpu fpv5-d16
 .section .text
 
@@ -263,7 +263,7 @@ _hwiActiveCheck:
     CMP   R3, #0
     BEQ   _hwiActiveCheckNext
 
-    // exc occured in IRQ
+    // exc occurred in IRQ
     ORR   R0, R0, #FLAG_HWI_ACTIVE
     RBIT  R2, R3
     CLZ   R2, R2
@@ -284,7 +284,7 @@ _ExcInMSP:
     PUSH {R4-R12}                       // store message-->exc: {R4-R12}
     VPUSH {D8-D15}
     B     _handleEntry
-  .fnend
+    .fnend
 
     .type _NoFloatInMsp, %function
     .global _NoFloatInMsp
@@ -298,7 +298,7 @@ _NoFloatInMsp:
     PUSH {R4-R12}                       // store message-->exc: {R4-R12}
     ORR   R0, R0, #FLAG_NO_FLOAT
     B     _handleEntry
-  .fnend
+    .fnend
 
     .type _hwiActiveCheckNext, %function
     .global _hwiActiveCheckNext
@@ -316,19 +316,19 @@ _hwiActiveCheckNext:
     AND   R2, R2,R3
     CMP   R2,#0
     BNE   _ExcInMSP
-    // exc occured in Task or Init or exc
+    // exc occurred in Task or Init or exc
     // reserved for register info from task stack
 
     LDR  R2, =g_taskScheduled
     LDR  R2, [R2]
     TST  R2, #1                         // OS_FLG_BGD_ACTIVE
-    BEQ  _ExcInMSP                      // if exc occured in Init then branch
+    BEQ  _ExcInMSP                      // if exc occurred in Init then branch
 
 
     CMP   LR, #0xFFFFFFED               //auto push floating registers
     BNE   _NoFloatInPsp
 
-    // exc occured in Task
+    // exc occurred in Task
     MOV   R2,  R13
     SUB   R13, #96                      // add 8 Bytes reg(for STMFD)
 
@@ -347,7 +347,7 @@ _hwiActiveCheckNext:
     VSTMDB  R2!, {D8-D15}
     STMFD R2!, {R4-R11}
     B     _handleEntry
-  .fnend
+    .fnend
 
     .type _NoFloatInPsp, %function
     .global _NoFloatInPsp
@@ -367,7 +367,7 @@ _NoFloatInPsp:
     LDMFD R3, {R4-R11}                  // R4-R11 store PSP reg(auto push when exc in task)
     STMFD R2!, {R4-R11}
     ORR   R0, R0, #FLAG_NO_FLOAT
-  .fnend
+    .fnend
 
     .type _handleEntry, %function
     .global _handleEntry
@@ -380,5 +380,5 @@ _handleEntry:
     B  HalExcHandleEntry
 
     NOP
-  .fnend
+    .fnend
 

arch/arm/cortex-m7/gcc/los_interrupt.c

@@ -40,11 +40,8 @@
 #include "los_memory.h"
 #include "los_membox.h"
 
-/*lint -save -e40 -e522 -e533*/
 UINT32 g_intCount = 0;
 
-/*lint -restore*/
-
 /* *
  * @ingroup los_hwi
  * Hardware interrupt form mapping handling function array.
@@ -188,21 +185,21 @@ inline UINT32 ArchIsIntActive(VOID)
  Output      : None
  Return      : None
  **************************************************************************** */
-/*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -256,21 +253,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINT32 intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -288,9 +286,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask((IRQn_Type)hwiNum);
     HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
@@ -304,11 +307,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {
@@ -583,7 +588,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
-	
+
     /* Enable DIV 0 and unaligned exception */
 #ifdef LOSCFG_ARCH_UNALIGNED_EXC
     *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);

arch/arm/cortex-m7/gcc/los_timer.c

@@ -36,7 +36,7 @@
 #include "los_debug.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -44,6 +44,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = SysTick_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -75,13 +76,17 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
     NVIC_ClearPendingIRQ(SysTick_IRQn);
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/arm/cortex-m7/iar/los_exc.S

@@ -190,7 +190,7 @@ _hwiActiveCheck
     CMP   R3, #0
     BEQ   _hwiActiveCheckNext
 
-    ; exc occured in IRQ
+    ; exc occurred in IRQ
     ORR   R0, R0, #FLAG_HWI_ACTIVE
     RBIT  R2, R3
     CLZ   R2, R2
@@ -228,19 +228,19 @@ _hwiActiveCheckNext
     AND   R2, R2,R3
     CMP   R2,#0
     BNE   _ExcInMSP
-    ; exc occured in Task or Init or exc
+    ; exc occurred in Task or Init or exc
     ; reserved for register info from task stack
 
     LDR  R2, =g_taskScheduled
     LDR  R2, [R2]
     TST  R2, #1         ; OS_FLG_BGD_ACTIVE
-    BEQ  _ExcInMSP                      ; if exc occured in Init then branch
+    BEQ  _ExcInMSP                      ; if exc occurred in Init then branch
 
 
     CMP   LR, #0xFFFFFFED               ;auto push floating registers
     BNE   _NoFloatInPsp
 
-    ; exc occured in Task
+    ; exc occurred in Task
     MOV   R2,  R13
     SUB   R13, #96                      ; add 8 Bytes reg(for STMFD)
 

arch/arm/cortex-m7/iar/los_interrupt.c

@@ -41,12 +41,10 @@
 #include "los_memory.h"
 #include "los_membox.h"
 
-/*lint -save -e40 -e522 -e533*/
 UINT32 g_intCount = 0;
 
-/*lint -restore*/
 #pragma location = ".data.vector"
-#pragma data_alignment=LOSCFG_ARCH_HWI_VECTOR_ALIGN
+#pragma data_alignment = LOSCFG_ARCH_HWI_VECTOR_ALIGN
 /* *
  * @ingroup los_hwi
  * Hardware interrupt form mapping handling function array.
@@ -198,18 +196,19 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -263,21 +262,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINT32 intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -295,9 +295,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask((IRQn_Type)hwiNum);
     HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
@@ -311,11 +316,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {
@@ -590,7 +597,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
-	
+
     /* Enable DIV 0 and unaligned exception */
     *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
 

arch/arm/cortex-m7/iar/los_timer.c

@@ -36,7 +36,7 @@
 #include "los_debug.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -44,6 +44,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = SysTick_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -75,13 +76,17 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
     SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
     NVIC_ClearPendingIRQ(SysTick_IRQn);
     SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/csky/v2/gcc/los_arch_context.h

@@ -59,13 +59,33 @@ typedef struct TagTskContext {
     UINT32 R12;
     UINT32 R13;
     UINT32 R15;
+#ifdef CPU_CK804
+    UINT32 R16;
+    UINT32 R17;
+    UINT32 R18;
+    UINT32 R19;
+    UINT32 R20;
+    UINT32 R21;
+    UINT32 R22;
+    UINT32 R23;
+    UINT32 R24;
+    UINT32 R25;
+    UINT32 R26;
+    UINT32 R27;
+    UINT32 R28;
+    UINT32 R29;
+    UINT32 R30;
+    UINT32 R31;
+#endif
     UINT32 EPSR;
     UINT32 EPC;
 } TaskContext;
 
 VOID HalStartToRun(VOID);
 VOID HalTaskContextSwitch(VOID);
+#ifndef CPU_CK804
 VOID HalIrqEndCheckNeedSched(VOID);
+#endif
 
 #ifdef __cplusplus
 #if __cplusplus

arch/csky/v2/gcc/los_arch_interrupt.h

@@ -82,7 +82,7 @@ typedef VOID (**HWI_VECTOR_FUNC)(VOID);
  * @ingroup los_arch_interrupt
  * Count of interrupts.
  */
-extern UINT32 g_intCount;
+extern volatile UINT32 g_intCount;
 
 /* *
  * @ingroup los_arch_interrupt

arch/csky/v2/gcc/los_context.c

@@ -38,7 +38,9 @@
 #include "los_interrupt.h"
 #include "los_debug.h"
 
+#ifndef CPU_CK804
 STATIC UINT32 g_sysNeedSched = FALSE;
+#endif
 
 /* ****************************************************************************
  Function    : ArchInit
@@ -93,8 +95,29 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
     context->R11 = 0x11111111L;
     context->R12 = 0x12121212L;
     context->R13 = 0x13131313L;
+#ifdef CPU_CK804
+    context->R15 = (UINT32)ArchSysExit;
+    context->R16 = 0x16161616L;
+    context->R17 = 0x17171717L;
+    context->R18 = 0x18181818L;
+    context->R19 = 0x19191919L;
+    context->R20 = 0x20202020L;
+    context->R21 = 0x21212121L;
+    context->R22 = 0x22222222L;
+    context->R23 = 0x23232323L;
+    context->R24 = 0x24242424L;
+    context->R25 = 0x25252525L;
+    context->R26 = 0x26262626L;
+    context->R27 = 0x27272727L;
+    context->R28 = 0x28282828L;
+    context->R29 = 0x29292929L;
+    context->R30 = 0x30303030L;
+    context->R31 = 0x31313131L;
+    context->EPSR = 0x80000340L;
+#else
     context->R15 = (UINT32)ArchSysExit;
     context->EPSR = 0xe0000144L;
+#endif
     context->EPC = (UINT32)OsTaskEntry;
     return (VOID *)context;
 }
@@ -107,6 +130,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
     return LOS_OK; /* never return */
 }
 
+#ifndef CPU_CK804
 VOID HalIrqEndCheckNeedSched(VOID)
 {
     if (g_sysNeedSched && g_taskScheduled && LOS_CHECK_SCHEDULE) {
@@ -132,3 +156,10 @@ VOID ArchTaskSchedule(VOID)
     LOS_IntRestore(intSave);
     return;
 }
+#else
+VOID ArchTaskSchedule(VOID)
+{
+    HalTaskContextSwitch();
+}
+#endif
+

arch/csky/v2/gcc/los_dispatch.S

@@ -32,6 +32,89 @@
 #define OS_TASK_STATUS_RUNNING    0x0010
 #define VIC_TSPDR                 0XE000EC08
 
+#ifdef CPU_CK804
+.section .text
+.align  2
+.type HalStartToRun, %function
+.global HalStartToRun
+HalStartToRun:
+    lrw    r1, g_losTask
+    lrw    r2, g_losTask + 4
+
+    ldw    r0, (r2)
+
+    st.w   r0, (r1)
+    st.w   r0, (r2)
+
+    ldw    sp, (r0)
+
+    ldw    r0, (sp, 128)
+    mtcr   r0, epc
+    ldw    r0, (sp, 124)
+    mtcr   r0, epsr
+    ldw    r15, (sp, 56)
+    ldm    r0-r13, (sp)
+    addi     sp, 60
+    ldm      r16-r31, (sp)
+    addi     sp, 72
+
+    rte
+
+.align  2
+.type HalTaskContextSwitch, %function
+.global HalTaskContextSwitch
+HalTaskContextSwitch:
+    lrw    r0, VIC_TSPDR
+    bgeni  r1, 0
+    stw    r1, (r0)
+    nop
+    nop
+    nop
+    rts
+    
+.align  2
+.type tspend_handler, %function
+.global tspend_handler
+tspend_handler:
+
+    subi   sp, 132
+    stm    r0-r13, (sp)
+    stw    r15, (sp, 56)
+    addi     r0, sp, 60
+    stm      r16-r31, (r0)
+    mfcr     r1, epsr
+    stw    r1, (sp, 124)
+    mfcr     r1, epc
+    stw    r1, (sp, 128)
+
+    jbsr    OsSchedTaskSwitch
+    bez     r0, ret_con
+    
+    lrw    r2, g_losTask
+    ldw    r0, (r2)
+    stw    sp, (r0)
+
+    lrw    r3, g_losTask + 4
+    ldw    r0, (r3)
+    stw    r0, (r2)
+
+    ldw    sp, (r0)
+    
+ ret_con:   
+    ldw    r0, (sp, 128)
+    mtcr   r0, epc
+    ldw    r0, (sp, 124)
+    mtcr   r0, epsr
+    ldw    r15, (sp, 56)
+    ldm    r0-r13, (sp)
+    addi     sp, 60
+    ldm      r16-r31, (sp)
+
+    addi   sp, 72
+
+    rte
+    
+#else
 .section .text
 .align  2
 .type HalStartToRun, %function
@@ -87,3 +170,4 @@ HalTaskContextSwitch:
 
     rte
 
+#endif

arch/csky/v2/gcc/los_exc.S

@@ -32,6 +32,57 @@
 .import HalExcHandleEntry
 .extern g_trapStackBase
 
+#ifdef CPU_CK804
+.section .text
+.align  2
+.global HandleEntry
+HandleEntry:
+    mov    r10, sp
+    lrw    r14, g_trapStackBase
+
+    stm    r0-r15, (sp)
+    stw    r10, (sp, 56)
+    addi     r0, sp, 64
+    stm      r16-r31, (r0)
+    mfcr   r0, epsr
+    stw    r0, (sp, 128)
+    mfcr   r0, epc
+    stw    r0, (sp, 132)
+    mov    r0, sp
+
+    mfcr   r1, epc
+
+    mov    sp, r10
+    lrw    r2, HalExcHandleEntry
+    jmp    r2
+
+.section .text
+.align  2
+.global IrqEntry
+IrqEntry:
+    psrset  ee
+    subi   sp, 136
+    stm    r0-r15, (sp)
+    addi     r0, sp, 64
+    stm      r16-r31, (r0)
+    mfcr   r0, epsr
+    stw    r0, (sp, 128)
+    mfcr   r0, epc
+    stw    r0, (sp, 132)
+
+    jbsr   HalInterrupt
+
+    ldw    r0, (sp, 132)
+    mtcr   r0, epc
+    ldw    r0, (sp, 128)
+    bseti  r0, r0, 6
+    mtcr   r0, epsr
+    ldm    r0-r15, (sp)
+    addi     sp, 64
+    ldm      r16-r31, (sp)
+    addi   sp, 72
+    rte
+#else
 .section .text
 .align  2
 .global HandleEntry
@@ -75,3 +126,4 @@ IrqEntry:
     ldm    r0-r15, (sp)
     addi   sp, 72
     rte
+#endif

arch/csky/v2/gcc/los_interrupt.c

@@ -52,13 +52,12 @@
 #define MASK_8_BITS      0xFF
 #define MASK_32_BITS     0xFFFFFFFF
 #define BYTES_OF_128_INT 4
-#define TIM_INT_NUM      1
 
 #define OS_USER_HWI_MIN                 0
 #define OS_USER_HWI_MAX                 (LOSCFG_PLATFORM_HWI_LIMIT - 1)
 #define HWI_ALIGNSIZE                   0x400
 
-UINT32 g_intCount = 0;
+UINT32 volatile g_intCount = 0;
 CHAR g_trapStackBase[OS_TRAP_STACK_SIZE];
 
 VIC_TYPE *VIC_REG = (VIC_TYPE *)VIC_REG_BASE;
@@ -256,7 +255,7 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
  **************************************************************************** */
 STATIC UINT32 HwiNumGet(VOID)
 {
-    return HalGetPsr();
+    return (HalGetPsr() >> PSR_VEC_OFFSET) & MASK_8_BITS;
 }
 
 HwiControllerOps g_archHwiOps = {
@@ -282,19 +281,19 @@ inline UINT32 ArchIsIntActive(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    irqNum = (irqNum >> PSR_VEC_OFFSET) & MASK_8_BITS;
-    PRINT_ERR("%s irqnum:%x\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%x\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -315,7 +314,6 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
     LOS_IntRestore(intSave);
 
     hwiIndex = HwiNumGet();
-    hwiIndex = (hwiIndex >> PSR_VEC_OFFSET) & MASK_8_BITS;
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
     HalPreInterruptHandler(hwiIndex);
@@ -335,7 +333,9 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
 
     intSave = LOS_IntLock();
     g_intCount--;
+#ifndef CPU_CK804
     HalIrqEndCheckNeedSched();
+#endif
     LOS_IntRestore(intSave);
 }
 
@@ -344,21 +344,22 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler  --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler  --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                            HWI_PRIOR_T hwiPrio,
-                                           HWI_MODE_T mode,
-                                           HWI_PROC_FUNC handler,
-                                           HWI_ARG_T arg)
+                                           HWI_MODE_T hwiMode,
+                                           HWI_PROC_FUNC hwiHandler,
+                                           HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINT32 intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
     if (hwiNum >= OS_HWI_MAX_NUM) {
@@ -375,9 +376,14 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
     }
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask(hwiNum);
     (VOID)HwiSetPriority(hwiNum, (UINT8)hwiPrio);
@@ -390,11 +396,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {
@@ -579,6 +587,10 @@ WEAK VOID __stack_chk_fail(VOID)
               __builtin_return_address(0));
 }
 
+WEAK void HalHwiHandleReInit(UINT32 hwiFormAddr)
+{
+}
+
 /* ****************************************************************************
  Function    : HalHwiInit
  Description : initialization of the hardware interrupt
@@ -597,6 +609,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
     for (i = OS_SYS_VECTOR_CNT; i < (LOSCFG_PLATFORM_HWI_LIMIT + OS_SYS_VECTOR_CNT); i++) {
         g_hwiForm[i] = (HWI_PROC_FUNC)IrqEntry;
     }
+    HalHwiHandleReInit((UINT32)&g_hwiForm);
 
     HalSetVbr((UINT32)&g_hwiForm);
     for (int i = 0; i < BYTES_OF_128_INT; i++) {

arch/csky/v2/gcc/los_timer.c

@@ -50,10 +50,14 @@ typedef struct {
 #define CORETIM_SOURCE       (1UL << 2)
 #define CORETIM_MODE         (1UL << 16)
 
+#ifdef CPU_CK804
+#define TIM_INT_NUM          25
+#else
 #define TIM_INT_NUM          1
+#endif
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -61,6 +65,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = TIM_INT_NUM,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -98,12 +103,16 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
     SysTick->CTRL &= ~CORETIM_ENABLE;
     SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
     SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
     SysTick->CTRL |= CORETIM_ENABLE;
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/include/los_interrupt.h

@@ -53,6 +53,11 @@ typedef VOID (*HWI_PROC_FUNC)(VOID *parm);
 #else
 typedef VOID (*HWI_PROC_FUNC)(void);
 #endif
+typedef struct tagIrqParam {
+    int swIrq;         /**< The interrupt number */
+    VOID *pDevId;      /**< The pointer to the device ID that launches the interrupt */
+    const CHAR *pName; /**< The interrupt name */
+} HwiIrqParam;
 
 typedef struct {
     UINT32 (*triggerIrq)(HWI_HANDLE_T hwiNum);
@@ -80,6 +85,7 @@ UINT32 ArchIsIntActive(VOID);
 #define LOS_HwiDisable ArchIntDisable
 #define LOS_HwiClear ArchIntClear
 #define LOS_HwiSetPriority ArchIntSetPriority
+#define LOS_HwiCurIrqNum ArchIntCurIrqNum
 
 UINT32 ArchIntLock(VOID);
 #define LOS_IntLock ArchIntLock
@@ -108,14 +114,15 @@ UINT32 ArchIntUnLock(VOID);
  * </ul>
  *
  * @param  hwiNum   [IN] Type#HWI_HANDLE_T: hardware interrupt number. The value range applicable for a Cortex-A7 platform is [32,95].
- *
+ * @param  irqParam [IN] Type #HwiIrqParam *. ID of hardware interrupt which will base on
+ *                                                when delete the hardware interrupt.
  * @retval #OS_ERRNO_HWI_NUM_INVALID              0x02000900: Invalid interrupt number.
  * @retval #LOS_OK                                0         : The interrupt is successfully delete.
  * @par Dependency:
  * <ul><li>los_interrupt.h: the header file that contains the API declaration.</li></ul>
  * @see None.
  */
-UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum);
+UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam);
 
 /**
  * @ingroup  los_interrupt
@@ -136,7 +143,8 @@ UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum);
  * @param  hwiPrio  [IN] Type#HWI_PRIOR_T: hardware interrupt priority. Ignore this parameter temporarily.
  * @param  mode     [IN] Type#HWI_MODE_T: hardware interrupt mode. Ignore this parameter temporarily.
  * @param  handler  [IN] Type#HWI_PROC_FUNC: interrupt handler used when a hardware interrupt is triggered.
- * @param  arg      [IN] Type#HWI_ARG_T: input parameter of the interrupt handler used when a hardware interrupt is triggered.
+ * @param  irqParam [IN] Type#HwiIrqParam: input parameter of the interrupt
+ *                                         handler used when a hardware interrupt is triggered.
  *
  * @retval #OS_ERRNO_HWI_PROC_FUNC_NULL               0x02000901: Null hardware interrupt handling function.
  * @retval #OS_ERRNO_HWI_NUM_INVALID                  0x02000900: Invalid interrupt number.
@@ -151,7 +159,7 @@ UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                      HWI_PRIOR_T hwiPrio,
                      HWI_MODE_T mode,
                      HWI_PROC_FUNC handler,
-                     HWI_ARG_T arg);
+                     HwiIrqParam *irqParam);
 
 STATIC INLINE UINT32 ArchIntTrigger(HWI_HANDLE_T hwiNum)
 {
@@ -193,6 +201,14 @@ STATIC INLINE UINT32 ArchIntSetPriority(HWI_HANDLE_T hwiNum, HWI_PRIOR_T priorit
     return g_archHwiOps.setIrqPriority(hwiNum, priority);
 }
 
+STATIC INLINE UINT32 ArchIntCurIrqNum(VOID)
+{
+    if (g_archHwiOps.getCurIrqNum == NULL) {
+        return LOS_NOK;
+    }
+    return g_archHwiOps.getCurIrqNum();
+}
+
 STATIC INLINE HwiControllerOps *ArchIntOpsGet(VOID)
 {
     return &g_archHwiOps;

arch/include/los_timer.h

@@ -56,9 +56,10 @@ extern "C" {
 typedef struct {
     UINT32        freq;
     INT32         irqNum;
+    UINT64        periodMax;
     UINT32        (*init)(HWI_PROC_FUNC tickHandler);
     UINT64        (*getCycle)(UINT32 *period);
-    VOID          (*reload)(UINT64 time);
+    UINT64        (*reload)(UINT64 time);
     VOID          (*lock)(VOID);
     VOID          (*unlock)(VOID);
     HWI_PROC_FUNC tickHandler;

arch/risc-v/nuclei/gcc/los_exc.S

@@ -179,7 +179,6 @@ exc_entry:
     csrr a0, mcause
     mv a1, sp
     /*
-     * TODO: Call the exception handler function
      * By default, the function template is provided in
      * system_Device.c, you can adjust it as you want
      */

arch/risc-v/nuclei/gcc/los_interrupt.c

@@ -86,9 +86,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
  Description : create hardware interrupt
  Input       : hwiNum       --- hwi num to create
                hwiPrio      --- priority of the hwi
-               mode         --- hwi interrupt mode, between vector or non-vector
-               handler      --- hwi handler
-               arg          --- set trig mode of the hwi handler
+               hwiMode      --- hwi interrupt hwiMode, between vector or non-vector
+               hwiHandler   --- hwi handler
+               irqParam     --- set trig hwiMode of the hwi handler
                                 Level Triggerred = 0
                                 Postive/Rising Edge Triggered = 1
                                 Negtive/Falling Edge Triggered = 3
@@ -97,24 +97,24 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
  *****************************************************************************/
 UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                      HWI_PRIOR_T hwiPrio,
-                     HWI_MODE_T mode,
-                     HWI_PROC_FUNC handler,
-                     HWI_ARG_T arg)
+                     HWI_MODE_T hwiMode,
+                     HWI_PROC_FUNC hwiHandler,
+                     HwiIrqParam *irqParam)
 {
     if (hwiNum > SOC_INT_MAX) {
         return OS_ERRNO_HWI_NUM_INVALID;
     }
-    if (mode > ECLIC_VECTOR_INTERRUPT) {
+    if (hwiMode > ECLIC_VECTOR_INTERRUPT) {
         return OS_ERRNO_HWI_MODE_INVALID;
     }
-    if (arg > ECLIC_NEGTIVE_EDGE_TRIGGER) {
+    if ((irqParam == NULL) || (irqParam->pDevId > ECLIC_NEGTIVE_EDGE_TRIGGER)) {
         return OS_ERRNO_HWI_ARG_INVALID;
     }
 
-    /* set interrupt vector mode */
-    ECLIC_SetShvIRQ(hwiNum, mode);
-    /* set interrupt trigger mode and polarity */
-    ECLIC_SetTrigIRQ(hwiNum, arg);
+    /* set interrupt vector hwiMode */
+    ECLIC_SetShvIRQ(hwiNum, hwiMode);
+    /* set interrupt trigger hwiMode and polarity */
+    ECLIC_SetTrigIRQ(hwiNum, irqParam->pDevId);
     /* set interrupt level */
     // default to 0
     ECLIC_SetLevelIRQ(hwiNum, 0);
@@ -124,9 +124,9 @@ UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
     /* set interrupt priority */
     // low 16 bit for priority
     ECLIC_SetPriorityIRQ(hwiNum, (hwiPrio & 0xffff));
-    if (handler != NULL) {
+    if (hwiHandler != NULL) {
         /* set interrupt handler entry to vector table */
-        ECLIC_SetVector(hwiNum, (rv_csr_t)handler);
+        ECLIC_SetVector(hwiNum, (rv_csr_t)hwiHandler);
     }
     /* enable interrupt */
     HwiUnmask(hwiNum);
@@ -137,10 +137,12 @@ UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Return      : LOS_OK on success or error code on failure
  *****************************************************************************/
-LITE_OS_SEC_TEXT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     // change func to default func
     ECLIC_SetVector(hwiNum, (rv_csr_t)HalHwiDefaultHandler);
     // disable interrupt

arch/risc-v/nuclei/gcc/los_timer.c

@@ -47,7 +47,7 @@ STATIC HWI_PROC_FUNC g_sysTickHandler = (HWI_PROC_FUNC)NULL;
 extern UINT32 g_intCount;
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -55,6 +55,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = SysTimer_IRQn,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -95,9 +96,10 @@ void ArchTickSysTickHandler(void)
     }
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
     SysTick_Reload(nextResponseTime);
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/risc-v/nuclei/gcc/nmsis/Core/Include/core_feature_dsp.h

@@ -105,7 +105,7 @@
  * Based on the types of the four 8-bit arithmetic operations, the SIMD 8-bit add/subtract instructions
  * can be classified into 2 main categories: Addition (four 8-bit addition), and Subtraction (four 8-bit
  * subtraction).
- * Based on the way of how an overflow condition is handled for singed or unsigned operation, the
+ * Based on the way of how an overflow condition is handled for signed or unsigned operation, the
  * SIMD 8-bit add/subtract instructions can be classified into 5 groups: Wrap-around (dropping
  * overflow), Signed Halving (keeping overflow by dropping 1 LSB bit), Unsigned Halving, Signed
  * Saturation (clipping overflow), and Unsigned Saturation.

arch/risc-v/riscv32/gcc/los_arch_atomic.h

@@ -33,6 +33,7 @@
 #define _LOS_ARCH_ATOMIC_H
 
 #include "los_compiler.h"
+#include "los_interrupt.h"
 
 #ifdef __cplusplus
 #if __cplusplus

arch/risc-v/riscv32/gcc/los_interrupt.c

@@ -165,7 +165,7 @@ LITE_OS_SEC_TEXT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                                       HWI_PRIOR_T hwiPrio,
                                       HWI_MODE_T hwiMode,
                                       HWI_PROC_FUNC hwiHandler,
-                                      HWI_ARG_T irqParam)
+                                      HwiIrqParam *irqParam)
 {
     UINT32 intSave;
 
@@ -186,8 +186,11 @@ LITE_OS_SEC_TEXT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
     g_hwiForm[hwiNum].pfnHook = hwiHandler;
-    g_hwiForm[hwiNum].uwParam = (VOID *)irqParam;
-
+    if (irqParam != NULL) {
+        g_hwiForm[hwiNum].uwParam = (VOID *)irqParam->pDevId;
+    } else {
+        g_hwiForm[hwiNum].uwParam = NULL;
+    }
     if (hwiNum >= OS_RISCV_SYS_VECTOR_CNT) {
         HalSetLocalInterPri(hwiNum, hwiPrio);
     }
@@ -201,10 +204,12 @@ LITE_OS_SEC_TEXT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Return      : LOS_OK on success or error code on failure
  *****************************************************************************/
-LITE_OS_SEC_TEXT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {
@@ -327,7 +332,7 @@ VOID HalExcEntry(const LosExcContext *excBufAddr)
     ExcInfoDisplay(excBufAddr);
 
     if (LOS_TaskIsRunning()) {
-        PRINTK("----------------All Task infomation ------------\n");
+        PRINTK("----------------All Task information ------------\n");
         OsGetAllTskInfo();
     }
 

arch/risc-v/riscv32/gcc/los_timer.c

@@ -39,7 +39,7 @@
 #include "los_debug.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -47,6 +47,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = RISCV_MACH_TIMER_IRQ,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -60,7 +61,10 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     ArchTickTimer *tick = &g_archTickTimer;
 
     UINT32 period = (UINT32)LOSCFG_BASE_CORE_TICK_RESPONSE_MAX;
-    UINT32 ret = LOS_HwiCreate(RISCV_MACH_TIMER_IRQ, 0x1, 0, handler, period);
+    HwiIrqParam irqParam;
+    irqParam.pDevId = (VOID *)period;
+
+    UINT32 ret = LOS_HwiCreate(RISCV_MACH_TIMER_IRQ, 0x1, 0, handler, &irqParam);
     if (ret != LOS_OK) {
         return ret;
     }
@@ -75,7 +79,7 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
     UINT64 timeMax = (UINT64)LOSCFG_BASE_CORE_TICK_RESPONSE_MAX - 1;
     UINT64 timer;
@@ -94,6 +98,7 @@ STATIC VOID SysTickReload(UINT64 nextResponseTime)
     WRITE_UINT32((UINT32)timer, MTIMERCMP);
     WRITE_UINT32((UINT32)(timer >> SHIFT_32_BIT), MTIMERCMP + MTIMER_HI_OFFSET);
     HalIrqEnable(RISCV_MACH_TIMER_IRQ);
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch/xtensa/lx6/gcc/los_interrupt.c

@@ -249,18 +249,19 @@ INLINE UINT32 ArchIsIntActive(VOID)
  **************************************************************************** */
 VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
     while (1) {}
 }
 
 WEAK VOID HalPreInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
 WEAK VOID HalAftInterruptHandler(UINT32 arg)
 {
+    (VOID)arg;
     return;
 }
 
@@ -312,21 +313,22 @@ VOID HalInterrupt(VOID)
  Description : create hardware interrupt
  Input       : hwiNum   --- hwi num to create
                hwiPrio  --- priority of the hwi
-               mode     --- unused
-               handler  --- hwi handler
-               arg      --- param of the hwi handler
+               hwiMode  --- unused
+               hwiHandler --- hwi handler
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
 UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                      HWI_PRIOR_T hwiPrio,
-                     HWI_MODE_T mode,
-                     HWI_PROC_FUNC handler,
-                     HWI_ARG_T arg)
+                     HWI_MODE_T hwiMode,
+                     HWI_PROC_FUNC hwiHandler,
+                     HwiIrqParam *irqParam)
 {
+    (VOID)hwiMode;
     UINT32 intSave;
 
-    if (handler == NULL) {
+    if (hwiHandler == NULL) {
         return OS_ERRNO_HWI_PROC_FUNC_NULL;
     }
 
@@ -344,9 +346,14 @@ UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 
     intSave = LOS_IntLock();
 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
-    OsSetVector(hwiNum, handler, arg);
+    if (irqParam != NULL) {
+        OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
+    } else {
+        OsSetVector(hwiNum, hwiHandler, NULL);
+    }
 #else
-    OsSetVector(hwiNum, handler);
+    (VOID)irqParam;
+    OsSetVector(hwiNum, hwiHandler);
 #endif
     HwiUnmask(hwiNum);
 
@@ -359,11 +366,13 @@ UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
  Function    : ArchHwiDelete
  Description : Delete hardware interrupt
  Input       : hwiNum   --- hwi num to delete
+               irqParam --- param of the hwi handler
  Output      : None
  Return      : LOS_OK on success or error code on failure
  **************************************************************************** */
-LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
+LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
 {
+    (VOID)irqParam;
     UINT32 intSave;
 
     if (hwiNum >= OS_HWI_MAX_NUM) {

arch/xtensa/lx6/gcc/los_timer.c

@@ -37,7 +37,7 @@
 #include "los_debug.h"
 
 STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
-STATIC VOID SysTickReload(UINT64 nextResponseTime);
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
 STATIC UINT64 SysTickCycleGet(UINT32 *period);
 STATIC VOID SysTickLock(VOID);
 STATIC VOID SysTickUnlock(VOID);
@@ -45,6 +45,7 @@ STATIC VOID SysTickUnlock(VOID);
 STATIC ArchTickTimer g_archTickTimer = {
     .freq = 0,
     .irqNum = OS_TICK_INT_NUM,
+    .periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
     .init = SysTickStart,
     .getCycle = SysTickCycleGet,
     .reload = SysTickReload,
@@ -77,12 +78,17 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     return LOS_OK;
 }
 
-STATIC VOID SysTickReload(UINT64 nextResponseTime)
+STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
 {
     UINT32 timerL;
+    if (nextResponseTime > g_archTickTimer.periodMax) {
+        nextResponseTime = g_archTickTimer.periodMax;
+    }
+
     timerL = GetCcount();
     timerL += nextResponseTime;
     SetCcompare(timerL);
+    return nextResponseTime;
 }
 
 STATIC UINT64 SysTickCycleGet(UINT32 *period)

arch_spec.md

@@ -48,7 +48,9 @@
 │   ├── lms                                                     --- Lite memory sanitizer functions
 │   ├── net                                                     --- Networking functions
 │   ├── power                                                   --- Power management
+│   ├── security                                                --- Security isolation
 │   ├── shell                                                   --- Shell function
+│   ├── signal                                                  --- Signal support
 │   ├── fs                                                      --- File systems
 │   └── trace                                                   --- Trace tool
 ├── drivers                                                     --- driver Kconfig
@@ -71,14 +73,13 @@
 │   │   └── los_tick.h                                          --- Tick
 │   └── src
 ├── targets
-│   └── targets
-│       └── riscv_nuclei_demo_soc_gcc
-│       │   ├── GCC                                            --- Compilation config
-│       │   ├── OS_CONFIG                                      --- Board config
-│       │   ├── SoC                                            --- SOC codes
-│       │   └── Src                                            --- Application codes
-│       └── riscv_nuclei_gd32vf103_soc_gcc
-│       └── riscv_sifive_fe310_gcc
+│   └── riscv_nuclei_demo_soc_gcc
+│   │   ├── GCC                                            --- Compilation config
+│   │   ├── OS_CONFIG                                      --- Board config
+│   │   ├── SoC                                            --- SOC codes
+│   │   └── Src                                            --- Application codes
+│   └── riscv_nuclei_gd32vf103_soc_gcc
+│   └── riscv_sifive_fe310_gcc
 ├── testsuites                                                 --- Kernel testsuites
 ├── tools                                                      --- Kernel tools
 └── utils

arch_spec_zh.md

@@ -48,7 +48,9 @@
 │   ├── lms                                                     --- Lite memory sanitizer 机制
 │   ├── net                                                     --- Network功能
 │   ├── power                                                   --- 低功耗管理
+│   ├── security                                                --- 安全隔离
 │   ├── shell                                                   --- shell功能
+│   ├── signal                                                  --- signal支持
 │   └── trace                                                   --- trace 工具
 ├── drivers                                                     --- 驱动框架Kconfig
 ├── kal                                                         --- 内核抽象层，提供内核对外接口，当前支持CMSIS接口和部分POSIX接口
@@ -70,14 +72,13 @@
 │   │   └── los_tick.h                                          --- Tick时钟
    └── src
 ├── targets
-│   └── targets
-│       └── riscv_nuclei_demo_soc_gcc
-│       │   ├── GCC                                             --- 编译相关
-│       │   ├── OS_CONFIG                                       --- 开发板配置功能开关和配置参数
-│       │   ├── SoC                                             --- SOC相关代码
-│       │   └── Src                                             --- Application相关代码
-│       └── riscv_nuclei_gd32vf103_soc_gcc
-│       └── riscv_sifive_fe310_gcc
+│   └── riscv_nuclei_demo_soc_gcc
+│   │   ├── GCC                                             --- 编译相关
+│   │   ├── OS_CONFIG                                       --- 开发板配置功能开关和配置参数
+│   │   ├── SoC                                             --- SOC相关代码
+│   │   └── Src                                             --- Application相关代码
+│   └── riscv_nuclei_gd32vf103_soc_gcc
+│   └── riscv_sifive_fe310_gcc
 ├── testsuites                                                  --- 内核测试用例
 ├── tools                                                       --- 内核工具
 └── utils

components/BUILD.gn

@@ -1,5 +1,5 @@
 # Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
-# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
+# Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
 #
 # Redistribution and use in source and binary forms, with or without modification,
 # are permitted provided that the following conditions are met:
@@ -41,6 +41,7 @@ group("components") {
     "lms",
     "net",
     "power",
+    "security",
     "shell",
     "signal",
     "trace",
@@ -57,6 +58,7 @@ config("public") {
     "fs:public",
     "net:public",
     "power:public",
+    "security:public",
     "shell:public",
     "trace:public",
     "lmk:public",

components/backtrace/los_backtrace.h

@@ -52,8 +52,8 @@ extern "C" {
 #define CODE_SECTION_NAME    ".text"
 /* The default C stack section name is CSTACK */
 #define CSTACK_SECTION_NAME  "CSTACK"
-#pragma section=CODE_SECTION_NAME
-#pragma section=CSTACK_SECTION_NAME
+#pragma section = CODE_SECTION_NAME
+#pragma section = CSTACK_SECTION_NAME
 
 /* Default only one code section. In fact, there may be more than one.
    You can define more than one and redefine the OsStackDataIsCodeAddr function

components/cpup/los_cpup.c

@@ -82,7 +82,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 OsCpupInit()
 
 /*****************************************************************************
 Function   : OsTskCycleStart
-Description: start task to get cycles count in current task begining
+Description: start task to get cycles count in current task beginning
 Input      : None
 Return     : None
 *****************************************************************************/

components/dynlink/los_dynlink.c

@@ -73,8 +73,8 @@ const SymInfo symTableEnd __attribute__((section(".table.end"))) = {
     .name = "end",
     .addr = 0
 };
-#pragma section=".TABLE.START"
-#pragma section=".table.end"
+#pragma section = ".TABLE.START"
+#pragma section = ".table.end"
 #elif defined(__CLANG_ARM) || defined(__GNUC__)
 /**
  * Place instructions below in rodata segment of .ld linker file:
@@ -796,13 +796,13 @@ VOID *LOS_SoLoad(const CHAR *fileName, VOID *pool)
     return dso;
 
 ERR2:
-    LOS_MemFree(dso->pool, (VOID *)dso->loadBase);
+    (VOID)LOS_MemFree(dso->pool, (VOID *)dso->loadBase);
 ERR1:
     close(dso->fd);
     (VOID)LOS_MuxPost(g_dynlinkMux);
-    LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo->elfPhdr);
-    LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo);
-    LOS_MemFree(OS_SYS_MEM_ADDR, dso);
+    (VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo->elfPhdr);
+    (VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo);
+    (VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso);
     return NULL;
 }
 
@@ -902,9 +902,12 @@ INT32 LOS_SoUnload(VOID *handle)
     LOS_ListDelete(&dso->dsoNode);
     (VOID)LOS_MuxPost(g_dynlinkMux);
 
-    LOS_MemFree(dso->pool, (VOID *)dso->loadBase);
-    LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo);
-    LOS_MemFree(OS_SYS_MEM_ADDR, dso);
+    (VOID)LOS_MemFree(dso->pool, (VOID *)dso->loadBase);
+    if (dso->dlInfo != NULL) {
+        (VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo->elfPhdr);
+    }
+    (VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo);
+    (VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso);
 
     return LOS_OK;
 ERR:

components/dynlink/los_dynlink.h

@@ -169,7 +169,7 @@ VOID *LOS_SoLoad(const CHAR *fileName, VOID *pool);
 VOID *LOS_FindSym(VOID *handle, const CHAR *name);
 
 /*
- * @brief Decrement the reference count on the loaded shared library refered to by handle.
+ * @brief Decrement the reference count on the loaded shared library referred to by handle.
  * If the reference count drops to zero, then the library is unloaded.
  *
  * This function validates that the handle is valid.

components/exchook/los_exc_info.c

@@ -55,7 +55,7 @@ STATIC ExcInfoArray g_excArray[OS_EXC_TYPE_MAX];
 
 STATIC UINT32 OsExcSaveIntStatus(UINT32 type, VOID *arg)
 {
-    UINT32 ret;
+    errno_t ret;
     UINTPTR excContentEnd = (UINTPTR)MAX_INT_INFO_SIZE + (UINTPTR)g_excContent;
 
     (VOID)arg;
@@ -92,6 +92,9 @@ STATIC UINT32 OsExcSaveIntStatus(UINT32 type, VOID *arg)
     /* save IRQ Priority reg group */
     ret = memcpy_s(g_excContent, excContentEnd - (UINTPTR)g_excContent,
                    (const VOID *)OS_NVIC_PRI_BASE, OS_NVIC_INT_PRI_SIZE);
+    if (ret != EOK) {
+        return LOS_NOK;
+    }
     g_excContent = (UINT8 *)g_excContent + OS_NVIC_INT_PRI_SIZE;
 
     /* save Exception Priority reg group */
@@ -294,5 +297,3 @@ VOID OsExcMsgDumpInit(VOID)
     (VOID)LOS_RegExcHook(EXC_INTERRUPT, (ExcHookFn)OsExcMsgDump);
 }
 #endif
-
-

components/fs/fatfs/Kconfig

@@ -36,39 +36,3 @@ config FS_FAT
     help
       Answer Y to enable LiteOS support fat filesystem.
 
-config FS_FAT_CACHE
-    bool "Enable FAT Cache"
-    default y
-    depends on FS_FAT
-    help
-      Answer Y to enable LiteOS fat filesystem support cache.
-
-config FS_FAT_CACHE_SYNC_THREAD
-    bool "Enable FAT Cache Sync Thread"
-    default n
-    depends on FS_FAT_CACHE
-    help
-      Answer Y to enable LiteOS fat filesystem support cache sync thread.
-
-config FS_FAT_CHINESE
-    bool "Enable Chinese"
-    default y
-    depends on FS_FAT
-    help
-      Answer Y to enable LiteOS fat filesystem support Chinese.
-
-config FS_FAT_VIRTUAL_PARTITION
-    bool "Enabel Virtual Partition"
-    default n
-    depends on FS_FAT
-
-config FS_FAT_VOLUMES
-    int
-    depends on FS_FAT
-    default 32 if PLATFORM_HI3731
-    default 16
-
-config FS_FAT_DISK
-    bool "Enable partinfo for storage device"
-    depends on FS_FAT
-    default y

components/fs/fatfs/fatfs.h

@@ -32,14 +32,7 @@
 #ifndef _FATFS_H
 #define _FATFS_H
 
-#include "dirent.h"
-#include "fatfs_conf.h"
-#include "fcntl.h"
-#include "fs_config.h"
-#include "sys/mount.h"
-#include "sys/stat.h"
-#include "sys/statfs.h"
-#include "unistd.h"
+#include "ff.h"
 
 #ifdef __cplusplus
 #if __cplusplus
@@ -47,56 +40,7 @@ extern "C" {
 #endif /* __cplusplus */
 #endif /* __cplusplus */
 
-int fatfs_mount(const char *source, const char *target,
-          const char *filesystemtype, unsigned long mountflags,
-          const void *data);
-int fatfs_umount(const char *target);
-int fatfs_umount2(const char *target, int flag);
-int fatfs_open(const char *path, int oflag, ...);
-int fatfs_close(int fd);
-ssize_t fatfs_read(int fd, void *buf, size_t nbyte);
-ssize_t fatfs_write(int fd, const void *buf, size_t nbyte);
-off_t fatfs_lseek(int fd, off_t offset, int whence);
-int fatfs_unlink(const char *path);
-int fatfs_fstat(int fd, struct stat *buf);
-int fatfs_stat(const char *path, struct stat *buf);
-int fatfs_fsync(int fd);
-int fatfs_mkdir(const char *path, mode_t mode);
-DIR *fatfs_opendir(const char *dirName);
-struct dirent *fatfs_readdir(DIR *dir);
-int fatfs_closedir(DIR *dir);
-int fatfs_rmdir(const char *path);
-int fatfs_rename(const char *oldName, const char *newName);
-int fatfs_statfs(const char *path, struct statfs *buf);
-int fatfs_ftruncate(int fd, off_t length);
-
-/**
-  * @brief divide a physical drive (SD card, U disk, and MMC card), this function is OHOS-specific
-  * @param pdrv physical drive number.
-  * @param partTbl list of partition size to create on the drive.
-  *   -- item is <= 100: specifies the partition size in percentage of the entire drive space.
-  *   -- item is > 100: specifies number of sectors.
-  * @return fdisk result
-  * @retval -1 fdisk error
-  * @retval 0 fdisk successful
-  */
-int fatfs_fdisk(int pdrv, const unsigned int *partTbl);
-
-/**
-  * @brief format FAT device (SD card, U disk, and MMC card), this function is OHOS-specific
-  * @param dev device name.
-  * @param sectors sectors per cluster, can be 0 OR power of 2. The sector size for standard FAT volumes is 512 bytes.
-  *    -- sector number is 0 OR >128: automatically choose the appropriate cluster size.
-  *    -- sector number is 1 ~ 128: cluster size = sectors per cluster * 512B.
-  * @param option file system type.
-  *    -- FMT_FAT
-  *    -- FMT_FAT32
-  *    -- FMT_ANY
-  * @return format result
-  * @retval -1 format error
-  * @retval 0 format successful
-  */
-int fatfs_format(const char *dev, int sectors, int option);
+void FatFsInit(void);
 
 #ifdef __cplusplus
 #if __cplusplus

components/fs/littlefs/BUILD.gn

@@ -34,7 +34,7 @@ module_switch = defined(LOSCFG_FS_LITTLEFS)
 module_name = get_path_info(rebase_path("."), "name")
 kernel_module(module_name) {
   configs += [ "$LITEOSTOPDIR:warn_config" ]
-  sources = LITTLEFS_SRC_FILES_FOR_KERNEL_MODULE + [ "lfs_api.c" ]
+  sources = LITTLEFS_SRC_FILES_FOR_KERNEL_MODULE + [ "lfs_adapter.c" ]
 }
 
 config("public") {

components/fs/littlefs/Kconfig

@@ -42,4 +42,9 @@ config LFS_MAX_MOUNT_SIZE
     help
         This is a global maximum number of mount points.
 
+config LFS_MAX_OPEN_FILES
+    int "Maximum number of open files"
+    default 100
+    help
+        This is a global maximum number of open files.
 endif # FS_LITTLEFS

components/fs/littlefs/lfs_adapter.c

@@ -0,0 +1,596 @@
+/*
+ * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
+ * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#define _GNU_SOURCE 1
+#include "lfs_adapter.h"
+#include "los_config.h"
+#include "vfs_files.h"
+#include "vfs_operations.h"
+#include "vfs_partition.h"
+#include "vfs_maps.h"
+#include "vfs_mount.h"
+#include "securec.h"
+
+struct dirent g_nameValue;
+static pthread_mutex_t g_FslocalMutex = PTHREAD_MUTEX_INITIALIZER;
+
+static int ConvertFlagToLfsOpenFlag (int oflags)
+{
+    int lfsOpenFlag = 0;
+
+    if (oflags & O_CREAT) {
+        lfsOpenFlag |= LFS_O_CREAT;
+    }
+
+    if (oflags & O_EXCL) {
+        lfsOpenFlag |= LFS_O_EXCL;
+    }
+
+    if (oflags & O_TRUNC) {
+        lfsOpenFlag |= LFS_O_TRUNC;
+    }
+
+    if (oflags & O_APPEND) {
+        lfsOpenFlag |= LFS_O_APPEND;
+    }
+
+    if (oflags & O_RDWR) {
+        lfsOpenFlag |= LFS_O_RDWR;
+    }
+
+    if (oflags & O_WRONLY) {
+        lfsOpenFlag |= LFS_O_WRONLY;
+    }
+
+    if (oflags == O_RDONLY) {
+        lfsOpenFlag |= LFS_O_RDONLY;
+    }
+
+    return lfsOpenFlag;
+}
+
+static int LittlefsErrno(int result)
+{
+    return (result < 0) ? -result : result;
+}
+
+int LfsMount(struct MountPoint *mp, unsigned long mountflags, const void *data)
+{
+    int ret;
+    lfs_t *mountHdl = NULL;
+
+    if ((mp == NULL) || (mp->mPath == NULL) || (data == NULL)) {
+        errno = EFAULT;
+        ret = LOS_NOK;
+        goto errout;
+    }
+
+    mountHdl = (lfs_t *)malloc(sizeof(lfs_t));
+    if (mountHdl == NULL) {
+        errno = ENODEV;
+        ret = LOS_NOK;
+        goto errout;
+    }
+    (void)memset_s(mountHdl, sizeof(lfs_t), 0, sizeof(lfs_t));
+    mp->mData = (void *)mountHdl;
+
+    ret = lfs_mount((lfs_t *)mp->mData, (struct lfs_config *)data);
+    if (ret != 0) {
+        ret = lfs_format((lfs_t *)mp->mData, (struct lfs_config*)data);
+        if (ret == 0) {
+            ret = lfs_mount((lfs_t *)mp->mData, (struct lfs_config*)data);
+        }
+    }
+
+    if (ret != 0) {
+        free(mountHdl);
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+
+errout:
+    return ret;
+}
+
+int LfsUmount(struct MountPoint *mp)
+{
+    int ret;
+
+    if (mp == NULL) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    if (mp->mData == NULL) {
+        errno = ENOENT;
+        return LOS_NOK;
+    }
+
+    ret = lfs_unmount((lfs_t *)mp->mData);
+    if (ret != 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+
+    free(mp->mData);
+    mp->mData = NULL;
+    return ret;
+}
+
+int LfsUnlink(struct MountPoint *mp, const char *fileName)
+{
+    int ret;
+
+    if ((mp == NULL) || (fileName == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    if (mp->mData == NULL) {
+        errno = ENOENT;
+        return LOS_NOK;
+    }
+
+    ret = lfs_remove((lfs_t *)mp->mData, fileName);
+    if (ret != 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+
+    return ret;
+}
+
+int LfsMkdir(struct MountPoint *mp, const char *dirName)
+{
+    int ret;
+
+    if ((dirName == NULL) || (mp == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    if (mp->mData == NULL) {
+        errno = ENOENT;
+        return LOS_NOK;
+    }
+
+    lfs_t *lfs = (lfs_t *)mp->mData;
+
+    ret = lfs_mkdir(lfs, dirName);
+    if (ret != 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+
+    return ret;
+}
+
+int LfsRmdir(struct MountPoint *mp, const char *dirName)
+{
+    int ret;
+    lfs_t *lfs = NULL;
+
+    if (mp == NULL) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    if (mp->mData == NULL) {
+        errno = ENOENT;
+        return LOS_NOK;
+    }
+
+    lfs = (lfs_t *)mp->mData;
+
+    if (dirName == NULL) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    ret = lfs_remove(lfs, dirName);
+    if (ret != 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+
+    return ret;
+}
+
+int LfsOpendir(struct Dir *dir, const char *dirName)
+{
+    int ret;
+
+    if ((dir == NULL) || (dir->dMp == NULL) || (dir->dMp->mData == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    lfs_t *lfs = (lfs_t *)dir->dMp->mData;
+    lfs_dir_t *dirInfo = (lfs_dir_t *)malloc(sizeof(lfs_dir_t));
+    if (dirInfo == NULL) {
+        errno = ENOMEM;
+        return LOS_NOK;
+    }
+
+    (void)memset_s(dirInfo, sizeof(lfs_dir_t), 0, sizeof(lfs_dir_t));
+    ret = lfs_dir_open(lfs, dirInfo, dirName);
+    if (ret != 0) {
+        free(dirInfo);
+        errno = LittlefsErrno(ret);
+        goto errout;
+    }
+
+    dir->dData = dirInfo;
+    dir->dOffset = 0;
+
+    return LOS_OK;
+
+errout:
+    return LOS_NOK;
+}
+
+int LfsReaddir(struct Dir *dir, struct dirent *dent)
+{
+    int ret;
+    struct lfs_info lfsInfo;
+
+    if ((dir == NULL) || (dir->dMp == NULL) || (dir->dMp->mData == NULL) ||
+        (dent == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    if (dir->dData == NULL) {
+        errno = EBADF;
+        return LOS_NOK;
+    }
+
+    lfs_t *lfs = (lfs_t *)dir->dMp->mData;
+    lfs_dir_t *dirInfo = (lfs_dir_t *)dir->dData;
+
+    ret = lfs_dir_read(lfs, dirInfo, &lfsInfo);
+    if (ret == TRUE) {
+        pthread_mutex_lock(&g_FslocalMutex);
+        (void)strncpy_s(dent->d_name, sizeof(dent->d_name), lfsInfo.name, strlen(lfsInfo.name) + 1);
+        if (lfsInfo.type == LFS_TYPE_DIR) {
+            dent->d_type = DT_DIR;
+        } else if (lfsInfo.type == LFS_TYPE_REG) {
+            dent->d_type = DT_REG;
+        }
+
+        dent->d_reclen = lfsInfo.size;
+        pthread_mutex_unlock(&g_FslocalMutex);
+
+        return LOS_OK;
+    }
+
+    if (ret != 0) {
+        errno = LittlefsErrno(ret);
+    }
+
+    return LOS_NOK;
+}
+
+int LfsClosedir(struct Dir *dir)
+{
+    int ret;
+
+    if ((dir == NULL) || (dir->dMp == NULL) || (dir->dMp->mData == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    if (dir->dData == NULL) {
+        errno = EBADF;
+        return LOS_NOK;
+    }
+
+    lfs_t *lfs = (lfs_t *)dir->dMp->mData;
+    lfs_dir_t *dirInfo = (lfs_dir_t *)dir->dData;
+
+    ret = lfs_dir_close(lfs, dirInfo);
+    if (ret != 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+
+    free(dirInfo);
+    dir->dData = NULL;
+
+    return ret;
+}
+
+int LfsOpen(struct File *file, const char *pathName, int openFlag)
+{
+    int ret;
+    lfs_file_t *lfsHandle = NULL;
+
+    if ((pathName == NULL) || (file == NULL) || (file->fMp == NULL) ||
+        (file->fMp->mData == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    lfsHandle = (lfs_file_t *)malloc(sizeof(lfs_file_t));
+    if (lfsHandle == NULL) {
+        errno = ENOMEM;
+        return LOS_NOK;
+    }
+
+    int lfsOpenFlag = ConvertFlagToLfsOpenFlag(openFlag);
+    ret = lfs_file_open((lfs_t *)file->fMp->mData, lfsHandle, pathName, lfsOpenFlag);
+    if (ret != 0) {
+        free(lfsHandle);
+        errno = LittlefsErrno(ret);
+        goto errout;
+    }
+
+    file->fData = (void *)lfsHandle;
+    return ret;
+
+errout:
+    return INVALID_FD;
+}
+
+int LfsRead(struct File *file, char *buf, size_t len)
+{
+    int ret;
+    struct MountPoint *mp = NULL;
+    lfs_file_t *lfsHandle = NULL;
+
+    if (buf == NULL) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    if ((file == NULL) || (file->fData == NULL)) {
+        errno = EBADF;
+        return LOS_NOK;
+    }
+
+    lfsHandle = (lfs_file_t *)file->fData;
+    mp = file->fMp;
+    if ((mp == NULL) || (mp->mData == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    ret = lfs_file_read((lfs_t *)mp->mData, lfsHandle, buf, len);
+    if (ret < 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+    return ret;
+}
+
+int LfsWrite(struct File *file, const char *buf, size_t len)
+{
+    int ret;
+    struct MountPoint *mp = NULL;
+    lfs_file_t *lfsHandle = NULL;
+
+    if (buf == NULL) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    if ((file == NULL) || (file->fData == NULL)) {
+        errno = EBADF;
+        return LOS_NOK;
+    }
+
+    lfsHandle = (lfs_file_t *)file->fData;
+    mp = file->fMp;
+    if ((mp == NULL) || (mp->mData == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    ret = lfs_file_write((lfs_t *)mp->mData, lfsHandle, buf, len);
+    if (ret < 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+    return ret;
+}
+
+off_t LfsSeek(struct File *file, off_t offset, int whence)
+{
+    off_t ret;
+    struct MountPoint *mp = NULL;
+    lfs_file_t *lfsHandle = NULL;
+
+    if ((file == NULL) || (file->fData == NULL)) {
+        errno = EBADF;
+        return LOS_NOK;
+    }
+
+    lfsHandle = (lfs_file_t *)file->fData;
+    mp = file->fMp;
+    if ((mp == NULL) || (mp->mData == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    ret = (off_t)lfs_file_seek((lfs_t *)mp->mData, lfsHandle, offset, whence);
+    if (ret < 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+
+    return ret;
+}
+
+int LfsClose(struct File *file)
+{
+    INT32 ret;
+    struct MountPoint *mp = NULL;
+    lfs_file_t *lfsHandle = NULL;
+
+    if ((file == NULL) || (file->fData == NULL)) {
+        errno = EBADF;
+        return LOS_NOK;
+    }
+
+    lfsHandle = (lfs_file_t *)file->fData;
+    mp = file->fMp;
+    if ((mp == NULL) || (mp->mData == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    pthread_mutex_lock(&g_FslocalMutex);
+    ret = lfs_file_close((lfs_t *)mp->mData, lfsHandle);
+    pthread_mutex_unlock(&g_FslocalMutex);
+
+    if (ret != 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+
+    free(file->fData);
+    file->fData = NULL;
+    return ret;
+}
+
+int LfsRename(struct MountPoint *mp, const char *oldName, const char *newName)
+{
+    int ret;
+
+    if ((mp == NULL) || (oldName == NULL) || (newName == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    if (mp->mData == NULL) {
+        errno = ENOENT;
+        return LOS_NOK;
+    }
+
+    ret = lfs_rename((lfs_t *)mp->mData, oldName, newName);
+    if (ret != 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+
+    return ret;
+}
+
+int LfsStat(struct MountPoint *mp, const char *path, struct stat *buf)
+{
+    int ret;
+    struct lfs_info info;
+
+    if ((mp == NULL) || (path == NULL) || (buf == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    if (mp->mData == NULL) {
+        errno = ENOENT;
+        return LOS_NOK;
+    }
+
+    ret = lfs_stat((lfs_t *)mp->mData, path, &info);
+    if (ret == 0) {
+        buf->st_size = info.size;
+        if (info.type == LFS_TYPE_REG) {
+            buf->st_mode = S_IFREG;
+        } else {
+            buf->st_mode = S_IFDIR;
+        }
+    } else {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+
+    return ret;
+}
+
+int LfsSync(struct File *file)
+{
+    int ret;
+    struct MountPoint *mp = NULL;
+
+    if ((file == NULL) || (file->fData == NULL)) {
+        errno = EBADF;
+        return LOS_NOK;
+    }
+
+    if ((file->fMp == NULL) || (file->fMp->mData == NULL)) {
+        errno = EFAULT;
+        return LOS_NOK;
+    }
+
+    mp = file->fMp;
+    ret = lfs_file_sync((lfs_t *)mp->mData, (lfs_file_t *)file->fData);
+    if (ret != 0) {
+        errno = LittlefsErrno(ret);
+        ret = LOS_NOK;
+    }
+    return ret;
+}
+
+static struct MountOps g_lfsMnt = {
+    .mount = LfsMount,
+    .umount = LfsUmount,
+    .umount2 = NULL,
+    .statfs = NULL,
+};
+
+static struct FileOps g_lfsFops = {
+    .open = LfsOpen,
+    .close = LfsClose,
+    .read = LfsRead,
+    .write = LfsWrite,
+    .lseek = LfsSeek,
+    .stat = LfsStat,
+    .truncate = NULL,
+    .unlink = LfsUnlink,
+    .rename = LfsRename,
+    .ioctl = NULL, /* not support */
+    .sync = LfsSync,
+    .rmdir = LfsRmdir,
+    .opendir = LfsOpendir,
+    .readdir = LfsReaddir,
+    .closedir = LfsClosedir,
+    .mkdir = LfsMkdir,
+};
+
+static struct FsManagement g_lfsMgt = {
+    .fdisk = NULL,
+    .format = NULL,
+};
+
+void LfsInit(void)
+{
+    (void)OsFsRegister("littlefs", &g_lfsMnt, &g_lfsFops, &g_lfsMgt);
+}