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128 Commits

Author SHA1 Message Date
Guillaume Horel 281e834566 do not pass -j flag to the MAKE variable 2023-03-31 09:25:51 -04:00
Martin Kroeker 31fd13d048
MIPS: make HAVE_MSA reflect cpu capability and NO_MSA software/env 2023-01-02 22:19:13 +01:00
Chris Sidebottom fd4f52c797 Add SVE implementation for sdot/ddot 
This adds an SVE implementation to sdot/ddot when available, falling back to the previous Advanced SIMD kernel where there's no SVE implementation for the kernel.

All the targets were essentially treating `dot_thunderx2t99.c` as the Advanced SIMD implementation so I've renamed it to better fit with the feature detection.
 2022-12-01 12:07:50 +00:00
Martin Kroeker bd30120ba7
Merge pull request #3720 from FlyGoat/mips64 
Make it work on general MIPS64 processors
 2022-08-19 20:24:27 +02:00
Jiaxun Yang a50b29c540 Provide a fallback MIPS64_GENERIC target 
It is really dangerous to fallback to Loongson core on other
MIPS64 processors.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
 2022-08-12 13:13:28 +01:00
Jiaxun Yang a03ed065e1 Wire up alpha in new build system 
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
 2022-08-11 15:08:46 +01:00
gxw 3573306a69 LoongArch64: Add core LOONGSON2K1000 and LOONGSONGENERIC 2022-07-25 16:04:56 +08:00
Martin Kroeker 14ae22bf7a
Add fallback value for bogus sc_nprocessors_conf 2022-05-27 00:29:17 +02:00
Martin Kroeker 8f13ab94d2
Merge pull request #3613 from Rabenda/fix-riscv 
Fix riscv64 detect
 2022-05-04 07:22:47 +02:00
Martin Kroeker 18427f3759
Have getarch downgrade the RISCV C910V target to GENERIC if compiler lacks vector support 2022-05-03 23:29:55 +02:00
Han Gao 8123324c99 Fix riscv64 arch detect 
Signed-off-by: Han Gao <gaohan@uniontech.com>
 2022-04-27 02:29:43 +08:00
Martin Kroeker 48e421934f
CortexX1 is only ArmV8 2022-03-28 17:31:26 +02:00
Martin Kroeker 09b8545fc5
Add initial support for M1 on Linux, Phytium FT2xxx series, ARM Cortex 510/710/X1/X2 2022-03-27 15:24:40 +02:00
Martin Kroeker 93a81856ae
Revert AVX512 capability check from PR #1980 (moved to build) 2022-03-23 15:22:13 +01:00
Martin Kroeker bc93f468ef
Add Elbrus E2000 architecture as generic x86_64 compatible 2022-01-22 18:53:38 +01:00
Sunita Nadampalli 19c8f615dc OpenBLAS: aarch64: Add neoverse-v1/n2 architecture specifics 2022-01-07 00:28:17 +00:00
Martin Kroeker 454edd741c
Merge pull request #3425 from binebrank/arm_sve_dgemm 
Add dgemm kernel for arm64 SVE
 2021-11-26 16:14:55 +01:00
Bine Brank 9388f05a3c configure SVE Makefile 2021-11-21 18:33:43 +01:00
Martin Kroeker a569fa1540
MIPS P5600 and 24KC,1004K cpus do not support MSA 2021-11-13 23:26:48 +01:00
Bine Brank 7093372e32 add ARMV8SVE target 2021-11-01 22:53:21 +01:00
Martin Kroeker 22bf5c27ba
Add basic support for the Fujitsu A64FX (#3415) 
* Add initial support for Fujitsu A64FX as generic ARMV8
 2021-10-18 15:00:19 +02:00
Wangyang Guo 4280dff103 Add NO_AVX=1 fallbacks to Sapphire Rapids build 2021-10-12 01:39:09 -07:00
Wangyang Guo 3dc6052c7e initial support for Sapphire Rapids platform 2021-10-12 01:30:40 -07:00
Martin Kroeker 32fee86033
Correct misplaced ifdef lines 2021-09-06 23:44:20 +02:00
Martin Kroeker 72f3ce5f08
Add NO_AVX=1 fallbacks to newer generation x86_64 for completeness (#3360) 
* Add NO_AVX=1 fallbacks to newer generation x86_64 for completeness

* Update .travis.yml
 2021-09-05 20:35:48 +02:00
gxw af0a69f355 Add support for LOONGARCH64 2021-07-27 15:29:12 +08:00
User User-User b7da75e4fd WiP CORTEX A55 support 2021-06-19 21:37:51 +02:00
Aurelien Jarno 0a535e58d8 getarch.c: define OPENBLAS_SUPPORTED for riscv64 2020-12-29 12:06:39 +00:00
gxw be24c66a7c Keep LOONGSON3A and LOONGSON3B for loongson 2020-12-10 10:53:13 +08:00
gxw 4b548857d6 Add msa support for loongson 
1. Using core loongson3r3 and loongson3r4 for loongson
2. Add DYNAMIC_ARCH for loongson

Change-Id: I1c6b54dbeca3a0cc31d1222af36a7e9bd6ab54c1
 2020-12-09 10:28:46 +08:00
Martin Kroeker 2e99e2699b
Add workaround for gcc 4.6 miscompiling assembly kernels with -mavx 2020-11-29 15:32:17 +01:00
Martin Kroeker 11ebe5fa25
Avoid redefinition warning 2020-11-22 21:16:07 +01:00
Xianyi Zhang fc35b72ae1 Refs #2899 
Merge branch 'openblas-open-910' of git://github.com/damonyu1989/OpenBLAS into damonyu1989-openblas-open-910
 2020-11-10 09:38:04 +08:00
Xianyi Zhang 913cc9a4ca Merge branch 'develop' into risc-v 2020-11-10 09:18:25 +08:00
Martin Kroeker ec088bf33a
Fix missing AVX2 and FMA3 capabilities in FORCE_target mode 2020-11-08 13:15:40 +01:00
Martin Kroeker e8cbf0fc50
Output predefined HAVE_ entries to Makefile.conf for ARM with specified TARGET 2020-10-27 23:01:19 +01:00
Martin Kroeker 1a0c185122
Support cross-compiling for Apple Vortex 2020-10-18 18:54:54 +02:00
Zhang Xianyi d7ba7679b6 Merge branch 'develop' into risc-v 2020-10-16 23:27:38 +08:00
damonyu ef8e7d0279 Add the support for RISC-V Vector. 
Change-Id: Iae7800a32f5af3903c330882cdf6f292d885f266
 2020-10-15 16:09:02 +08:00
Qiyu8 881c15179f remove default support for FMA4 on zen architect 2020-09-27 09:35:50 +08:00
Chen, Guobing e740c4873d Enable COOPERLAKE build target 
Enable new build target platform -- COOPERLAKE. This target platform
supports all the SKYLAKEX supported ISAs + avx512bf16. So all the
SKYLAKEX specific kernels/drivers and related code are now extended
to be also active on COOPERLAKE. Besides, new BF16 related kernels
are active under this target.
 2020-08-13 06:18:00 +08:00
Ashwin Sekhar T K 4e1be0e481 ARM64: Add THUNDERX3T110 Target 2020-07-26 23:32:24 -07:00
Martin Kroeker 8751a69271
Obtain actual cpu count on AIX and suppress spurious NO_AVX512 on non-x86 2020-07-07 15:46:32 +02:00
Rajalakshmi Srinivasaraghavan 9fe930f205 powerpc: Add support for future processor 
This is the initial patch to support build infrastructure
for POWER10 architecture.
 2020-06-11 15:47:20 -05:00
Martin Kroeker 6275b43918
Avoid duplicate printout of byte order and report ELF_VERSION 2020-04-22 14:12:27 +02:00
Martin Kroeker 5afb66812f
Update getarch.c 2020-04-19 14:55:31 +02:00
Martin Kroeker 0d18f231fc
Update getarch.c 2020-04-19 13:52:58 +02:00
Martin Kroeker 2f4a8e5bc4
Rename the FORCE entries for 24K and 1004K to include the MIPS prefix 2020-04-19 13:22:19 +02:00
Martin Kroeker 61bbae3ac1
Handle MIPS24K like P5600 
and allow enforcing TARGET=1004K as well (omission from earlier 1004K merge and later introduction of TARGET check)
 2020-04-18 21:09:32 +02:00
Andreas Schwab 71cf2acdef Fix ARCHCONFIG for Neoverse-N1 
../config_kernel.h:24:9: warning: missing whitespace after the macro name
   24 | #define ARMV8-march armv8.2-a
      |         ^~~~~
 2020-03-21 17:35:42 +01:00