Have getarch downgrade the RISCV C910V target to GENERIC if compiler lacks vector support

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Martin Kroeker 2022-05-03 23:29:55 +02:00 committed by GitHub
parent d328636e58
commit 18427f3759
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2 changed files with 13 additions and 1 deletions

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@ -72,7 +72,8 @@ endif
getarch : getarch.c cpuid.S dummy $(CPUIDEMU)
avx512=$$(perl c_check - - $(CC) $(TARGET_FLAGS) $(CFLAGS) | grep NO_AVX512); \
$(HOSTCC) $(HOST_CFLAGS) $(EXFLAGS) $${avx512:+-D$${avx512}} -o $(@F) getarch.c cpuid.S $(CPUIDEMU)
rv64gv=$$(perl c_check - - $(CC) $(TARGET_FLAGS) $(CFLAGS) | grep NO_RV64GV); \
$(HOSTCC) $(HOST_CFLAGS) $(EXFLAGS) $${avx512:+-D$${avx512}} $${rv64gv:+-D$${rv64gv}} -o $(@F) getarch.c cpuid.S $(CPUIDEMU)
getarch_2nd : getarch_2nd.c $(TARGET_CONF) dummy
ifndef TARGET_CORE

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@ -1574,6 +1574,16 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifdef FORCE_C910V
#define FORCE
#define ARCHITECTURE "RISCV64"
#ifdef NO_RV64GV
#define SUBARCHITECTURE "RISCV64_GENERIC"
#define SUBDIRNAME "riscv64"
#define ARCHCONFIG "-DRISCV64_GENERIC " \
"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
"-DL2_SIZE=1048576 -DL2_LINESIZE=32 " \
"-DDTB_DEFAULT_ENTRIES=128 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=4 "
#define LIBNAME "riscv64_generic"
#define CORENAME "RISCV64_GENERIC"
#else
#define SUBARCHITECTURE "C910V"
#define SUBDIRNAME "riscv64"
#define ARCHCONFIG "-DC910V " \
@ -1582,6 +1592,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
"-DDTB_DEFAULT_ENTRIES=128 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=4 "
#define LIBNAME "c910v"
#define CORENAME "C910V"
#endif
#else
#endif