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Handle MIPS24K like P5600 

and allow enforcing TARGET=1004K as well (omission from earlier 1004K merge and later introduction of TARGET check)
This commit is contained in:
Martin Kroeker 2020-04-18 21:09:32 +02:00 committed by GitHub
parent 1c1ca2bc0a
commit 61bbae3ac1
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 52 additions and 4 deletions
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20
cpuid_mips.c
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@ -73,11 +73,13 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define CPU_UNKNOWN 0
#define CPU_P5600 1
#define CPU_1004K 2
#define CPU_24K 3
static char *cpuname[] = {
"UNKNOWN",
"P5600",
"1004K"
"1004K",
"24K"
};
int detect(void){
@ -105,6 +107,8 @@ int detect(void){
return CPU_P5600;
} else if (strstr(p, "1004K")) {
return CPU_1004K;
} else if (strstr(p, " 24K")) {
return CPU_24K;
} else
return CPU_UNKNOWN;
}
@ -121,7 +125,7 @@ void get_architecture(void){
}
void get_subarchitecture(void){
if(detect()==CPU_P5600|| detect()==CPU_1004K){
if(detect()==CPU_P5600|| detect()==CPU_1004K|| detect()==CPU_24K){
printf("P5600");
}else{
printf("UNKNOWN");
@ -146,7 +150,15 @@ void get_cpuconfig(void){
printf("#define MIPS1004K\n");
printf("#define L1_DATA_SIZE 32768\n");
printf("#define L1_DATA_LINESIZE 32\n");
printf("#define L2_SIZE 26144\n");
printf("#define L2_SIZE 262144\n");
printf("#define DTB_DEFAULT_ENTRIES 8\n");
printf("#define DTB_SIZE 4096\n");
printf("#define L2_ASSOCIATIVE 4\n");
} else if (detect()==CPU_24K) {
printf("#define MIPS24K\n");
printf("#define L1_DATA_SIZE 32768\n");
printf("#define L1_DATA_LINESIZE 32\n");
printf("#define L2_SIZE 32768\n");
printf("#define DTB_DEFAULT_ENTRIES 8\n");
printf("#define DTB_SIZE 4096\n");
printf("#define L2_ASSOCIATIVE 4\n");
@ -160,6 +172,8 @@ void get_libname(void){
printf("p5600\n");
} else if (detect()==CPU_1004K) {
printf("1004K\n");
} else if (detect()==CPU_24K) {
printf("24K\n");
}else{
printf("mips\n");
}

28
getarch.c
View File

@ -812,6 +812,34 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#else
#endif
#ifdef FORCE_1004K
#define FORCE
#define ARCHITECTURE "MIPS"
#define SUBARCHITECTURE "1004K"
#define SUBDIRNAME "mips"
#define ARCHCONFIG "-D1004K " \
"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
"-DL2_SIZE=262144 -DL2_LINESIZE=32 " \
"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=8 "
#define LIBNAME "1004K"
#define CORENAME "1004K"
#else
#endif
#ifdef FORCE_24K
#define FORCE
#define ARCHITECTURE "MIPS"
#define SUBARCHITECTURE "24K"
#define SUBDIRNAME "mips"
#define ARCHCONFIG "-D24K " \
"-DL1_DATA_SIZE=32768 -DL1_DATA_LINESIZE=32 " \
"-DL2_SIZE=32768 -DL2_LINESIZE=32 " \
"-DDTB_DEFAULT_ENTRIES=64 -DDTB_SIZE=4096 -DL2_ASSOCIATIVE=8 "
#define LIBNAME "24K"
#define CORENAME "24K"
#else
#endif
#ifdef FORCE_I6500
#define FORCE
#define ARCHITECTURE "MIPS"

8
param.h
View File

@ -72,6 +72,12 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#ifndef PARAM_H
#define PARAM_H
#define SHGEMM_DEFAULT_UNROLL_N 4
#define SHGEMM_DEFAULT_UNROLL_M 8
#define SHGEMM_DEFAULT_UNROLL_MN 32
#define SHGEMM_DEFAULT_P 256
#define SHGEMM_DEFAULT_R 256
#define SHGEMM_DEFAULT_Q 256
#ifdef OPTERON
#define SNUMOPT 4
@ -2468,7 +2474,7 @@ USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#define SYMV_P 16
#endif
#if defined(P5600) || defined(MIPS1004K) || defined(I6400) || defined(P6600) || defined(I6500)
#if defined(P5600) || defined(MIPS1004K) defined(MIPS24K) || defined(I6400) || defined(P6600) || defined(I6500)
#define SNUMOPT 2
#define DNUMOPT 2