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fix(icache): 修复stall逻辑

This commit is contained in:
Liphen 2023-11-27 16:01:17 +08:00
parent 96899c5243
commit e3366efc56
1 changed files with 3 additions and 2 deletions
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5
chisel/playground/src/cache/ICache.scala vendored
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@ -42,14 +42,15 @@ class ICache(implicit config: CpuConfig) extends Module {
io.axi.r.ready := true.B io.axi.r.ready := true.B
val acc_err = RegInit(false.B) val acc_err = RegInit(false.B)
io.cpu.acc_err := acc_err io.cpu.acc_err := acc_err
io.cpu.icache_stall := false.B
(0 until config.instFetchNum).foreach(i => { (0 until config.instFetchNum).foreach(i => {
io.cpu.inst(i) := saved(i).inst io.cpu.inst(i) := saved(i).inst
io.cpu.inst_valid(i) := saved(i).valid io.cpu.inst_valid(i) := saved(i).valid
}) })
io.cpu.addr_err := io.cpu.addr(read_next_addr)(1, 0).orR io.cpu.addr_err := io.cpu.addr(read_next_addr)(1, 0).orR
io.cpu.icache_stall := Mux(status === s_idle, io.cpu.req, status =/= s_save)
switch(status) { switch(status) {
is(s_idle) { is(s_idle) {
acc_err := false.B acc_err := false.B