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Author SHA1 Message Date
openharmony_ci
e4ae10d163 !717 fix:ping命令访问野指针及内存泄漏问题修复
Merge pull request !717 from Zhaotianyu/cherry-pick-1655456538
2022-06-20 06:47:35 +00:00
arvinzzz
7bb53531de fixed d837ed3 from https://gitee.com/arvinzzz/kernel_liteos_m/pulls/716
fix: ping命令内访问野指针及内存泄漏

Signed-off-by: arvinzzz <zhaotianyu9@huawei.com>
2022-06-17 09:02:18 +00:00
openharmony_ci
740afd70b6 !677 beta2分支检视问题修复
Merge pull request !677 from wangchen/0412_b2
2022-04-21 08:23:57 +00:00
wangchen
9fcf128322 fix: beta2分支检视问题修复
【背景】beta2分支检视问题修复

【修改方案】
1,对部分检视问题进行整改

【影响】
对现有的产品编译不会有影响。

Signed-off-by: wangchen <wangchen64@huawei.com>
https://gitee.com/openharmony/kernel_liteos_m/issues/I53TC9
2022-04-21 03:14:32 +00:00
openharmony_ci
d58d8042e6 !584 主干告警清零
Merge pull request !584 from yinjiaming/OpenHarmony-2.2-Beta2
2022-02-07 11:23:28 +00:00
yinjiaming
b9292feaa8 fix: 主干告警清零
【背景】
主干中存在告警需要处理

【修改方案】
在有符号数与无符号数混用的地方使用了强制类型转换

【影响】
对现有的产品编译不会有影响。

re #I4SPC0

Signed-off-by: yinjiaming <yinjiaming@huawei.com>
Change-Id: I76c13c2aa33e84208f0b890e71dc23e633479b00
2022-02-07 07:57:47 +00:00
openharmony_ci
800ca76df2 !580 告警清零
Merge pull request !580 from LeonChan/OpenHarmony-2.2-Beta2
2022-01-30 04:22:56 +00:00
yinjiaming
0846a8a1db fix: 主干告警清零
【背景】
主干告警清零

【修改方案】
在有符号数与无符号数混用的地方添加了强制类型转换

【影响】
对现有的产品编译不会有影响。

re #I4SBQE

Signed-off-by: yinjiaming <yinjiaming@huawei.com>
Change-Id: I70b4613726706ff28bd852f05a411ba729cea72c
2022-01-27 03:53:02 +00:00
openharmony_ci
a0b126246e !475 挑单 同步pthread_cond修改到 2.2分支
Merge pull request !475 from wangchen/cond
2021-12-20 10:40:42 +00:00
wangchen
a598b64da0 fix: pthread_cond_timedwait接口入参不规范
【背景】pthread_cond_timedwait函数的入参时间应该是绝对时间

【修改方案】
1,修改为相对时间
2,每次等待事件前清理

【影响】
对现有的产品编译不会有影响。

re #I4NB5C
Signed-off-by: wangchen <253227059@qq.com>
2021-12-20 08:26:58 +00:00
openharmony_ci
2a73894de0 !382 修复 codex告警。
Merge pull request !382 from pef/oh2.2-beta2
2021-11-08 01:27:27 +00:00
pef
923c05cd89 修复codex告警。
【背景】
1.components\fs\fs.c,g_fs判空顺序错误
2.components\shell\src\cmds\task_shellcmd.c,参数多余
3.components\shell\src\cmds\vfs_shellcmd.c,遗漏内存释放
4.kal\posix\src\pthread_mutex.c,timeout计算可能溢出

【修改方案】
1.调换g_fs判空顺序
2.去掉多余的参数
3.return前添加free函数
4.修改timeout计算方法防止溢出

【影响】
无

Change-Id: Ib6d56c92a0be01ca49222148c341db18afe72544
Signed-off-by: pef <cyd1997@126.com>
2021-11-06 08:02:41 +00:00
openharmony_ci
a55fd7c6d1 !284 M核编译配置修改同步
Merge pull request !284 from wangchen/gn_beta2
2021-08-24 07:05:51 +00:00
wangchen
df4557ff41 fix: 完善M核编译配置选项同步
【背景】同步主线修改

【修改方案】
1,同步主线修改

【影响】
对现有的产品编译不会有影响。

re #I46Y1G
Signed-off-by: wangchen <253227059@qq.com>
2021-08-24 10:54:08 +08:00
openharmony_ci
73723d73ac !280 M33平台GCC环境下TZ增加默认选项适配(同步master修改至beta2)
Merge pull request !280 from wangchen/tz_beta2
2021-08-23 06:17:06 +00:00
wangchen
6b8290e37c 【背景】M33平台GCC环境下TZ默认开启TZ。
【修改方案】
1,在M33平台下增加默认选项及开关
2,删除build.gn编译tz的部分,该部分由使用者编译在安全态
3,修改tz初始化的一个问题

【影响】
对现有的产品编译不会有影响。

re #I46R1C
Signed-off-by: wangchen <253227059@qq.com>
2021-08-23 10:44:30 +08:00
openharmony_ci
a4bea97b8b !276 fix: 删除延时节点后,存在时间无法有效刷新的场景
Merge pull request !276 from zhushengle/OpenHarmony-2.2-Beta2
2021-08-23 02:14:39 +00:00
openharmony_ci
d89faf63a2 !274 解决中断操作等接口头文件位置变更,引入的编译问题
Merge pull request !274 from JerryH/cherry-pick-1629421054
2021-08-20 06:37:50 +00:00
zhushengle
b035f5bf7c fix: 删除延时节点后,存在时间无法有效刷新的场景
Signed-off-by: zhushengle <zhushengle@huawei.com>
Change-Id: I0ce80252db6fd6ff8621ee87df0a7ecb12a1843f
2021-08-20 09:12:11 +08:00
JerryH
b0d7e9fc04 fixed 013a953 from https://gitee.com/JerryH1011/kernel_liteos_m/pulls/270
fix: 修复中断操作接口头文件位置变更,导致的编译错误

close #I4665Z

Signed-off-by: JerryH <huangjieliang@huawei.com>
Change-Id: I5596179dea198dfe571420a7640abb00587abee1
2021-08-20 00:57:34 +00:00
openharmony_ci
e21e3d5d1f !262 宏LOSCFG_SUPPORT_FATFS在fs.c中存在使用问题,导致无fatfs的情况下,编译出错
Merge pull request !262 from zhangfanfan2/cherry-pick-1628674821
2021-08-12 02:00:14 +00:00
zhangfanfan2
124dd73f79 fixed c1614ce from https://gitee.com/zhangfanfan2/kernel_liteos_m/pulls/261
fix: 宏LOSCFG_SUPPORT_FATFS在fs.c中存在使用问题,导致无fatfs的情况下,编译出错

代码中使用#ifdef LOSCFG_SUPPORT_FATFS控制业务逻辑,但LOSCFG_SUPPORT_FATFS的
默认定义为:#define LOSCFG_SUPPORT_FATFS 0,这样#ifdef LOSCFG_SUPPORT_FATFS控制
的逻辑一定会被编译。修改方式:使用的地方统一为#if的形式

close: #I44XNR

Signed-off-by: zff <zhangfanfan2@huawei.com>
2021-08-11 09:40:22 +00:00
openharmony_ci
fef2e372ff !255 新增OAT配置文件,用作oat扫描
Merge pull request !255 from SimonLi/cherry-pick-1628506091
2021-08-09 10:58:34 +00:00
openharmony_ci
d46d13e655 !255 新增OAT配置文件,用作oat扫描
Merge pull request !255 from SimonLi/cherry-pick-1628506091
2021-08-09 10:58:34 +00:00
SimonLi
90d798ae8a fixed f644571 from https://gitee.com/kkup180/kernel_liteos_m/pulls/252
chore(oat): 新增OAT配置文件,用作oat扫描

Signed-off-by: SimonLi <likailong@huawei.com>
2021-08-09 10:48:12 +00:00
openharmony_ci
1ee52d1e1f !254 license修复挑单到2.2beta2
Merge pull request !254 from lnlan/tobeta2.2_0809
2021-08-09 08:49:31 +00:00
openharmony_ci
724e7fa786 !254 license修复挑单到2.2beta2
Merge pull request !254 from lnlan/tobeta2.2_0809
2021-08-09 08:49:30 +00:00
lnlan
078adec486 style:修改 liteos_a unittest 测试文件的 licence 注释
【背景】解除告警
【修改方案】
 格式化修改告警文件的文件头注释格式

re #I44497

Signed-off-by: lanleinan <lanleinan@163.com>
Change-Id: Id2d61deb9d9a14d5e29b915c3a64c75e11e12eda
2021-08-09 08:20:47 +00:00
openharmony_ci
d0e0bb5934 !248 同步master到beta2.2
Merge pull request !248 from lnlan/to_beta2.2
2021-08-04 08:53:22 +00:00
silen
9e8ae74620 fix: timer qemu 头文件缺失
Change-Id: I763ee6f0d013d84f36da9a7cb6d369f3d02e6c45
Signed-off-by: silen <wuyunjie@huawei.com>
2021-08-04 07:59:33 +00:00
wangchen
0d5a1ce9be fix: M核代码告警清零
【背景】定期M核代码告警清零。

【修改方案】
根据工具扫描结果,对代码告警进行更改。

【影响】
对现有的产品编译不会有影响。

re #I4386N
Signed-off-by: wangchen <253227059@qq.com>
2021-08-04 07:59:25 +00:00
silen
2a7b31018f fix: open shell & fix qemu compile
Change-Id: Ia7488c02db7a41e0f681d008882b7c2721e6b207
Signed-off-by: silen <wuyunjie@huawei.com>
2021-08-04 07:59:17 +00:00
wangchen
54db6c8e7e fix: trustzone 中断适配
【背景】当前无法使用 trustzone。

【修改方案】
由于tz需要使用svc中断,因此删除之前使用的HalExcSvcCall的地方,改为HalSVCHandler

【影响】
对现有的产品编译不会有影响。

re #I42TFV
Signed-off-by: wangchen <253227059@qq.com>
2021-08-04 07:59:07 +00:00
lnlan
ef186b476e feat(kernel): 补充获取最高、最低优先级接口
【背景】
补充获取最高、最低优先级接口
【修改方案】
pthread补充这两个接口
int sched_get_priority_min(int policy)
int sched_get_priority_max(int policy)
【影响】
对现有的产品编译不会有影响。

re #I42HM7

Signed-off-by: lnlanc <lanleinan@163.com>
Change-Id: Id2ffc07e606ad497e8036f45dab1fa6a5ba981b3
2021-08-04 07:58:58 +00:00
silen
72cb77e14f fix: ping cmd compile fail
Change-Id: I692de82275b8da03ac51b493b2f74148c96574d0
Signed-off-by: silen <wuyunjie@huawei.com>
2021-08-04 07:58:16 +00:00
1320 changed files with 15702 additions and 58094 deletions

View File

@@ -1,6 +1,6 @@
### 相关的Issue
### 原因(目的、解决的问题等)
@@ -8,14 +8,5 @@
### 测试用例(新增、改动、可能影响的功能)
### 是否需要同步至release3.0LTS ... )分支?
必须选择一项在MarkDown模式下用[x]替换[ ]即可勾选对应选项):
- [ ] 是,需要同步的分支:
- [ ]
理由:

5
.gitignore vendored
View File

@@ -14,8 +14,3 @@ targets/cortex-m7_nucleo_f767zi_gcc/build
*.o
*.d
*.su
# Menuconfig temp files
/config.h
/.config
/.config.old

310
BUILD.gn
View File

@@ -1,5 +1,5 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
@@ -27,282 +27,42 @@
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//build/lite/config/component/lite_component.gni")
LITEOS_MENUCONFIG_H = rebase_path("$root_out_dir/config.h")
declare_args() {
liteos_name = "OHOS_Image"
liteos_kernel_only = false
}
import("liteos.gni")
liteos_arch_cflags = []
if (defined(LOSCFG_ARCH_ARM)) {
mcpu = LOSCFG_ARCH_CPU
if (defined(LOSCFG_ARCH_ARM_AARCH64) && defined(LOSCFG_ARCH_FPU_DISABLE)) {
mcpu += "+nofp"
}
liteos_arch_cflags += [ "-mcpu=$mcpu" ]
if (defined(LOSCFG_ARCH_ARM_AARCH32) && defined(LOSCFG_ARCH_FPU)) {
liteos_arch_cflags += [ "-mfpu=$LOSCFG_ARCH_FPU" ]
}
}
cc = "$ohos_current_cc_command " + string_join(" ", liteos_arch_cflags)
if (ohos_build_compiler == "clang") {
cc += " --target=$target_triple"
}
config("arch_config") {
cflags = liteos_arch_cflags
asmflags = cflags
ldflags = cflags
if (defined(LOSCFG_ARCH_ARM_AARCH32)) {
if (!defined(LOSCFG_COMPILER_CLANG_LLVM)) {
cflags += [ "-mthumb-interwork" ]
}
}
if (defined(LOSCFG_THUMB)) {
cflags += [ "-mthumb" ]
if (defined(LOSCFG_COMPILER_CLANG_LLVM)) {
cflags += [ "-mimplicit-it=thumb" ]
} else {
cflags += [ "-Wa,-mimplicit-it=thumb" ]
}
}
}
config("stdinc_config") {
std_include = exec_script("//build/lite/run_shell_cmd.py",
[ "$cc -print-file-name=include" ],
"trim string")
cflags = [
"-isystem",
std_include,
]
if (defined(LOSCFG_LIBC_MUSL)) {
cflags += [ "-nostdinc" ]
}
asmflags = cflags
}
config("ssp_config") {
cflags = []
if (defined(LOSCFG_CC_STACKPROTECTOR_ALL)) {
cflags += [ "-fstack-protector-all" ]
} else if (defined(LOSCFG_CC_STACKPROTECTOR_STRONG)) {
cflags += [ "-fstack-protector-strong" ]
} else if (defined(LOSCFG_CC_STACKPROTECTOR)) {
cflags += [
"-fstack-protector",
"--param",
"ssp-buffer-size=4",
]
} else {
cflags += [ "-fno-stack-protector" ]
}
asmflags = cflags
}
config("optimize_config") {
cflags = []
if (defined(LOSCFG_COMPILE_DEBUG)) {
cflags += [
"-g",
"-gdwarf-2",
]
optimization_cflag = "-O0"
}
if (defined(LOSCFG_COMPILE_OPTIMIZE)) {
optimization_cflag = "-O2"
}
if (defined(LOSCFG_COMPILE_OPTIMIZE_SIZE)) {
if (defined(LOSCFG_COMPILER_CLANG_LLVM)) {
optimization_cflag = "-Oz"
} else {
optimization_cflag = "-Os"
}
}
if (defined(LOSCFG_COMPILE_LTO)) {
if (defined(LOSCFG_COMPILER_CLANG_LLVM)) {
cflags += [ "-flto=thin" ]
} else {
#cflags += [ "-flto" ]
}
}
cflags += [ optimization_cflag ]
asmflags = cflags
}
config("kconfig_config") {
cflags = [
"-imacros",
"$LITEOS_MENUCONFIG_H",
]
asmflags = cflags
cflags_cc = cflags
}
config("warn_config") {
cflags = [
"-Wall",
"-Werror",
"-Wpointer-arith",
"-Wstrict-prototypes",
"-Winvalid-pch",
"-Wno-address-of-packed-member",
]
asmflags = cflags
}
config("dialect_config") {
cflags_c = [ "-std=c99" ]
cflags_cc = [ "-std=c++11" ]
}
config("misc_config") {
defines = [ "__LITEOS__" ]
defines += [ "__LITEOS_M__" ]
if (!defined(LOSCFG_DEBUG_VERSION)) {
defines += [ "NDEBUG" ]
}
cflags = [
"-fno-pic",
"-fno-builtin",
"-fms-extensions",
"-fno-strict-aliasing",
"-fno-common",
"-fsigned-char",
"-ffunction-sections",
"-fdata-sections",
"-fno-exceptions",
"-fno-omit-frame-pointer",
]
if (!defined(LOSCFG_COMPILER_CLANG_LLVM)) {
cflags += [ "-fno-aggressive-loop-optimizations" ]
}
asmflags = cflags
asmflags += [ "-DCLZ=CLZ" ]
}
config("los_config") {
configs = [
#":arch_config",
":kconfig_config",
":stdinc_config",
":dialect_config",
":optimize_config",
":ssp_config",
#":warn_config",
":misc_config",
]
}
cmd = "if [ -f $device_path/BUILD.gn ]; then echo true; else echo false; fi"
HAVE_DEVICE_SDK = exec_script("//build/lite/run_shell_cmd.py", [ cmd ], "value")
# board and soc decoupling feature, device_path should contains board
BOARD_SOC_FEATURE = device_path != string_replace(device_path, "/board/", "")
config("public") {
configs = [
"arch:public",
"kernel:public",
"kal:public",
"components:public",
"utils:public",
]
if (BOARD_SOC_FEATURE) {
configs += [ "//device/board/$device_company:public" ]
configs += [ "//device/soc/$LOSCFG_SOC_COMPANY:public" ]
} else {
if (HAVE_DEVICE_SDK) {
configs += [ "$device_path:public" ]
}
}
}
group("modules") {
deps = [
"arch",
"components",
"kal",
"kernel",
"testsuites",
"utils",
HDFTOPDIR,
]
if (BOARD_SOC_FEATURE) {
deps += [ "//device/board/$device_company" ]
deps += [ "//device/soc/$LOSCFG_SOC_COMPANY" ]
} else {
if (HAVE_DEVICE_SDK) {
deps += [ device_path ]
}
}
}
# when HAVE_DEVICE_SDK is not reached, gn raises an error. so we just use it as
# not needed
not_needed([ "HAVE_DEVICE_SDK" ])
static_library("libkernel") {
deps = [ ":modules" ]
complete_static_lib = false
}
import("config.gni")
group("kernel") {
deps = [ ":libkernel" ]
}
group("liteos_m") {
}
executable("liteos") {
configs += [
":public",
":los_config",
deps = [
"kernel:kernel",
"utils:utils",
"//third_party/bounds_checking_function:libsec_static",
]
ldflags = [
"-static",
"-Wl,--gc-sections",
"-Wl,-Map=$liteos_name.map",
]
output_dir = target_out_dir
if (liteos_kernel_only) {
deps = [ ":kernel" ]
} else {
deps = [ "//build/lite:ohos" ]
if (enable_ohos_kernel_liteos_m_cppsupport == true) {
deps += [ "components/cppsupport:cppsupport" ]
}
if (enable_ohos_kernel_liteos_m_cpup == true) {
deps += [ "components/cpup:cpup" ]
}
if (enable_ohos_kernel_liteos_m_exchook == true) {
deps += [ "components/exchook:exchook" ]
}
if (enable_ohos_kernel_liteos_m_backtrace == true) {
deps += [ "components/backtrace:backtrace" ]
}
if (enable_ohos_kernel_liteos_m_fs == true) {
deps += [ "components/fs:fs" ]
}
if (enable_ohos_kernel_liteos_m_pm == true) {
deps += [ "components/power:pm" ]
}
if (enable_ohos_kernel_liteos_m_kal == true) {
deps += [ "kal:kal" ]
}
if (enable_ohos_kernel_liteos_m_shell== true) {
deps += [ "components/shell:shell" ]
}
if (enable_ohos_kernel_liteos_m_test == true) {
deps += [ "testsuits:test" ]
}
if (enable_ohos_kernel_liteos_m_lwip == true) {
deps += [ ohos_kernel_liteos_m_lwip_path ]
}
}
copy("copy_liteos") {
deps = [ ":liteos" ]
sources = [ "$target_out_dir/unstripped/bin/liteos" ]
outputs = [ "$root_out_dir/$liteos_name" ]
}
build_ext_component("build_kernel_image") {
deps = [ ":copy_liteos" ]
exec_path = rebase_path(root_out_dir)
objcopy = "${compile_prefix}objcopy$toolchain_cmd_suffix"
objdump = "${compile_prefix}objdump$toolchain_cmd_suffix"
command = "$objcopy -O binary $liteos_name $liteos_name.bin"
command +=
" && sh -c '$objdump -t $liteos_name | sort >$liteos_name.sym.sorted'"
command += " && sh -c '$objdump -d $liteos_name >$liteos_name.asm'"
}

686
Kconfig
View File

@@ -1,686 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mainmenu "Huawei LiteOS Configuration"
menu "Compiler"
choice
prompt "Compiler type"
default COMPILER_GCC
help
Choose compiler type.
config COMPILER_GCC
bool "GCC"
config CROSS_COMPILE
string "GCC cross-compile toolchain prefix"
depends on COMPILER_GCC
default "arm-none-eabi-" if ARCH_ARM_AARCH32
config COMPILER_CLANG_LLVM
bool "Clang"
config LLVM_TARGET
string "Clang LLVM target"
depends on COMPILER_CLANG_LLVM
default "arm-liteos-ohos" if ARCH_ARM_AARCH32
endchoice
config COMPILE_DEBUG
bool "Enable debug options"
default n
help
Answer Y to add -g option in compile command.
config COMPILE_OPTIMIZE
bool "Enable code optimization options"
default y
help
Answer Y to add optimization options for efficient code.
The final binary size will be smaller and execute faster.
But the debugging experience may be worst somehow.
config COMPILE_OPTIMIZE_SIZE
bool "Enable code size optimization options" if COMPILE_OPTIMIZE
default y
help
Answer Y to add optimization options for small code size.
The final binary size will be smaller.
But the compile time may be a bit longer.
config COMPILE_LTO
bool "Enable link time optimization (LTO)" if COMPILE_OPTIMIZE_SIZE
default y
help
Answer Y to add lto options for more smaller code size.
The final binary size will be smaller.
But the compile time may be much longer.
endmenu
menu "Platform"
######################### config options of bsp #####################
config PLATFORM
string
default "virt" if PLATFORM_QEMU_ARM_VIRT_CM7 || PLATFORM_QEMU_ARM_VIRT_CM4 || PLATFORM_QEMU_ARM_VIRT_CM55 || PRODUCT_QEMU_RISCV32_VIRT || PLATFORM_QEMU_CSKY_SMARTL || PLATFORM_QEMU_XTENSA_ESP32
config PRODUCT_NAME
string
default "arm_virt" if PRODUCT_QEMU_ARM
default "arm_mps2_an386" if PRODUCT_QEMU_ARM_MPS2_AN386
default "arm_mps3_an547" if PRODUCT_QEMU_ARM_MPS3_AN547
default "riscv32_virt" if PRODUCT_QEMU_RISCV32_VIRT
default "csky_smartl_e802" if PRODUCT_QEMU_CSKY_SMARTL_E802
default "xtensa_esp32" if PRODUCT_QEMU_XTENSA_ESP32
config DEVICE_COMPANY
string
default "qemu" if PLATFORM_QEMU_ARM_VIRT_CM7 || PLATFORM_QEMU_ARM_VIRT_CM4 || PLATFORM_QEMU_ARM_VIRT_CM55 || PRODUCT_QEMU_RISCV32_VIRT || PLATFORM_QEMU_CSKY_SMARTL || PLATFORM_QEMU_XTENSA_ESP32
choice
prompt "Chip"
default PLATFORM_QEMU_ARM_VIRT_CM7
help
Qemu ARM Virt variants (based on different CPU types):
- qemu_arm_virt_cm7
- qemu_arm_virt_cm4
- qemu_riscv32_virt
- qemu_csky_smartl
- qemu_xtensa_esp32
config PLATFORM_QEMU_ARM_VIRT_CM7
bool "qemu_arm_virt_cm7"
select ARCH_CORTEX_M7
help
QEMU ARM Virtual Platform using Cortex-M7 CPU.
config PLATFORM_QEMU_ARM_VIRT_CM4
bool "qemu_arm_virt_cm4"
select ARCH_CORTEX_M4
help
QEMU ARM Virtual Platform using Cortex-M4 CPU.
config PLATFORM_QEMU_ARM_VIRT_CM55
bool "qemu_arm_virt_cm55"
select ARCH_CORTEX_M55
help
QEMU ARM Virtual Platform using Cortex-M55 CPU.
config PLATFORM_QEMU_RISCV32_VIRT
bool "qemu_riscv32_virt"
select ARCH_RISCV32
help
QEMU RISCV Virtual Platform using riscv32 CPU.
config PLATFORM_QEMU_CSKY_SMARTL
bool "qemu_csky_smartl"
select ARCH_CSKY
help
QEMU SmartL Virtual Platform using csky CPU.
config PLATFORM_QEMU_XTENSA_ESP32
bool "qemu_xtensa_esp32"
select ARCH_XTENSA
help
QEMU ESP32 Virtual Platform using xtensa CPU.
endchoice
choice
prompt "Product"
help
Select your target board.
config PRODUCT_QEMU_ARM
bool "arm_virt" if PLATFORM_QEMU_ARM_VIRT_CM7
config PRODUCT_QEMU_ARM_MPS2_AN386
bool "arm_mps2_an386" if PLATFORM_QEMU_ARM_VIRT_CM4
config PRODUCT_QEMU_ARM_MPS3_AN547
bool "arm_mps3_an547" if PLATFORM_QEMU_ARM_VIRT_CM55
config PRODUCT_QEMU_RISCV32_VIRT
bool "riscv32_virt" if PLATFORM_QEMU_RISCV32_VIRT
config PRODUCT_QEMU_CSKY_SMARTL_E802
bool "csky_smartl_e802" if PLATFORM_QEMU_CSKY_SMARTL
config PRODUCT_QEMU_XTENSA_ESP32
bool "xtensa_esp32" if PLATFORM_QEMU_XTENSA_ESP32
endchoice
######################### config options of cpu arch ################
source "arch/Kconfig"
# Device Kconfig import
osource "$(DEVICE_PATH)/Kconfig"
config SOC_COMPANY
string "SoC company name to locate soc build path"
help
This option specifies the SoC company name, used to locate the build path for soc. This option is set by the
SoC's Kconfig file, and should be exactly the same with SoC company path, and the user should generally avoid
modifying it via the menu configuration.
orsource "../../device/board/*/Kconfig.liteos_m.shields"
orsource "../../device/board/$(BOARD_COMPANY)/Kconfig.liteos_m.defconfig.boards"
choice
prompt "Board Selection"
orsource "../../device/board/$(BOARD_COMPANY)/Kconfig.liteos_m.boards"
endchoice
orsource "../../device/soc/*/Kconfig.liteos_m.defconfig"
choice
prompt "SoC Series Selection"
orsource "../../device/soc/*/Kconfig.liteos_m.series"
endchoice
orsource "../../device/soc/*/Kconfig.liteos_m.soc"
config QUICK_START
bool "Enable QUICK_START"
default n
depends on DRIVERS && FS_VFS
help
Answer Y to enable LiteOS support quick start.
endmenu
######################### config options of kernel #####################
menu "Kernel"
######################### config options of extended #####################
config KERNEL_EXTKERNEL
bool "Enable Extend Kernel"
default y
help
This option will enable extend Kernel of LiteOS. Extend kernel include
cppsupport, cpup, etc. You can select one or some
of them.
config KERNEL_BACKTRACE
bool "Enable Backtrace"
default n
depends on KERNEL_EXTKERNEL
help
If you wish to build LiteOS with support for backtrace.
choice
prompt "Select Backtrace Type"
depends on KERNEL_BACKTRACE
config BACKTRACE_TYPE_1
bool "1: Call stack analysis for cortex-m series by scanning the stack"
depends on ARCH_ARM && !ARCH_ARM9
config BACKTRACE_TYPE_2
bool "2: Call stack analysis for risc-v by using frame pointer"
depends on ARCH_RISCV
config BACKTRACE_TYPE_3
bool "3: Call stack analysis for risc-v by scanning the stack"
depends on ARCH_RISCV
config BACKTRACE_TYPE_4
bool "4: Call stack analysis for xtensa by scanning the stack"
depends on ARCH_XTENSA
config BACKTRACE_TYPE_5
bool "5: Call stack analysis for c-sky by scanning the stack"
depends on ARCH_CSKY
config BACKTRACE_TYPE_6
bool "6: Call stack analysis for arm9 by scanning the stack"
depends on ARCH_ARM9
endchoice
config BACKTRACE_TYPE
int
default 0 if ! KERNEL_BACKTRACE
default 1 if BACKTRACE_TYPE_1
default 2 if BACKTRACE_TYPE_2
default 3 if BACKTRACE_TYPE_3
default 4 if BACKTRACE_TYPE_4
default 5 if BACKTRACE_TYPE_5
default 6 if BACKTRACE_TYPE_6
config BACKTRACE_DEPTH
int "Backtrace depth"
default 15
depends on KERNEL_BACKTRACE
config KERNEL_CPPSUPPORT
bool "Enable C++ Support"
default n
depends on KERNEL_EXTKERNEL
help
If you wish to build LiteOS with support for C++.
rsource "components/signal/Kconfig"
config BASE_CORE_CPUP
bool
default n
config KERNEL_CPUP
bool "Enable Cpup"
default n
depends on KERNEL_EXTKERNEL
select BASE_CORE_CPUP
help
If you wish to build LiteOS with support for cpup.
config CPUP_INCLUDE_IRQ
bool "Enable Cpup include irq"
default y
depends on KERNEL_CPUP
help
If you wish to include irq usage for cpup.
config KERNEL_DYNLINK
bool "Enable Dynamic Link Feature"
default n
depends on KERNEL_EXTKERNEL && ARCH_ARM
help
If you wish to build LiteOS with support for dynamic link.
config KERNEL_PM
bool "Enable Power Management"
default n
depends on KERNEL_EXTKERNEL
help
Configuration item for low power frame tailoring.
If you wish to build LiteOS with support for power management.
config KERNEL_PM_TASK_PTIORITY
int "Power Management Task Priority"
default 1
range 1 31
depends on KERNEL_PM
help
Configuration item for priority of low-power task.
config KERNEL_PM_TASK_STACKSIZE
int "Power Management Task Stack Size"
default 1024
depends on KERNEL_PM
help
Configuration item for stack size of low-power task.
config KERNEL_PM_DEBUG
bool "Power Management Debug"
default n
depends on KERNEL_PM
help
Configuration item for low power frame debug tailoring.
config DEBUG_HOOK
bool
default n
config PLATFORM_EXC
bool "Enable Hook Feature"
default n
depends on KERNEL_EXTKERNEL
select DEBUG_HOOK
config KERNEL_LMK
bool "Enable Low Memory Killer"
default n
depends on KERNEL_EXTKERNEL
help
Configuration item for low memory killer tailoring.
If you wish to build LiteOS with support for low memory killer.
config KERNEL_LMK_DEBUG
bool "Low Memory Killer Debug"
default n
depends on KERNEL_LMK
help
Configuration item forlow memory killer debug tailoring.
######################### config options of trace #########################
source "components/trace/Kconfig"
######################### config options of lms #########################
source "components/lms/Kconfig"
endmenu
######################### config options of lib ########################
menu "Lib"
config LIB_LIBC
bool "Enable Libc"
default y
help
Answer Y to enable libc for full code.
endmenu
######################### config options of compatibility ##############
menu "Compat"
rsource "kal/Kconfig"
endmenu
######################## config options of filesystem ##################
menu "FileSystem"
rsource "components/fs/Kconfig"
endmenu
######################## config options of net ############################
menu "Net"
config NET_LWIP
bool "Enable Lwip"
default n
select NET_LWIP_SACK
help
Answer Y to enable LiteOS support lwip.
config NET_LWIP_SACK
bool
default n
endmenu
######################## config options of debug ########################
menu "Debug"
config GDB
bool "Enable gdb functions"
default n
help
Answer Y to enable gdb functions.
config PLATFORM_ADAPT
bool "Enable Os_adapt"
default y
help
Answer Y to add os_adapt.c to LiteOS.
config ENABLE_OOM_LOOP_TASK
bool "Enable Oom loop task"
default n
depends on KERNEL_VM
help
Answer Y to enable oom loop kthread to check system out of memory.
config DO_ALIGN
bool "Enable do align for hi3518e"
default y
depends on PLATFORM_HI3518EV200
help
Answer Y to enable do align for hi3518e.
config ENABLE_MAGICKEY
bool "Enable MAGIC KEY"
default y
help
Answer Y to enable LiteOS Magic key.
ctrl + r : Magic key check switch;
ctrl + z : Show all magic op key;
ctrl + t : Show task information;
ctrl + p : System panic;
ctrl + e : Check system memory pool.
config THUMB
bool "Enable Thumb"
default n
depends on ARCH_ARM
help
Answer Y to build thumb version. This will make LiteOS smaller.
config PLATFORM_DVFS
bool "Enable Dvfs"
default n
depends on COMPAT_LINUXKPI
help
Answer Y to enable LiteOS support dynamic voltage and frequency scaling feature for
low power consumption.
config SAVE_EXCINFO
bool "Enable Saving Exception Information"
default n
help
Answer Y to enable LiteOS support saving exception information to storage medium.
config DEBUG_VERSION
bool "Enable a Debug Version"
default y
help
If you do not select this option that means you enable a release version for LiteOS.
It also means you do not want to use debug modules, like shell,telnet,tftp,nfs and
memory check, etc.
If you select this option that means you enable a debug version for LiteOS.
That means you want a opposite behaviour compared to release version.
config DEBUG_KERNEL
bool "Enable Debug LiteOS Kernel Resource"
default n
depends on DEBUG_VERSION
help
If you select this option that means you enable debugging kernel resource.
It also means you want to get queue, mutex, semaphore, memory debug information.
That means you want a opposite behaviour compared to release version.
config DEBUG_QUEUE
bool "Enable Queue Debugging"
default n
depends on DEBUG_KERNEL
help
Answer Y to enable debug queue.
config DEBUG_DEADLOCK
bool "Enable Mutex Deadlock Debugging"
default n
depends on DEBUG_KERNEL
help
Answer Y to enable debug mutex deadlock.
config DEBUG_SEMAPHORE
bool "Enable Semaphore Debugging"
default n
depends on DEBUG_KERNEL
help
Answer Y to enable debug semaphore.
source "components/shell/Kconfig"
config NET_LWIP_SACK_TFTP
bool "Enable Tftp"
default y
depends on SHELL && NET_LWIP_SACK && DEBUG_VERSION
help
Answer Y to enable LiteOS support tftp cmd and tftp tool.
osource "net/telnet/Kconfig"
config SCHED_DEBUG
bool "Enable sched debug Feature"
default n
depends on DEBUG_VERSION
help
If you wish to build LiteOS with support for sched debug.
config USER_INIT_DEBUG
bool "Enable user init Debug"
default n
depends on DEBUG_VERSION
config SHELL_CMD_DEBUG
bool "Enable shell cmd Debug"
default n
depends on DEBUG_VERSION && SHELL
config DEBUG_TOOLS
bool "Enable DEBUG TOOLS"
default n
depends on DEBUG_VERSION
help
Answer Y to enable LiteOS debug tools, include stackdump, hwidump, tasktrack.
config USB_DEBUG
bool "Enable USB Debug"
default n
depends on SHELL && DRIVERS_USB && DEBUG_VERSION
help
Answer Y to enable LiteOS support usb debug.
use shell command to open the specified debug level print.
config MEM_DEBUG
bool "Enable MEM Debug"
default n
depends on DEBUG_VERSION
help
Answer Y to enable LiteOS support mem debug.
config MEM_LEAKCHECK
bool "Enable Function call stack of Mem operation recorded"
default n
depends on DEBUG_VERSION && MEM_DEBUG
select KERNEL_BACKTRACE
help
Answer Y to enable record the LR of Function call stack of Mem operation, it can check the mem leak through the information of mem node.
config BASE_MEM_NODE_INTEGRITY_CHECK
bool "Enable integrity check or not"
default n
depends on DEBUG_VERSION && MEM_DEBUG
config MEM_WATERLINE
bool "Enable memory pool waterline or not"
default n
depends on DEBUG_VERSION && MEM_DEBUG
config VM_OVERLAP_CHECK
bool "Enable VM overlap check or not"
default n
depends on DEBUG_VERSION && MEM_DEBUG
help
Answer Y to enable vm overlap check.
config TASK_MEM_USED
bool "Enable show task mem used or not"
default n
depends on DEBUG_VERSION && MEM_DEBUG
endmenu
######################## config options os drivers ########################
menu "Driver"
source "drivers/Kconfig"
endmenu
######################## config options os security #######################
menu "Security"
config SECURE_TRUSTZONE
bool "Enable ARM TrustZone"
default n
depends on ARCH_ARM
depends on ARCH_ARM_V8M
config SECURE_HEAP_SIZE
int "TrustZone Heap Size (bytes)"
default 2048
depends on SECURE_TRUSTZONE
config SECURE_STACK_DEFAULT_SIZE
int "TrustZone Stack Size (bytes)"
default 512
depends on SECURE_TRUSTZONE
help
The secure stack must be allocated before the task calls non-secure functions.
config SECURE
bool "Enable Security"
default n
select MPU_ENABLE
config MPU_ENABLE
bool "Enable MPU"
default n
endmenu
menu "Test"
config TEST
bool
default n
config KERNEL_TEST
bool "Enable Kernel Test"
default n
select TEST
config KERNEL_TEST_FULL
bool "Full Kernel Test"
default n
depends on KERNEL_TEST
endmenu
menu "Stack Smashing Protector (SSP) Compiler Feature"
choice
prompt "Enable stack buffer overflow detection"
default CC_STACKPROTECTOR_STRONG
---help---
This option turns on the -fstack-protector GCC feature. This
feature puts, at the beginning of functions, a canary value on
the stack just before the return address, and validates
the value just before actually returning. Stack based buffer
overflows (that need to overwrite this return address) now also
overwrite the canary, which gets detected and the attack is then
neutralized via a kernel panic.
This feature requires gcc version 4.2 or above, or a distribution
gcc with the feature backported. Older versions are automatically
detected and for those versions, this configuration option is
ignored. (and a warning is printed during bootup)
config CC_NO_STACKPROTECTOR
bool "-fno-stack-protector"
config CC_STACKPROTECTOR
bool "-fstack-protector"
config CC_STACKPROTECTOR_STRONG
bool "-fstack-protector-strong"
config CC_STACKPROTECTOR_ALL
bool "-fstack-protector-all"
endchoice
endmenu

122
Makefile
View File

@@ -1,122 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
LITEOSTOPDIR := $(realpath $(dir $(lastword $(MAKEFILE_LIST))))
export LITEOSTOPDIR
LITEOS_TARGET = liteos
HIDE := @
KCONFIG_CMDS := $(notdir $(wildcard $(dir $(shell which menuconfig))*config))
ohos_kernel ?= liteos_m
$(foreach line,$(shell hb env | sed 's/\[OHOS INFO\]/ohos/g;s/ /_/g;s/:_/=/g' || true),$(eval $(line)))
ifneq ($(ohos_kernel),liteos_m)
$(error The selected product ($(ohos_product)) is not a liteos_m kernel type product)
endif
ifeq ($(PRODUCT_PATH),)
PRODUCT_PATH:=$(ohos_product_path)
endif
ifeq ($(DEVICE_PATH),)
DEVICE_PATH:=$(ohos_device_path)
endif
ifeq ($(BOARD_COMPANY),)
BOARD_COMPANY:=$(ohos_device_company)
endif
ifeq ($(TEE:1=y),y)
tee = _tee
endif
ifeq ($(RELEASE:1=y),y)
CONFIG ?= $(PRODUCT_PATH)/kernel_configs/release$(tee).config
else
CONFIG ?= $(PRODUCT_PATH)/kernel_configs/debug$(tee).config
endif
KCONFIG_CONFIG ?= $(CONFIG)
LITEOS_MENUCONFIG_H ?= $(LITEOSTOPDIR)/config.h
LITEOS_CONFIG_FILE ?= $(LITEOSTOPDIR)/.config
# export los_config.mk related environment variables
export LITEOS_MENUCONFIG_H
export LITEOS_CONFIG_FILE
export BOARD_COMPANY
export DEVICE_PATH
export PRODUCT_PATH
# export kconfig related environment variables
export CONFIG_=LOSCFG_
export srctree=$(LITEOSTOPDIR)
-include $(LITEOS_CONFIG_FILE)
define HELP =
Usage: make [TARGET]... [PARAMETER=VALUE]...
Targets:
help: display this help and exit
clean: clean compiled objects
cleanall: clean all build outputs
all: do build (Default target)
update_config: update product kernel config (use menuconfig)
xxconfig: invoke xxconfig command of kconfiglib (xxconfig is one of $(KCONFIG_CMDS))
Parameters:
TEE: boolean value(1 or y for true), enable tee
RELEASE: boolean value(1 or y for true), build release version
CONFIG: kernel config file to be use
args: arguments for xxconfig command
endef
export HELP
all:
$(HIDE)hb build -f --gn-args "liteos_kernel_only=true liteos_name=\"$(LITEOS_TARGET)\""
help:
$(HIDE)echo "$$HELP"
$(filter-out menuconfig,$(KCONFIG_CMDS)):
$(HIDE)$@ $(args)
$(LITEOS_CONFIG_FILE): $(KCONFIG_CONFIG)
$(HIDE)env KCONFIG_CONFIG=$< genconfig --config-out $@ --header-path $(LITEOS_MENUCONFIG_H)
update_config menuconfig:
$(HIDE)test -f "$(CONFIG)" && cp -v "$(CONFIG)" .config && menuconfig $(args) && savedefconfig --out "$(CONFIG)"
clean:
$(HIDE)hb clean
$(HIDE)echo "clean $(LOSCFG_PLATFORM) finish"
cleanall: clean
$(HIDE)echo "clean all done"
.PHONY: all clean cleanall help update_config $(KCONFIG_CMDS) $(KCONFIG_CONFIG)

View File

@@ -29,11 +29,11 @@
</policylist>
<filefilterlist>
<filefilter name="defaultFilter" desc="文件属于FreeBSD仓库软连接本仓库屏蔽告警在FreeBSD仓库进行处理">
<filteritem type="filepath" name="arch/risc-v/nuclei/gcc/nmsis/Library/.*" desc="文件属于三方芯片的二进制代码,属于社区贡献,不用提供额外的说明"/>
<filteritem type="filepath" name="kernel/arch/risc-v/nuclei/gcc/nmsis/Library/.*" desc="文件属于三方芯片的二进制代码,属于社区贡献,不用提供额外的说明"/>
<filteritem type="filepath" name="targets/riscv_nuclei_demo_soc_gcc/.*" desc="文件属于nuclei三方芯片的源代码文件头说明跟随liteos_m/LICENSE不用额外说明"/>
<filteritem type="filepath" name="targets/riscv_nuclei_gd32vf103_soc_gcc/.*" desc="文件属于nuclei三方芯片的源代码文件头说明跟随liteos_m/LICENSE不用额外说明"/>
<filteritem type="filepath" name="NOTICE" desc="NOTICE文件"/>
<filteritem type="filepath" name="arch/risc-v/nuclei" desc="该文件的license为apache 2.0符合"/>
<filteritem type="filepath" name="kernel/arch/risc-v/nuclei" desc="该文件的license为apache 2.0符合"/>
</filefilter>
<filefilter name="defaultFilter" desc="Files not to check">
<!--filteritem type="filename" name="*.uvwxyz" desc="Describe the reason for filtering scan results"/-->

118
README.md
View File

@@ -1,134 +1,76 @@
# LiteOS-M Kernel<a name="EN-US_TOPIC_0000001096757661"></a>
# LiteOS Cortex-M<a name="EN-US_TOPIC_0000001096757661"></a>
- [Introduction](#section11660541593)
- [Directory Structure](#section161941989596)
- [Constraints](#section119744591305)
- [Usage](#section3732185231214)
- [Contribution](#section1371123476307)
- [Repositories Involved](#section1371113476307)
## Introduction<a name="section11660541593"></a>
OpenHarmony LiteOS-M is a lightweight operating system kernel designed for the Internet of Things (IoT) field. It features small footprint, low power consumption, and high performance. It has a simple code structure, including the minimum kernel function set, kernel abstraction layer, optional components, and project directory. The LiteOS-M kernel is divided into the hardware layer and hardware-irrelevant layers. The hardware layer provides a unified hardware abstraction layer (HAL) interface for easier hardware adaptation. A range of compilation toolchains can be used with different chip architectures to meet the expansion of diversified hardware and compilation toolchains in the Artificial Intelligence of Things (AIoT) field.
**Figure1** shows the architecture of the LiteOS-M kernel.
The OpenHarmony LiteOS Cortex-M is the kernel designed for the lightweight operating system \(OS\) for the Internet of Things \(IoT\) field. It features small size, low power consumption, and high performance. In addition, it has a simple code structure, including the minimum kernel function set, kernel abstraction layer, optional components, and project directory, and is divided into the hardware-related and hardware-irrelevant layers. The hardware-related layers provide unified hardware abstraction layer \(HAL\) interfaces to improve hardware adaptability. The combination and classification of different compilation toolchains and chip architectures meet the requirements of the Artificial Intelligence of Things \(AIoT\) field for rich hardware and compilation toolchains. [Figure1](#fig0865152210223) shows the architecture of the OpenHarmony LiteOS Cortex-M kernel.
**Figure 1** Architecture of the OpenHarmony LiteOS-M kernel<a name="fig0865152210223"></a>
![](figures/architecture-of-openharmony-the-liteos-cortex-m-kernel.png "OpenHarmony-LiteOS-M Kernel Architecture")
**Figure 1** Architecture of OpenHarmony the LiteOS Cortex-M kernel<a name="fig0865152210223"></a>
![](figures/architecture-of-openharmony-the-liteos-cortex-m-kernel.png "architecture-of-openharmony-the-liteos-cortex-m-kernel")
## Directory Structure<a name="section161941989596"></a>
The directory structure is as follows. For more details, see [arch_spec.md](arch_spec.md).
The directory structure is listed as below, for the detailed directories, please refer to [arch_spec.md](arch_spec.md).
```
/kernel/liteos_m
├── arch # Code of the kernel instruction architecture layer
│ ├── arm # Code of the ARM32 architecture
│ │ ├── arm9 # Code of the ARM9 architecture
│ │ ├── cortex-m3 # Code of the cortex-m3 architecture
│ │ ├── cortex-m33 # Code of the cortex-m33 architecture
│ │ ├── cortex-m4 # Code of the cortex-m4 architecture
│ │ ├── cortex-m7 # Code of the cortex-m7 architecture
│ │ └── include # Arm architecture public header file directory
│ ├── csky # Code of the csky architecture
│ │ └── v2 # Code of the csky v2 architecture
│ ├── include # APIs exposed externally
│ ├── risc-v # Code of the risc-v architecture
│ │ ├── nuclei # Code of the nuclei system technology risc-v architecture
│ │ └── riscv32 # Code of the risc-v architecture
│ └── xtensa # Code of the xtensa architecture
│ └── lx6 # Code of the lx6 xtensa architecture
├── components # Optional components
│ ├── backtrace # Backtrace support
│ ├── cppsupport # C++ support
│ ├── cpup # CPU percent (CPUP)
│ ├── dynlink # Dynamic loading and linking
│ ├── exchook # Exception hooks
── fs # File systems
│ ├── lmk # Low memory killer functions
│ ├── lms # Lite memory sanitizer functions
│ ├── net # Networking functions
│ ├── power # Power management
│ ├── shell # Shell function
│ ├── fs # File systems
│ └── trace # Trace tool
├── drivers # driver Kconfig
│ ├── cpup # CPU possession (CPUP)
│ ├── exchook # Exception hook
│ ├── fs # File system
── net # Network support
├── kal # Kernel abstraction layer
│ ├── cmsis # CMSIS API support
│ ├── cmsis # CMSIS-compliant API support
│ └── posix # POSIX API support
├── kernel # Minimum kernel function set
├── kernel # Minimum function set support
│ ├── arch # Code of the kernel instruction architecture layer
│ │ ├── arm # Code of the ARM32 architecture
│ │ └── include # APIs exposed externally
│ ├── include # APIs exposed externally
│ └── src # Source code of the minimum kernel function set
│ └── src # Source code of the minimum function set of the kernel
├── targets # Board-level projects
├── testsuites # Kernel testsuites
├── tools # Kernel tools
├── utils # Common directory
├── utils # Common code
```
## Constraints<a name="section119744591305"></a>
OpenHarmony LiteOS-M supports only C and C++.
Programming languages: C and C++
Applicable architecture: See the directory structure for the arch layer.
As for dynamic loading module, the shared library to be loaded needs signature verification or source restriction to ensure security.
Currently applicable architectures: Cortex-M3, Cortex-M4, Cortex-M7, and RISC-V
## Usage<a name="section3732185231214"></a>
The OpenHarmony LiteOS-M kernel build system is a modular build system based on Generate Ninja (GN) and Ninja. It supports module-based configuration, tailoring, and assembling, and helps you build custom products. This document describes how to build a LiteOS-M project based on GN and Ninja. For details about the methods such as GCC+gn, IAR, and Keil MDK, visit the community websites.
### Setting Up the Environment
Before setting up the environment for a development board, you must set up the basic system environment for OpenHarmony first. The basic system environment includes the OpenHarmony build environment and development environment. For details, see [Setting Up Development Environment](https://gitee.com/openharmony/docs/blob/HEAD/en/device-dev/quick-start/quickstart-lite-env-setup.md).
### Obtaining the OpenHarmony Source Code
For details about how to obtain the source code, see [Source Code Acquisition](https://gitee.com/openharmony/docs/blob/HEAD/en/device-dev/get-code/sourcecode-acquire.md). This document assumes that the clone directory is `~/openHarmony` after the complete OpenHarmony repository code is obtained.
### Example projects
Qemu simulator: `arm_mps2_an386、esp32、riscv32_virt、SmartL_E802`. For details about how to compile and run, see [qemu guide](https://gitee.com/openharmony/device_qemu).
Bestechnic: `bes2600`. For details about how to compile and run, see [Bestechnic developer guide](https://gitee.com/openharmony/device_soc_bestechnic).
### Community Porting Project Links
The LiteOS-M kernel porting projects for specific development boards are provided by community developers. The following provides the links to these projects. If you have porting projects for more development boards, you can provide your links to share your projects.
LiteOS Cortex-M provides projects for three chip architectures, which are located in the **targets** directory. The methods of compiling and using these projects are as follows:
- Cortex-M3:
- STM32F103 https://gitee.com/rtos_lover/stm32f103_simulator_keil
This repository provides the Keil project code for building the OpenHarmony LiteOS-M kernel based on the STM32F103 chip architecture. This code supports build in Keil MDK mode.
The **kernel/liteos\_m/targets/cortex-m3\_stm32f103\_simulator\_keil** directory is the Keil project directory created based on the STM32F103 chip architecture. You can download and install Keil development tools from the Internet. To compile the Cortex-M3 project, go to the **cortex-m3\_stm32f103\_simulator\_keil/project** directory and double-click the **los\_demo.uvproj** file to open the desired project. After the compilation is successful, burn the file to the corresponding board using JLINK or STM32 ST-LINK Utility.
- Cortex-M4:
- STM32F429IGTb https://gitee.com/harylee/stm32f429ig_firechallenger
This repository provides the project code for porting the OpenHarmony LiteOS-M kernel to support the STM32F429IGTb development board. The code supports build in Ninja, GCC, and IAR modes.
The **kernel/liteos\_m/targets/cortex-m4\_stm32f429ig\_fire-challenger\_iar** directory is the IAR project directory created based on the STM32F429IG chip architecture. You can download and install IAR development tools from the Internet. To compile the Cortex-M4 project, go to the **cortex-m4\_stm32f429ig\_fire-challenger\_iar/project** directory and double-click the **los\_demo.eww** file to open the desired project. After the compilation is successful, burn the file to the corresponding board using JLINK or STM32 ST-LINK Utility.
- Cortex-M7:
- Nucleo-F767ZI https://gitee.com/harylee/nucleo_f767zi
The **kernel/liteos\_m/targets/cortex-m7\_nucleo\_f767zi\_gcc** directory is the Makefile project directory created based on the STM32F767ZI chip architecture. The compilation commands are as follows:
This repository provides the project code for porting the OpenHarmony LiteOS-M kernel to support the Nucleo-F767ZI development board. The code supports build in Ninja, GCC, and IAR modes.
```
cd kernel/liteos_m/targets/cortex-m7_nucleo_f767zi_gcc
make clean; make
```
## Contribution<a name="section1371123476307"></a>
[How to involve](https://gitee.com/openharmony/docs/blob/HEAD/en/contribute/contribution.md)
[Commit message spec](https://gitee.com/openharmony/kernel_liteos_m/wikis/Commit%20message%E8%A7%84%E8%8C%83)
[Liteos-M kernel coding style guide](https://gitee.com/openharmony/kernel_liteos_m/wikis/OpenHarmony%E8%BD%BB%E5%86%85%E6%A0%B8%E7%BC%96%E7%A0%81%E8%A7%84%E8%8C%83)
How to contribute a chip based on Liteos-M kernel:
[ Board-Level Directory Specifications](https://gitee.com/openharmony/docs/blob/HEAD/en/device-dev/porting/porting-chip-board-overview.md)
[Mini System SoC Porting Guide](https://gitee.com/openharmony/docs/blob/HEAD/en/device-dev/porting/porting-minichip.md)
After the compilation is successful, the executable file **NUCLEO-F767.hex** is generated in the **cortex-m7\_nucleo\_f767zi\_gcc/build** directory. Burn the file to the corresponding board using STM32 ST-LINK Utility.
## Repositories Involved<a name="section1371113476307"></a>
[Kernel Subsystem](https://gitee.com/openharmony/docs/blob/HEAD/en/readme/kernel-subsystem.md)
[Kernel subsystem](https://gitee.com/openharmony/docs/blob/master/en/readme/kernel.md)
**kernel\_liteos\_m**
[kernel\_liteos\_m](https://gitee.com/openharmony/kernel_liteos_m/blob/master/README.md)

View File

@@ -4,7 +4,6 @@
- [目录](#section161941989596)
- [约束](#section119744591305)
- [使用说明](#section3732185231214)
- [贡献](#section1371123476307)
- [相关仓](#section1371113476307)
## 简介<a name="section11660541593"></a>
@@ -20,46 +19,23 @@ OpenHarmony LiteOS-M内核是面向IoT领域构建的轻量级物联网操作系
```
/kernel/liteos_m
├── arch # 内核指令架构层目录
│ ├── arm # arm 架构代码
│ │ ├── arm9 # arm9 架构代码
│ │ ├── cortex-m3 # cortex-m3架构代码
│ │ ├── cortex-m33 # cortex-m33架构代码
│ │ ├── cortex-m4 # cortex-m4架构代码
│ │ ├── cortex-m55 # cortex-m55架构代码
│ │ ├── cortex-m7 # cortex-m7架构代码
│ │ └── include # arm架构公共头文件目录
│ ├── csky # csky架构代码
│ │ └── v2 # csky v2架构代码
│ ├── include # 架构层对外接口存放目录
│ ├── risc-v # risc-v 架构
│ │ ├── nuclei # 芯来科技risc-v架构代码
│ │ └── riscv32 # risc-v官方通用架构代码
│ └── xtensa # xtensa 架构代码
│ └── lx6 # xtensa lx6架构代码
├── components # 可选组件
│ ├── backtrace # 回溯功能
│ ├── backtrace # 回溯栈支持
│ ├── cppsupport # C++支持
│ ├── cpup # CPUP功能
│ ├── dynlink # 动态加载与链接
│ ├── exchook # 异常钩子
│ ├── fs # 文件系统
── lmk # Low memory killer 机制
│ ├── lms # Lite memory sanitizer 机制
│ ├── net # Network功能
│ ├── power # 低功耗管理
│ ├── shell # shell功能
│ └── trace # trace 工具
├── drivers # 驱动框架Kconfig
── net # Network功能
├── kal # 内核抽象层
│ ├── cmsis # cmsis标准接口支持
│ └── posix # posix标准接口支持
├── kernel # 内核最小功能集支持
│ ├── arch # 内核指令架构层代码
│ │ ├── arm # arm32架构的代码
│ │ └── include # 对外接口存放目录
│ ├── include # 对外接口存放目录
│ └── src # 内核最小功能集源码
├── targets # 板级工程目录
├── testsuites # 内核测试用例
├── tools # 内核工具
├── utils # 通用公共目录
```
@@ -67,28 +43,58 @@ OpenHarmony LiteOS-M内核是面向IoT领域构建的轻量级物联网操作系
开发语言C/C++
适用架构:详见目录结构arch层
动态加载模块:待加载的共享库需要验签或者限制来源,确保安全性。
适用架构:当前只适用于cortex-m3、cortex-m4、cortex-m7、risc-v芯片架构
## 使用说明<a name="section3732185231214"></a>
OpenHarmony
LiteOS-M内核的编译构建系统是一个基于gn和ninja的组件化构建系统支持按组件配置、裁剪和拼装按需构建出定制化的产品。本文主要介绍如何基于gn和ninja编译LiteOS-M工程GCC+gn、IAR、Keil MDK等编译方式可以参考社区爱好者贡献的站点。
OpenHarmony LiteOS-M内核的编译构建系统是一个基于gn和ninja的组件化构建系统支持按组件配置、裁剪和拼装按需构建出定制化的产品。编译构建系统的详细信息可以参考[轻量和小型系统编译构建指导](https://gitee.com/openharmony/docs/blob/master/zh-cn/device-dev/subsystems/%E8%BD%BB%E9%87%8F%E5%92%8C%E5%B0%8F%E5%9E%8B%E7%B3%BB%E7%BB%9F%E7%BC%96%E8%AF%91%E6%9E%84%E5%BB%BA%E6%8C%87%E5%AF%BC.md)。本文主要介绍如何基于gn和ninja编译LiteOS-M工程GCC+Makefile、IAR、Keil MDK等编译方式可以参考社区爱好者贡献的站点。
### 搭建系统基础环境
在搭建各个开发板环境前需要完成OpenHarmony系统基础环境搭建。系统基础环境主要是指OpenHarmony的编译环境和开发环境详细介绍请参考官方站点[开发环境准备](https://gitee.com/openharmony/docs/blob/HEAD/zh-cn/device-dev/quick-start/quickstart-lite-env-setup.md)。开发者需要根据环境搭建文档完成环境搭建
在搭建各个开发板环境前需要完成OpenHarmony系统基础环境搭建。系统基础环境主要是指OpenHarmony的编译环境和开发环境详细介绍请参考官方站点[Ubuntu编译环境准备](https://gitee.com/openharmony/docs/blob/master/zh-cn/device-dev/quick-start/Ubuntu%E7%BC%96%E8%AF%91%E7%8E%AF%E5%A2%83%E5%87%86%E5%A4%87.md)。开发者需要根据环境搭建文档完成下述软件的安装Python3.7+、gn、ninja、hb。对于LiteOS-M内核还需要安装Make构建工具和[ARM GCC编译工具链](https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm/downloads)
### 获取OpenHarmony源码
详细的源码获取方式,请见[源码获取](https://gitee.com/openharmony/docs/blob/HEAD/zh-cn/device-dev/get-code/sourcecode-acquire.md)。获取OpenHarmony完整仓代码后假设克隆目录为`~/openHarmony`
开发者需要在Linux服务器上通过Git克隆获取OpenHarmony最新源码详细的源码获取方式,请见[源码获取](https://gitee.com/openharmony/docs/blob/master/zh-cn/device-dev/get-code/%E6%BA%90%E7%A0%81%E8%8E%B7%E5%8F%96.md)。获取OpenHarmony完整仓代码后假设克隆目录为`~/openHarmony`
### 已支持的示例工程
### 获取示例工程源码
Qemu模拟器: `arm_mps2_an386、esp32、riscv32_virt、SmartL_E802`, 编译运行详见: [Qemu指导](https://gitee.com/openharmony/device_qemu)
以开发板Nucleo-F767Zi为例演示如何编译运行`OpenHarmony LiteOS-M`内核工程。在本地目录,执行下述命令克隆示例代码。
恒玄科技: `bes2600`, 编译运行详见: [恒玄开发指导](https://gitee.com/openharmony/device_soc_bestechnic)
```
git clone https://gitee.com/harylee/nucleo_f767zi.git
```
假设克隆到的代码目录为`~/nucleo_f767zi`。 执行如下命令把代码目录的`device``vendor`目录复制到`openHarmony`工程的相应目录。
```
mkdir ~/openHarmony/device/st
cp -r ~/nucleo_f767zi/device/st/nucleo_f767zi ~/openHarmony/device/st/nucleo_f767zi
chmod +x ~/openHarmony/device/st/nucleo_f767zi/build.sh
cp -r ~/nucleo_f767zi/vendor/st ~/openHarmony/vendor/st
```
关于示例代码目录的说明,可以参考资料站点[板级目录规范](https://gitee.com/openharmony/docs/blob/master/zh-cn/device-dev/porting/%E7%A7%BB%E6%A4%8D%E6%A6%82%E8%BF%B0-0.md#section6204129143013)。如果需要自行移植开发板,请参考[板级系统移植](https://gitee.com/openharmony/docs/blob/master/zh-cn/device-dev/porting/%E6%9D%BF%E7%BA%A7%E7%B3%BB%E7%BB%9F%E7%A7%BB%E6%A4%8D.md)。
### 编译运行
编译运行前,交叉编译工具链`bin`目录配置到`PATH`环境变量中或者配置`device/st/nucleo_f767zi/liteos_m/config.gni`文件中`board_toolchain_path`配置项为交叉编译工具链`bin`目录。
`OpenHarmony`根目录,执行`hb set`设置产品路径,选择`nucleo_f767zi`产品,然后执行`hb build`开启编译。如下:
```
user@dev:~/OpenHarmony$ hb set
[OHOS INFO] Input code path: # 直接按回车然后选择nucleo_f767zi产品即可
OHOS Which product do you need? nucleo_f767zi@st
user@dev:~/OpenHarmony$ hb build
```
最终的镜像生成在`~/openHarmony/out/nucleo_f767zi/`目录中,通过`STM32 ST-LINK Utility`软件将镜像文件下载至单板查看运行效果。
### 社区移植工程链接
@@ -112,25 +118,9 @@ LiteOS-M内核移植的具体开发板的工程由社区开发者提供可以
该仓包含OpenHarmony LiteOS-M内核移植支持`Nucleo-F767ZI`开发板的工程代码支持Ninja、GCC、IAR等方式进行编译。
## 贡献<a name="section1371123476307"></a>
[如何贡献](https://gitee.com/openharmony/docs/blob/HEAD/zh-cn/contribute/%E5%8F%82%E4%B8%8E%E8%B4%A1%E7%8C%AE.md)
[Commit message规范](https://gitee.com/openharmony/kernel_liteos_m/wikis/Commit%20message%E8%A7%84%E8%8C%83)
[Liteos-M 内核编码规范](https://gitee.com/openharmony/kernel_liteos_m/wikis/OpenHarmony%E8%BD%BB%E5%86%85%E6%A0%B8%E7%BC%96%E7%A0%81%E8%A7%84%E8%8C%83)
如何基于Liteos-M内核贡献一款芯片:
[板级目录规范](https://gitee.com/openharmony/docs/blob/HEAD/zh-cn/device-dev/porting/porting-chip-board-overview.md)
[轻量系统芯片移植指导](https://gitee.com/openharmony/docs/blob/master/zh-cn/device-dev/porting/porting-minichip.md)
[轻量系统芯片移植案例](https://gitee.com/openharmony/docs/blob/master/zh-cn/device-dev/porting/porting-minichip-cases.md)
## 相关仓<a name="section1371113476307"></a>
[内核子系统](https://gitee.com/openharmony/docs/blob/HEAD/zh-cn/readme/%E5%86%85%E6%A0%B8%E5%AD%90%E7%B3%BB%E7%BB%9F.md)
[内核子系统](https://gitee.com/openharmony/docs/blob/master/zh-cn/readme/%E5%86%85%E6%A0%B8%E5%AD%90%E7%B3%BB%E7%BB%9F.md)
[kernel\_liteos\_m](https://gitee.com/openharmony/kernel_liteos_m/blob/master/README_zh.md)
**kernel\_liteos\_m**

View File

@@ -1,53 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
config("arch_config") {
include_dirs = [ "include" ]
}
module_group("arch") {
modules = []
if ("$board_cpu" == "arm9" || "$board_cpu" == "cortex-m3" ||
"$board_cpu" == "cortex-m4" || "$board_cpu" == "cortex-m7" ||
"$board_cpu" == "cortex-m33" || "$board_cpu" == "cortex-m55") {
modules += [ "arm" ]
} else if ("$board_cpu" == "ck802" || "$board_cpu" == "e802" ||
"$board_cpu" == "ck804ef") {
modules += [ "csky" ]
} else if ("$board_cpu" == "") {
if ("$board_arch" == "rv32imac" || "$board_arch" == "rv32imafdc") {
modules += [ "risc-v" ]
} else if ("$board" == "esp32") {
modules += [ "xtensa" ]
}
}
configs = [ ":arch_config" ]
}

View File

@@ -1,53 +0,0 @@
config ARCH_ARM
bool
rsource "arm/Kconfig"
config ARCH_CSKY
bool
config ARCH_RISCV
bool
config ARCH_RISCV32
bool
select ARCH_RISCV
config ARCH_XTENSA
bool
comment "Extra Configurations"
config ARCH_FPU_DISABLE
bool "Disable Floating Pointer Unit"
default n
help
This option will bypass floating procedure in system.
config ARCH_SECURE_MONITOR_MODE
bool "Run On Secure Monitor Mode"
default n
depends on ARCH_ARM_AARCH64
help
This option will make the system run on EL3.
config ARCH_INTERRUPT_PREEMPTION
bool "Enable Interrupt Preemption"
default n
depends on ARCH_ARM_AARCH64
help
This option will support high priority interrupt preemption.
config IRQ_USE_STANDALONE_STACK
bool "Use Interrupt Stack"
default y
depends on ARCH_ARM_AARCH64 || ARCH_ARM_AARCH32
help
This option will support using standalone interrupt stack.
config ARCH_UNALIGNED_EXC
bool "Enable Unaligned Exception"
default y
depends on ARCH_ARM
help
This option will enable unaligned exception.

View File

@@ -1,39 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
config("arm_config") {
include_dirs = [ "include" ]
}
module_group("arm") {
modules = [ "$board_cpu/gcc" ]
configs = [ ":arm_config" ]
}

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@@ -1,118 +0,0 @@
# ARM Architecture
#
# ARM has 32-bit(Aarch32) and 64-bit(Aarch64) implementations
#
config ARCH_ARM_AARCH32
bool
select ARCH_ARM
help
32-bit ARM architecture implementations, Except the M-profile.
It is not limited to ARMv7-A but also ARMv7-R, ARMv8-A 32-bit and etc.
#
# Architecture Versions
#
config ARCH_ARM_V7M
bool
config ARCH_ARM_V8M
bool
config ARCH_ARM_V5TE
bool
config ARCH_ARM_VER
string
default "armv7-m" if ARCH_ARM_V7M
default "armv8-m" if ARCH_ARM_V8M
default "armv5te" if ARCH_ARM_V5TE
#
# VFP Hardware
#
config ARCH_FPU_VFP_V3
bool
help
An optional extension to the Arm, Thumb, and ThumbEE instruction sets in the ARMv7-A and ARMv7-R profiles.
VFPv3U is a variant of VFPv3 that supports the trapping of floating-point exceptions to support code.
config ARCH_FPU_VFP_V4
bool
help
An optional extension to the Arm, Thumb, and ThumbEE instruction sets in the ARMv7-A and ARMv7-R profiles.
VFPv4U is a variant of VFPv4 that supports the trapping of floating-point exceptions to support code.
VFPv4 and VFPv4U add both the Half-precision Extension and the fused multiply-add instructions to the features of VFPv3.
config ARCH_FPU_VFP_D16
bool
depends on ARCH_ARM_AARCH32
help
VPU implemented with 16 doubleword registers (16 x 64-bit).
config ARCH_FPU_VFP_D32
bool
depends on ARCH_ARM_AARCH32
help
VPU implemented with 32 doubleword registers (32 x 64-bit).
config ARCH_FPU_VFP_NEON
bool
help
Advanced SIMD extension (NEON) support.
config ARCH_FPU
string
default "vfpv3" if ARCH_FPU_VFP_V3 && ARCH_FPU_VFP_D32
default "vfpv3-d16" if ARCH_FPU_VFP_V3 && ARCH_FPU_VFP_D16
default "neon-vfpv4" if ARCH_FPU_VFP_V4 && ARCH_FPU_VFP_D32 && ARCH_FPU_VFP_NEON
default "vfpv4" if ARCH_FPU_VFP_V4 && ARCH_FPU_VFP_D32
default "vfpv4-d16" if ARCH_FPU_VFP_V4 && ARCH_FPU_VFP_D16
#
# Supported Processor Cores
#
config ARCH_CORTEX_M3
bool
select ARCH_ARM_V7M
select ARCH_ARM_AARCH32
config ARCH_CORTEX_M4
bool
select ARCH_ARM_V7M
select ARCH_ARM_AARCH32
config ARCH_CORTEX_M7
bool
select ARCH_ARM_V7M
select ARCH_ARM_AARCH32
select ARCH_FPU_VFP_V4
select ARCH_FPU_VFP_D32
config ARCH_CORTEX_M33
bool
select ARCH_ARM_V8M
select ARCH_ARM_AARCH32
select ARCH_FPU_VFP_V4
select ARCH_FPU_VFP_D32
config ARCH_CORTEX_M55
bool
select ARCH_ARM_V8M
select ARCH_ARM_AARCH32
select ARCH_FPU_VFP_V4
select ARCH_FPU_VFP_D32
config ARCH_ARM9
bool
select ARCH_ARM_V5TE
select ARCH_ARM_AARCH32
config ARCH_CPU
string
default "cortex-m3" if ARCH_CORTEX_M3
default "cortex-m4" if ARCH_CORTEX_M4
default "cortex-m7" if ARCH_CORTEX_M7
default "cortex-m33" if ARCH_CORTEX_M33
default "cortex-m55" if ARCH_CORTEX_M55
default "arm9" if ARCH_ARM9

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@@ -1,233 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
return *v;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicXchg32bits(Atomic *v, INT32 val)
{
INT32 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(Atomic *v, INT32 val, INT32 oldVal)
{
INT32 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,51 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_TIMER_H
#define _LOS_ARCH_TIMER_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_TIMER_H */

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@@ -1,152 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,98 +0,0 @@
;
; Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
;
; Redistribution and use in source and binary forms, with or without modification,
; are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this list of
; conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice, this list
; of conditions and the following disclaimer in the documentation and/or other materials
; provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its contributors may be used
; to endorse or promote products derived from this software without specific prior written
; permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
; ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
EXPORT ArchAtomicRead
EXPORT ArchAtomicSet
EXPORT ArchAtomicAdd
EXPORT ArchAtomicSub
EXPORT ArchAtomicXchg32bits
EXPORT ArchAtomicCmpXchg32bits
PRESERVE8
AREA |.text|, CODE, READONLY
THUMB
EXPORT ArchAtomicRead
EXPORT ArchAtomicSet
EXPORT ArchAtomicAdd
EXPORT ArchAtomicSub
EXPORT ArchAtomicXchg32bits
EXPORT ArchAtomicCmpXchg32bits
PRESERVE8
AREA |.text|, CODE, READONLY
THUMB
ArchAtomicRead
ldrex r1, [r0]
mov r0, r1
bx lr
ArchAtomicSet
ldrex r2, [r0]
strex r3, r1, [r0]
teq r3, #0
bne ArchAtomicSet
bx lr
ArchAtomicAdd
ldrex r2, [r0]
add r2, r2, r1
strex r3, r2, [r0]
teq r3, #0
bne ArchAtomicAdd
mov r0, r2
bx lr
ArchAtomicSub
ldrex r2, [r0]
sub r2, r2, r1
strex r3, r2, [r0]
teq r3, #0
bne ArchAtomicSub
mov r0, r2
bx lr
ArchAtomicXchg32bits
ldrex r2, [r0]
strex r3, r1, [r0]
teq r3, #0
bne ArchAtomicXchg32bits
mov r0, r2
ArchAtomicCmpXchg32bits
ldrex r3, [r0]
cmp r3, r2
bne end
strex r4, r1, [r0]
teq r4, #0
bne ArchAtomicCmpXchg32bits
end

View File

@@ -1,38 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_group("gcc") {
if (defined(LOSCFG_SECURE_TRUSTZONE)) {
modules = [ "TZ" ]
} else {
modules = [ "NTZ" ]
}
}

View File

@@ -1,296 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
__asm__ __volatile__("ldrex %0, [%1]\n"
: "=&r"(val)
: "r"(v)
: "cc");
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 status;
do {
__asm__ __volatile__("ldrex %0, [%1]\n"
"strex %0, %2, [%1]\n"
: "=&r"(status)
: "r"(v), "r"(setVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 status;
do {
__asm__ __volatile__("ldrex %1, [%2]\n"
"add %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 status;
do {
__asm__ __volatile__("ldrex %1, [%2]\n"
"sub %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
__asm__ __volatile__("ldrex %0, [%3]\n"
"strex %1, %4, [%3]"
: "=&r"(prevVal), "=&r"(status), "+m"(*v)
: "r"(v), "r"(val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
__asm__ __volatile__("ldrex %0, %2\n"
"mov %1, #0\n"
"cmp %0, %3\n"
"bne 1f\n"
"strex %1, %4, %2\n"
"1:"
: "=&r"(prevVal), "=&r"(status), "+Q"(*v)
: "r"(oldVal), "r"(val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,128 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_timer.h"
#include "los_config.h"
#include "los_tick.h"
#include "los_arch_interrupt.h"
#include "los_debug.h"
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
STATIC UINT64 SysTickCycleGet(UINT32 *period);
STATIC VOID SysTickLock(VOID);
STATIC VOID SysTickUnlock(VOID);
STATIC ArchTickTimer g_archTickTimer = {
.freq = 0,
.irqNum = SysTick_IRQn,
.periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
.init = SysTickStart,
.getCycle = SysTickCycleGet,
.reload = SysTickReload,
.lock = SysTickLock,
.unlock = SysTickUnlock,
.tickHandler = NULL,
};
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
{
UINT32 ret;
ArchTickTimer *tick = &g_archTickTimer;
tick->freq = OS_SYS_CLOCK;
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(tick->irqNum, handler, NULL);
#else
OsSetVector(tick->irqNum, handler);
#endif
#endif
ret = SysTick_Config(LOSCFG_BASE_CORE_TICK_RESPONSE_MAX);
if (ret == 1) {
return LOS_ERRNO_TICK_PER_SEC_TOO_SMALL;
}
return LOS_OK;
}
STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
{
if (nextResponseTime > g_archTickTimer.periodMax) {
nextResponseTime = g_archTickTimer.periodMax;
}
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
NVIC_ClearPendingIRQ(SysTick_IRQn);
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
return nextResponseTime;
}
STATIC UINT64 SysTickCycleGet(UINT32 *period)
{
UINT32 hwCycle = 0;
UINT32 intSave = LOS_IntLock();
UINT32 val = SysTick->VAL;
*period = SysTick->LOAD;
if (val != 0) {
hwCycle = *period - val;
}
LOS_IntRestore(intSave);
return (UINT64)hwCycle;
}
STATIC VOID SysTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
STATIC VOID SysTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
ArchTickTimer *ArchSysTickTimerGet(VOID)
{
return &g_archTickTimer;
}
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
__ISB();
return LOS_OK;
}

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@@ -1,296 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
__asm__ __volatile__("ldrex %0, [%1]\n"
: "=&r"(val)
: "r"(v)
: "cc");
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 status;
do {
__asm__ __volatile__("ldrex %0, [%1]\n"
"strex %0, %2, [%1]\n"
: "=&r"(status)
: "r"(v), "r"(setVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 status;
do {
__asm__ __volatile__("ldrex %1, [%2]\n"
"add %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 status;
do {
__asm__ __volatile__("ldrex %1, [%2]\n"
"sub %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
__asm__ __volatile__("ldrex %0, [%3]\n"
"strex %1, %4, [%3]"
: "=&r"(prevVal), "=&r"(status), "+m"(*v)
: "r"(v), "r"(val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
__asm__ __volatile__("ldrex %0, %2\n"
"mov %1, #0\n"
"cmp %0, %3\n"
"bne 1f\n"
"strex %1, %4, %2\n"
"1:"
: "=&r"(prevVal), "=&r"(status), "+Q"(*v)
: "r"(oldVal), "r"(val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,649 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_interrupt.h"
#include <stdarg.h>
#include "securec.h"
#include "los_context.h"
#include "los_arch_interrupt.h"
#include "los_debug.h"
#include "los_hook.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_memory.h"
#include "los_membox.h"
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
#include "los_cpup.h"
#endif
#define DEF_HANDLER_START_INDEX 2
UINT32 g_intCount = 0;
/* *
* @ingroup los_hwi
* Hardware interrupt form mapping handling function array.
*/
STATIC HWI_PROC_FUNC __attribute__((aligned(LOSCFG_ARCH_HWI_VECTOR_ALIGN))) g_hwiForm[OS_VECTOR_CNT] = {0};
#if (LOSCFG_DEBUG_TOOLS == 1)
STATIC UINT32 g_hwiFormCnt[OS_HWI_MAX_NUM] = {0};
STATIC CHAR *g_hwiFormName[OS_HWI_MAX_NUM] = {0};
UINT32 OsGetHwiFormCnt(UINT32 index)
{
return g_hwiFormCnt[index];
}
CHAR *OsGetHwiFormName(UINT32 index)
{
return g_hwiFormName[index];
}
BOOL OsGetHwiCreated(UINT32 index)
{
if (g_hwiForm[index] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
return TRUE;
}
return FALSE;
}
#endif
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
VOID *pParm;
} HWI_HANDLER_FUNC;
/* *
* @ingroup los_hwi
* Hardware interrupt handler form mapping handling function array.
*/
STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
/* *
* @ingroup los_hwi
* Set interrupt vector table.
*/
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
{
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
}
}
#else
/* *
* @ingroup los_hwi
* hardware interrupt handler form mapping handling function array.
*/
STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
/* *
* @ingroup los_hwi
* Set interrupt vector table.
*/
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
{
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
}
}
#endif
/* ****************************************************************************
Function : HwiNumGet
Description : Get an interrupt number
Input : None
Output : None
Return : Interrupt Indexes number
**************************************************************************** */
STATIC UINT32 HwiNumGet(VOID)
{
return __get_IPSR();
}
STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_EnableIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_DisableIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
if (priority > OS_HWI_PRIO_LOWEST) {
return OS_ERRNO_HWI_PRIO_INVALID;
}
NVIC_SetPriority((IRQn_Type)hwiNum, priority);
return LOS_OK;
}
STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
HwiControllerOps g_archHwiOps = {
.enableIrq = HwiUnmask,
.disableIrq = HwiMask,
.setIrqPriority = HwiSetPriority,
.getCurIrqNum = HwiNumGet,
.triggerIrq = HwiPending,
.clearIrq = HwiClear,
};
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
/* ****************************************************************************
Function : HalHwiDefaultHandler
Description : default handler of the hardware interrupt
Input : None
Output : None
Return : None
**************************************************************************** */
/*lint -e529*/
LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
{
PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
while (1) {}
}
WEAK VOID HalPreInterruptHandler(UINT32 arg)
{
(VOID)arg;
return;
}
WEAK VOID HalAftInterruptHandler(UINT32 arg)
{
(VOID)arg;
return;
}
/* ****************************************************************************
Function : HalInterrupt
Description : Hardware interrupt entry function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
{
UINT32 hwiIndex;
UINT32 intSave;
#if (LOSCFG_KERNEL_RUNSTOP == 1)
SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk);
#endif
intSave = LOS_IntLock();
g_intCount++;
LOS_IntRestore(intSave);
hwiIndex = HwiNumGet();
OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
OsCpupIrqStart(hwiIndex);
#endif
HalPreInterruptHandler(hwiIndex);
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
#else
if (g_hwiHandlerForm[hwiIndex] != 0) {
g_hwiHandlerForm[hwiIndex]();
}
#endif
#if (LOSCFG_DEBUG_TOOLS == 1)
++g_hwiFormCnt[hwiIndex];
#endif
HalAftInterruptHandler(hwiIndex);
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
OsCpupIrqEnd(hwiIndex);
#endif
OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
intSave = LOS_IntLock();
g_intCount--;
LOS_IntRestore(intSave);
}
/* ****************************************************************************
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
hwiMode --- unused
hwiHandler --- hwi handler
irqParam --- param of the hwi handler
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T hwiMode,
HWI_PROC_FUNC hwiHandler,
HwiIrqParam *irqParam)
{
(VOID)hwiMode;
UINT32 intSave;
if (hwiHandler == NULL) {
return OS_ERRNO_HWI_PROC_FUNC_NULL;
}
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
return OS_ERRNO_HWI_ALREADY_CREATED;
}
if (hwiPrio > OS_HWI_PRIO_LOWEST) {
return OS_ERRNO_HWI_PRIO_INVALID;
}
intSave = LOS_IntLock();
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (irqParam != NULL) {
OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
} else {
OsSetVector(hwiNum, hwiHandler, NULL);
}
#else
(VOID)irqParam;
OsSetVector(hwiNum, hwiHandler);
#endif
#if (LOSCFG_DEBUG_TOOLS == 1)
if ((irqParam != NULL) && (irqParam->pName != NULL)) {
g_hwiFormName[hwiNum + OS_SYS_VECTOR_CNT] = (CHAR *)irqParam->pName;
}
g_hwiFormCnt[hwiNum + OS_SYS_VECTOR_CNT] = 0;
#endif
HwiUnmask((IRQn_Type)hwiNum);
HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
LOS_IntRestore(intSave);
return LOS_OK;
}
/* ****************************************************************************
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
irqParam --- param of the hwi handler
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
{
(VOID)irqParam;
UINT32 intSave;
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_DisableIRQ((IRQn_Type)hwiNum);
intSave = LOS_IntLock();
g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
LOS_IntRestore(intSave);
return LOS_OK;
}
#define FAULT_STATUS_REG_BIT 32
#define USGFAULT (1 << 18)
#define BUSFAULT (1 << 17)
#define MEMFAULT (1 << 16)
#define DIV0FAULT (1 << 4)
#define UNALIGNFAULT (1 << 3)
#define HARDFAULT_IRQN (-13)
ExcInfo g_excInfo = {0};
UINT8 g_uwExcTbl[FAULT_STATUS_REG_BIT] = {
0, 0, 0, 0, 0, 0, OS_EXC_UF_DIVBYZERO, OS_EXC_UF_UNALIGNED,
0, 0, 0, 0, OS_EXC_UF_NOCP, OS_EXC_UF_INVPC, OS_EXC_UF_INVSTATE, OS_EXC_UF_UNDEFINSTR,
0, 0, 0, OS_EXC_BF_STKERR, OS_EXC_BF_UNSTKERR, OS_EXC_BF_IMPRECISERR, OS_EXC_BF_PRECISERR, OS_EXC_BF_IBUSERR,
0, 0, 0, OS_EXC_MF_MSTKERR, OS_EXC_MF_MUNSTKERR, 0, OS_EXC_MF_DACCVIOL, OS_EXC_MF_IACCVIOL
};
#if (LOSCFG_KERNEL_PRINTF != 0)
STATIC VOID OsExcNvicDump(VOID)
{
#define OS_NR_NVIC_EXC_DUMP_TYPES 7
UINT32 *base = NULL;
UINT32 len, i, j;
UINT32 rgNvicBases[OS_NR_NVIC_EXC_DUMP_TYPES] = {
OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
};
UINT32 rgNvicLens[OS_NR_NVIC_EXC_DUMP_TYPES] = {
OS_NVIC_INT_ENABLE_SIZE, OS_NVIC_INT_PEND_SIZE, OS_NVIC_INT_ACT_SIZE,
OS_NVIC_INT_PRI_SIZE, OS_NVIC_EXCPRI_SIZE, OS_NVIC_SHCSR_SIZE,
OS_NVIC_INT_CTRL_SIZE
};
CHAR strRgEnable[] = "enable";
CHAR strRgPending[] = "pending";
CHAR strRgActive[] = "active";
CHAR strRgPriority[] = "priority";
CHAR strRgException[] = "exception";
CHAR strRgShcsr[] = "shcsr";
CHAR strRgIntCtrl[] = "control";
CHAR *strRgs[] = {
strRgEnable, strRgPending, strRgActive, strRgPriority,
strRgException, strRgShcsr, strRgIntCtrl
};
PRINTK("\r\nOS exception NVIC dump:\n");
for (i = 0; i < OS_NR_NVIC_EXC_DUMP_TYPES; i++) {
base = (UINT32 *)rgNvicBases[i];
len = rgNvicLens[i];
PRINTK("interrupt %s register, base address: %p, size: 0x%x\n", strRgs[i], base, len);
len = (len >> 2); /* 2: Gets the next register offset */
for (j = 0; j < len; j++) {
PRINTK("0x%x ", *(base + j));
if ((j != 0) && ((j % 16) == 0)) { /* 16: print wrap line */
PRINTK("\n");
}
}
PRINTK("\n");
}
}
STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
{
CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
PRINTK("Type = %d\n", excInfo->type);
PRINTK("ThrdPid = %d\n", excInfo->thrdPid);
PRINTK("Phase = %s\n", phaseStr[excInfo->phase]);
PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
}
STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
{
PRINTK("Current task info:\n");
if (excInfo->phase == OS_EXC_IN_TASK) {
LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
PRINTK("Task name = %s\n", taskCB->taskName);
PRINTK("Task ID = %d\n", taskCB->taskID);
PRINTK("Task SP = %p\n", taskCB->stackPointer);
PRINTK("Task ST = 0x%x\n", taskCB->topOfStack);
PRINTK("Task SS = 0x%x\n", taskCB->stackSize);
} else if (excInfo->phase == OS_EXC_IN_HWI) {
PRINTK("Exception occur in interrupt phase!\n");
} else {
PRINTK("Exception occur in system init phase!\n");
}
}
STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
{
PRINTK("Exception reg dump:\n");
PRINTK("PC = 0x%x\n", excInfo->context->uwPC);
PRINTK("LR = 0x%x\n", excInfo->context->uwLR);
PRINTK("SP = 0x%x\n", excInfo->context->uwSP);
PRINTK("R0 = 0x%x\n", excInfo->context->uwR0);
PRINTK("R1 = 0x%x\n", excInfo->context->uwR1);
PRINTK("R2 = 0x%x\n", excInfo->context->uwR2);
PRINTK("R3 = 0x%x\n", excInfo->context->uwR3);
PRINTK("R4 = 0x%x\n", excInfo->context->uwR4);
PRINTK("R5 = 0x%x\n", excInfo->context->uwR5);
PRINTK("R6 = 0x%x\n", excInfo->context->uwR6);
PRINTK("R7 = 0x%x\n", excInfo->context->uwR7);
PRINTK("R8 = 0x%x\n", excInfo->context->uwR8);
PRINTK("R9 = 0x%x\n", excInfo->context->uwR9);
PRINTK("R10 = 0x%x\n", excInfo->context->uwR10);
PRINTK("R11 = 0x%x\n", excInfo->context->uwR11);
PRINTK("R12 = 0x%x\n", excInfo->context->uwR12);
PRINTK("PriMask = 0x%x\n", excInfo->context->uwPriMask);
PRINTK("xPSR = 0x%x\n", excInfo->context->uwxPSR);
}
#if (LOSCFG_KERNEL_BACKTRACE == 1)
STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
{
UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
UINT32 index;
OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->uwSP);
PRINTK("----- backtrace start -----\n");
for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
if (LR[index] == 0) {
break;
}
PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
}
PRINTK("----- backtrace end -----\n");
}
#endif
STATIC VOID OsExcMemPoolCheckInfo(VOID)
{
PRINTK("\r\nmemory pools check:\n");
#if (LOSCFG_PLATFORM_EXC == 1)
MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
UINT32 errCnt;
UINT32 i;
(VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
if (errCnt < OS_SYS_MEM_NUM) {
errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
}
if (errCnt == 0) {
PRINTK("all memory pool check passed!\n");
return;
}
for (i = 0; i < errCnt; i++) {
PRINTK("pool num = %d\n", i);
PRINTK("pool type = %d\n", memExcInfo[i].type);
PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr);
PRINTK("pool size = 0x%x\n", memExcInfo[i].size);
PRINTK("pool free = 0x%x\n", memExcInfo[i].free);
PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr);
PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen);
PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
}
#endif
UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
if (ret == LOS_OK) {
PRINTK("system heap memcheck over, all passed!\n");
}
PRINTK("memory pool check end!\n");
}
#endif
STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
{
#if (LOSCFG_KERNEL_PRINTF != 0)
PRINTK("*************Exception Information**************\n");
OsExcTypeInfo(excInfo);
OsExcCurTaskInfo(excInfo);
OsExcRegInfo(excInfo);
#if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(excInfo);
#endif
OsGetAllTskInfo();
OsExcNvicDump();
OsExcMemPoolCheckInfo();
#endif
}
LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr)
{
UINT16 tmpFlag = (excType >> 16) & OS_NULL_SHORT; /* 16: Get Exception Type */
g_intCount++;
g_excInfo.nestCnt++;
g_excInfo.type = excType & OS_NULL_SHORT;
if (tmpFlag & OS_EXC_FLAG_FAULTADDR_VALID) {
g_excInfo.faultAddr = faultAddr;
} else {
g_excInfo.faultAddr = OS_EXC_IMPRECISE_ACCESS_ADDR;
}
if (g_losTask.runTask != NULL) {
if (tmpFlag & OS_EXC_FLAG_IN_HWI) {
g_excInfo.phase = OS_EXC_IN_HWI;
g_excInfo.thrdPid = pid;
} else {
g_excInfo.phase = OS_EXC_IN_TASK;
g_excInfo.thrdPid = g_losTask.runTask->taskID;
}
} else {
g_excInfo.phase = OS_EXC_IN_INIT;
g_excInfo.thrdPid = OS_NULL_INT;
}
if (excType & OS_EXC_FLAG_NO_FLOAT) {
g_excInfo.context = (EXC_CONTEXT_S *)((CHAR *)excBufAddr - LOS_OFF_SET_OF(EXC_CONTEXT_S, uwR4));
} else {
g_excInfo.context = excBufAddr;
}
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
ArchSysExit();
}
/* ****************************************************************************
Function : HalHwiInit
Description : initialization of the hardware interrupt
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
{
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
UINT32 index;
g_hwiForm[0] = 0; /* [0] Top of Stack */
g_hwiForm[1] = 0; /* [1] reset */
for (index = DEF_HANDLER_START_INDEX; index < OS_VECTOR_CNT; index++) {
g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
}
/* Exception handler register */
g_hwiForm[NonMaskableInt_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcNMI;
g_hwiForm[HARDFAULT_IRQN + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcHardFault;
g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcMemFault;
g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcBusFault;
g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcUsageFault;
g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalSVCHandler;
g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalPendSV;
g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)OsTickHandler;
/* Interrupt vector table location */
SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
#endif
#if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
#endif
/* Enable USGFAULT, BUSFAULT, MEMFAULT */
*(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
/* Enable DIV 0 and unaligned exception */
#ifdef LOSCFG_ARCH_UNALIGNED_EXC
*(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
#else
*(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT);
#endif
return;
}

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@@ -1,296 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
asm volatile("ldrex %0, [%1]\n"
: "=&r"(val)
: "r"(v)
: "cc");
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 status;
do {
asm volatile("ldrex %0, [%1]\n"
"strex %0, %2, [%1]\n"
: "=&r"(status)
: "r"(v), "r"(setVal)
: "cc");
} while (status != 0);
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 status;
do {
asm volatile("ldrex %1, [%2]\n"
"add %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
} while (status != 0);
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 status;
do {
asm volatile("ldrex %1, [%2]\n"
"sub %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
} while (status != 0);
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
asm volatile("ldrex %0, [%2]\n"
"strex %1, %3, [%2]"
: "=&r"(prevVal), "=&r"(status)
: "r"(v), "r"(val)
: "cc");
} while (status != 0);
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
asm volatile("ldrex %0, [%2]\n"
"mov %1, #0\n"
"cmp %0, %3\n"
"bne 1f\n"
"strex %1, %4, [%2]\n"
"1:"
: "=&r"(prevVal), "=&r"(status)
: "r"(v), "r"(oldVal), "r"(val)
: "cc");
} while (status != 0);
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

View File

@@ -1,296 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
asm volatile("ldrex %0, [%1]\n"
: "=&r"(val)
: "r"(v)
: "cc");
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 status;
do {
asm volatile("ldrex %0, [%1]\n"
"strex %0, %2, [%1]\n"
: "=&r"(status)
: "r"(v), "r"(setVal)
: "cc");
} while (status != 0);
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 status;
do {
asm volatile("ldrex %1, [%2]\n"
"add %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
} while (status != 0);
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 status;
do {
asm volatile("ldrex %1, [%2]\n"
"sub %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
} while (status != 0);
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
asm volatile("ldrex %0, [%2]\n"
"strex %1, %3, [%2]"
: "=&r"(prevVal), "=&r"(status)
: "r"(v), "r"(val)
: "cc");
} while (status != 0);
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
asm volatile("ldrex %0, [%2]\n"
"mov %1, #0\n"
"cmp %0, %3\n"
"bne 1f\n"
"strex %1, %4, [%2]\n"
"1:"
: "=&r"(prevVal), "=&r"(status)
: "r"(v), "r"(oldVal), "r"(val)
: "cc");
} while (status != 0);
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,296 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
__asm__ __volatile__("ldrex %0, [%1]\n"
: "=&r"(val)
: "r"(v)
: "cc");
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 status;
do {
__asm__ __volatile__("ldrex %0, [%1]\n"
"strex %0, %2, [%1]\n"
: "=&r"(status)
: "r"(v), "r"(setVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 status;
do {
__asm__ __volatile__("ldrex %1, [%2]\n"
"add %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 status;
do {
__asm__ __volatile__("ldrex %1, [%2]\n"
"sub %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
__asm__ __volatile__("ldrex %0, [%3]\n"
"strex %1, %4, [%3]"
: "=&r"(prevVal), "=&r"(status), "+m"(*v)
: "r"(v), "r"(val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
__asm__ __volatile__("ldrex %0, %2\n"
"mov %1, #0\n"
"cmp %0, %3\n"
"bne 1f\n"
"strex %1, %4, %2\n"
"1:"
: "=&r"(prevVal), "=&r"(status), "+Q"(*v)
: "r"(oldVal), "r"(val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,51 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_TIMER_H
#define _LOS_ARCH_TIMER_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_TIMER_H */

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@@ -1,167 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_context.h"
#include "securec.h"
#include "los_arch_context.h"
#include "los_arch_interrupt.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
/* ****************************************************************************
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
HalHwiInit();
}
/* ****************************************************************************
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
}
}
/* ****************************************************************************
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
topStack --- Top of task's stack
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined(__FPU_USED) && (__FPU_USED == 1U)))
context->S16 = 0xAA000010;
context->S17 = 0xAA000011;
context->S18 = 0xAA000012;
context->S19 = 0xAA000013;
context->S20 = 0xAA000014;
context->S21 = 0xAA000015;
context->S22 = 0xAA000016;
context->S23 = 0xAA000017;
context->S24 = 0xAA000018;
context->S25 = 0xAA000019;
context->S26 = 0xAA00001A;
context->S27 = 0xAA00001B;
context->S28 = 0xAA00001C;
context->S29 = 0xAA00001D;
context->S30 = 0xAA00001E;
context->S31 = 0xAA00001F;
context->S0 = 0xAA000000;
context->S1 = 0xAA000001;
context->S2 = 0xAA000002;
context->S3 = 0xAA000003;
context->S4 = 0xAA000004;
context->S5 = 0xAA000005;
context->S6 = 0xAA000006;
context->S7 = 0xAA000007;
context->S8 = 0xAA000008;
context->S9 = 0xAA000009;
context->S10 = 0xAA00000A;
context->S11 = 0xAA00000B;
context->S12 = 0xAA00000C;
context->S13 = 0xAA00000D;
context->S14 = 0xAA00000E;
context->S15 = 0xAA00000F;
context->FPSCR = 0x00000000;
context->NO_NAME = 0xAA000011;
#endif
context->uwR4 = 0x04040404L;
context->uwR5 = 0x05050505L;
context->uwR6 = 0x06060606L;
context->uwR7 = 0x07070707L;
context->uwR8 = 0x08080808L;
context->uwR9 = 0x09090909L;
context->uwR10 = 0x10101010L;
context->uwR11 = 0x11111111L;
context->uwPriMask = 0;
context->uwR0 = taskID;
context->uwR1 = 0x01010101L;
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
{
UNUSED(stackTop);
TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
(VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
context->uwR0 = param;
context->uwPC = sigHandler;
context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
return (VOID *)context;
}
#if (LOSCFG_SECURE == 1)
VOID HalUserTaskStackInit(TaskContext *context, UINTPTR taskEntry, UINTPTR stack)
{
context->uwR0 = stack;
context->uwPC = (UINT32)taskEntry;
context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
}
#endif
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
HalStartToRun();
return LOS_OK; /* never return */
}

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@@ -1,128 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_timer.h"
#include "los_config.h"
#include "los_tick.h"
#include "los_arch_interrupt.h"
#include "los_debug.h"
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
STATIC UINT64 SysTickCycleGet(UINT32 *period);
STATIC VOID SysTickLock(VOID);
STATIC VOID SysTickUnlock(VOID);
STATIC ArchTickTimer g_archTickTimer = {
.freq = 0,
.irqNum = SysTick_IRQn,
.periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
.init = SysTickStart,
.getCycle = SysTickCycleGet,
.reload = SysTickReload,
.lock = SysTickLock,
.unlock = SysTickUnlock,
.tickHandler = NULL,
};
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
{
UINT32 ret;
ArchTickTimer *tick = &g_archTickTimer;
tick->freq = OS_SYS_CLOCK;
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(tick->irqNum, handler, NULL);
#else
OsSetVector(tick->irqNum, handler);
#endif
#endif
ret = SysTick_Config(LOSCFG_BASE_CORE_TICK_RESPONSE_MAX);
if (ret == 1) {
return LOS_ERRNO_TICK_PER_SEC_TOO_SMALL;
}
return LOS_OK;
}
STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
{
if (nextResponseTime > g_archTickTimer.periodMax) {
nextResponseTime = g_archTickTimer.periodMax;
}
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
NVIC_ClearPendingIRQ(SysTick_IRQn);
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
return nextResponseTime;
}
STATIC UINT64 SysTickCycleGet(UINT32 *period)
{
UINT32 hwCycle = 0;
UINT32 intSave = LOS_IntLock();
UINT32 val = SysTick->VAL;
*period = SysTick->LOAD;
if (val != 0) {
hwCycle = *period - val;
}
LOS_IntRestore(intSave);
return (UINT64)hwCycle;
}
STATIC VOID SysTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
STATIC VOID SysTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
ArchTickTimer *ArchSysTickTimerGet(VOID)
{
return &g_archTickTimer;
}
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
__ISB();
return LOS_OK;
}

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@@ -1,296 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
asm volatile("ldrex %0, [%1]\n"
: "=&r"(val)
: "r"(v)
: "cc");
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 status;
asm volatile("1:ldrex %0, [%1]\n"
" strex %0, %2, [%1]\n"
" teq %0, #0\n"
" bne 1b"
: "=&r"(status)
: "r"(v), "r"(setVal)
: "cc");
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 status;
do {
asm volatile("ldrex %1, [%2]\n"
"add %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
} while (status != 0);
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 status;
do {
asm volatile("ldrex %1, [%2]\n"
"sub %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
} while (status != 0);
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
asm volatile("ldrex %0, [%2]\n"
"strex %1, %3, [%2]"
: "=&r"(prevVal), "=&r"(status)
: "r"(v), "r"(val)
: "cc");
} while (status != 0);
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
asm volatile("ldrex %0, [%2]\n"
"mov %1, #0\n"
"cmp %0, %3\n"
"bne 1f\n"
"strex %1, %4, [%2]\n"
"1:"
: "=&r"(prevVal), "=&r"(status)
: "r"(v), "r"(oldVal), "r"(val)
: "cc");
} while (status != 0);
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,51 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_TIMER_H
#define _LOS_ARCH_TIMER_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_TIMER_H */

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@@ -1,161 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_context.h"
#include "securec.h"
#include "los_arch_context.h"
#include "los_arch_interrupt.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
HalHwiInit();
}
/* ****************************************************************************
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
}
}
/* ****************************************************************************
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
topStack --- Top of task's stack
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined(__FPU_USED) && (__FPU_USED == 1U)))
context->S16 = 0xAA000010;
context->S17 = 0xAA000011;
context->S18 = 0xAA000012;
context->S19 = 0xAA000013;
context->S20 = 0xAA000014;
context->S21 = 0xAA000015;
context->S22 = 0xAA000016;
context->S23 = 0xAA000017;
context->S24 = 0xAA000018;
context->S25 = 0xAA000019;
context->S26 = 0xAA00001A;
context->S27 = 0xAA00001B;
context->S28 = 0xAA00001C;
context->S29 = 0xAA00001D;
context->S30 = 0xAA00001E;
context->S31 = 0xAA00001F;
context->S0 = 0xAA000000;
context->S1 = 0xAA000001;
context->S2 = 0xAA000002;
context->S3 = 0xAA000003;
context->S4 = 0xAA000004;
context->S5 = 0xAA000005;
context->S6 = 0xAA000006;
context->S7 = 0xAA000007;
context->S8 = 0xAA000008;
context->S9 = 0xAA000009;
context->S10 = 0xAA00000A;
context->S11 = 0xAA00000B;
context->S12 = 0xAA00000C;
context->S13 = 0xAA00000D;
context->S14 = 0xAA00000E;
context->S15 = 0xAA00000F;
context->FPSCR = 0x00000000;
context->NO_NAME = 0xAA000011;
#endif
context->uwR4 = 0x04040404L;
context->uwR5 = 0x05050505L;
context->uwR6 = 0x06060606L;
context->uwR7 = 0x07070707L;
context->uwR8 = 0x08080808L;
context->uwR9 = 0x09090909L;
context->uwR10 = 0x10101010L;
context->uwR11 = 0x11111111L;
context->uwPriMask = 0;
context->uwR0 = taskID;
context->uwR1 = 0x01010101L;
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINTPTR)ArchSysExit;
context->uwPC = (UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
{
UNUSED(stackTop);
TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
(VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
context->uwR0 = param;
context->uwPC = sigHandler;
context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
HalStartToRun();
return LOS_OK; /* never return */
}

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@@ -1,660 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_interrupt.h"
#include "securec.h"
#include <stdarg.h>
#include "los_arch_interrupt.h"
#include "los_context.h"
#include "los_debug.h"
#include "los_hook.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_memory.h"
#include "los_membox.h"
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
#include "los_cpup.h"
#endif
UINT32 g_intCount = 0;
#ifdef __ICCARM__
#pragma location = ".data.vector"
#pragma data_alignment = LOSCFG_ARCH_HWI_VECTOR_ALIGN
#elif defined(__CC_ARM) || defined(__GNUC__)
LITE_OS_SEC_VEC
#endif
/* *
* @ingroup los_hwi
* Hardware interrupt form mapping handling function array.
*/
STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
#if (LOSCFG_DEBUG_TOOLS == 1)
STATIC UINT32 g_hwiFormCnt[OS_HWI_MAX_NUM] = {0};
STATIC CHAR *g_hwiFormName[OS_HWI_MAX_NUM] = {0};
UINT32 OsGetHwiFormCnt(UINT32 index)
{
return g_hwiFormCnt[index];
}
CHAR *OsGetHwiFormName(UINT32 index)
{
return g_hwiFormName[index];
}
BOOL OsGetHwiCreated(UINT32 index)
{
if (g_hwiForm[index] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
return TRUE;
}
return FALSE;
}
#endif
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
VOID *pParm;
} HWI_HANDLER_FUNC;
/* *
* @ingroup los_hwi
* Hardware interrupt handler form mapping handling function array.
*/
STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
/* *
* @ingroup los_hwi
* Set interrupt vector table.
*/
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
{
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
}
}
#else
/* *
* @ingroup los_hwi
* hardware interrupt handler form mapping handling function array.
*/
STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
/* *
* @ingroup los_hwi
* Set interrupt vector table.
*/
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
{
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
}
}
#endif
WEAK VOID SysTick_Handler(VOID)
{
return;
}
/* ****************************************************************************
Function : HwiNumGet
Description : Get an interrupt number
Input : None
Output : None
Return : Interrupt Indexes number
**************************************************************************** */
STATIC UINT32 HwiNumGet(VOID)
{
return __get_IPSR();
}
STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_EnableIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_DisableIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
if (priority > OS_HWI_PRIO_LOWEST) {
return OS_ERRNO_HWI_PRIO_INVALID;
}
NVIC_SetPriority((IRQn_Type)hwiNum, priority);
return LOS_OK;
}
STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
HwiControllerOps g_archHwiOps = {
.enableIrq = HwiUnmask,
.disableIrq = HwiMask,
.setIrqPriority = HwiSetPriority,
.getCurIrqNum = HwiNumGet,
.triggerIrq = HwiPending,
.clearIrq = HwiClear,
};
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
/* ****************************************************************************
Function : HalHwiDefaultHandler
Description : default handler of the hardware interrupt
Input : None
Output : None
Return : None
**************************************************************************** */
/*lint -e529*/
LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
{
PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
while (1) {}
}
WEAK VOID HalPreInterruptHandler(UINT32 arg)
{
(VOID)arg;
return;
}
WEAK VOID HalAftInterruptHandler(UINT32 arg)
{
(VOID)arg;
return;
}
/* ****************************************************************************
Function : HalInterrupt
Description : Hardware interrupt entry function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
{
UINT32 hwiIndex;
UINT32 intSave;
#if (LOSCFG_KERNEL_RUNSTOP == 1)
SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk);
#endif
intSave = LOS_IntLock();
g_intCount++;
LOS_IntRestore(intSave);
hwiIndex = HwiNumGet();
OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
OsCpupIrqStart(hwiIndex);
#endif
HalPreInterruptHandler(hwiIndex);
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
#else
if (g_hwiHandlerForm[hwiIndex] != 0) {
g_hwiHandlerForm[hwiIndex]();
}
#endif
#if (LOSCFG_DEBUG_TOOLS == 1)
++g_hwiFormCnt[hwiIndex];
#endif
HalAftInterruptHandler(hwiIndex);
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
OsCpupIrqEnd(hwiIndex);
#endif
OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
intSave = LOS_IntLock();
g_intCount--;
LOS_IntRestore(intSave);
}
/* ****************************************************************************
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
hwiMode --- unused
hwiHandler --- hwi handler
irqParam --- param of the hwi handler
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T hwiMode,
HWI_PROC_FUNC hwiHandler,
HwiIrqParam *irqParam)
{
(VOID)hwiMode;
UINT32 intSave;
if (hwiHandler == NULL) {
return OS_ERRNO_HWI_PROC_FUNC_NULL;
}
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
return OS_ERRNO_HWI_ALREADY_CREATED;
}
if (hwiPrio > OS_HWI_PRIO_LOWEST) {
return OS_ERRNO_HWI_PRIO_INVALID;
}
intSave = LOS_IntLock();
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (irqParam != NULL) {
OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
} else {
OsSetVector(hwiNum, hwiHandler, NULL);
}
#else
(VOID)irqParam;
OsSetVector(hwiNum, hwiHandler);
#endif
#if (LOSCFG_DEBUG_TOOLS == 1)
if ((irqParam != NULL) && (irqParam->pName != NULL)) {
g_hwiFormName[hwiNum + OS_SYS_VECTOR_CNT] = (CHAR *)irqParam->pName;
}
g_hwiFormCnt[hwiNum + OS_SYS_VECTOR_CNT] = 0;
#endif
HwiUnmask((IRQn_Type)hwiNum);
HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
LOS_IntRestore(intSave);
return LOS_OK;
}
/* ****************************************************************************
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
irqParam --- param of the hwi handler
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
{
(VOID)irqParam;
UINT32 intSave;
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_DisableIRQ((IRQn_Type)hwiNum);
intSave = LOS_IntLock();
g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
LOS_IntRestore(intSave);
return LOS_OK;
}
#define FAULT_STATUS_REG_BIT 32
#define USGFAULT (1 << 18)
#define BUSFAULT (1 << 17)
#define MEMFAULT (1 << 16)
#define DIV0FAULT (1 << 4)
#define UNALIGNFAULT (1 << 3)
#define HARDFAULT_IRQN (-13)
ExcInfo g_excInfo = {0};
UINT8 g_uwExcTbl[FAULT_STATUS_REG_BIT] = {
0, 0, 0, 0, 0, 0, OS_EXC_UF_DIVBYZERO, OS_EXC_UF_UNALIGNED,
0, 0, 0, 0, OS_EXC_UF_NOCP, OS_EXC_UF_INVPC, OS_EXC_UF_INVSTATE, OS_EXC_UF_UNDEFINSTR,
0, 0, 0, OS_EXC_BF_STKERR, OS_EXC_BF_UNSTKERR, OS_EXC_BF_IMPRECISERR, OS_EXC_BF_PRECISERR, OS_EXC_BF_IBUSERR,
0, 0, 0, OS_EXC_MF_MSTKERR, OS_EXC_MF_MUNSTKERR, 0, OS_EXC_MF_DACCVIOL, OS_EXC_MF_IACCVIOL
};
#if (LOSCFG_KERNEL_PRINTF != 0)
STATIC VOID OsExcNvicDump(VOID)
{
#define OS_NR_NVIC_EXC_DUMP_TYPES 7
UINT32 *base = NULL;
UINT32 len, i, j;
UINT32 rgNvicBases[OS_NR_NVIC_EXC_DUMP_TYPES] = {
OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
};
UINT32 rgNvicLens[OS_NR_NVIC_EXC_DUMP_TYPES] = {
OS_NVIC_INT_ENABLE_SIZE, OS_NVIC_INT_PEND_SIZE, OS_NVIC_INT_ACT_SIZE,
OS_NVIC_INT_PRI_SIZE, OS_NVIC_EXCPRI_SIZE, OS_NVIC_SHCSR_SIZE,
OS_NVIC_INT_CTRL_SIZE
};
CHAR strRgEnable[] = "enable";
CHAR strRgPending[] = "pending";
CHAR strRgActive[] = "active";
CHAR strRgPriority[] = "priority";
CHAR strRgException[] = "exception";
CHAR strRgShcsr[] = "shcsr";
CHAR strRgIntCtrl[] = "control";
CHAR *strRgs[] = {
strRgEnable, strRgPending, strRgActive, strRgPriority,
strRgException, strRgShcsr, strRgIntCtrl
};
PRINTK("\r\nOS exception NVIC dump:\n");
for (i = 0; i < OS_NR_NVIC_EXC_DUMP_TYPES; i++) {
base = (UINT32 *)rgNvicBases[i];
len = rgNvicLens[i];
PRINTK("interrupt %s register, base address: %p, size: 0x%x\n", strRgs[i], base, len);
len = (len >> 2); /* 2: Gets the next register offset */
for (j = 0; j < len; j++) {
PRINTK("0x%x ", *(base + j));
if ((j != 0) && ((j % 16) == 0)) { /* 16: print wrap line */
PRINTK("\n");
}
}
PRINTK("\n");
}
}
STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
{
CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
PRINTK("Type = %d\n", excInfo->type);
PRINTK("ThrdPid = %d\n", excInfo->thrdPid);
PRINTK("Phase = %s\n", phaseStr[excInfo->phase]);
PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
}
STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
{
PRINTK("Current task info:\n");
if (excInfo->phase == OS_EXC_IN_TASK) {
LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
PRINTK("Task name = %s\n", taskCB->taskName);
PRINTK("Task ID = %d\n", taskCB->taskID);
PRINTK("Task SP = %p\n", taskCB->stackPointer);
PRINTK("Task ST = 0x%x\n", taskCB->topOfStack);
PRINTK("Task SS = 0x%x\n", taskCB->stackSize);
} else if (excInfo->phase == OS_EXC_IN_HWI) {
PRINTK("Exception occur in interrupt phase!\n");
} else {
PRINTK("Exception occur in system init phase!\n");
}
}
STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
{
PRINTK("Exception reg dump:\n");
PRINTK("PC = 0x%x\n", excInfo->context->uwPC);
PRINTK("LR = 0x%x\n", excInfo->context->uwLR);
PRINTK("SP = 0x%x\n", excInfo->context->uwSP);
PRINTK("R0 = 0x%x\n", excInfo->context->uwR0);
PRINTK("R1 = 0x%x\n", excInfo->context->uwR1);
PRINTK("R2 = 0x%x\n", excInfo->context->uwR2);
PRINTK("R3 = 0x%x\n", excInfo->context->uwR3);
PRINTK("R4 = 0x%x\n", excInfo->context->uwR4);
PRINTK("R5 = 0x%x\n", excInfo->context->uwR5);
PRINTK("R6 = 0x%x\n", excInfo->context->uwR6);
PRINTK("R7 = 0x%x\n", excInfo->context->uwR7);
PRINTK("R8 = 0x%x\n", excInfo->context->uwR8);
PRINTK("R9 = 0x%x\n", excInfo->context->uwR9);
PRINTK("R10 = 0x%x\n", excInfo->context->uwR10);
PRINTK("R11 = 0x%x\n", excInfo->context->uwR11);
PRINTK("R12 = 0x%x\n", excInfo->context->uwR12);
PRINTK("PriMask = 0x%x\n", excInfo->context->uwPriMask);
PRINTK("xPSR = 0x%x\n", excInfo->context->uwxPSR);
}
#if (LOSCFG_KERNEL_BACKTRACE == 1)
STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
{
UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
UINT32 index;
OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->uwSP);
PRINTK("----- backtrace start -----\n");
for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
if (LR[index] == 0) {
break;
}
PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
}
PRINTK("----- backtrace end -----\n");
}
#endif
STATIC VOID OsExcMemPoolCheckInfo(VOID)
{
PRINTK("\r\nmemory pools check:\n");
#if (LOSCFG_PLATFORM_EXC == 1)
MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
UINT32 errCnt;
UINT32 i;
(VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
if (errCnt < OS_SYS_MEM_NUM) {
errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
}
if (errCnt == 0) {
PRINTK("all memory pool check passed!\n");
return;
}
for (i = 0; i < errCnt; i++) {
PRINTK("pool num = %d\n", i);
PRINTK("pool type = %d\n", memExcInfo[i].type);
PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr);
PRINTK("pool size = 0x%x\n", memExcInfo[i].size);
PRINTK("pool free = 0x%x\n", memExcInfo[i].free);
PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr);
PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen);
PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
}
#endif
UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
if (ret == LOS_OK) {
PRINTK("system heap memcheck over, all passed!\n");
}
PRINTK("memory pool check end!\n");
}
#endif
STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
{
#if (LOSCFG_KERNEL_PRINTF != 0)
PRINTK("*************Exception Information**************\n");
OsExcTypeInfo(excInfo);
OsExcCurTaskInfo(excInfo);
OsExcRegInfo(excInfo);
#if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(excInfo);
#endif
OsGetAllTskInfo();
OsExcNvicDump();
OsExcMemPoolCheckInfo();
#endif
}
LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr)
{
UINT16 tmpFlag = (excType >> 16) & OS_NULL_SHORT; /* 16: Get Exception Type */
g_intCount++;
g_excInfo.nestCnt++;
g_excInfo.type = excType & OS_NULL_SHORT;
if (tmpFlag & OS_EXC_FLAG_FAULTADDR_VALID) {
g_excInfo.faultAddr = faultAddr;
} else {
g_excInfo.faultAddr = OS_EXC_IMPRECISE_ACCESS_ADDR;
}
if (g_losTask.runTask != NULL) {
if (tmpFlag & OS_EXC_FLAG_IN_HWI) {
g_excInfo.phase = OS_EXC_IN_HWI;
g_excInfo.thrdPid = pid;
} else {
g_excInfo.phase = OS_EXC_IN_TASK;
g_excInfo.thrdPid = g_losTask.runTask->taskID;
}
} else {
g_excInfo.phase = OS_EXC_IN_INIT;
g_excInfo.thrdPid = OS_NULL_INT;
}
if (excType & OS_EXC_FLAG_NO_FLOAT) {
g_excInfo.context = (EXC_CONTEXT_S *)((CHAR *)excBufAddr - LOS_OFF_SET_OF(EXC_CONTEXT_S, uwR4));
} else {
g_excInfo.context = excBufAddr;
}
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
ArchSysExit();
}
/* ****************************************************************************
Function : HalHwiInit
Description : initialization of the hardware interrupt
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
{
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
UINT32 index;
g_hwiForm[0] = 0; /* [0] Top of Stack */
g_hwiForm[1] = (HWI_PROC_FUNC)Reset_Handler; /* [1] reset */
for (index = 2; index < OS_VECTOR_CNT; index++) { /* 2: The starting position of the interrupt */
g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
}
/* Exception handler register */
g_hwiForm[NonMaskableInt_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcNMI;
g_hwiForm[HARDFAULT_IRQN + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcHardFault;
g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcMemFault;
g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcBusFault;
g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcUsageFault;
g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcSvcCall;
g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalPendSV;
g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)SysTick_Handler;
/* Interrupt vector table location */
SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
#endif
#if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
#endif
/* Enable USGFAULT, BUSFAULT, MEMFAULT */
*(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
/* Enable DIV 0 and unaligned exception */
#ifdef LOSCFG_ARCH_UNALIGNED_EXC
*(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
#else
*(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT);
#endif
return;
}

View File

@@ -1,37 +0,0 @@
# Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_group("gcc") {
if (defined(LOSCFG_SECURE_TRUSTZONE)) {
modules = [ "TZ" ]
} else {
modules = [ "NTZ" ]
}
}

View File

@@ -1,45 +0,0 @@
# Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_name = "arch"
kernel_module(module_name) {
sources = [
"los_context.c",
"los_dispatch.S",
"los_exc.S",
"los_interrupt.c",
"los_timer.c",
]
configs += [ "$LITEOSTOPDIR:warn_config" ]
}
config("public") {
include_dirs = [ "." ]
}

View File

@@ -1,295 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
__asm__ __volatile__("ldrex %0, [%1]\n"
: "=&r"(val)
: "r"(v)
: "cc");
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 status;
do {
__asm__ __volatile__("ldrex %0, [%1]\n"
"strex %0, %2, [%1]\n"
: "=&r"(status)
: "r"(v), "r"(setVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 status;
do {
__asm__ __volatile__("ldrex %1, [%2]\n"
"add %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 status;
do {
__asm__ __volatile__("ldrex %1, [%2]\n"
"sub %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
__asm__ __volatile__("ldrex %0, [%3]\n"
"strex %1, %4, [%3]"
: "=&r"(prevVal), "=&r"(status), "+m"(*v)
: "r"(v), "r"(val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
__asm__ __volatile__("ldrex %0, %2\n"
"mov %1, #0\n"
"cmp %0, %3\n"
"bne 1f\n"
"strex %1, %4, %2\n"
"1:"
: "=&r"(prevVal), "=&r"(status), "+Q"(*v)
: "r"(oldVal), "r"(val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

View File

@@ -1,693 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_INTERRUPT_H
#define _LOS_ARCH_INTERRUPT_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_interrupt.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
/* *
* @ingroup los_arch_interrupt
* Maximum number of used hardware interrupts.
*/
#ifndef OS_HWI_MAX_NUM
#define OS_HWI_MAX_NUM LOSCFG_PLATFORM_HWI_LIMIT
#endif
/* *
* @ingroup los_arch_interrupt
* Highest priority of a hardware interrupt.
*/
#ifndef OS_HWI_PRIO_HIGHEST
#define OS_HWI_PRIO_HIGHEST 0
#endif
/* *
* @ingroup los_arch_interrupt
* Lowest priority of a hardware interrupt.
*/
#ifndef OS_HWI_PRIO_LOWEST
#define OS_HWI_PRIO_LOWEST 7
#endif
/* *
* @ingroup los_arch_interrupt
* Define the type of a hardware interrupt vector table function.
*/
typedef VOID (**HWI_VECTOR_FUNC)(void);
/* *
* @ingroup los_arch_interrupt
* Count of interrupts.
*/
extern UINT32 g_intCount;
/* *
* @ingroup los_arch_interrupt
* Count of M-Core system interrupt vector.
*/
#define OS_SYS_VECTOR_CNT 16
/* *
* @ingroup los_arch_interrupt
* Count of M-Core interrupt vector.
*/
#define OS_VECTOR_CNT (OS_SYS_VECTOR_CNT + OS_HWI_MAX_NUM)
/* *
* @ingroup los_arch_interrupt
* AIRCR register priority group parameter .
*/
#define OS_NVIC_AIRCR_PRIGROUP 7
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt number.
*
* Value: 0x02000900
*
* Solution: Ensure that the interrupt number is valid.
* The value range of the interrupt number applicable for a Cortex-M33 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
*/
#define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Null hardware interrupt handling function.
*
* Value: 0x02000901
*
* Solution: Pass in a valid non-null hardware interrupt handling function.
*/
#define OS_ERRNO_HWI_PROC_FUNC_NULL LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x01)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Insufficient interrupt resources for hardware interrupt creation.
*
* Value: 0x02000902
*
* Solution: Increase the configured maximum number of supported hardware interrupts.
*/
#define OS_ERRNO_HWI_CB_UNAVAILABLE LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x02)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Insufficient memory for hardware interrupt initialization.
*
* Value: 0x02000903
*
* Solution: Expand the configured memory.
*/
#define OS_ERRNO_HWI_NO_MEMORY LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x03)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: The interrupt has already been created.
*
* Value: 0x02000904
*
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
*/
#define OS_ERRNO_HWI_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x04)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt priority.
*
* Value: 0x02000905
*
* Solution: Ensure that the interrupt priority is valid.
* The value range of the interrupt priority applicable for a Cortex-M33 platform is [0,15].
*/
#define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Incorrect interrupt creation mode.
*
* Value: 0x02000906
*
* Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
* OS_HWI_MODE_FAST of which the value can be 0 or 1.
*/
#define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: The interrupt has already been created as a fast interrupt.
*
* Value: 0x02000907
*
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
*/
#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07)
/* *
* @ingroup los_arch_interrupt
* SysTick control and status register.
*/
#define OS_SYSTICK_CONTROL_REG 0xE000E010
/* *
* @ingroup los_hw
* SysTick current value register.
*/
#define OS_SYSTICK_CURRENT_REG 0xE000E018
/* *
* @ingroup los_arch_interrupt
* Interrupt Priority-Level Registers.
*/
#define OS_NVIC_PRI_BASE 0xE000E400
/* *
* @ingroup los_arch_interrupt
* Interrupt enable register for 0-31.
*/
#define OS_NVIC_SETENA_BASE 0xE000E100
/* *
* @ingroup los_arch_interrupt
* interrupt pending register.
*/
#define OS_NVIC_SETPEND_BASE 0xE000E200
/* *
* @ingroup los_arch_interrupt
* Interrupt active register.
*/
#define OS_NVIC_INT_ACT_BASE 0xE000E300
/* *
* @ingroup los_arch_interrupt
* Interrupt disable register for 0-31.
*/
#define OS_NVIC_CLRENA_BASE 0xE000E180
/* *
* @ingroup los_arch_interrupt
* Interrupt control and status register.
*/
#define OS_NVIC_INT_CTRL 0xE000ED04
/* *
* @ingroup los_arch_interrupt
* Vector table offset register.
*/
#define OS_NVIC_VTOR 0xE000ED08
/* *
* @ingroup los_arch_interrupt
* Application interrupt and reset control register
*/
#define OS_NVIC_AIRCR 0xE000ED0C
/* *
* @ingroup los_arch_interrupt
* System exception priority register.
*/
#define OS_NVIC_EXCPRI_BASE 0xE000ED18
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 1 :reset.
*/
#define OS_EXC_RESET 1
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 2 :Non-Maskable Interrupt.
*/
#define OS_EXC_NMI 2
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 3 :(hard)fault.
*/
#define OS_EXC_HARD_FAULT 3
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 4 :MemManage fault.
*/
#define OS_EXC_MPU_FAULT 4
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 5 :Bus fault.
*/
#define OS_EXC_BUS_FAULT 5
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 6 :Usage fault.
*/
#define OS_EXC_USAGE_FAULT 6
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 11 :SVCall.
*/
#define OS_EXC_SVC_CALL 11
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 12 :Debug monitor.
*/
#define OS_EXC_DBG_MONITOR 12
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 14 :PendSV.
*/
#define OS_EXC_PEND_SV 14
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 15 :SysTick.
*/
#define OS_EXC_SYS_TICK 15
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
*/
extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg);
#else
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
*/
extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
#endif
/* *
* @ingroup los_arch_interrupt
* @brief: Hardware interrupt entry function.
*
* @par Description:
* This API is used as all hardware interrupt handling function entry.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID HalInterrupt(VOID);
/* *
* @ingroup los_arch_interrupt
* @brief: Default vector handling function.
*
* @par Description:
* This API is used to configure interrupt for null function.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID HalHwiDefaultHandler(VOID);
/* *
* @ingroup los_arch_interrupt
* @brief: Reset the vector table.
*
* @par Description:
* This API is used to reset the vector table.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID Reset_Handler(VOID);
/* *
* @ingroup los_arch_interrupt
* @brief: Pended System Call.
*
* @par Description:
* PendSV can be pended and is useful for an OS to pend an exception
* so that an action can be performed after other important tasks are completed.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID HalPendSV(VOID);
#define OS_EXC_IN_INIT 0
#define OS_EXC_IN_TASK 1
#define OS_EXC_IN_HWI 2
#define OS_EXC_MAX_BUF_LEN 25
#define OS_EXC_MAX_NEST_DEPTH 1
#define OS_NVIC_SHCSR 0xE000ED24
#define OS_NVIC_CCR 0xE000ED14
#define OS_NVIC_INT_ENABLE_SIZE 0x20
#define OS_NVIC_INT_PRI_SIZE 0xF0
#define OS_NVIC_EXCPRI_SIZE 0xC
#define OS_NVIC_INT_CTRL_SIZE 4
#define OS_NVIC_SHCSR_SIZE 4
#define OS_NVIC_INT_PEND_SIZE OS_NVIC_INT_ACT_SIZE
#define OS_NVIC_INT_ACT_SIZE OS_NVIC_INT_ENABLE_SIZE
#define OS_EXC_FLAG_NO_FLOAT 0x10000000
#define OS_EXC_FLAG_FAULTADDR_VALID 0x01
#define OS_EXC_FLAG_IN_HWI 0x02
#define OS_EXC_IMPRECISE_ACCESS_ADDR 0xABABABAB
#define OS_EXC_EVENT 0x00000001
/**
* @ingroup los_exc
* the struct of register files
*
* description: the register files that saved when exception triggered
*
* notes:the following register with prefix 'uw' correspond to the registers in the cpu data sheet.
*/
typedef struct TagExcContext {
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
UINT32 S16;
UINT32 S17;
UINT32 S18;
UINT32 S19;
UINT32 S20;
UINT32 S21;
UINT32 S22;
UINT32 S23;
UINT32 S24;
UINT32 S25;
UINT32 S26;
UINT32 S27;
UINT32 S28;
UINT32 S29;
UINT32 S30;
UINT32 S31;
#endif
UINT32 uwR4;
UINT32 uwR5;
UINT32 uwR6;
UINT32 uwR7;
UINT32 uwR8;
UINT32 uwR9;
UINT32 uwR10;
UINT32 uwR11;
UINT32 uwPriMask;
/* auto save */
UINT32 uwSP;
UINT32 uwR0;
UINT32 uwR1;
UINT32 uwR2;
UINT32 uwR3;
UINT32 uwR12;
UINT32 uwLR;
UINT32 uwPC;
UINT32 uwxPSR;
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED) && (__FPU_USED== 1U)))
UINT32 S0;
UINT32 S1;
UINT32 S2;
UINT32 S3;
UINT32 S4;
UINT32 S5;
UINT32 S6;
UINT32 S7;
UINT32 S8;
UINT32 S9;
UINT32 S10;
UINT32 S11;
UINT32 S12;
UINT32 S13;
UINT32 S14;
UINT32 S15;
UINT32 FPSCR;
UINT32 NO_NAME;
#endif
} EXC_CONTEXT_S;
typedef VOID (*EXC_PROC_FUNC)(UINT32, EXC_CONTEXT_S *);
VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr);
VOID HalExcNMI(VOID);
VOID HalExcHardFault(VOID);
VOID HalExcMemFault(VOID);
VOID HalExcBusFault(VOID);
VOID HalExcUsageFault(VOID);
VOID HalSVCHandler(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: Record whether a precise BusFault occurred during floating-point lazy state preservation.
*/
#define OS_EXC_BF_LSPERR 1
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
*/
#define OS_EXC_BF_STKERR 2
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was out of the stack.
*/
#define OS_EXC_BF_UNSTKERR 3
/**
* @ingroup los_exc
* Cortex-M exception types: Bus status register imprecise data access violation.
*/
#define OS_EXC_BF_IMPRECISERR 4
/**
* @ingroup los_exc
* Cortex-M exception types: Bus status register exact data access violation.
*/
#define OS_EXC_BF_PRECISERR 5
/**
* @ingroup los_exc
* Cortex-M exception types: Bus status register access violation while pointing.
*/
#define OS_EXC_BF_IBUSERR 6
/**
* @ingroup los_exc
* Cortex-M exception types: Record whether a MemManage fault occurred during floating-point lazy state preservation.
*/
#define OS_EXC_MF_MLSPERR 7
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the memory management status register was being pushed.
*/
#define OS_EXC_MF_MSTKERR 8
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the memory management status register was out of the stack.
*/
#define OS_EXC_MF_MUNSTKERR 9
/**
* @ingroup los_exc
* Cortex-M exception types: Memory management status register data access violation.
*/
#define OS_EXC_MF_DACCVIOL 10
/**
* @ingroup los_exc
* Cortex-M exception types: Memory management status register access violation.
*/
#define OS_EXC_MF_IACCVIOL 11
/**
* @ingroup los_exc
* Cortex-M exception types: Incorrect usage indicating that the divisor is zero during the division operation.
*/
#define OS_EXC_UF_DIVBYZERO 12
/**
* @ingroup los_exc
* Cortex-M exception types: Usage error, error caused by unaligned access.
*/
#define OS_EXC_UF_UNALIGNED 13
/**
* @ingroup los_exc
* Cortex-M exception types: Sticky flag indicating whether a stack overflow error has occurred.
*/
#define OS_EXC_UF_STKOF 14
/**
* @ingroup los_exc
* Cortex-M exception types: Incorrect usage attempting to execute coprocessor related instruction.
*/
#define OS_EXC_UF_NOCP 15
/**
* @ingroup los_exc
* Cortex-M exception types: Usage error attempting to load EXC_RETURN to PC illegally on exception return.
*/
#define OS_EXC_UF_INVPC 16
/**
* @ingroup los_exc
* Cortex-M exception types: Incorrect usage, attempting to cut to ARM state.
*/
#define OS_EXC_UF_INVSTATE 17
/**
* @ingroup los_exc
* Cortex-M exception types: Incorrect usage. Executed instruction whose code is undefined.
*/
#define OS_EXC_UF_UNDEFINSTR 18
/**
* @ingroup los_exc
* Cortex-M exception types: NMI
*/
#define OS_EXC_CAUSE_NMI 19
/**
* @ingroup los_exc
* Cortex-M exception types: hard fault
*/
#define OS_EXC_CAUSE_HARDFAULT 20
/**
* @ingroup los_exc
* Cortex-M exception types: The task handler exits.
*/
#define OS_EXC_CAUSE_TASK_EXIT 21
/**
* @ingroup los_exc
* Cortex-M exception types: A fatal error.
*/
#define OS_EXC_CAUSE_FATAL_ERR 22
/**
* @ingroup los_exc
* Cortex-M exception types: Hard Fault caused by a debug event.
*/
#define OS_EXC_CAUSE_DEBUGEVT 23
/**
* @ingroup los_exc
* Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
*/
#define OS_EXC_CAUSE_VECTBL 24
/**
* @ingroup los_exc
* Exception information structure
*
* Description: Exception information saved when an exception is triggered on the Cortex-M33 platform.
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
/**< Hardware context at the time an exception to the automatic stack floating-point register occurs */
EXC_CONTEXT_S *context;
} ExcInfo;
extern UINT32 g_curNestCount;
extern UINT32 g_intCount;
extern UINT8 g_uwExcTbl[32];
extern ExcInfo g_excInfo;
#define MAX_INT_INFO_SIZE (8 + 0x164)
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_INTERRUPT_H */

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@@ -1,50 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_TIMER_H
#define _LOS_ARCH_TIMER_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_TIMER_H */

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@@ -1,162 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_context.h"
#include "securec.h"
#include "los_arch_context.h"
#include "los_arch_interrupt.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_debug.h"
/* ****************************************************************************
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
HalHwiInit();
}
/* ****************************************************************************
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
}
}
/* ****************************************************************************
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
topStack --- Top of task's stack
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined(__FPU_USED) && (__FPU_USED == 1U)))
context->S16 = 0xAA000010;
context->S17 = 0xAA000011;
context->S18 = 0xAA000012;
context->S19 = 0xAA000013;
context->S20 = 0xAA000014;
context->S21 = 0xAA000015;
context->S22 = 0xAA000016;
context->S23 = 0xAA000017;
context->S24 = 0xAA000018;
context->S25 = 0xAA000019;
context->S26 = 0xAA00001A;
context->S27 = 0xAA00001B;
context->S28 = 0xAA00001C;
context->S29 = 0xAA00001D;
context->S30 = 0xAA00001E;
context->S31 = 0xAA00001F;
context->S0 = 0xAA000000;
context->S1 = 0xAA000001;
context->S2 = 0xAA000002;
context->S3 = 0xAA000003;
context->S4 = 0xAA000004;
context->S5 = 0xAA000005;
context->S6 = 0xAA000006;
context->S7 = 0xAA000007;
context->S8 = 0xAA000008;
context->S9 = 0xAA000009;
context->S10 = 0xAA00000A;
context->S11 = 0xAA00000B;
context->S12 = 0xAA00000C;
context->S13 = 0xAA00000D;
context->S14 = 0xAA00000E;
context->S15 = 0xAA00000F;
context->FPSCR = 0x00000000;
context->NO_NAME = 0xAA000011;
context->uwExcLR = 0xFFFFFFEDL;
#else
context->uwExcLR = 0xFFFFFFFDL;
#endif
context->uwPspLim = (UINT32)topStack;
context->uwR4 = 0x04040404L;
context->uwR5 = 0x05050505L;
context->uwR6 = 0x06060606L;
context->uwR7 = 0x07070707L;
context->uwR8 = 0x08080808L;
context->uwR9 = 0x09090909L;
context->uwR10 = 0x10101010L;
context->uwR11 = 0x11111111L;
context->uwPriMask = 0;
context->uwR0 = taskID;
context->uwR1 = 0x01010101L;
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
#if (LOSCFG_KERNEL_SIGNAL == 1)
VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
{
UNUSED(stackTop);
TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
(VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
context->uwR0 = param;
context->uwPC = sigHandler;
context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
return (VOID *)context;
}
#endif
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
HalStartToRun();
return LOS_OK; /* never return */
}

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@@ -1,381 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.syntax unified
.arch armv8.1-m.main
.fpu vfpv3-d16-fp16
.thumb
.section .text
.global HalExcNMI
.global HalExcHardFault
.global HalExcMemFault
.global HalExcBusFault
.global HalExcUsageFault
.global HalSVCHandler
.extern HalExcHandleEntry
.extern g_uwExcTbl
.extern g_taskScheduled
.equ OS_FLG_BGD_ACTIVE, 0x0002
.equ OS_EXC_CAUSE_NMI, 19
.equ OS_EXC_CAUSE_HARDFAULT, 20
.equ HF_DEBUGEVT, 23
.equ HF_VECTBL, 24
.equ FLAG_ADDR_VALID, 0x10000
.equ FLAG_HWI_ACTIVE, 0x20000
.equ FLAG_NO_FLOAT, 0x10000000
.equ OS_NVIC_FSR, 0xE000ED28 //include BusFault/MemFault/UsageFault State Register
.equ OS_NVIC_HFSR, 0xE000ED2C //HardFault State Register
.equ OS_NVIC_BFAR, 0xE000ED38
.equ OS_NVIC_MMAR, 0xE000ED34
.equ OS_NVIC_ACT_BASE, 0xE000E300
.equ OS_NVIC_SHCSRS, 0xE000ED24
.equ OS_NVIC_SHCSR_MASK, 0xC00
.type HalExcNMI, %function
.global HalExcNMI
HalExcNMI:
.fnstart
.cantunwind
MOV R0, #OS_EXC_CAUSE_NMI
MOV R1, #0
B osExcDispatch
.fnend
.type HalExcHardFault, %function
.global HalExcHardFault
HalExcHardFault:
.fnstart
.cantunwind
MOV R0, #OS_EXC_CAUSE_HARDFAULT
LDR R2, =OS_NVIC_HFSR
LDR R2, [R2]
MOV R1, #HF_DEBUGEVT
ORR R0, R0, R1, LSL #0x8
TST R2, #0x80000000
BNE osExcDispatch // DEBUGEVT
AND R0, R0, #0x000000FF
MOV R1, #HF_VECTBL
ORR R0, R0, R1, LSL #0x8
TST R2, #0x00000002
BNE osExcDispatch // VECTBL
//if not DEBUGEVT and VECTBL then is FORCED
AND R0, R0, #0x000000FF
LDR R2, =OS_NVIC_FSR
LDR R2, [R2]
TST R2, #0x8000 // BFARVALID
BNE _HFBusFault // BusFault
TST R2, #0x80 // MMARVALID
BNE _HFMemFault // MemFault
MOV R12, #0
B osHFExcCommonBMU
.fnend
.type _HFBusFault, %function
_HFBusFault:
.fnstart
.cantunwind
LDR R1, =OS_NVIC_BFAR
LDR R1, [R1]
MOV R12, #FLAG_ADDR_VALID
B osHFExcCommonBMU
.fnend
.type _HFMemFault, %function
_HFMemFault:
.fnstart
.cantunwind
LDR R1, =OS_NVIC_MMAR
LDR R1, [R1]
MOV R12, #FLAG_ADDR_VALID
.fnend
.type osHFExcCommonBMU, %function
.global osHFExcCommonBMU
osHFExcCommonBMU:
.fnstart
.cantunwind
CLZ R2, R2
LDR R3, =g_uwExcTbl
ADD R3, R3, R2
LDRB R2, [R3]
ORR R0, R0, R2, LSL #0x8
ORR R0, R0, R12
B osExcDispatch
.fnend
.type HalSVCHandler, %function
.global HalSVCHandler
HalSVCHandler:
.fnstart
.cantunwind
TST LR, #0x4
ITE EQ
MRSEQ R0, MSP
MRSNE R0, PSP
LDR R1, [R0,#24]
LDRB R0, [R1,#-2]
MOV R1, #0
B osExcDispatch
.fnend
.type HalExcBusFault, %function
.global HalExcBusFault
HalExcBusFault:
.fnstart
.cantunwind
LDR R0, =OS_NVIC_FSR
LDR R0, [R0]
TST R0, #0x8000 // BFARVALID
BEQ _ExcBusNoADDR
LDR R1, =OS_NVIC_BFAR
LDR R1, [R1]
MOV R12, #FLAG_ADDR_VALID
AND R0, R0, #0x1F00
B osExcCommonBMU
.fnend
.type _ExcBusNoADDR, %function
.global _ExcBusNoADDR
_ExcBusNoADDR:
.fnstart
.cantunwind
MOV R12, #0
B osExcCommonBMU
.fnend
.type HalExcMemFault, %function
.global HalExcMemFault
HalExcMemFault:
.fnstart
.cantunwind
LDR R0, =OS_NVIC_FSR
LDR R0, [R0]
TST R0, #0x80 // MMARVALID
BEQ _ExcMemNoADDR
LDR R1, =OS_NVIC_MMAR
LDR R1, [R1]
MOV R12, #FLAG_ADDR_VALID
AND R0, R0, #0x1B
B osExcCommonBMU
.fnend
.type _ExcMemNoADDR, %function
.global _ExcMemNoADDR
_ExcMemNoADDR:
.fnstart
.cantunwind
MOV R12, #0
B osExcCommonBMU
.fnend
.type HalExcUsageFault, %function
.global HalExcUsageFault
HalExcUsageFault:
.fnstart
.cantunwind
LDR R0, =OS_NVIC_FSR
LDR R0, [R0]
MOVW R1, #0x031F
LSL R1, R1, #16
AND R0, R0, R1
MOV R12, #0
.fnend
.type osExcCommonBMU, %function
.global osExcCommonBMU
osExcCommonBMU:
.fnstart
.cantunwind
CLZ R0, R0
LDR R3, =g_uwExcTbl
ADD R3, R3, R0
LDRB R0, [R3]
ORR R0, R0, R12
.fnend
// R0 -- EXCCAUSE(bit 16 is 1 if EXCADDR valid), R1 -- EXCADDR
.type osExcDispatch, %function
.global osExcDispatch
osExcDispatch:
.fnstart
.cantunwind
LDR R2, =OS_NVIC_ACT_BASE
MOV R12, #16 // R12 is hwi check loop counter
.fnend
.type _hwiActiveCheck, %function
.global _hwiActiveCheck
_hwiActiveCheck:
.fnstart
.cantunwind
LDR R3, [R2] // R3 store active hwi register when exc
CMP R3, #0
BEQ _hwiActiveCheckNext
// exc occurred in IRQ
ORR R0, R0, #FLAG_HWI_ACTIVE
RBIT R2, R3
CLZ R2, R2
AND R12, R12, #1
ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as pid
.fnend
.type _ExcInMSP, %function
.global _ExcInMSP
_ExcInMSP:
.fnstart
.cantunwind
CMP LR, #0xFFFFFFE9
BNE _NoFloatInMsp
ADD R3, R13, #104
PUSH {R3}
MRS R12, PRIMASK // store message-->exc: disable int?
PUSH {R4-R12} // store message-->exc: {R4-R12}
VPUSH {D8-D15}
B _handleEntry
.fnend
.type _NoFloatInMsp, %function
.global _NoFloatInMsp
_NoFloatInMsp:
.fnstart
.cantunwind
ADD R3, R13, #32
PUSH {R3} // save IRQ SP // store message-->exc: MSP(R13)
MRS R12, PRIMASK // store message-->exc: disable int?
PUSH {R4-R12} // store message-->exc: {R4-R12}
ORR R0, R0, #FLAG_NO_FLOAT
B _handleEntry
.fnend
.type _hwiActiveCheckNext, %function
.global _hwiActiveCheckNext
_hwiActiveCheckNext:
.fnstart
.cantunwind
ADD R2, R2, #4 // next NVIC ACT ADDR
SUBS R12, R12, #1
BNE _hwiActiveCheck
/*NMI interrupt excption*/
LDR R2, =OS_NVIC_SHCSRS
LDRH R2, [R2]
LDR R3, =OS_NVIC_SHCSR_MASK
AND R2, R2, R3
CMP R2, #0
BNE _ExcInMSP
// exc occurred in Task or Init or exc
// reserved for register info from task stack
LDR R2, =g_taskScheduled
LDR R2, [R2]
TST R2, #1 // OS_FLG_BGD_ACTIVE
BEQ _ExcInMSP // if exc occurred in Init then branch
CMP LR, #0xFFFFFFED //auto push floating registers
BNE _NoFloatInPsp
// exc occurred in Task
MOV R2, R13
SUB R13, #96 // add 8 Bytes reg(for STMFD)
MRS R3, PSP
ADD R12, R3, #104
PUSH {R12} // save task SP
MRS R12, PRIMASK
PUSH {R4-R12}
VPUSH {D8-D15}
// copy auto saved task register
LDMFD R3!, {R4-R11} // R4-R11 store PSP reg(auto push when exc in task)
VLDMIA R3!, {D8-D15}
VSTMDB R2!, {D8-D15}
STMFD R2!, {R4-R11}
B _handleEntry
.fnend
.type _NoFloatInPsp, %function
.global _NoFloatInPsp
_NoFloatInPsp:
.fnstart
.cantunwind
MOV R2, R13 // no auto push floating registers
SUB R13, #32 // add 8 Bytes reg(for STMFD)
MRS R3, PSP
ADD R12, R3, #32
PUSH {R12} // save task SP
MRS R12, PRIMASK
PUSH {R4-R12}
LDMFD R3, {R4-R11} // R4-R11 store PSP reg(auto push when exc in task)
STMFD R2!, {R4-R11}
ORR R0, R0, #FLAG_NO_FLOAT
.fnend
.type _handleEntry, %function
.global _handleEntry
_handleEntry:
.fnstart
.cantunwind
MOV R3, R13 // R13:the 4th param
CPSID I
CPSID F
B HalExcHandleEntry
NOP
.fnend

View File

@@ -1,657 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_interrupt.h"
#include <stdarg.h>
#include "securec.h"
#include "los_context.h"
#include "los_arch_interrupt.h"
#include "los_debug.h"
#include "los_hook.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_memory.h"
#include "los_membox.h"
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
#include "los_cpup.h"
#endif
#define DEF_HANDLER_START_INDEX 2
UINT32 g_intCount = 0;
/* *
* @ingroup los_hwi
* Hardware interrupt form mapping handling function array.
*/
STATIC HWI_PROC_FUNC __attribute__((aligned(LOSCFG_ARCH_HWI_VECTOR_ALIGN))) g_hwiForm[OS_VECTOR_CNT] = {0};
#if (LOSCFG_DEBUG_TOOLS == 1)
STATIC UINT32 g_hwiFormCnt[OS_HWI_MAX_NUM] = {0};
STATIC CHAR *g_hwiFormName[OS_HWI_MAX_NUM] = {0};
UINT32 OsGetHwiFormCnt(UINT32 index)
{
return g_hwiFormCnt[index];
}
CHAR *OsGetHwiFormName(UINT32 index)
{
return g_hwiFormName[index];
}
BOOL OsGetHwiCreated(UINT32 index)
{
if (g_hwiForm[index] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
return TRUE;
}
return FALSE;
}
#endif
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
VOID *pParm;
} HWI_HANDLER_FUNC;
/* *
* @ingroup los_hwi
* Hardware interrupt handler form mapping handling function array.
*/
STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
/* *
* @ingroup los_hwi
* Set interrupt vector table.
*/
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
{
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
}
}
#else
/* *
* @ingroup los_hwi
* hardware interrupt handler form mapping handling function array.
*/
STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
/* *
* @ingroup los_hwi
* Set interrupt vector table.
*/
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
{
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
}
}
#endif
WEAK VOID SysTick_Handler(VOID)
{
return;
}
/* ****************************************************************************
Function : HwiNumGet
Description : Get an interrupt number
Input : None
Output : None
Return : Interrupt Indexes number
**************************************************************************** */
STATIC UINT32 HwiNumGet(VOID)
{
return __get_IPSR();
}
STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_EnableIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_DisableIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
if (priority > OS_HWI_PRIO_LOWEST) {
return OS_ERRNO_HWI_PRIO_INVALID;
}
NVIC_SetPriority((IRQn_Type)hwiNum, priority);
return LOS_OK;
}
STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
{
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
return LOS_OK;
}
HwiControllerOps g_archHwiOps = {
.enableIrq = HwiUnmask,
.disableIrq = HwiMask,
.setIrqPriority = HwiSetPriority,
.getCurIrqNum = HwiNumGet,
.triggerIrq = HwiPending,
.clearIrq = HwiClear,
};
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
/* ****************************************************************************
Function : HalHwiDefaultHandler
Description : default handler of the hardware interrupt
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
{
PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
while (1) {}
}
WEAK VOID HalPreInterruptHandler(UINT32 arg)
{
(VOID)arg;
return;
}
WEAK VOID HalAftInterruptHandler(UINT32 arg)
{
(VOID)arg;
return;
}
/* ****************************************************************************
Function : HalInterrupt
Description : Hardware interrupt entry function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
{
UINT32 hwiIndex;
UINT32 intSave;
#if (LOSCFG_KERNEL_RUNSTOP == 1)
SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk);
#endif
intSave = LOS_IntLock();
g_intCount++;
LOS_IntRestore(intSave);
hwiIndex = HwiNumGet();
OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
OsCpupIrqStart(hwiIndex);
#endif
HalPreInterruptHandler(hwiIndex);
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
#else
if (g_hwiHandlerForm[hwiIndex] != 0) {
g_hwiHandlerForm[hwiIndex]();
}
#endif
#if (LOSCFG_DEBUG_TOOLS == 1)
++g_hwiFormCnt[hwiIndex];
#endif
HalAftInterruptHandler(hwiIndex);
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
OsCpupIrqEnd(hwiIndex);
#endif
OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
intSave = LOS_IntLock();
g_intCount--;
LOS_IntRestore(intSave);
}
/* ****************************************************************************
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
hwiMode --- unused
hwiHandler --- hwi handler
irqParam --- param of the hwi handler
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T hwiMode,
HWI_PROC_FUNC hwiHandler,
HwiIrqParam *irqParam)
{
(VOID)hwiMode;
UINT32 intSave;
if (hwiHandler == NULL) {
return OS_ERRNO_HWI_PROC_FUNC_NULL;
}
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
return OS_ERRNO_HWI_ALREADY_CREATED;
}
if (hwiPrio > OS_HWI_PRIO_LOWEST) {
return OS_ERRNO_HWI_PRIO_INVALID;
}
intSave = LOS_IntLock();
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (irqParam != NULL) {
OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
} else {
OsSetVector(hwiNum, hwiHandler, NULL);
}
#else
(VOID)irqParam;
OsSetVector(hwiNum, hwiHandler);
#endif
#if (LOSCFG_DEBUG_TOOLS == 1)
if ((irqParam != NULL) && (irqParam->pName != NULL)) {
g_hwiFormName[hwiNum + OS_SYS_VECTOR_CNT] = (CHAR *)irqParam->pName;
}
g_hwiFormCnt[hwiNum + OS_SYS_VECTOR_CNT] = 0;
#endif
HwiUnmask((IRQn_Type)hwiNum);
HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
LOS_IntRestore(intSave);
return LOS_OK;
}
/* ****************************************************************************
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
irqParam --- param of the hwi handler
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
{
(VOID)irqParam;
UINT32 intSave;
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
HwiMask((IRQn_Type)hwiNum);
intSave = LOS_IntLock();
g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
LOS_IntRestore(intSave);
return LOS_OK;
}
#define FAULT_STATUS_REG_BIT 32
#define USGFAULT (1 << 18)
#define BUSFAULT (1 << 17)
#define MEMFAULT (1 << 16)
#define DIV0FAULT (1 << 4)
#define UNALIGNFAULT (1 << 3)
#define HARDFAULT_IRQN (-13)
ExcInfo g_excInfo = {0};
UINT8 g_uwExcTbl[FAULT_STATUS_REG_BIT] = {
0, 0, 0, 0,
0, 0, OS_EXC_UF_DIVBYZERO, OS_EXC_UF_UNALIGNED,
0, 0, 0, OS_EXC_UF_STKOF,
OS_EXC_UF_NOCP, OS_EXC_UF_INVPC, OS_EXC_UF_INVSTATE, OS_EXC_UF_UNDEFINSTR,
0, 0, OS_EXC_BF_LSPERR, OS_EXC_BF_STKERR,
OS_EXC_BF_UNSTKERR, OS_EXC_BF_IMPRECISERR, OS_EXC_BF_PRECISERR, OS_EXC_BF_IBUSERR,
0, 0, OS_EXC_MF_MLSPERR, OS_EXC_MF_MSTKERR,
OS_EXC_MF_MUNSTKERR, 0, OS_EXC_MF_DACCVIOL, OS_EXC_MF_IACCVIOL
};
#if (LOSCFG_KERNEL_PRINTF != 0)
STATIC VOID OsExcNvicDump(VOID)
{
#define OS_NR_NVIC_EXC_DUMP_TYPES 7
UINT32 *base = NULL;
UINT32 len, i, j;
UINT32 rgNvicBases[OS_NR_NVIC_EXC_DUMP_TYPES] = {
OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
};
UINT32 rgNvicLens[OS_NR_NVIC_EXC_DUMP_TYPES] = {
OS_NVIC_INT_ENABLE_SIZE, OS_NVIC_INT_PEND_SIZE, OS_NVIC_INT_ACT_SIZE,
OS_NVIC_INT_PRI_SIZE, OS_NVIC_EXCPRI_SIZE, OS_NVIC_SHCSR_SIZE,
OS_NVIC_INT_CTRL_SIZE
};
CHAR strRgEnable[] = "enable";
CHAR strRgPending[] = "pending";
CHAR strRgActive[] = "active";
CHAR strRgPriority[] = "priority";
CHAR strRgException[] = "exception";
CHAR strRgShcsr[] = "shcsr";
CHAR strRgIntCtrl[] = "control";
CHAR *strRgs[] = {
strRgEnable, strRgPending, strRgActive, strRgPriority,
strRgException, strRgShcsr, strRgIntCtrl
};
PRINTK("\r\nOS exception NVIC dump:\n");
for (i = 0; i < OS_NR_NVIC_EXC_DUMP_TYPES; i++) {
base = (UINT32 *)rgNvicBases[i];
len = rgNvicLens[i];
PRINTK("interrupt %s register, base address: %p, size: 0x%x\n", strRgs[i], base, len);
len = (len >> 2); /* 2: Gets the next register offset */
for (j = 0; j < len; j++) {
PRINTK("0x%x ", *(base + j));
if ((j != 0) && ((j % 16) == 0)) { /* 16: print wrap line */
PRINTK("\n");
}
}
PRINTK("\n");
}
}
STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
{
CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
PRINTK("Type = %d\n", excInfo->type);
PRINTK("ThrdPid = %d\n", excInfo->thrdPid);
PRINTK("Phase = %s\n", phaseStr[excInfo->phase]);
PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
}
STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
{
PRINTK("Current task info:\n");
if (excInfo->phase == OS_EXC_IN_TASK) {
LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
PRINTK("Task name = %s\n", taskCB->taskName);
PRINTK("Task ID = %d\n", taskCB->taskID);
PRINTK("Task SP = %p\n", taskCB->stackPointer);
PRINTK("Task ST = 0x%x\n", taskCB->topOfStack);
PRINTK("Task SS = 0x%x\n", taskCB->stackSize);
} else if (excInfo->phase == OS_EXC_IN_HWI) {
PRINTK("Exception occur in interrupt phase!\n");
} else {
PRINTK("Exception occur in system init phase!\n");
}
}
STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
{
PRINTK("Exception reg dump:\n");
PRINTK("PC = 0x%x\n", excInfo->context->uwPC);
PRINTK("LR = 0x%x\n", excInfo->context->uwLR);
PRINTK("SP = 0x%x\n", excInfo->context->uwSP);
PRINTK("R0 = 0x%x\n", excInfo->context->uwR0);
PRINTK("R1 = 0x%x\n", excInfo->context->uwR1);
PRINTK("R2 = 0x%x\n", excInfo->context->uwR2);
PRINTK("R3 = 0x%x\n", excInfo->context->uwR3);
PRINTK("R4 = 0x%x\n", excInfo->context->uwR4);
PRINTK("R5 = 0x%x\n", excInfo->context->uwR5);
PRINTK("R6 = 0x%x\n", excInfo->context->uwR6);
PRINTK("R7 = 0x%x\n", excInfo->context->uwR7);
PRINTK("R8 = 0x%x\n", excInfo->context->uwR8);
PRINTK("R9 = 0x%x\n", excInfo->context->uwR9);
PRINTK("R10 = 0x%x\n", excInfo->context->uwR10);
PRINTK("R11 = 0x%x\n", excInfo->context->uwR11);
PRINTK("R12 = 0x%x\n", excInfo->context->uwR12);
PRINTK("PriMask = 0x%x\n", excInfo->context->uwPriMask);
PRINTK("xPSR = 0x%x\n", excInfo->context->uwxPSR);
}
#if (LOSCFG_KERNEL_BACKTRACE == 1)
STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
{
UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
UINT32 index;
OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->uwSP);
PRINTK("----- backtrace start -----\n");
for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
if (LR[index] == 0) {
break;
}
PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
}
PRINTK("----- backtrace end -----\n");
}
#endif
STATIC VOID OsExcMemPoolCheckInfo(VOID)
{
PRINTK("\r\nmemory pools check:\n");
#if (LOSCFG_PLATFORM_EXC == 1)
MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
UINT32 errCnt;
UINT32 i;
(VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
if (errCnt < OS_SYS_MEM_NUM) {
errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
}
if (errCnt == 0) {
PRINTK("all memory pool check passed!\n");
return;
}
for (i = 0; i < errCnt; i++) {
PRINTK("pool num = %d\n", i);
PRINTK("pool type = %d\n", memExcInfo[i].type);
PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr);
PRINTK("pool size = 0x%x\n", memExcInfo[i].size);
PRINTK("pool free = 0x%x\n", memExcInfo[i].free);
PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr);
PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen);
PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
}
#endif
UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
if (ret == LOS_OK) {
PRINTK("system heap memcheck over, all passed!\n");
}
PRINTK("memory pool check end!\n");
}
#endif
STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
{
#if (LOSCFG_KERNEL_PRINTF != 0)
PRINTK("*************Exception Information**************\n");
OsExcTypeInfo(excInfo);
OsExcCurTaskInfo(excInfo);
OsExcRegInfo(excInfo);
#if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(excInfo);
#endif
OsGetAllTskInfo();
OsExcNvicDump();
OsExcMemPoolCheckInfo();
#endif
}
LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr)
{
UINT16 tmpFlag = (excType >> 16) & OS_NULL_SHORT; /* 16: Get Exception Type */
g_intCount++;
g_excInfo.nestCnt++;
g_excInfo.type = excType & OS_NULL_SHORT;
if (tmpFlag & OS_EXC_FLAG_FAULTADDR_VALID) {
g_excInfo.faultAddr = faultAddr;
} else {
g_excInfo.faultAddr = OS_EXC_IMPRECISE_ACCESS_ADDR;
}
if (g_losTask.runTask != NULL) {
if (tmpFlag & OS_EXC_FLAG_IN_HWI) {
g_excInfo.phase = OS_EXC_IN_HWI;
g_excInfo.thrdPid = pid;
} else {
g_excInfo.phase = OS_EXC_IN_TASK;
g_excInfo.thrdPid = g_losTask.runTask->taskID;
}
} else {
g_excInfo.phase = OS_EXC_IN_INIT;
g_excInfo.thrdPid = OS_NULL_INT;
}
if (excType & OS_EXC_FLAG_NO_FLOAT) {
g_excInfo.context = (EXC_CONTEXT_S *)((CHAR *)excBufAddr - LOS_OFF_SET_OF(EXC_CONTEXT_S, uwR4));
} else {
g_excInfo.context = excBufAddr;
}
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
ArchSysExit();
}
/* ****************************************************************************
Function : HalHwiInit
Description : initialization of the hardware interrupt
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
{
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
UINT32 index;
g_hwiForm[0] = 0; /* [0] Top of Stack */
g_hwiForm[1] = 0; /* [1] reset */
for (index = DEF_HANDLER_START_INDEX; index < OS_VECTOR_CNT; index++) {
g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
}
/* Exception handler register */
g_hwiForm[NonMaskableInt_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcNMI;
g_hwiForm[HARDFAULT_IRQN + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcHardFault;
g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcMemFault;
g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcBusFault;
g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcUsageFault;
g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalSVCHandler;
g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalPendSV;
g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)OsTickHandler;
/* Interrupt vector table location */
SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
#endif
#if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
#endif
/* Enable USGFAULT, BUSFAULT, MEMFAULT */
*(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
/* Enable DIV 0 and unaligned exception */
#ifdef LOSCFG_ARCH_UNALIGNED_EXC
*(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
#else
*(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT);
#endif
return;
}

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@@ -1,127 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_timer.h"
#include "los_config.h"
#include "los_tick.h"
#include "los_arch_interrupt.h"
#include "los_debug.h"
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
STATIC UINT64 SysTickCycleGet(UINT32 *period);
STATIC VOID SysTickLock(VOID);
STATIC VOID SysTickUnlock(VOID);
STATIC ArchTickTimer g_archTickTimer = {
.freq = 0,
.irqNum = SysTick_IRQn,
.periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
.init = SysTickStart,
.getCycle = SysTickCycleGet,
.reload = SysTickReload,
.lock = SysTickLock,
.unlock = SysTickUnlock,
.tickHandler = NULL,
};
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
{
UINT32 ret;
ArchTickTimer *tick = &g_archTickTimer;
tick->freq = OS_SYS_CLOCK;
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(tick->irqNum, handler, NULL);
#else
OsSetVector(tick->irqNum, handler);
#endif
#endif
ret = SysTick_Config(LOSCFG_BASE_CORE_TICK_RESPONSE_MAX);
if (ret == 1) {
return LOS_ERRNO_TICK_PER_SEC_TOO_SMALL;
}
return LOS_OK;
}
STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
{
if (nextResponseTime > g_archTickTimer.periodMax) {
nextResponseTime = g_archTickTimer.periodMax;
}
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
NVIC_ClearPendingIRQ(SysTick_IRQn);
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
return nextResponseTime;
}
STATIC UINT64 SysTickCycleGet(UINT32 *period)
{
UINT32 hwCycle = 0;
UINT32 intSave = LOS_IntLock();
UINT32 val = SysTick->VAL;
*period = SysTick->LOAD;
if (val != 0) {
hwCycle = *period - val;
}
LOS_IntRestore(intSave);
return (UINT64)hwCycle;
}
STATIC VOID SysTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
STATIC VOID SysTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
ArchTickTimer *ArchSysTickTimerGet(VOID)
{
return &g_archTickTimer;
}
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
__ISB();
return LOS_OK;
}

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@@ -1,296 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
__asm__ __volatile__("ldrex %0, [%1]\n"
: "=&r"(val)
: "r"(v)
: "cc");
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 status;
do {
__asm__ __volatile__("ldrex %0, [%1]\n"
"strex %0, %2, [%1]\n"
: "=&r"(status)
: "r"(v), "r"(setVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 status;
do {
__asm__ __volatile__("ldrex %1, [%2]\n"
"add %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 status;
do {
__asm__ __volatile__("ldrex %1, [%2]\n"
"sub %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
} while (__builtin_expect(status != 0, 0));
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
__asm__ __volatile__("ldrex %0, [%3]\n"
"strex %1, %4, [%3]"
: "=&r"(prevVal), "=&r"(status), "+m"(*v)
: "r"(v), "r"(val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
__asm__ __volatile__("ldrex %0, %2\n"
"mov %1, #0\n"
"cmp %0, %3\n"
"bne 1f\n"
"strex %1, %4, %2\n"
"1:"
: "=&r"(prevVal), "=&r"(status), "+Q"(*v)
: "r"(oldVal), "r"(val)
: "cc");
} while (__builtin_expect(status != 0, 0));
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_TIMER_H
#define _LOS_ARCH_TIMER_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_TIMER_H */

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@@ -1,237 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_mpu.h"
#include "los_config.h"
#include "los_context.h"
#if (LOSCFG_MPU_ENABLE == 1)
#define SIZE_4G_BYTE 0x100000000
#define MPU_MAX_REGION_NUM 8
STATIC UINT8 g_regionNumBeUsed[MPU_MAX_REGION_NUM] = {0};
typedef enum {
MPU_AP_FORBID_USER_FORBID = 0x0, /* Privileged:No access Unprivileged:No access */
MPU_AP_RW_USER_FORBID = 0x1, /* Privileged:Read/Write Unprivileged:No access */
MPU_AP_RW_USER_RO = 0x2, /* Privileged:Read/Write Unprivileged:Read-only */
MPU_AP_RW_USER_RW = 0x3, /* Privileged:Read/Write Unprivileged:Read/Write */
MPU_AP_NA_USER_NA = 0x4, /* Privileged:UNPREDICTABLE Unprivileged:UNPREDICTABLE */
MPU_AP_RO_USER_FORBID = 0x5, /* Privileged:Read-only Unprivileged:No access */
MPU_AP_RO_USER_RO = 0x6, /* Privileged:Read-only Unprivileged:Read-only */
} MpuApConfig;
VOID ArchMpuEnable(UINT32 defaultRegionEnable)
{
UINT32 intSave = ArchIntLock();
MPU->CTRL = (MPU_CTRL_ENABLE_Msk | ((defaultRegionEnable << MPU_CTRL_PRIVDEFENA_Pos) & MPU_CTRL_PRIVDEFENA_Msk));
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
__DSB();
__ISB();
ArchIntRestore(intSave);
}
VOID ArchMpuDisable(VOID)
{
UINT32 intSave = ArchIntLock();
MPU->CTRL = 0;
__DSB();
__ISB();
ArchIntRestore(intSave);
}
STATIC VOID HalMpuRASRAddMemAttr(MPU_CFG_PARA *para, UINT32 *RASR)
{
BOOL cachable = 0;
BOOL buffable = 0;
switch (para->memType) {
case MPU_MEM_ON_CHIP_ROM:
case MPU_MEM_ON_CHIP_RAM:
cachable = 1;
buffable = 0;
break;
case MPU_MEM_XIP_PSRAM:
cachable = 1;
buffable = 1;
break;
case MPU_MEM_XIP_NOR_FLASH:
cachable = 0;
buffable = 1;
break;
default:
break;
}
(*RASR) |= ((cachable << MPU_RASR_C_Pos) | (buffable << MPU_RASR_B_Pos));
}
STATIC UINT32 HalMpuEncodeSize(UINT64 size)
{
UINT32 encodeSize = 0;
if (size > SIZE_4G_BYTE) {
return 0;
}
if ((size & 0x1F) != 0) { /* size should aligned to 32 byte at least. */
return 0;
}
size = (size >> 2);
while (size != 0) {
if (((size & 1) != 0) && ((size & 0xFFFFFFFE) != 0)) { /* size != 2^x (5 <= x <= 32) 128B - 4GB */
return 0;
}
size = (size >> 1);
encodeSize++;
}
return encodeSize;
}
STATIC UINT32 HalMpuEncodeAP(MpuAccessPermission permission)
{
UINT32 ap;
switch (permission) {
case MPU_RW_BY_PRIVILEGED_ONLY:
ap = MPU_AP_RW_USER_FORBID;
break;
case MPU_RW_ANY:
ap = MPU_AP_RW_USER_RW;
break;
case MPU_RO_BY_PRIVILEGED_ONLY:
ap = MPU_AP_RO_USER_FORBID;
break;
case MPU_RO_ANY:
ap = MPU_AP_RO_USER_RO;
break;
default:
ap = MPU_AP_RW_USER_RW;
break;
}
return ap;
}
STATIC UINT32 HalMpuGetRASR(UINT32 encodeSize, MPU_CFG_PARA *para)
{
UINT32 RASR;
UINT32 ap;
ap = HalMpuEncodeAP(para->permission);
RASR = MPU_RASR_ENABLE_Msk;
RASR |= ((encodeSize << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk);
RASR |= ((ap << MPU_RASR_AP_Pos) & MPU_RASR_AP_Msk) | ((para->executable << MPU_RASR_XN_Pos) & MPU_RASR_XN_Msk) |
((para->shareability << MPU_RASR_S_Pos) & MPU_RASR_S_Msk);
HalMpuRASRAddMemAttr(para, &RASR);
return RASR;
}
UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
{
UINT32 RASR;
UINT32 RBAR;
UINT32 RNR;
UINT32 encodeSize;
UINT32 intSave;
UINT64 size;
if ((regionId >= MPU_MAX_REGION_NUM) || (para == NULL)) {
return LOS_NOK;
}
if ((MPU_TYPE_DREGION_Msk & MPU->TYPE) == 0) {
return LOS_NOK;
}
RNR = regionId;
encodeSize = HalMpuEncodeSize(para->size);
if (encodeSize == 0) {
return LOS_NOK;
}
size = para->size - 1; /* size aligned after encode check */
if ((para->baseAddr & size) != 0) { /* base addr should aligned to region size */
return LOS_NOK;
}
RBAR = para->baseAddr & MPU_RBAR_ADDR_Msk;
RASR = HalMpuGetRASR(encodeSize, para);
intSave = ArchIntLock();
if (g_regionNumBeUsed[regionId]) {
ArchIntRestore(intSave);
return LOS_NOK;
}
MPU->RNR = RNR;
MPU->RBAR = RBAR;
MPU->RASR = RASR;
__DSB();
__ISB();
g_regionNumBeUsed[regionId] = 1; /* Set mpu region used flag */
ArchIntRestore(intSave);
return LOS_OK;
}
UINT32 ArchMpuDisableRegion(UINT32 regionId)
{
volatile UINT32 type;
UINT32 intSave;
if (regionId >= MPU_MAX_REGION_NUM) {
return LOS_NOK;
}
intSave = ArchIntLock();
if (!g_regionNumBeUsed[regionId]) {
ArchIntRestore(intSave);
return LOS_NOK;
}
type = MPU->TYPE;
if ((MPU_TYPE_DREGION_Msk & type) != 0) {
MPU->RNR = regionId;
MPU->RASR = 0;
__DSB();
__ISB();
}
g_regionNumBeUsed[regionId] = 0; /* clear mpu region used flag */
ArchIntRestore(intSave);
return LOS_OK;
}
INT32 ArchMpuUnusedRegionGet(VOID)
{
INT32 id;
UINT32 intSave = ArchIntLock();
for (id = 0; id < MPU_MAX_REGION_NUM; id++) {
if (!g_regionNumBeUsed[id]) {
break;
}
}
ArchIntRestore(intSave);
if (id == MPU_MAX_REGION_NUM) {
return -1;
} else {
return id;
}
}
#endif

View File

@@ -1,296 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
asm volatile("ldrex %0, [%1]\n"
: "=&r"(val)
: "r"(v)
: "cc");
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 status;
do {
asm volatile("ldrex %0, [%1]\n"
"strex %0, %2, [%1]\n"
: "=&r"(status)
: "r"(v), "r"(setVal)
: "cc");
} while (status != 0);
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 status;
do {
asm volatile("ldrex %1, [%2]\n"
"add %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
} while (status != 0);
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 status;
do {
asm volatile("ldrex %1, [%2]\n"
"sub %1, %1, %3\n"
"strex %0, %1, [%2]"
: "=&r"(status), "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
} while (status != 0);
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
asm volatile("ldrex %0, [%2]\n"
"strex %1, %3, [%2]"
: "=&r"(prevVal), "=&r"(status)
: "r"(v), "r"(val)
: "cc");
} while (status != 0);
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
do {
asm volatile("ldrex %0, [%2]\n"
"mov %1, #0\n"
"cmp %0, %3\n"
"bne 1f\n"
"strex %1, %4, [%2]\n"
"1:"
: "=&r"(prevVal), "=&r"(status)
: "r"(v), "r"(oldVal), "r"(val)
: "cc");
} while (status != 0);
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

View File

@@ -1,683 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_INTERRUPT_H
#define _LOS_ARCH_INTERRUPT_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_interrupt.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
/* *
* @ingroup los_arch_interrupt
* Maximum number of used hardware interrupts.
*/
#ifndef OS_HWI_MAX_NUM
#define OS_HWI_MAX_NUM LOSCFG_PLATFORM_HWI_LIMIT
#endif
/* *
* @ingroup los_arch_interrupt
* Highest priority of a hardware interrupt.
*/
#ifndef OS_HWI_PRIO_HIGHEST
#define OS_HWI_PRIO_HIGHEST 0
#endif
/* *
* @ingroup los_arch_interrupt
* Lowest priority of a hardware interrupt.
*/
#ifndef OS_HWI_PRIO_LOWEST
#define OS_HWI_PRIO_LOWEST 7
#endif
/* *
* @ingroup los_arch_interrupt
* Define the type of a hardware interrupt vector table function.
*/
typedef VOID (**HWI_VECTOR_FUNC)(void);
/* *
* @ingroup los_arch_interrupt
* Count of interrupts.
*/
extern UINT32 g_intCount;
/* *
* @ingroup los_arch_interrupt
* Count of M-Core system interrupt vector.
*/
#define OS_SYS_VECTOR_CNT 16
/* *
* @ingroup los_arch_interrupt
* Count of M-Core interrupt vector.
*/
#define OS_VECTOR_CNT (OS_SYS_VECTOR_CNT + OS_HWI_MAX_NUM)
/* *
* @ingroup los_arch_interrupt
* AIRCR register priority group parameter .
*/
#define OS_NVIC_AIRCR_PRIGROUP 7
/* *
* @ingroup los_arch_interrupt
* Boot interrupt vector table.
*/
extern UINT32 _BootVectors[];
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt number.
*
* Value: 0x02000900
*
* Solution: Ensure that the interrupt number is valid.
* The value range of the interrupt number applicable for a Cortex-M7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
*/
#define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Null hardware interrupt handling function.
*
* Value: 0x02000901
*
* Solution: Pass in a valid non-null hardware interrupt handling function.
*/
#define OS_ERRNO_HWI_PROC_FUNC_NULL LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x01)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Insufficient interrupt resources for hardware interrupt creation.
*
* Value: 0x02000902
*
* Solution: Increase the configured maximum number of supported hardware interrupts.
*/
#define OS_ERRNO_HWI_CB_UNAVAILABLE LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x02)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Insufficient memory for hardware interrupt initialization.
*
* Value: 0x02000903
*
* Solution: Expand the configured memory.
*/
#define OS_ERRNO_HWI_NO_MEMORY LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x03)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: The interrupt has already been created.
*
* Value: 0x02000904
*
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
*/
#define OS_ERRNO_HWI_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x04)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt priority.
*
* Value: 0x02000905
*
* Solution: Ensure that the interrupt priority is valid.
* The value range of the interrupt priority applicable for a Cortex-M7 platform is [0,15].
*/
#define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Incorrect interrupt creation mode.
*
* Value: 0x02000906
*
* Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
* OS_HWI_MODE_FAST of which the value can be 0 or 1.
*/
#define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: The interrupt has already been created as a fast interrupt.
*
* Value: 0x02000907
*
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
*/
#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07)
/* *
* @ingroup los_arch_interrupt
* SysTick control and status register.
*/
#define OS_SYSTICK_CONTROL_REG 0xE000E010
/* *
* @ingroup los_hw
* SysTick current value register.
*/
#define OS_SYSTICK_CURRENT_REG 0xE000E018
/* *
* @ingroup los_arch_interrupt
* Interrupt Priority-Level Registers.
*/
#define OS_NVIC_PRI_BASE 0xE000E400
/* *
* @ingroup los_arch_interrupt
* Interrupt enable register for 0-31.
*/
#define OS_NVIC_SETENA_BASE 0xE000E100
/* *
* @ingroup los_arch_interrupt
* interrupt pending register.
*/
#define OS_NVIC_SETPEND_BASE 0xE000E200
/* *
* @ingroup los_arch_interrupt
* Interrupt active register.
*/
#define OS_NVIC_INT_ACT_BASE 0xE000E300
/* *
* @ingroup los_arch_interrupt
* Interrupt disable register for 0-31.
*/
#define OS_NVIC_CLRENA_BASE 0xE000E180
/* *
* @ingroup los_arch_interrupt
* Interrupt control and status register.
*/
#define OS_NVIC_INT_CTRL 0xE000ED04
/* *
* @ingroup los_arch_interrupt
* Vector table offset register.
*/
#define OS_NVIC_VTOR 0xE000ED08
/* *
* @ingroup los_arch_interrupt
* Application interrupt and reset control register
*/
#define OS_NVIC_AIRCR 0xE000ED0C
/* *
* @ingroup los_arch_interrupt
* System exception priority register.
*/
#define OS_NVIC_EXCPRI_BASE 0xE000ED18
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 1 :reset.
*/
#define OS_EXC_RESET 1
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 2 :Non-Maskable Interrupt.
*/
#define OS_EXC_NMI 2
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 3 :(hard)fault.
*/
#define OS_EXC_HARD_FAULT 3
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 4 :MemManage fault.
*/
#define OS_EXC_MPU_FAULT 4
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 5 :Bus fault.
*/
#define OS_EXC_BUS_FAULT 5
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 6 :Usage fault.
*/
#define OS_EXC_USAGE_FAULT 6
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 11 :SVCall.
*/
#define OS_EXC_SVC_CALL 11
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 12 :Debug monitor.
*/
#define OS_EXC_DBG_MONITOR 12
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 14 :PendSV.
*/
#define OS_EXC_PEND_SV 14
/* *
* @ingroup los_arch_interrupt
* Interrupt No. 15 :SysTick.
*/
#define OS_EXC_SYS_TICK 15
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
*/
extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg);
#else
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
*/
extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
#endif
/* *
* @ingroup los_arch_interrupt
* @brief: Hardware interrupt entry function.
*
* @par Description:
* This API is used as all hardware interrupt handling function entry.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID HalInterrupt(VOID);
/* *
* @ingroup los_arch_interrupt
* @brief: Default vector handling function.
*
* @par Description:
* This API is used to configure interrupt for null function.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID HalHwiDefaultHandler(VOID);
/* *
* @ingroup los_arch_interrupt
* @brief: Reset the vector table.
*
* @par Description:
* This API is used to reset the vector table.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID Reset_Handler(VOID);
/* *
* @ingroup los_arch_interrupt
* @brief: Pended System Call.
*
* @par Description:
* PendSV can be pended and is useful for an OS to pend an exception
* so that an action can be performed after other important tasks are completed.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID HalPendSV(VOID);
#define OS_EXC_IN_INIT 0
#define OS_EXC_IN_TASK 1
#define OS_EXC_IN_HWI 2
#define OS_EXC_MAX_BUF_LEN 25
#define OS_EXC_MAX_NEST_DEPTH 1
#define OS_NVIC_SHCSR 0xE000ED24
#define OS_NVIC_CCR 0xE000ED14
#define OS_NVIC_INT_ENABLE_SIZE 0x20
#define OS_NVIC_INT_PRI_SIZE 0xF0
#define OS_NVIC_EXCPRI_SIZE 0xC
#define OS_NVIC_INT_CTRL_SIZE 4
#define OS_NVIC_SHCSR_SIZE 4
#define OS_NVIC_INT_PEND_SIZE OS_NVIC_INT_ACT_SIZE
#define OS_NVIC_INT_ACT_SIZE OS_NVIC_INT_ENABLE_SIZE
#define OS_EXC_FLAG_NO_FLOAT 0x10000000
#define OS_EXC_FLAG_FAULTADDR_VALID 0x01
#define OS_EXC_FLAG_IN_HWI 0x02
#define OS_EXC_IMPRECISE_ACCESS_ADDR 0xABABABAB
#define OS_EXC_EVENT 0x00000001
/**
* @ingroup los_exc
* the struct of register files
*
* description: the register files that saved when exception triggered
*
* notes:the following register with prefix 'uw' correspond to the registers in the cpu data sheet.
*/
typedef struct TagExcContext {
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
UINT32 S16;
UINT32 S17;
UINT32 S18;
UINT32 S19;
UINT32 S20;
UINT32 S21;
UINT32 S22;
UINT32 S23;
UINT32 S24;
UINT32 S25;
UINT32 S26;
UINT32 S27;
UINT32 S28;
UINT32 S29;
UINT32 S30;
UINT32 S31;
#endif
UINT32 uwR4;
UINT32 uwR5;
UINT32 uwR6;
UINT32 uwR7;
UINT32 uwR8;
UINT32 uwR9;
UINT32 uwR10;
UINT32 uwR11;
UINT32 uwPriMask;
/* auto save */
UINT32 uwSP;
UINT32 uwR0;
UINT32 uwR1;
UINT32 uwR2;
UINT32 uwR3;
UINT32 uwR12;
UINT32 uwLR;
UINT32 uwPC;
UINT32 uwxPSR;
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED) && (__FPU_USED== 1U)))
UINT32 S0;
UINT32 S1;
UINT32 S2;
UINT32 S3;
UINT32 S4;
UINT32 S5;
UINT32 S6;
UINT32 S7;
UINT32 S8;
UINT32 S9;
UINT32 S10;
UINT32 S11;
UINT32 S12;
UINT32 S13;
UINT32 S14;
UINT32 S15;
UINT32 FPSCR;
UINT32 NO_NAME;
#endif
} EXC_CONTEXT_S;
typedef VOID (*EXC_PROC_FUNC)(UINT32, EXC_CONTEXT_S *);
VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr);
VOID HalExcNMI(VOID);
VOID HalExcHardFault(VOID);
VOID HalExcMemFault(VOID);
VOID HalExcBusFault(VOID);
VOID HalExcUsageFault(VOID);
VOID HalExcSvcCall(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
*/
#define OS_EXC_BF_STKERR 1
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was out of the stack.
*/
#define OS_EXC_BF_UNSTKERR 2
/**
* @ingroup los_exc
* Cortex-M exception types: Bus status register imprecise data access violation.
*/
#define OS_EXC_BF_IMPRECISERR 3
/**
* @ingroup los_exc
* Cortex-M exception types: Bus status register exact data access violation.
*/
#define OS_EXC_BF_PRECISERR 4
/**
* @ingroup los_exc
* Cortex-M exception types: Bus status register access violation while pointing.
*/
#define OS_EXC_BF_IBUSERR 5
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the memory management status register was being pushed.
*/
#define OS_EXC_MF_MSTKERR 6
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the memory management status register was out of the stack.
*/
#define OS_EXC_MF_MUNSTKERR 7
/**
* @ingroup los_exc
* Cortex-M exception types: Memory management status register data access violation.
*/
#define OS_EXC_MF_DACCVIOL 8
/**
* @ingroup los_exc
* Cortex-M exception types: Memory management status register access violation.
*/
#define OS_EXC_MF_IACCVIOL 9
/**
* @ingroup los_exc
* Cortex-M exception types: Incorrect usage indicating that the divisor is zero during the division operation.
*/
#define OS_EXC_UF_DIVBYZERO 10
/**
* @ingroup los_exc
* Cortex-M exception types: Usage error, error caused by unaligned access.
*/
#define OS_EXC_UF_UNALIGNED 11
/**
* @ingroup los_exc
* Cortex-M exception types: Incorrect usage attempting to execute coprocessor related instruction.
*/
#define OS_EXC_UF_NOCP 12
/**
* @ingroup los_exc
* Cortex-M exception types: Usage error attempting to load EXC_RETURN to PC illegally on exception return.
*/
#define OS_EXC_UF_INVPC 13
/**
* @ingroup los_exc
* Cortex-M exception types: Incorrect usage, attempting to cut to ARM state.
*/
#define OS_EXC_UF_INVSTATE 14
/**
* @ingroup los_exc
* Cortex-M exception types: Incorrect usage. Executed instruction whose code is undefined.
*/
#define OS_EXC_UF_UNDEFINSTR 15
/**
* @ingroup los_exc
* Cortex-M exception types: NMI
*/
#define OS_EXC_CAUSE_NMI 16
/**
* @ingroup los_exc
* Cortex-M exception types: hard fault
*/
#define OS_EXC_CAUSE_HARDFAULT 17
/**
* @ingroup los_exc
* Cortex-M exception types: The task handler exits.
*/
#define OS_EXC_CAUSE_TASK_EXIT 18
/**
* @ingroup los_exc
* Cortex-M exception types: A fatal error.
*/
#define OS_EXC_CAUSE_FATAL_ERR 19
/**
* @ingroup los_exc
* Cortex-M exception types: Hard Fault caused by a debug event.
*/
#define OS_EXC_CAUSE_DEBUGEVT 20
/**
* @ingroup los_exc
* Cortex-M exception types: A hard fault that occurs when a quantity is oriented.
*/
#define OS_EXC_CAUSE_VECTBL 21
/**
* @ingroup los_exc
* Exception information structure
*
* Description: Exception information saved when an exception is triggered on the Cortex-M7 platform.
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
/**< Hardware context at the time an exception to the automatic stack floating-point register occurs */
EXC_CONTEXT_S *context;
} ExcInfo;
extern UINT32 g_curNestCount;
extern UINT32 g_intCount;
extern UINT8 g_uwExcTbl[32];
extern ExcInfo g_excInfo;
#define MAX_INT_INFO_SIZE (8 + 0x164)
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_INTERRUPT_H */

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@@ -1,51 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_TIMER_H
#define _LOS_ARCH_TIMER_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_TIMER_H */

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@@ -1,56 +0,0 @@
/*
* Copyright (c) 2021-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _ARCH_ELF_H
#define _ARCH_ELF_H
#include "elf.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#define check_arch(ehdr) ((ehdr)->e_machine == EM_ARM)
#define R_ARCH_NONE R_ARM_NONE
#define R_ARCH_GLOB_DAT R_ARM_GLOB_DAT
#define R_ARCH_JUMP_SLOT R_ARM_JUMP_SLOT
#define R_ARCH_ABS32 R_ARM_ABS32
#define R_ARCH_RELATIVE R_ARM_RELATIVE
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _ARCH_ELF_H */

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@@ -1,34 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_group("csky") {
modules = [ "v2/gcc" ]
}

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@@ -1,46 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_name = "arch"
kernel_module(module_name) {
sources = [
"los_context.c",
"los_dispatch.S",
"los_exc.S",
"los_interrupt.c",
"los_timer.c",
]
configs += [ "$LITEOSTOPDIR:warn_config" ]
}
config("public") {
include_dirs = [ "." ]
}

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@@ -1,300 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("ldw %0, (%1)\n"
: "=&r"(val)
: "r"(v)
: "cc");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("stw %1, (%0, 0)"
:
: "r"(v), "r"(setVal)
: "cc");
LOS_IntRestore(intSave);
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("ldw %0, (%1)\n"
"add %0, %0, %2\n"
"stw %0, (%1, 0)"
: "=&r"(val)
: "r"(v), "r"(addVal)
: "cc");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("ldw %0, (%1)\n"
"sub %0, %2\n"
"stw %0, (%1, 0)"
: "=&r"(val)
: "r"(v), "r"(subVal)
: "cc");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("ldw %0, (%1)\n"
"stw %2, (%1)"
: "=&r"(prevVal)
: "r"(v), "r"(val)
: "cc");
LOS_IntRestore(intSave);
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("ldw %0, (%1)\n"
"cmpne %0, %2\n"
"bt 1f\n"
"stw %3, (%1)\n"
"1:"
: "=&r"(prevVal)
: "r"(v), "r"(oldVal), "r"(val)
: "cc");
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,372 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_INTERRUPT_H
#define _LOS_ARCH_INTERRUPT_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_interrupt.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
/* *
* @ingroup los_arch_interrupt
* Maximum number of used hardware interrupts.
*/
#ifndef OS_HWI_MAX_NUM
#define OS_HWI_MAX_NUM LOSCFG_PLATFORM_HWI_LIMIT
#endif
/* *
* @ingroup los_arch_interrupt
* Highest priority of a hardware interrupt.
*/
#ifndef OS_HWI_PRIO_HIGHEST
#define OS_HWI_PRIO_HIGHEST 0
#endif
/* *
* @ingroup los_arch_interrupt
* Lowest priority of a hardware interrupt.
*/
#ifndef OS_HWI_PRIO_LOWEST
#define OS_HWI_PRIO_LOWEST 3
#endif
/* *
* @ingroup los_arch_interrupt
* Check the interrupt priority.
*/
#define HWI_PRI_VALID(pri) (((pri) >= OS_HWI_PRIO_HIGHEST) && ((pri) <= OS_HWI_PRIO_LOWEST))
/* *
* @ingroup los_arch_interrupt
* Define the type of a hardware interrupt vector table function.
*/
typedef VOID (**HWI_VECTOR_FUNC)(VOID);
/* *
* @ingroup los_arch_interrupt
* Count of interrupts.
*/
extern volatile UINT32 g_intCount;
/* *
* @ingroup los_arch_interrupt
* Count of C-sky system interrupt vector.
*/
#define OS_SYS_VECTOR_CNT 32
/* *
* @ingroup los_arch_interrupt
* Count of C-sky interrupt vector.
*/
#define OS_VECTOR_CNT (OS_SYS_VECTOR_CNT + OS_HWI_MAX_NUM)
#define PSR_VEC_OFFSET 16U
#define VIC_REG_BASE 0xE000E100UL
typedef struct {
UINT32 ISER[4U];
UINT32 RESERVED0[12U];
UINT32 IWER[4U];
UINT32 RESERVED1[12U];
UINT32 ICER[4U];
UINT32 RESERVED2[12U];
UINT32 IWDR[4U];
UINT32 RESERVED3[12U];
UINT32 ISPR[4U];
UINT32 RESERVED4[12U];
UINT32 ISSR[4U];
UINT32 RESERVED5[12U];
UINT32 ICPR[4U];
UINT32 RESERVED6[12U];
UINT32 ICSR[4U];
UINT32 RESERVED7[12U];
UINT32 IABR[4U];
UINT32 RESERVED8[60U];
UINT32 IPR[32U];
UINT32 RESERVED9[480U];
UINT32 ISR;
UINT32 IPTR;
UINT32 TSPEND;
UINT32 TSABR;
UINT32 TSPR;
} VIC_TYPE;
extern VIC_TYPE *VIC_REG;
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt number.
*
* Value: 0x02000900
*
* Solution: Ensure that the interrupt number is valid.
*/
#define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Null hardware interrupt handling function.
*
* Value: 0x02000901
*
* Solution: Pass in a valid non-null hardware interrupt handling function.
*/
#define OS_ERRNO_HWI_PROC_FUNC_NULL LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x01)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Insufficient interrupt resources for hardware interrupt creation.
*
* Value: 0x02000902
*
* Solution: Increase the configured maximum number of supported hardware interrupts.
*/
#define OS_ERRNO_HWI_CB_UNAVAILABLE LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x02)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Insufficient memory for hardware interrupt initialization.
*
* Value: 0x02000903
*
* Solution: Expand the configured memory.
*/
#define OS_ERRNO_HWI_NO_MEMORY LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x03)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: The interrupt has already been created.
*
* Value: 0x02000904
*
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
*/
#define OS_ERRNO_HWI_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x04)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt priority.
*
* Value: 0x02000905
*
* Solution: Ensure that the interrupt priority is valid.
*/
#define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Incorrect interrupt creation mode.
*
* Value: 0x02000906
*
* Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST.
*/
#define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: The interrupt has already been created as a fast interrupt.
*
* Value: 0x02000907
*
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
*/
#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt number.
*
* Value: 0x02000900
*
* Solution: Ensure that the interrupt number is valid.
*/
#define LOS_ERRNO_HWI_NUM_INVALID OS_ERRNO_HWI_NUM_INVALID
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
*/
extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg);
#else
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
*/
extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
#endif
/* *
* @ingroup los_arch_interrupt
* @brief: Hardware interrupt entry function.
*
* @par Description:
* This API is used as all hardware interrupt handling function entry.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID HalInterrupt(VOID);
/* *
* @ingroup los_arch_interrupt
* @brief: Default vector handling function.
*
* @par Description:
* This API is used to configure interrupt for null function.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param:None.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID HalHwiDefaultHandler(VOID);
#define OS_EXC_IN_INIT 0
#define OS_EXC_IN_TASK 1
#define OS_EXC_IN_HWI 2
#define OS_VIC_INT_ENABLE_SIZE 0x4
#define OS_VIC_INT_WAKER_SIZE 0x4
#define OS_VIC_INT_ICER_SIZE 0x4
#define OS_VIC_INT_ISPR_SIZE 0x4
#define OS_VIC_INT_IABR_SIZE 0x4
#define OS_VIC_INT_IPR_SIZE 0x4
#define OS_VIC_INT_ISR_SIZE 0x4
#define OS_VIC_INT_IPTR_SIZE 0x4
#define OS_EXC_FLAG_FAULTADDR_VALID 0x01
#define OS_EXC_IMPRECISE_ACCESS_ADDR 0xABABABAB
/**
* @ingroup los_exc
* the struct of register files
*
* description: the register files that saved when exception triggered
*
* notes:the following register with prefix 'uw' correspond to the registers in the cpu data sheet.
*/
typedef struct TagExcContext {
UINT32 R0;
UINT32 R1;
UINT32 R2;
UINT32 R3;
UINT32 R4;
UINT32 R5;
UINT32 R6;
UINT32 R7;
UINT32 R8;
UINT32 R9;
UINT32 R10;
UINT32 R11;
UINT32 R12;
UINT32 R13;
UINT32 R14;
UINT32 R15;
UINT32 EPSR;
UINT32 EPC;
} EXC_CONTEXT_S;
/* *
* @ingroup los_arch_interrupt
* @brief: Exception handler function.
*
* @par Description:
* This API is used to handle Exception.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param excBufAddr [IN] The address of stack pointer at which the error occurred.
* @param faultAddr [IN] The address at which the error occurred.
*
* @retval:None.
* @par Dependency:
* <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(EXC_CONTEXT_S *excBufAddr, UINT32 faultAddr);
VOID IrqEntry(VOID);
VOID HandleEntry(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Exception information structure
*
* Description: Exception information saved when an exception is triggered on the Csky platform.
*
*/
typedef struct TagExcInfo {
UINT16 phase;
UINT16 type;
UINT32 faultAddr;
UINT32 thrdPid;
UINT16 nestCnt;
UINT16 reserved;
EXC_CONTEXT_S *context;
} ExcInfo;
extern ExcInfo g_excInfo;
#define MAX_INT_INFO_SIZE (8 + 0x164)
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_INTERRUPT_H */

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@@ -1,51 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_TIMER_H
#define _LOS_ARCH_TIMER_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_TIMER_H */

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@@ -1,165 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_context.h"
#include "securec.h"
#include "los_arch_context.h"
#include "los_arch_interrupt.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_debug.h"
#ifndef CPU_CK804
STATIC UINT32 g_sysNeedSched = FALSE;
#endif
/* ****************************************************************************
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
HalHwiInit();
}
/* ****************************************************************************
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
}
}
/* ****************************************************************************
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
topStack --- Top of task's stack
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
context->R0 = taskID;
context->R1 = 0x01010101L;
context->R2 = 0x02020202L;
context->R3 = 0x03030303L;
context->R4 = 0x04040404L;
context->R5 = 0x05050505L;
context->R6 = 0x06060606L;
context->R7 = 0x07070707L;
context->R8 = 0x08080808L;
context->R9 = 0x09090909L;
context->R10 = 0x10101010L;
context->R11 = 0x11111111L;
context->R12 = 0x12121212L;
context->R13 = 0x13131313L;
#ifdef CPU_CK804
context->R15 = (UINT32)ArchSysExit;
context->R16 = 0x16161616L;
context->R17 = 0x17171717L;
context->R18 = 0x18181818L;
context->R19 = 0x19191919L;
context->R20 = 0x20202020L;
context->R21 = 0x21212121L;
context->R22 = 0x22222222L;
context->R23 = 0x23232323L;
context->R24 = 0x24242424L;
context->R25 = 0x25252525L;
context->R26 = 0x26262626L;
context->R27 = 0x27272727L;
context->R28 = 0x28282828L;
context->R29 = 0x29292929L;
context->R30 = 0x30303030L;
context->R31 = 0x31313131L;
context->EPSR = 0x80000340L;
#else
context->R15 = (UINT32)ArchSysExit;
context->EPSR = 0xe0000144L;
#endif
context->EPC = (UINT32)OsTaskEntry;
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
HalStartToRun();
return LOS_OK; /* never return */
}
#ifndef CPU_CK804
VOID HalIrqEndCheckNeedSched(VOID)
{
if (g_sysNeedSched && g_taskScheduled && LOS_CHECK_SCHEDULE) {
ArchTaskSchedule();
}
}
VOID ArchTaskSchedule(VOID)
{
UINT32 intSave;
if (OS_INT_ACTIVE) {
g_sysNeedSched = TRUE;
return;
}
intSave = LOS_IntLock();
g_sysNeedSched = FALSE;
BOOL isSwitch = OsSchedTaskSwitch();
if (isSwitch) {
HalTaskContextSwitch();
}
LOS_IntRestore(intSave);
return;
}
#else
VOID ArchTaskSchedule(VOID)
{
HalTaskContextSwitch();
}
#endif

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@@ -1,173 +0,0 @@
/*
* Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#define OS_TASK_STATUS_RUNNING 0x0010
#define VIC_TSPDR 0XE000EC08
#ifdef CPU_CK804
.section .text
.align 2
.type HalStartToRun, %function
.global HalStartToRun
HalStartToRun:
lrw r1, g_losTask
lrw r2, g_losTask + 4
ldw r0, (r2)
st.w r0, (r1)
st.w r0, (r2)
ldw sp, (r0)
ldw r0, (sp, 128)
mtcr r0, epc
ldw r0, (sp, 124)
mtcr r0, epsr
ldw r15, (sp, 56)
ldm r0-r13, (sp)
addi sp, 60
ldm r16-r31, (sp)
addi sp, 72
rte
.align 2
.type HalTaskContextSwitch, %function
.global HalTaskContextSwitch
HalTaskContextSwitch:
lrw r0, VIC_TSPDR
bgeni r1, 0
stw r1, (r0)
nop
nop
nop
rts
.align 2
.type tspend_handler, %function
.global tspend_handler
tspend_handler:
subi sp, 132
stm r0-r13, (sp)
stw r15, (sp, 56)
addi r0, sp, 60
stm r16-r31, (r0)
mfcr r1, epsr
stw r1, (sp, 124)
mfcr r1, epc
stw r1, (sp, 128)
jbsr OsSchedTaskSwitch
bez r0, ret_con
lrw r2, g_losTask
ldw r0, (r2)
stw sp, (r0)
lrw r3, g_losTask + 4
ldw r0, (r3)
stw r0, (r2)
ldw sp, (r0)
ret_con:
ldw r0, (sp, 128)
mtcr r0, epc
ldw r0, (sp, 124)
mtcr r0, epsr
ldw r15, (sp, 56)
ldm r0-r13, (sp)
addi sp, 60
ldm r16-r31, (sp)
addi sp, 72
rte
#else
.section .text
.align 2
.type HalStartToRun, %function
.global HalStartToRun
HalStartToRun:
lrw r1, g_losTask
lrw r2, g_losTask + 4
ldw r0, (r2)
st.w r0, (r1)
st.w r0, (r2)
ldw sp, (r0)
ldw r0, (sp, 64)
mtcr r0, epc
ldw r0, (sp, 60)
mtcr r0, epsr
ldw r15, (sp, 56)
ldm r0-r13, (sp)
rte
.align 2
.type HalTaskContextSwitch, %function
.global HalTaskContextSwitch
HalTaskContextSwitch:
subi sp, 68
stm r0-r13, (sp)
stw r15, (sp, 56)
mfcr r1, psr
stw r1, (sp, 60)
stw r15, (sp, 64)
lrw r2, g_losTask
ldw r0, (r2)
stw sp, (r0)
lrw r3, g_losTask + 4
ldw r0, (r3)
stw r0, (r2)
ldw sp, (r0)
ldw r0, (sp, 64)
mtcr r0, epc
ldw r0, (sp, 60)
mtcr r0, epsr
ldw r15, (sp, 56)
ldm r0-r13, (sp)
addi sp, 68
rte
#endif

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@@ -1,129 +0,0 @@
/*
* Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.import HalExcHandleEntry
.extern g_trapStackBase
#ifdef CPU_CK804
.section .text
.align 2
.global HandleEntry
HandleEntry:
mov r10, sp
lrw r14, g_trapStackBase
stm r0-r15, (sp)
stw r10, (sp, 56)
addi r0, sp, 64
stm r16-r31, (r0)
mfcr r0, epsr
stw r0, (sp, 128)
mfcr r0, epc
stw r0, (sp, 132)
mov r0, sp
mfcr r1, epc
mov sp, r10
lrw r2, HalExcHandleEntry
jmp r2
.section .text
.align 2
.global IrqEntry
IrqEntry:
psrset ee
subi sp, 136
stm r0-r15, (sp)
addi r0, sp, 64
stm r16-r31, (r0)
mfcr r0, epsr
stw r0, (sp, 128)
mfcr r0, epc
stw r0, (sp, 132)
jbsr HalInterrupt
ldw r0, (sp, 132)
mtcr r0, epc
ldw r0, (sp, 128)
bseti r0, r0, 6
mtcr r0, epsr
ldm r0-r15, (sp)
addi sp, 64
ldm r16-r31, (sp)
addi sp, 72
rte
#else
.section .text
.align 2
.global HandleEntry
HandleEntry:
mov r10, sp
lrw r14, g_trapStackBase
stm r0-r15, (sp)
stw r10, (sp, 56)
mfcr r0, epsr
stw r0, (sp, 64)
mfcr r0, epc
stw r0, (sp, 68)
mov r0, sp
mfcr r1, epc
mov sp, r10
lrw r2, HalExcHandleEntry
jmp r2
.section .text
.align 2
.global IrqEntry
IrqEntry:
psrset ee
subi sp, 72
stm r0-r15, (sp)
mfcr r0, epsr
stw r0, (sp, 64)
mfcr r0, epc
stw r0, (sp, 68)
jbsr HalInterrupt
ldw r0, (sp, 68)
mtcr r0, epc
ldw r0, (sp, 64)
bseti r0, r0, 6
mtcr r0, epsr
ldm r0-r15, (sp)
addi sp, 72
rte
#endif

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@@ -1,621 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_interrupt.h"
#include <stdarg.h>
#include "securec.h"
#include "los_context.h"
#include "los_arch_context.h"
#include "los_arch_interrupt.h"
#include "los_debug.h"
#include "los_hook.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_memory.h"
#include "los_membox.h"
#define INT_OFFSET 6
#define PRI_OFF_PER_INT 8
#define PRI_PER_REG 4
#define PRI_OFF_IN_REG 6
#define PRI_BITS 2
#define PRI_HI 0
#define PRI_LOW 7
#define MASK_8_BITS 0xFF
#define MASK_32_BITS 0xFFFFFFFF
#define BYTES_OF_128_INT 4
#define OS_USER_HWI_MIN 0
#define OS_USER_HWI_MAX (LOSCFG_PLATFORM_HWI_LIMIT - 1)
#define HWI_ALIGNSIZE 0x400
UINT32 volatile g_intCount = 0;
CHAR g_trapStackBase[OS_TRAP_STACK_SIZE];
VIC_TYPE *VIC_REG = (VIC_TYPE *)VIC_REG_BASE;
UINT32 HwiNumValid(UINT32 num)
{
return ((num) >= OS_USER_HWI_MIN) && ((num) <= OS_USER_HWI_MAX);
}
UINT32 HalGetPsr(VOID)
{
UINT32 intSave;
__asm__ volatile("mfcr %0, psr" : "=r" (intSave) : : "memory");
return intSave;
}
UINT32 HalSetVbr(UINT32 intSave)
{
__asm__ volatile("mtcr %0, vbr" : : "r"(intSave) : "memory");
return intSave;
}
UINT32 ArchIntLock(VOID)
{
UINT32 intSave;
__asm__ __volatile__(
"mfcr %0, psr \n"
"psrclr ie"
: "=r"(intSave)
:
: "memory");
return intSave;
}
UINT32 ArchIntUnLock(VOID)
{
UINT32 intSave;
__asm__ __volatile__(
"mfcr %0, psr \n"
"psrset ie"
: "=r"(intSave)
:
: "memory");
return intSave;
}
VOID ArchIntRestore(UINT32 intSave)
{
__asm__ __volatile__("mtcr %0, psr" : : "r"(intSave));
}
UINT32 ArchIntLocked(VOID)
{
UINT32 intSave;
__asm__ volatile("mfcr %0, psr" : "=r" (intSave) : : "memory");
return !(intSave & (1 << INT_OFFSET));
}
STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
if (!HwiNumValid(hwiNum)) {
return LOS_ERRNO_HWI_NUM_INVALID;
}
intSave = LOS_IntLock();
VIC_REG->ISER[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
VIC_REG->ISSR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
LOS_IntRestore(intSave);
return LOS_OK;
}
STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
{
UINT32 intSave;
if (!HwiNumValid(hwiNum)) {
return LOS_ERRNO_HWI_NUM_INVALID;
}
if (!HWI_PRI_VALID(priority)) {
return OS_ERRNO_HWI_PRIO_INVALID;
}
intSave = LOS_IntLock();
VIC_REG->IPR[hwiNum / PRI_PER_REG] |= (((priority << PRI_OFF_IN_REG) << (hwiNum % PRI_PER_REG)) * PRI_OFF_PER_INT);
LOS_IntRestore(intSave);
return LOS_OK;
}
STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
if (!HwiNumValid(hwiNum)) {
return LOS_ERRNO_HWI_NUM_INVALID;
}
intSave = LOS_IntLock();
VIC_REG->ICER[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
LOS_IntRestore(intSave);
return LOS_OK;
}
STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
if (!HwiNumValid(hwiNum)) {
return LOS_ERRNO_HWI_NUM_INVALID;
}
intSave = LOS_IntLock();
VIC_REG->ISPR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
LOS_IntRestore(intSave);
return LOS_OK;
}
STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
{
if (!HwiNumValid(hwiNum)) {
return LOS_ERRNO_HWI_NUM_INVALID;
}
VIC_REG->ICPR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
return LOS_OK;
}
/* *
* @ingroup los_hwi
* Hardware interrupt form mapping handling function array.
*/
STATIC HWI_PROC_FUNC __attribute__((aligned(HWI_ALIGNSIZE))) g_hwiForm[OS_VECTOR_CNT] = {0};
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
VOID *pParm;
} HWI_HANDLER_FUNC;
/* *
* @ingroup los_hwi
* Hardware interrupt handler form mapping handling function array.
*/
STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
/* *
* @ingroup los_hwi
* Set interrupt vector table.
*/
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
{
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)IrqEntry;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
HwiUnmask(num);
}
}
#else
/* *
* @ingroup los_hwi
* Hardware interrupt handler form mapping handling function array.
*/
STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
/* *
* @ingroup los_hwi
* Set interrupt vector table.
*/
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
{
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
g_hwiForm[num + OS_SYS_VECTOR_CNT] = IrqEntry;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
HwiUnmask(num);
}
}
#endif
/* ****************************************************************************
Function : HwiNumGet
Description : Get an interrupt number
Input : None
Output : None
Return : Interrupt Indexes number
**************************************************************************** */
STATIC UINT32 HwiNumGet(VOID)
{
return (HalGetPsr() >> PSR_VEC_OFFSET) & MASK_8_BITS;
}
HwiControllerOps g_archHwiOps = {
.triggerIrq = HwiPending,
.enableIrq = HwiUnmask,
.disableIrq = HwiMask,
.setIrqPriority = HwiSetPriority,
.getCurIrqNum = HwiNumGet,
.clearIrq = HwiClear,
};
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
/* ****************************************************************************
Function : HalHwiDefaultHandler
Description : default handler of the hardware interrupt
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
{
PRINT_ERR("%s irqnum:%x\n", __FUNCTION__, HwiNumGet());
while (1) {}
}
WEAK VOID HalPreInterruptHandler(UINT32 arg)
{
(VOID)arg;
return;
}
WEAK VOID HalAftInterruptHandler(UINT32 arg)
{
(VOID)arg;
return;
}
/* ****************************************************************************
Function : HalInterrupt
Description : Hardware interrupt entry function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
{
UINT32 hwiIndex;
UINT32 intSave;
intSave = LOS_IntLock();
g_intCount++;
LOS_IntRestore(intSave);
hwiIndex = HwiNumGet();
OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
HalPreInterruptHandler(hwiIndex);
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
#else
if (g_hwiHandlerForm[hwiIndex] != 0) {
g_hwiHandlerForm[hwiIndex]();
}
#endif
HalAftInterruptHandler(hwiIndex);
OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
intSave = LOS_IntLock();
g_intCount--;
#ifndef CPU_CK804
HalIrqEndCheckNeedSched();
#endif
LOS_IntRestore(intSave);
}
/* ****************************************************************************
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
hwiMode --- unused
hwiHandler --- hwi handler
irqParam --- param of the hwi handler
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T hwiMode,
HWI_PROC_FUNC hwiHandler,
HwiIrqParam *irqParam)
{
(VOID)hwiMode;
UINT32 intSave;
if (hwiHandler == NULL) {
return OS_ERRNO_HWI_PROC_FUNC_NULL;
}
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
if (g_hwiHandlerForm[hwiNum + OS_SYS_VECTOR_CNT] != 0) {
return OS_ERRNO_HWI_ALREADY_CREATED;
}
if (g_hwiHandlerForm[hwiNum + OS_SYS_VECTOR_CNT] != 0) {
return OS_ERRNO_HWI_ALREADY_CREATED;
}
if (hwiPrio > OS_HWI_PRIO_LOWEST) {
return OS_ERRNO_HWI_PRIO_INVALID;
}
intSave = LOS_IntLock();
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (irqParam != NULL) {
OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
} else {
OsSetVector(hwiNum, hwiHandler, NULL);
}
#else
(VOID)irqParam;
OsSetVector(hwiNum, hwiHandler);
#endif
HwiUnmask(hwiNum);
(VOID)HwiSetPriority(hwiNum, (UINT8)hwiPrio);
LOS_IntRestore(intSave);
return LOS_OK;
}
/* ****************************************************************************
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
irqParam --- param of the hwi handler
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
{
(VOID)irqParam;
UINT32 intSave;
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
HwiMask(hwiNum);
intSave = LOS_IntLock();
g_hwiHandlerForm[hwiNum + OS_SYS_VECTOR_CNT] = 0;
LOS_IntRestore(intSave);
return LOS_OK;
}
ExcInfo g_excInfo = {0};
#if (LOSCFG_KERNEL_PRINTF != 0)
STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
{
CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
PRINTK("Type = %d\n", excInfo->type);
PRINTK("ThrdPid = %d\n", excInfo->thrdPid);
PRINTK("Phase = %s\n", phaseStr[excInfo->phase]);
PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
}
STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
{
PRINTK("Current task info:\n");
if (excInfo->phase == OS_EXC_IN_TASK) {
LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
PRINTK("Task name = %s\n", taskCB->taskName);
PRINTK("Task ID = %d\n", taskCB->taskID);
PRINTK("Task SP = 0x%x\n", (UINTPTR)taskCB->stackPointer);
PRINTK("Task ST = 0x%x\n", taskCB->topOfStack);
PRINTK("Task SS = 0x%x\n", taskCB->stackSize);
} else if (excInfo->phase == OS_EXC_IN_HWI) {
PRINTK("Exception occur in interrupt phase!\n");
} else {
PRINTK("Exception occur in system init phase!\n");
}
}
STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
{
EXC_CONTEXT_S *excContext = excInfo->context;
PRINTK("Exception reg dump:\n");
PRINTK("R0 = 0x%x\n"
"R1 = 0x%x\n"
"R2 = 0x%x\n"
"R3 = 0x%x\n"
"R4 = 0x%x\n"
"R5 = 0x%x\n"
"R6 = 0x%x\n"
"R7 = 0x%x\n"
"R8 = 0x%x\n"
"R9 = 0x%x\n"
"R10 = 0x%x\n"
"R11 = 0x%x\n"
"R12 = 0x%x\n"
"R13 = 0x%x\n"
"R14 = 0x%x\n"
"R15 = 0x%x\n"
"EPSR = 0x%x\n"
"EPC = 0x%x\n",
excContext->R0, excContext->R1, excContext->R2, excContext->R3, excContext->R4, excContext->R5,
excContext->R6, excContext->R7, excContext->R8, excContext->R9, excContext->R10, excContext->R11,
excContext->R12, excContext->R13, excContext->R14, excContext->R15, excContext->EPSR,
excContext->EPC);
}
#if (LOSCFG_KERNEL_BACKTRACE == 1)
STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
{
UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
UINT32 index;
OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->R14);
PRINTK("----- backtrace start -----\n");
for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
if (LR[index] == 0) {
break;
}
PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
}
PRINTK("----- backtrace end -----\n");
}
#endif
STATIC VOID OsExcMemPoolCheckInfo(VOID)
{
PRINTK("\r\nmemory pools check:\n");
#if (LOSCFG_PLATFORM_EXC == 1)
MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
UINT32 errCnt;
UINT32 i;
(VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
if (errCnt < OS_SYS_MEM_NUM) {
errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
}
if (errCnt == 0) {
PRINTK("all memory pool check passed!\n");
return;
}
for (i = 0; i < errCnt; i++) {
PRINTK("pool num = %d\n", i);
PRINTK("pool type = %d\n", memExcInfo[i].type);
PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr);
PRINTK("pool size = 0x%x\n", memExcInfo[i].size);
PRINTK("pool free = 0x%x\n", memExcInfo[i].free);
PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr);
PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen);
PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
}
#endif
UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
if (ret == LOS_OK) {
PRINTK("system heap memcheck over, all passed!\n");
}
PRINTK("memory pool check end!\n");
}
#endif
STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
{
#if (LOSCFG_KERNEL_PRINTF != 0)
PRINTK("*************Exception Information**************\n");
OsExcTypeInfo(excInfo);
OsExcCurTaskInfo(excInfo);
OsExcRegInfo(excInfo);
#if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(excInfo);
#endif
OsGetAllTskInfo();
OsExcMemPoolCheckInfo();
#endif
}
LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(EXC_CONTEXT_S *excBufAddr, UINT32 faultAddr)
{
UINT16 tmpFlag = ((excBufAddr->EPSR >> PSR_VEC_OFFSET) & MASK_8_BITS);
g_excInfo.nestCnt++;
UINT32 excType = (HalGetPsr() >> PSR_VEC_OFFSET) & MASK_8_BITS;
g_excInfo.type = excType;
g_excInfo.faultAddr = faultAddr;
if (g_losTask.runTask != NULL) {
if (tmpFlag > 0) {
g_excInfo.phase = OS_EXC_IN_HWI;
g_excInfo.thrdPid = tmpFlag;
} else {
g_excInfo.phase = OS_EXC_IN_TASK;
g_excInfo.thrdPid = g_losTask.runTask->taskID;
}
} else {
g_excInfo.phase = OS_EXC_IN_INIT;
g_excInfo.thrdPid = OS_NULL_INT;
}
g_excInfo.context = excBufAddr;
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
ArchSysExit();
}
/* stack protector */
WEAK UINT32 __stack_chk_guard = 0xd00a0dff;
WEAK VOID __stack_chk_fail(VOID)
{
/* __builtin_return_address is a builtin function, building in gcc */
LOS_Panic("stack-protector: Kernel stack is corrupted in: %x\n",
__builtin_return_address(0));
}
WEAK void HalHwiHandleReInit(UINT32 hwiFormAddr)
{
}
/* ****************************************************************************
Function : HalHwiInit
Description : initialization of the hardware interrupt
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
{
UINT32 i;
for (i = 1; i < OS_SYS_VECTOR_CNT; i++) {
g_hwiForm[i] = (HWI_PROC_FUNC)HandleEntry;
}
for (i = OS_SYS_VECTOR_CNT; i < (LOSCFG_PLATFORM_HWI_LIMIT + OS_SYS_VECTOR_CNT); i++) {
g_hwiForm[i] = (HWI_PROC_FUNC)IrqEntry;
}
HalHwiHandleReInit((UINT32)&g_hwiForm);
HalSetVbr((UINT32)&g_hwiForm);
for (int i = 0; i < BYTES_OF_128_INT; i++) {
VIC_REG->IABR[i] = 0x0;
VIC_REG->ICPR[i] = MASK_32_BITS;
}
return;
}

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@@ -1,158 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_timer.h"
#include "los_config.h"
#include "los_tick.h"
#include "los_arch_interrupt.h"
#include "los_debug.h"
typedef struct {
UINT32 CTRL;
UINT32 LOAD;
UINT32 VAL;
UINT32 CALIB;
} CORE_TIM_TYPE;
#define CORE_TIM_BASE (0xE000E010UL)
#define SysTick ((CORE_TIM_TYPE *)CORE_TIM_BASE)
#define CORETIM_ENABLE (1UL << 0)
#define CORETIM_INTMASK (1UL << 1)
#define CORETIM_SOURCE (1UL << 2)
#define CORETIM_MODE (1UL << 16)
#ifdef CPU_CK804
#define TIM_INT_NUM 25
#else
#define TIM_INT_NUM 1
#endif
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
STATIC UINT64 SysTickCycleGet(UINT32 *period);
STATIC VOID SysTickLock(VOID);
STATIC VOID SysTickUnlock(VOID);
STATIC ArchTickTimer g_archTickTimer = {
.freq = 0,
.irqNum = TIM_INT_NUM,
.periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
.init = SysTickStart,
.getCycle = SysTickCycleGet,
.reload = SysTickReload,
.lock = SysTickLock,
.unlock = SysTickUnlock,
.tickHandler = NULL,
};
/* ****************************************************************************
Function : HalTickStart
Description : Configure Tick Interrupt Start
Input : none
output : none
return : LOS_OK - Success , or LOS_ERRNO_TICK_CFG_INVALID - failed
**************************************************************************** */
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
{
ArchTickTimer *tick = &g_archTickTimer;
tick->freq = OS_SYS_CLOCK;
SysTick->LOAD = (OS_CYCLE_PER_TICK - 1);
SysTick->VAL = 0;
SysTick->CTRL |= (CORETIM_SOURCE | CORETIM_ENABLE | CORETIM_INTMASK);
VIC_REG->IWER[0] = 0x1 << TIM_INT_NUM;
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(tick->irqNum, handler, NULL);
#else
OsSetVector(tick->irqNum, handler);
#endif
#endif
return LOS_OK;
}
STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
{
if (nextResponseTime > g_archTickTimer.periodMax) {
nextResponseTime = g_archTickTimer.periodMax;
}
SysTick->CTRL &= ~CORETIM_ENABLE;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
SysTick->CTRL |= CORETIM_ENABLE;
return nextResponseTime;
}
STATIC UINT64 SysTickCycleGet(UINT32 *period)
{
UINT32 hwCycle;
UINT32 intSave = LOS_IntLock();
*period = SysTick->LOAD;
hwCycle = *period - SysTick->VAL;
LOS_IntRestore(intSave);
return (UINT64)hwCycle;
}
STATIC VOID SysTickLock(VOID)
{
SysTick->CTRL &= ~CORETIM_ENABLE;
}
STATIC VOID SysTickUnlock(VOID)
{
SysTick->CTRL |= CORETIM_ENABLE;
}
ArchTickTimer *ArchSysTickTimerGet(VOID)
{
return &g_archTickTimer;
}
VOID Wfi(VOID)
{
__asm__ volatile("wait");
}
VOID Dsb(VOID)
{
__asm__ volatile("sync" : : : "memory");
}
UINT32 ArchEnterSleep(VOID)
{
Dsb();
Wfi();
return LOS_OK;
}

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@@ -1,99 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_H
#define _LOS_ARCH_H
#include "los_config.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#if defined(__ICCARM__) || defined(__CC_ARM)
STATIC INLINE UINTPTR ArchSpGet(VOID)
{
UINTPTR sp;
__asm("mov %0, sp" : "=r" (sp));
return sp;
}
STATIC INLINE UINTPTR ArchPspGet(VOID)
{
UINTPTR psp;
__asm("mrs %0, psp" : "=r" (psp));
return psp;
}
STATIC INLINE UINTPTR ArchMspGet(VOID)
{
UINTPTR msp;
__asm("mrs %0, msp" : "=r" (msp));
return msp;
}
#elif defined(__CLANG_ARM) || defined(__GNUC__)
STATIC INLINE UINTPTR ArchSpGet(VOID)
{
UINTPTR sp;
__asm volatile("mov %0, sp" : "=r" (sp));
return sp;
}
STATIC INLINE UINTPTR ArchPspGet(VOID)
{
UINTPTR psp;
__asm volatile("mrs %0, psp" : "=r" (psp));
return psp;
}
STATIC INLINE UINTPTR ArchMspGet(VOID)
{
UINTPTR msp;
__asm volatile("mrs %0, msp" : "=r" (msp));
return msp;
}
#else
/* Other platforms to be improved */
#endif
VOID ArchInit(VOID);
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_H */

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@@ -1,71 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ATOMIC_H
#define _LOS_ATOMIC_H
#include "los_compiler.h"
#include "los_arch_atomic.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#define LOS_AtomicRead ArchAtomicRead
#define LOS_AtomicSet ArchAtomicSet
#define LOS_AtomicAdd ArchAtomicAdd
#define LOS_AtomicSub ArchAtomicSub
#define LOS_AtomicInc ArchAtomicInc
#define LOS_AtomicIncRet ArchAtomicIncRet
#define LOS_AtomicDec ArchAtomicDec
#define LOS_AtomicDecRet ArchAtomicDecRet
#define LOS_Atomic64Read ArchAtomic64Read
#define LOS_Atomic64Set ArchAtomic64Set
#define LOS_Atomic64Add ArchAtomic64Add
#define LOS_Atomic64Sub ArchAtomic64Sub
#define LOS_Atomic64Inc ArchAtomic64Inc
#define LOS_Atomic64IncRet ArchAtomic64IncRet
#define LOS_Atomic64Dec ArchAtomic64Dec
#define LOS_Atomic64DecRet ArchAtomic64DecRet
#define LOS_AtomicXchg32bits ArchAtomicXchg32bits
#define LOS_AtomicXchg64bits ArchAtomicXchg64bits
#define LOS_AtomicCmpXchg32bits ArchAtomicCmpXchg32bits
#define LOS_AtomicCmpXchg64bits ArchAtomicCmpXchg64bits
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ATOMIC_H */

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@@ -1,34 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_group("risc-v") {
modules = [ "riscv32/gcc" ]
}

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@@ -1,303 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("lr.w %0, (%1)\n"
"fence rw, rw\n"
: "=&r"(val)
: "r"(v)
: "memory");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("amoswap.w %0, %2, (%1)\n"
: "=r"(prevVal)
: "r"(v), "r"(setVal)
: "memory");
LOS_IntRestore(intSave);
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("amoadd.w %0, %2, (%1)\n"
"lw %0, (%1)\n"
"fence rw, rw\n"
: "=&r"(val)
: "r"(v), "r"(addVal)
: "memory");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("amoadd.w %0, %2, (%1)\n"
"lw %0, (%1)\n"
"fence rw, rw\n"
: "=&r"(val)
: "r"(v), "r"(-subVal)
: "memory");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("lw %0, 0(%1)\n"
"amoswap.w %0, %2, (%1)\n"
: "=&r"(prevVal)
: "r"(v), "r"(val)
: "memory");
LOS_IntRestore(intSave);
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("lw %0, 0(%1)\n"
"bne %0, %2, 1f\n"
"amoswap.w %0, %3, (%1)\n"
"1:"
: "=&r"(prevVal)
: "r"(v), "r"(oldVal), "r"(val)
: "memory");
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,304 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#include "los_interrupt.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("lr.w %0, (%1)\n"
"fence rw, rw\n"
: "=&r"(val)
: "r"(v)
: "memory");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
UINT32 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("amoswap.w %0, %2, (%1)\n"
: "=r"(prevVal)
: "r"(v), "r"(setVal)
: "memory");
LOS_IntRestore(intSave);
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("amoadd.w %0, %2, (%1)\n"
"lw %0, (%1)\n"
"fence rw, rw\n"
: "=&r"(val)
: "r"(v), "r"(addVal)
: "memory");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("amoadd.w %0, %2, (%1)\n"
"lw %0, (%1)\n"
"fence rw, rw\n"
: "=&r"(val)
: "r"(v), "r"(-subVal)
: "memory");
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("lw %0, 0(%1)\n"
"amoswap.w %0, %2, (%1)\n"
: "=&r"(prevVal)
: "r"(v), "r"(val)
: "memory");
LOS_IntRestore(intSave);
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 intSave;
intSave = LOS_IntLock();
__asm__ __volatile__("lw %0, 0(%1)\n"
"bne %0, %2, 1f\n"
"amoswap.w %0, %3, (%1)\n"
"1:"
: "=&r"(prevVal)
: "r"(v), "r"(oldVal), "r"(val)
: "memory");
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,34 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_group("xtensa") {
modules = [ "lx6/gcc" ]
}

View File

@@ -1,47 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_name = "arch"
kernel_module(module_name) {
sources = [
"los_context.c",
"los_dispatch.S",
"los_exc.S",
"los_interrupt.c",
"los_timer.c",
"los_window.S",
]
configs += [ "$LITEOSTOPDIR:warn_config" ]
}
config("public") {
include_dirs = [ "." ]
}

View File

@@ -1,294 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_ATOMIC_H
#define _LOS_ARCH_ATOMIC_H
#include "los_compiler.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
{
INT32 val;
__asm__ __volatile__("l32ai %0, %1, 0\n"
: "=&a"(val)
: "a"(v)
: "memory");
return val;
}
STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
{
INT32 val;
__asm__ __volatile__("1:l32ai %0, %2, 0\n"
" wsr %0, SCOMPARE1\n"
" s32c1i %3, %1\n"
" bne %3, %0, 1b"
: "=&a"(val), "+m"(*v)
: "a"(v), "a"(setVal)
: "memory");
}
STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
{
INT32 val;
INT32 tmp;
__asm__ __volatile__("1:l32ai %0, %3, 0\n"
" wsr %0, SCOMPARE1\n"
" mov %1, %0\n"
" add %0, %0, %4\n"
" s32c1i %0, %2\n"
" bne %0, %1, 1b"
: "=&a"(val), "=&a"(tmp), "+m"(*v)
: "a"(v), "a"(addVal)
: "memory");
return *v;
}
STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
{
INT32 val;
INT32 tmp;
__asm__ __volatile__("1:l32ai %0, %3, 0\n"
" wsr %0, SCOMPARE1\n"
" mov %1, %0\n"
" sub %0, %0, %4\n"
" s32c1i %0, %2\n"
" bne %0, %1, 1b"
: "=&a"(val), "=&a"(tmp), "+m"(*v)
: "a"(v), "a"(subVal)
: "memory");
return *v;
}
STATIC INLINE VOID ArchAtomicInc(Atomic *v)
{
(VOID)ArchAtomicAdd(v, 1);
}
STATIC INLINE VOID ArchAtomicDec(Atomic *v)
{
(VOID)ArchAtomicSub(v, 1);
}
STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v)
{
return ArchAtomicAdd(v, 1);
}
STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
{
return ArchAtomicSub(v, 1);
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The exchange value.
*
* @retval #INT32 The previous value of the atomic variable
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
INT32 tmp;
__asm__ __volatile__("1:l32ai %0, %3, 0\n"
" wsr %0, SCOMPARE1\n"
" mov %1, %0\n"
" s32c1i %4, %2\n"
" bne %4, %1, 1b"
: "=&a"(prevVal), "=&a"(tmp), "+m"(*v)
: "a"(v), "a"(val)
: "memory");
return prevVal;
}
/**
* @ingroup los_arch_atomic
* @brief Atomic exchange for 32-bit variable with compare.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
* @param v [IN] The variable pointer.
* @param val [IN] The new value.
* @param oldVal [IN] The old value.
*
* @retval TRUE The previous value of the atomic variable is not equal to oldVal.
* @retval FALSE The previous value of the atomic variable is equal to oldVal.
* @par Dependency:
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
__asm__ __volatile__("l32ai %0, %2, 0\n"
"wsr %0, SCOMPARE1\n"
"bne %0, %3, 1f\n"
"s32c1i %4, %1\n"
"1:"
: "=&a"(prevVal), "+m"(*v)
: "a"(v), "a"(oldVal), "a"(val)
: "cc");
return prevVal != oldVal;
}
STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
{
UINT32 intSave;
intSave = LOS_IntLock();
*v = setVal;
LOS_IntRestore(intSave);
}
STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v += addVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal)
{
INT64 val;
UINT32 intSave;
intSave = LOS_IntLock();
*v -= subVal;
val = *v;
LOS_IntRestore(intSave);
return val;
}
STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v)
{
(VOID)ArchAtomic64Add(v, 1);
}
STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v)
{
return ArchAtomic64Add(v, 1);
}
STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v)
{
(VOID)ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v)
{
return ArchAtomic64Sub(v, 1);
}
STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
*v = val;
LOS_IntRestore(intSave);
return prevVal;
}
STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal)
{
INT64 prevVal;
UINT32 intSave;
intSave = LOS_IntLock();
prevVal = *v;
if (prevVal == oldVal) {
*v = val;
}
LOS_IntRestore(intSave);
return prevVal != oldVal;
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_ATOMIC_H */

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@@ -1,71 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_CONTEXT_H
#define _LOS_ARCH_CONTEXT_H
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#define SAVED_REG_NUM 8
#define SPILL_WINDOW_SIZE 8
typedef struct {
UINT32 pc;
UINT32 ps;
UINT32 regA[16];
UINT32 sar;
UINT32 excCause;
UINT32 excVaddr;
UINT32 lbeg;
UINT32 lend;
UINT32 lcount;
#if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
UINT32 temp;
UINT16 cpenable;
UINT16 cpstored;
UINT32 fcr;
UINT32 fsr;
UINT32 regF[16];
#endif
UINT32 res[4];
} TaskContext;
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_CONTEXT_H */

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@@ -1,249 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_INTERRUPT_H
#define _LOS_ARCH_INTERRUPT_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_interrupt.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
typedef struct {
UINT32 pc;
UINT32 ps;
UINT32 regA[16];
UINT32 sar;
UINT32 excCause;
UINT32 excVaddr;
UINT32 lbeg;
UINT32 lend;
UINT32 lcount;
#if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
UINT32 temp;
UINT16 cpenable;
UINT16 cpstored;
UINT32 fcr;
UINT32 fsr;
UINT32 regF[16];
#endif
UINT32 res[4];
} EXC_CONTEXT_S;
#define VECTOR_START _init_start
extern CHAR *VECTOR_START;
#define INIT_VECTOR_START ((UINTPTR)&VECTOR_START)
/* *
* @ingroup los_arch_interrupt
* Maximum number of used hardware interrupts.
*/
#ifndef OS_HWI_MAX_NUM
#define OS_HWI_MAX_NUM LOSCFG_PLATFORM_HWI_LIMIT
#endif
/* *
* @ingroup los_arch_interrupt
* Highest priority of a hardware interrupt.
*/
#ifndef OS_HWI_PRIO_HIGHEST
#define OS_HWI_PRIO_HIGHEST 0
#endif
/* *
* @ingroup los_arch_interrupt
* Lowest priority of a hardware interrupt.
*/
#ifndef OS_HWI_PRIO_LOWEST
#define OS_HWI_PRIO_LOWEST 7
#endif
#define OS_EXC_IN_INIT 0
#define OS_EXC_IN_TASK 1
#define OS_EXC_IN_HWI 2
/* *
* @ingroup los_arch_interrupt
* Define the type of a hardware interrupt vector table function.
*/
typedef VOID (**HWI_VECTOR_FUNC)(VOID);
/* *
* @ingroup los_arch_interrupt
* Count of interrupts.
*/
extern UINT32 g_intCount;
/* *
* @ingroup los_arch_interrupt
* Count of Xtensa system interrupt vector.
*/
#define OS_SYS_VECTOR_CNT 0
/* *
* @ingroup los_arch_interrupt
* Count of Xtensa interrupt vector.
*/
#define OS_VECTOR_CNT (OS_SYS_VECTOR_CNT + OS_HWI_MAX_NUM)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt number.
*
* Value: 0x02000900
*
* Solution: Ensure that the interrupt number is valid.
*/
#define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Null hardware interrupt handling function.
*
* Value: 0x02000901
*
* Solution: Pass in a valid non-null hardware interrupt handling function.
*/
#define OS_ERRNO_HWI_PROC_FUNC_NULL LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x01)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Insufficient interrupt resources for hardware interrupt creation.
*
* Value: 0x02000902
*
* Solution: Increase the configured maximum number of supported hardware interrupts.
*/
#define OS_ERRNO_HWI_CB_UNAVAILABLE LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x02)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Insufficient memory for hardware interrupt initialization.
*
* Value: 0x02000903
*
* Solution: Expand the configured memory.
*/
#define OS_ERRNO_HWI_NO_MEMORY LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x03)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: The interrupt has already been created.
*
* Value: 0x02000904
*
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
*/
#define OS_ERRNO_HWI_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x04)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Invalid interrupt priority.
*
* Value: 0x02000905
*
* Solution: Ensure that the interrupt priority is valid.
*/
#define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: Incorrect interrupt creation mode.
*
* Value: 0x02000906
*
* Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST.
*/
#define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
/* *
* @ingroup los_arch_interrupt
* Hardware interrupt error code: The interrupt has already been created as a fast interrupt.
*
* Value: 0x02000907
*
* Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created.
*/
#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
*/
extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg);
#else
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
*/
extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
#endif
VOID HalInterrupt(VOID);
VOID HalHwiDefaultHandler(VOID);
VOID HalExcHandleEntry(UINTPTR faultAddr, EXC_CONTEXT_S *excBufAddr, UINT32 type);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Exception information structure
*
* Description: Exception information saved when an exception is triggered on the Xtensa platform.
*
*/
typedef struct TagExcInfo {
UINT16 phase;
UINT16 type;
UINT32 faultAddr;
UINT32 thrdPid;
UINT16 nestCnt;
UINT16 reserved;
EXC_CONTEXT_S *context;
} ExcInfo;
extern UINT32 g_curNestCount;
extern ExcInfo g_excInfo;
#define MAX_INT_INFO_SIZE (8 + 0x164)
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_INTERRUPT_H */

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@@ -1,171 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_MACRO_H
#define _LOS_ARCH_MACRO_H
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
.macro POP_ALL_REG SP PC PState
#if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
l16ui a3, \SP, CONTEXT_OFF_CPENABLE
wsr a3, CPENABLE
rsync
l16ui a3, \SP, CONTEXT_OFF_CPSTORED
bbci.l a3, 0, 2f
l32i a3, \SP, CONTEXT_OFF_FCR
wur.FCR a3
l32i a3, \SP, CONTEXT_OFF_FSR
wur.FSR a3
lsi f0, \SP, CONTEXT_OFF_F0
lsi f1, \SP, CONTEXT_OFF_F1
lsi f2, \SP, CONTEXT_OFF_F2
lsi f3, \SP, CONTEXT_OFF_F3
lsi f4, \SP, CONTEXT_OFF_F4
lsi f5, \SP, CONTEXT_OFF_F5
lsi f6, \SP, CONTEXT_OFF_F6
lsi f7, \SP, CONTEXT_OFF_F7
lsi f8, \SP, CONTEXT_OFF_F8
lsi f9, \SP, CONTEXT_OFF_F9
lsi f10, \SP, CONTEXT_OFF_F10
lsi f11, \SP, CONTEXT_OFF_F11
lsi f12, \SP, CONTEXT_OFF_F12
lsi f13, \SP, CONTEXT_OFF_F13
lsi f14, \SP, CONTEXT_OFF_F14
lsi f15, \SP, CONTEXT_OFF_F15
2:
movi a4, 0
s16i a4, \SP, CONTEXT_OFF_CPSTORED
#endif
l32i a3, \SP, CONTEXT_OFF_LBEG
l32i a4, \SP, CONTEXT_OFF_LEND
wsr a3, LBEG
l32i a3, \SP, CONTEXT_OFF_LCOUNT
wsr a4, LEND
wsr a3, LCOUNT
l32i a3, \SP, CONTEXT_OFF_SAR
l32i a1, \SP, CONTEXT_OFF_A1
wsr a3, SAR
l32i a3, \SP, CONTEXT_OFF_A3
l32i a4, \SP, CONTEXT_OFF_A4
l32i a5, \SP, CONTEXT_OFF_A5
l32i a6, \SP, CONTEXT_OFF_A6
l32i a7, \SP, CONTEXT_OFF_A7
l32i a8, \SP, CONTEXT_OFF_A8
l32i a9, \SP, CONTEXT_OFF_A9
l32i a10, \SP, CONTEXT_OFF_A10
l32i a11, \SP, CONTEXT_OFF_A11
l32i a12, \SP, CONTEXT_OFF_A12
l32i a13, \SP, CONTEXT_OFF_A13
l32i a14, \SP, CONTEXT_OFF_A14
l32i a15, \SP, CONTEXT_OFF_A15
l32i a0, \SP, CONTEXT_OFF_PS
wsr a0, \PState
l32i a0, \SP, CONTEXT_OFF_PC
wsr a0, \PC
l32i a0, \SP, CONTEXT_OFF_A0
l32i a2, \SP, CONTEXT_OFF_A2
.endm
.macro PUSH_ALL_REG SP
s32i a0, \SP, CONTEXT_OFF_A0
s32i a1, \SP, CONTEXT_OFF_A1
s32i a2, \SP, CONTEXT_OFF_A2
s32i a3, \SP, CONTEXT_OFF_A3
s32i a4, \SP, CONTEXT_OFF_A4
s32i a5, \SP, CONTEXT_OFF_A5
s32i a6, \SP, CONTEXT_OFF_A6
s32i a7, \SP, CONTEXT_OFF_A7
s32i a8, \SP, CONTEXT_OFF_A8
s32i a9, \SP, CONTEXT_OFF_A9
s32i a10, \SP, CONTEXT_OFF_A10
s32i a11, \SP, CONTEXT_OFF_A11
s32i a12, \SP, CONTEXT_OFF_A12
s32i a13, \SP, CONTEXT_OFF_A13
s32i a14, \SP, CONTEXT_OFF_A14
s32i a15, \SP, CONTEXT_OFF_A15
rsr a3, SAR
s32i a3, \SP, CONTEXT_OFF_SAR
rsr a3, LBEG
s32i a3, \SP, CONTEXT_OFF_LBEG
rsr a3, LEND
s32i a3, \SP, CONTEXT_OFF_LEND
rsr a3, LCOUNT
s32i a3, \SP, CONTEXT_OFF_LCOUNT
rsr a3, PS
s32i a3, \SP, CONTEXT_OFF_PS
#if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
rsr a3, CPENABLE
beqz a3, 1f
s16i a3, \SP, CONTEXT_OFF_CPSTORED
s16i a3, \SP, CONTEXT_OFF_CPENABLE
bbci.l a3, 0, 1f
rur.FCR a3
s32i a3, \SP, CONTEXT_OFF_FCR
rur.FSR a3
s32i a3, \SP, CONTEXT_OFF_FSR
ssi f0, \SP, CONTEXT_OFF_F0
ssi f1, \SP, CONTEXT_OFF_F1
ssi f2, \SP, CONTEXT_OFF_F2
ssi f3, \SP, CONTEXT_OFF_F3
ssi f4, \SP, CONTEXT_OFF_F4
ssi f5, \SP, CONTEXT_OFF_F5
ssi f6, \SP, CONTEXT_OFF_F6
ssi f7, \SP, CONTEXT_OFF_F7
ssi f8, \SP, CONTEXT_OFF_F8
ssi f9, \SP, CONTEXT_OFF_F9
ssi f10, \SP, CONTEXT_OFF_F10
ssi f11, \SP, CONTEXT_OFF_F11
ssi f12, \SP, CONTEXT_OFF_F12
ssi f13, \SP, CONTEXT_OFF_F13
ssi f14, \SP, CONTEXT_OFF_F14
ssi f15, \SP, CONTEXT_OFF_F15
1:
#endif
.endm
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_MACRO_H */

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@@ -1,177 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* @defgroup Special Register Fields and Values
* @ingroup kernel
*/
#ifndef _ARCH_REGS_H
#define _ARCH_REGS_H
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
/* PS register -- imprecise exception */
#define SPREG_PS_DEPC_SHIFT 4
#define SPREG_PS_DEPC_MASK 0x00000004
#define SPREG_PS_DEPC SPREG_PS_DEPC_MASK
/* PS register -- interrupt part */
#define SPREG_PS_DI_SHIFT 3
#define SPREG_PS_DI_MASK 0x0000000F
#define SPREG_PS_DI SPREG_PS_DI_MASK
#define SPREG_PS_DI_DEPC 0x0000000C
/* PS register -- stack part */
#define SPREG_PS_STACK_SHIFT 5
#define SPREG_PS_STACK_MASK 0x000000E0
#define SPREG_PS_STACK_INTERRUPT 0x00000000
#define SPREG_PS_STACK_CROSS 0x00000020
#define SPREG_PS_STACK_IDLE 0x00000040
#define SPREG_PS_STACK_KERNEL 0x00000060
#define SPREG_PS_STACK_PAGE 0x000000E0
#define SPREG_PS_STACK_FIRSTINT 0x00000080
#define SPREG_PS_STACK_FIRSTKER 0x000000A0
/* PS register -- entry no rotate */
#define SPREG_PS_ENTRYNR_SHIFT 22
#define SPREG_PS_ENTRYNR_MASK 0x00400000
#define SPREG_PS_ENTRYNR SPREG_PS_ENTRYNR_MASK
/* Exccause Register -- cause */
#define SPREG_EXCCAUSE_CAUSE_SHIFT 0
#define SPREG_EXCCAUSE_CAUSE_BITS 4
#define SPREG_EXCCAUSE_CAUSE_MASK 0x0000000F
/**
* @ingroup Execute level of core
*/
#define EXEC_LEVEL_APPLICATION_CODE 2
#define EXEC_LEVEL_EXCEPTION_HANDLER 3
#define EXEC_LEVEL_INTERRUPT_HANDLER 4
#define EXEC_LEVEL_NON_INTERRUPTIBLE 5
/**
* @ingroup Schedule Flag stored on Task Context
*/
#define OS_SCHED_FLAG_TASKPREEMT 4 /* Task Preemted through LOS_Schedule */
/**
* @ingroup Context Fields Define
*/
#define CONTEXT_OFF_EPC 0
#define CONTEXT_OFF_PC 0 /* reuse with EPC */
#define CONTEXT_OFF_PS 4
#define CONTEXT_OFF_A0 8
#define CONTEXT_OFF_A1 12
#define CONTEXT_OFF_A2 16
#define CONTEXT_OFF_A3 20
#define CONTEXT_OFF_A4 24
#define CONTEXT_OFF_A5 28
#define CONTEXT_OFF_A6 32
#define CONTEXT_OFF_A7 36
#define CONTEXT_OFF_A8 40
#define CONTEXT_OFF_A9 44
#define CONTEXT_OFF_A10 48
#define CONTEXT_OFF_A11 52
#define CONTEXT_OFF_A12 56
#define CONTEXT_OFF_A13 60
#define CONTEXT_OFF_A14 64
#define CONTEXT_OFF_A15 68
#define CONTEXT_OFF_RESERVED 72
#define CONTEXT_OFF_SAR 72
#define CONTEXT_OFF_SCHED_FLAG 76 /* reuse with exccause */
#define CONTEXT_OFF_EXCCAUSE 76
#define CONTEXT_OFF_EXCVADDR 80
#define CONTEXT_OFF_LBEG 84
#define CONTEXT_OFF_LEND 88
#define CONTEXT_OFF_LCOUNT 92
#if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
#define CONTEXT_OFF_TMP0 96
#define CONTEXT_OFF_CPENABLE 100
#define CONTEXT_OFF_CPSTORED 102
#define CONTEXT_OFF_FCR 104
#define CONTEXT_OFF_FSR 108
#define CONTEXT_OFF_F0 112
#define CONTEXT_OFF_F1 116
#define CONTEXT_OFF_F2 120
#define CONTEXT_OFF_F3 124
#define CONTEXT_OFF_F4 128
#define CONTEXT_OFF_F5 132
#define CONTEXT_OFF_F6 136
#define CONTEXT_OFF_F7 140
#define CONTEXT_OFF_F8 144
#define CONTEXT_OFF_F9 148
#define CONTEXT_OFF_F10 152
#define CONTEXT_OFF_F11 156
#define CONTEXT_OFF_F12 160
#define CONTEXT_OFF_F13 164
#define CONTEXT_OFF_F14 168
#define CONTEXT_OFF_F15 172
#define CONTEXT_SIZE 192
#else
#define CONTEXT_SIZE 112
#endif
#define LEVEL1_TINRERRUPT_CAUSE 4
#define ALLOC_CAUSE 5
#define LOWBIT_CALLNMODE 30
#define HIGHBIT_CALLNMODE 31
#define PS_OWB_SHIFT 8
#define EXCCAUSE_LEVEL1INTERRUPT 4
#define XTENSA_LOGREG_NUM 16
#define INDEX_OF_SP 1
#define INDEX_OF_ARGS0 6
#define WINDOWSTARTBITS 16
#define WINDOWBASEBITS 4
#define WINDOWSTARTMASK ((1 << WINDOWSTARTBITS) - 1)
#define WOE_ENABLE 0x40000
#define BIT_CALLINC 16
#define LEVEL_MASK 0xf
#define INT_MASK 5
#define LEVEL1_INT_MASK 1
#define USER_VECTOR_MODE 0x20
#define LEVEL1 1
#define LEVEL2 2
#define LEVEL3 3
#define LEVEL4 4
#define LEVEL5 5
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _ARCH_REGS_H */

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@@ -1,96 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_ARCH_TIMER_H
#define _LOS_ARCH_TIMER_H
#include "los_config.h"
#include "los_compiler.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
VOID SysTick_Handler(VOID);
#define TIM0_GROUP0 0x3FF5F000
#define TIM0_GROUP1 0x3FF60000
#define TIM1_GROUP0 0x3FF5F024
#define TIM1_GROUP1 0x3FF60024
#define TIM0_INT_ENABLE_GROUP0 0x3FF5F098
#define TIM0_INT_ENABLE_GROUP1 0x3FF60098
#define TIM0_INT_CLEAR_GROUP0 0x3FF5F0A4
#define TIM0_INT_CLEAR_GROUP1 0x3FF600A4
typedef struct {
UINT32 CTRL;
UINT64 VAL;
UINT32 UPDATE;
UINT64 ALARM;
UINT64 LOAD;
UINT32 LOAD_TRI;
} Systick_t;
STATIC INLINE UINT32 GetCcount(VOID)
{
UINT32 intSave;
__asm__ __volatile__("rsr %0, ccount" : "=a"(intSave) :);
return intSave;
}
STATIC INLINE VOID ResetCcount(VOID)
{
__asm__ __volatile__("wsr %0, ccount; rsync" : :"a"(0));
}
STATIC INLINE UINT32 GetCcompare(VOID)
{
UINT32 intSave;
__asm__ __volatile__("rsr %0, ccompare0" : "=a"(intSave) :);
return intSave;
}
STATIC INLINE VOID SetCcompare(UINT32 newCompareVal)
{
__asm__ __volatile__("wsr %0, ccompare0; rsync" : : "a"(newCompareVal));
}
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_ARCH_TIMER_H */

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@@ -1,168 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_context.h"
#include "securec.h"
#include "los_arch_regs.h"
#include "los_arch_context.h"
#include "los_arch_interrupt.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_timer.h"
#include "los_debug.h"
STATIC UINT32 g_sysNeedSched = FALSE;
UINT32 g_stackDefault[] = {
0x00000000, /* REG_OFF_PC */
0x00000000, /* REG_OFF_PS */
0x00000A00, /* REG_OFF_AR00 */
0x00000A01, /* REG_OFF_AR01 */
0x00000A02, /* REG_OFF_AR02 */
0x00000A03, /* REG_OFF_AR03 */
0x00000A04, /* REG_OFF_AR04 */
0x00000A05, /* REG_OFF_AR05 */
0x00000A06, /* REG_OFF_AR06 */
0x00000A07, /* REG_OFF_AR07 */
0x00000A08, /* REG_OFF_AR08 */
0x00000A09, /* REG_OFF_AR09 */
0x00000A10, /* REG_OFF_AR10 */
0x00000A11, /* REG_OFF_AR11 */
0x00000A12, /* REG_OFF_AR12 */
0x00000A13, /* REG_OFF_AR13 */
0x00000A14, /* REG_OFF_AR14 */
0x00000A15, /* REG_OFF_AR15 */
0x00000000, /* REG_OFF_RESERVED */
0x00000000, /* REG_OFF_EXCCAUSE */
0x00000000, /* REG_OFF_EXCVASSR */
0x00000000, /* REG_OFF_LCOUNT */
0x00000000, /* REG_OFF_LEND */
0x00000000, /* REG_OFF_LBEG */
#if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
0x00000000, /* REG_OFF_TMP0 */
0x00000001, /* REG_OFF_CPENABLE | CONTEXT_OFF_CPSTORED */
0x00000000, /* REG_OFF_FCR */
0x00000000, /* REG_OFF_FSR */
0x00000000, /* REG_OFF_F0 */
0x00000000, /* REG_OFF_F1 */
0x00000000, /* REG_OFF_F2 */
0x00000000, /* REG_OFF_F3 */
0x00000000, /* REG_OFF_F4 */
0x00000000, /* REG_OFF_F5 */
0x00000000, /* REG_OFF_F6 */
0x00000000, /* REG_OFF_F7 */
0x00000000, /* REG_OFF_F8 */
0x00000000, /* REG_OFF_F9 */
0x00000000, /* REG_OFF_F10 */
0x00000000, /* REG_OFF_F11 */
0x00000000, /* REG_OFF_F12 */
0x00000000, /* REG_OFF_F13 */
0x00000000, /* REG_OFF_F14 */
0x00000000, /* REG_OFF_F15 */
#endif
0x00000000, /* REG_OFF_SPILL_RESERVED */
0x00000000, /* REG_OFF_SPILL_RESERVED */
0x00000000, /* REG_OFF_SPILL_RESERVED */
0x00000000, /* REG_OFF_SPILL_RESERVED */
};
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
HalHwiInit();
}
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
}
}
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
errno_t result;
TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
/* initialize the task context */
result = memcpy_s(context, sizeof(TaskContext), g_stackDefault, sizeof(TaskContext));
if (result != EOK) {
PRINT_ERR("[%s] memcpy_s failed!\n", __func__);
}
context->pc = (UINT32)(UINTPTR)OsTaskEntry;
context->regA[INDEX_OF_SP] = (UINTPTR)topStack + stackSize; /* endStack */
context->regA[INDEX_OF_ARGS0] = taskID; /* argument1 */
context->ps = SPREG_PS_STACK_CROSS | WOE_ENABLE | 1 << BIT_CALLINC; /* set to kernel stack */
return (VOID *)context;
}
VOID HalStartToRun(VOID)
{
__asm__ volatile ("call0 OsStartToRun");
}
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
HalStartToRun();
return LOS_OK;
}
VOID ArchTaskSchedule(VOID)
{
UINT32 intSave;
if (OS_INT_ACTIVE) {
g_sysNeedSched = TRUE;
return;
}
intSave = LOS_IntLock();
g_sysNeedSched = FALSE;
BOOL isSwitch = OsSchedTaskSwitch();
if (isSwitch) {
HalTaskContextSwitch();
}
LOS_IntRestore(intSave);
return;
}
VOID HalIrqEndCheckNeedSched(VOID)
{
if (g_sysNeedSched && g_taskScheduled && LOS_CHECK_SCHEDULE) {
ArchTaskSchedule();
}
}

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@@ -1,128 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_arch_regs.h"
#include "los_arch_macro.h"
.section .text
.literal_position
.align 4
.type HalTaskContextSwitch, %function
.global HalTaskContextSwitch
HalTaskContextSwitch:
entry sp, 16
addi a2, sp, -CONTEXT_SIZE
PUSH_ALL_REG a2
call0 SaveRetAddr
beqi a3, 1, .switchdone
movi a4, g_losTask
l32i a5, a4, 0 /* get run task */
s32i a2, a5, 0 /* store sp */
l32i a5, a4, 4 /* get new task */
s32i a5, a4, 0 /* run task = new task */
l32i a4, a5, 0 /* get new sp */
rsr a5, PS
movi a3, ~(WOE_ENABLE | LEVEL_MASK)
and a2, a5, a3
addi a2, a2, 3
wsr a2, PS
rsync
call0 SpillWindow
mov a2, a4
POP_ALL_REG a2 EPC5 EPS5
rfi 5
.switchdone:
retw
.type HakSpillWindow, %function
.global HakSpillWindow
HakSpillWindow:
entry sp, 32
addi a2, sp, -CONTEXT_SIZE
PUSH_ALL_REG a2
rsr a5, PS
movi a3, ~(WOE_ENABLE | LEVEL_MASK) /* disable woe and int */
and a3, a5, a3
addi a3, a3, LEVEL3
wsr a3, PS
rsync
mov a4, a2
call0 SpillWindow
l32i a5, a4, CONTEXT_OFF_PS /* restroe PS */
wsr a5, PS
rsync
l32i a0, a4, CONTEXT_OFF_A0
l32i a1, a4, CONTEXT_OFF_A1
retw
.type OsStartToRun, %function
.global OsStartToRun
OsStartToRun:
movi a2, g_losTask
l32i a3, a2, 4 /* get new task */
l32i sp, a3, 0 /* get sp */
rsr a4, PS
movi a3, ~(WOE_ENABLE | LEVEL_MASK)
and a2, a4, a3
addi a2, a2, LEVEL3
wsr a2, PS
rsync
mov a5, a1
l32i a1, a1, CONTEXT_OFF_A1
call0 SpillWindow
mov a2, a5
POP_ALL_REG a2 EPC5 EPS5
rfi 5
.global SaveRetAddr
.type SaveRetAddr, @function
.literal_position
.align 4
SaveRetAddr:
movi a3, 1
s32i a3, a2, CONTEXT_OFF_A3
s32i a0, a2, CONTEXT_OFF_PC /* save pc */
movi a3, 0
ret

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@@ -1,404 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_arch_regs.h"
#include "los_arch_macro.h"
.extern HalInterrupt
.extern UserException
.section .iram,"ax"
.literal_position
.type HandleEntry,@function
.align 4
HandleEntry:
mov a0, sp
addi sp, sp, -CONTEXT_SIZE
PUSH_ALL_REG a1
s32i a0, sp, CONTEXT_OFF_A1
rsr a0, EPC1
s32i a0, sp, CONTEXT_OFF_PC
rsr a0, EXCSAVE1
s32i a0, sp, CONTEXT_OFF_A0
wsr a1, EXCSAVE1
l32i a1, a1, CONTEXT_OFF_A1
call0 SpillWindow
rsr a1, EXCSAVE1
rsr a0, EXCCAUSE
s32i a0, sp, CONTEXT_OFF_EXCCAUSE
rsr a0, EXCVADDR
s32i a0, sp, CONTEXT_OFF_EXCVADDR
movi a0, INT_MASK | USER_VECTOR_MODE | WOE_ENABLE
wsr a0, PS
rsr a6, EPC1
mov a7, sp
rsr a8, EXCCAUSE
call4 HalExcHandleEntry
1:
j 1b
.begin literal_prefix .DebugExceptionHandler
.section .DebugExceptionHandler.text, "ax"
.global DebugExceptionHandler
.align 4
.literal_position
DebugExceptionHandler:
call0 UserException
.end literal_prefix
.begin literal_prefix .NMIExceptionHandler
.section .NMIExceptionHandler.text, "ax"
.global NMIExceptionHandler
.align 4
.literal_position
NMIExceptionHandler:
call0 UserException
.end literal_prefix
.begin literal_prefix .DoubleExceptionHandler
.section .DoubleExceptionHandler.text, "ax"
.global DoubleExceptionHandler
.align 4
.literal_position
DoubleExceptionHandler:
call0 UserException
.end literal_prefix
.begin literal_prefix .KernelExceptionHandler
.section .KernelExceptionHandler.text, "ax"
.global KernelExceptionHandler
.align 4
.literal_position
KernelExceptionHandler:
wsr a0, EXCSAVE1
call0 KernelException
.end literal_prefix
.section .iram,"ax"
.align 4
KernelException:
movi a0,5
wsr a0,EXCCAUSE
call0 UserException
rfe
.begin literal_prefix .UserExceptionHandler
.section .UserExceptionHandler.text, "ax"
.global UserExceptionHandler
.type UserExceptionHandler,@function
.align 4
.literal_position
UserExceptionHandler:
wsr a0, EXCSAVE1
call0 UserException
.end literal_prefix
.section .iram,"ax"
.type UserException,@function
.align 4
UserException:
rsr a0, EXCCAUSE
beqi a0, LEVEL1_TINRERRUPT_CAUSE, InterruptEntry1
beqi a0, ALLOC_CAUSE, AllocHandel
call0 HandleEntry
1:
j 1b
.section .iram,"ax"
.type AllocHandel,@function
.align 4
AllocHandel:
call0 AllocHandelEntry
.section .iram,"ax"
.type InterruptEntry1,@function
.align 4
InterruptEntry1:
mov a0, sp
addi sp, sp, -CONTEXT_SIZE
PUSH_ALL_REG a1
s32i a0, sp, CONTEXT_OFF_A1
rsr a0, EPC1
s32i a0, sp, CONTEXT_OFF_PC
rsr a0, EXCSAVE1
s32i a0, sp, CONTEXT_OFF_A0
wsr a1, EXCSAVE1
l32i a1, a1, CONTEXT_OFF_A1
call0 SpillWindow
rsr a1, EXCSAVE1
movi a0, LEVEL1_INT_MASK | USER_VECTOR_MODE | WOE_ENABLE
wsr a0, PS
rsync
call4 HalInterrupt
mov a2, a1
POP_ALL_REG a2 EPC1 PS
rfe
.begin literal_prefix .InterruptEntry2
.section .InterruptEntry2.text, "ax"
.global InterruptEntry2
.type InterruptEntry2,@function
.align 4
.literal_position
InterruptEntry2:
wsr a0, EXCSAVE2
movi a4, LEVEL2
call0 HandleEntry
.end literal_prefix
.begin literal_prefix .InterruptEntry3
.section .InterruptEntry3.text, "ax"
.global InterruptEntry3
.type InterruptEntry3,@function
.align 4
.literal_position
InterruptEntry3:
wsr a0, EXCSAVE3
movi a4, LEVEL3
call0 HandleEntry
.end literal_prefix
.begin literal_prefix .InterruptEntry4
.section .InterruptEntry4.text, "ax"
.global InterruptEntry4
.type InterruptEntry4,@function
.align 4
.literal_position
InterruptEntry4:
wsr a0, EXCSAVE4
movi a4, LEVEL4
call0 HandleEntry
.end literal_prefix
.begin literal_prefix .InterruptEntry5
.section .InterruptEntry5.text, "ax"
.global InterruptEntry5
.type InterruptEntry5,@function
.align 4
.literal_position
InterruptEntry5:
wsr a0, EXCSAVE5
movi a4, LEVEL5
call0 HandleEntry
.end literal_prefix
.section .WindowVectors.text, "ax"
.org 0x0
.global OverFlowGroup1
OverFlowGroup1:
addi a5, a5, -16
s32i a3, a5, 12
s32i a2, a5, 8
s32i a1, a5, 4
s32i a0, a5, 0
addi a5, a5, 16
rfwo
.org 0x40
.global UnderFlowGroup1
UnderFlowGroup1:
addi a5, a5, -16
l32i a3, a5, 12
l32i a2, a5, 8
l32i a1, a5, 4
l32i a0, a5, 0
addi a5, a5, 16
rfwu
.org 0x80
.global OverFlowGroup2
OverFlowGroup2:
addi a9, a9, -16
s32i a3, a9, 12
s32i a2, a9, 8
s32i a1, a9, 4
s32i a0, a9, 0
addi a9, a9, 16
addi a1, a1, -12
l32i a0, a1, 0
addi a1, a1, 12
addi a0, a0, -32
s32i a7, a0, 12
s32i a6, a0, 8
s32i a5, a0, 4
s32i a4, a0, 0
rfwo
.org 0xC0
.global UnderFlowGroup2
UnderFlowGroup2:
addi a9, a9, -16
l32i a3, a9, 12
l32i a2, a9, 8
l32i a1, a9, 4
l32i a0, a9, 0
addi a9, a9, 16
addi a1, a1, -12
l32i a4, a1, 0
addi a1, a1, 12
addi a4, a4, -32
l32i a7, a4, 12
l32i a6, a4, 8
l32i a5, a4, 4
l32i a4, a4, 0
rfwu
.org 0x100
.global OverFlowGroup3
OverFlowGroup3:
addi a13, a13, -16
s32i a3, a13, 12
s32i a2, a13, 8
s32i a1, a13, 4
s32i a0, a13, 0
addi a13, a13, 16
addi a1, a1, -12
l32i a0, a1, 0
addi a1, a1, 12
addi a0, a0, -48
s32i a11, a0, 28
s32i a10, a0, 24
s32i a9, a0, 20
s32i a8, a0, 16
s32i a7, a0, 12
s32i a6, a0, 8
s32i a5, a0, 4
s32i a4, a0, 0
rfwo
.org 0x140
.global UnderFlowGroup3
UnderFlowGroup3:
addi a13, a13, -16
l32i a3, a13, 12
l32i a2, a13, 8
l32i a1, a13, 4
l32i a0, a13, 0
addi a13, a13, 16
addi a1, a1, -12
l32i a4, a1, 0
addi a1, a1, 12
addi a4, a4, -48
l32i a11, a0, 28
l32i a10, a0, 24
l32i a9, a0, 20
l32i a8, a0, 16
l32i a7, a4, 12
l32i a6, a4, 8
l32i a5, a4, 4
l32i a4, a4, 0
rfwu
.section .userVector,"ax"
.type AllocHandelEntry,@function
.align 4
AllocHandelEntry:
addi a1, a1, -(CONTEXT_OFF_A4 - CONTEXT_OFF_A0)
s32i a2, a1, (CONTEXT_OFF_A2 - CONTEXT_OFF_A0)
s32i a3, a1, (CONTEXT_OFF_A3 - CONTEXT_OFF_A0)
rsr a0, PS
rsr a2, WINDOWBASE
extui a3, a0, PS_OWB_SHIFT, WINDOWBASEBITS
xor a3, a3, a2
slli a3, a3, PS_OWB_SHIFT
xor a0, a0, a3
wsr a0, PS
rsr a0, EXCSAVE1
l32i a2, a1, (CONTEXT_OFF_A2 - CONTEXT_OFF_A0)
l32i a3, a1, (CONTEXT_OFF_A3 - CONTEXT_OFF_A0)
addi a1, a1, (CONTEXT_OFF_A4 - CONTEXT_OFF_A0)
rsync
rotw -1
bbci a4, HIGHBIT_CALLNMODE, UnderFlowGroup1
rotw -1
bbci a8, LOWBIT_CALLNMODE, UnderFlowGroup2
rotw -1
j UnderFlowGroup3
.global EnableExceptionInterface
.section .iram,"ax"
.type EnableExceptionInterface,@function
.align 4
EnableExceptionInterface:
entry a1,16
retw

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@@ -1,568 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_interrupt.h"
#include <stdarg.h>
#include "securec.h"
#include "los_context.h"
#include "los_arch_interrupt.h"
#include "los_debug.h"
#include "los_hook.h"
#include "los_task.h"
#include "los_sched.h"
#include "los_memory.h"
#include "los_membox.h"
#include "los_arch_regs.h"
UINT32 g_intCount = 0;
/* *
* @ingroup los_hwi
* Hardware interrupt form mapping handling function array.
*/
STATIC HWI_PROC_FUNC __attribute__((aligned(LOSCFG_ARCH_HWI_VECTOR_ALIGN))) g_hwiForm[OS_VECTOR_CNT] = {0};
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
VOID *pParm;
} HWI_HANDLER_FUNC;
/* *
* @ingroup los_hwi
* Hardware interrupt handler form mapping handling function array.
*/
STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
/* *
* @ingroup los_hwi
* Set interrupt vector table.
*/
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
{
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
}
}
#else
/* *
* @ingroup los_hwi
* Hardware interrupt handler form mapping handling function array.
*/
STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
/* *
* @ingroup los_hwi
* Set interrupt vector table.
*/
VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
{
if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt;
g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
}
}
#endif
UINT32 HwiNumValid(UINT32 num)
{
return (num >= OS_SYS_VECTOR_CNT) && (num <= OS_VECTOR_CNT);
}
/* *
* @ingroup los_hwi
* Lock all interrupt.
*/
UINT32 ArchIntLock(VOID)
{
UINT32 ret;
__asm__ volatile("rsil %0, %1" : "=r"(ret) : "i"(INT_MASK) : "memory");
return ret;
}
/* *
* @ingroup los_hwi
* Restore interrupt status.
*/
VOID ArchIntRestore(UINT32 intSave)
{
__asm__ volatile("wsr.ps %0; rsync" : : "r"(intSave) : "memory");
}
/* *
* @ingroup los_hwi
* Unlock interrupt.
*/
UINT32 ArchIntUnLock(VOID)
{
UINT32 intSave;
__asm__ volatile("rsil %0, %1" : "=r"(intSave) : "i"(0) : "memory");
return intSave;
}
/* *
* @ingroup los_hwi
* Determine if the interrupt is locked
*/
STATIC INLINE UINT32 ArchIntLocked(VOID)
{
UINT32 intSave;
__asm__ volatile("rsr %0, ps " : "=r"(intSave) : : "memory");
return (intSave & SPREG_PS_DI_MASK);
}
/* *
* @ingroup los_hwi
* Trigger the interrupt
*/
STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
{
if (!HwiNumValid(hwiNum)) {
return OS_ERRNO_HWI_NUM_INVALID;
}
__asm__ __volatile__("wsr %0, intset; rsync" : : "a"(0x1U << hwiNum));
return LOS_OK;
}
UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
{
UINT32 ier;
if (!HwiNumValid(hwiNum)) {
return OS_ERRNO_HWI_NUM_INVALID;
}
__asm__ __volatile__("rsr %0, intenable" : "=a"(ier) : : "memory");
__asm__ __volatile__("wsr %0, intenable; rsync" : : "a"(ier | ((UINT32)0x1U << hwiNum)));
return LOS_OK;
}
UINT32 HwiMask(HWI_HANDLE_T hwiNum)
{
UINT32 ier;
if (!HwiNumValid(hwiNum)) {
return OS_ERRNO_HWI_NUM_INVALID;
}
__asm__ __volatile__("rsr %0, intenable" : "=a"(ier) : : "memory");
__asm__ __volatile__("wsr %0, intenable; rsync" : : "a"(ier & ~((UINT32)0x1U << hwiNum)));
return LOS_OK;
}
/* ****************************************************************************
Function : HwiNumGet
Description : Get an interrupt number
Input : None
Output : None
Return : Interrupt Indexes number
**************************************************************************** */
STATIC UINT32 HwiNumGet(VOID)
{
UINT32 ier;
UINT32 intenable;
UINT32 intSave;
__asm__ __volatile__("rsr %0, interrupt" : "=a"(ier) : : "memory");
__asm__ __volatile__("rsr %0, intenable" : "=a"(intenable) : : "memory");
intSave = ier & intenable;
return __builtin_ffs(intSave) - 1;
}
/* *
* @ingroup los_hwi
* Clear the interrupt
*/
STATIC UINT32 HwiClear(HWI_HANDLE_T vector)
{
if (!HwiNumValid(vector)) {
return OS_ERRNO_HWI_NUM_INVALID;
}
__asm__ __volatile__("wsr %0, intclear; rsync" : : "a"(0x1U << vector));
return LOS_OK;
}
HwiControllerOps g_archHwiOps = {
.triggerIrq = HwiPending,
.enableIrq = HwiUnmask,
.disableIrq = HwiMask,
.getCurIrqNum = HwiNumGet,
.clearIrq = HwiClear,
};
INLINE UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
/* ****************************************************************************
Function : HalHwiDefaultHandler
Description : default handler of the hardware interrupt
Input : None
Output : None
Return : None
**************************************************************************** */
VOID HalHwiDefaultHandler(VOID)
{
PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
while (1) {}
}
WEAK VOID HalPreInterruptHandler(UINT32 arg)
{
(VOID)arg;
return;
}
WEAK VOID HalAftInterruptHandler(UINT32 arg)
{
(VOID)arg;
return;
}
/* ****************************************************************************
Function : HalInterrupt
Description : Hardware interrupt entry function
Input : None
Output : None
Return : None
**************************************************************************** */
VOID HalInterrupt(VOID)
{
UINT32 hwiIndex;
UINT32 intSave;
intSave = LOS_IntLock();
g_intCount++;
LOS_IntRestore(intSave);
hwiIndex = HwiNumGet();
HwiClear(hwiIndex);
OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
HalPreInterruptHandler(hwiIndex);
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
#else
if (g_hwiHandlerForm[hwiIndex] != 0) {
g_hwiHandlerForm[hwiIndex]();
}
#endif
HalAftInterruptHandler(hwiIndex);
OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
intSave = LOS_IntLock();
g_intCount--;
LOS_IntRestore(intSave);
HalIrqEndCheckNeedSched();
}
/* ****************************************************************************
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
hwiMode --- unused
hwiHandler --- hwi handler
irqParam --- param of the hwi handler
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T hwiMode,
HWI_PROC_FUNC hwiHandler,
HwiIrqParam *irqParam)
{
(VOID)hwiMode;
UINT32 intSave;
if (hwiHandler == NULL) {
return OS_ERRNO_HWI_PROC_FUNC_NULL;
}
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
return OS_ERRNO_HWI_ALREADY_CREATED;
}
if (hwiPrio > OS_HWI_PRIO_LOWEST) {
return OS_ERRNO_HWI_PRIO_INVALID;
}
intSave = LOS_IntLock();
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (irqParam != NULL) {
OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
} else {
OsSetVector(hwiNum, hwiHandler, NULL);
}
#else
(VOID)irqParam;
OsSetVector(hwiNum, hwiHandler);
#endif
HwiUnmask(hwiNum);
LOS_IntRestore(intSave);
return LOS_OK;
}
/* ****************************************************************************
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
irqParam --- param of the hwi handler
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
{
(VOID)irqParam;
UINT32 intSave;
if (hwiNum >= OS_HWI_MAX_NUM) {
return OS_ERRNO_HWI_NUM_INVALID;
}
HwiMask(hwiNum);
intSave = LOS_IntLock();
g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
LOS_IntRestore(intSave);
return LOS_OK;
}
ExcInfo g_excInfo = {0};
#if (LOSCFG_KERNEL_PRINTF != 0)
STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
{
CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
PRINTK("Type = %d\n", excInfo->type);
PRINTK("ThrdPid = %d\n", excInfo->thrdPid);
PRINTK("Phase = %s\n", phaseStr[excInfo->phase]);
PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
}
STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
{
PRINTK("Current task info:\n");
if (excInfo->phase == OS_EXC_IN_TASK) {
LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
PRINTK("Task name = %s\n", taskCB->taskName);
PRINTK("Task ID = %d\n", taskCB->taskID);
PRINTK("Task SP = 0x%x\n", (UINTPTR)taskCB->stackPointer);
PRINTK("Task ST = 0x%x\n", taskCB->topOfStack);
PRINTK("Task SS = 0x%x\n", taskCB->stackSize);
} else if (excInfo->phase == OS_EXC_IN_HWI) {
PRINTK("Exception occur in interrupt phase!\n");
} else {
PRINTK("Exception occur in system init phase!\n");
}
}
STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
{
INT32 index;
PRINTK("Exception reg dump:\n");
PRINTK("sar = 0x%x\n", excInfo->context->sar);
PRINTK("excCause = 0x%x\n", excInfo->context->excCause);
PRINTK("excVaddr = 0x%x\n", excInfo->context->excVaddr);
PRINTK("lbeg = 0x%x\n", excInfo->context->lbeg);
PRINTK("lend = 0x%x\n", excInfo->context->lend);
PRINTK("lcount = 0x%x\n", excInfo->context->lcount);
PRINTK("pc = 0x%x\n", excInfo->context->pc);
PRINTK("ps = 0x%x\n", excInfo->context->ps);
for (index = 0; index < XTENSA_LOGREG_NUM; index++) {
PRINTK("regA%d = 0x%x\n", index, excInfo->context->regA[index]);
}
}
#if (LOSCFG_KERNEL_BACKTRACE == 1)
STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
{
UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
UINT32 index;
OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->regA[1]);
PRINTK("----- backtrace start -----\n");
for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
if (LR[index] == 0) {
break;
}
PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
}
PRINTK("----- backtrace end -----\n");
}
#endif
STATIC VOID OsExcMemPoolCheckInfo(VOID)
{
PRINTK("\r\nmemory pools check:\n");
#if (LOSCFG_PLATFORM_EXC == 1)
MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
UINT32 errCnt;
UINT32 i;
(VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
if (errCnt < OS_SYS_MEM_NUM) {
errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
}
if (errCnt == 0) {
PRINTK("all memory pool check passed!\n");
return;
}
for (i = 0; i < errCnt; i++) {
PRINTK("pool num = %d\n", i);
PRINTK("pool type = %d\n", memExcInfo[i].type);
PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr);
PRINTK("pool size = 0x%x\n", memExcInfo[i].size);
PRINTK("pool free = 0x%x\n", memExcInfo[i].free);
PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr);
PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen);
PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
}
#endif
UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
if (ret == LOS_OK) {
PRINTK("system heap memcheck over, all passed!\n");
}
PRINTK("memory pool check end!\n");
}
#endif
STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
{
#if (LOSCFG_KERNEL_PRINTF != 0)
PRINTK("*************Exception Information**************\n");
OsExcTypeInfo(excInfo);
OsExcCurTaskInfo(excInfo);
OsExcRegInfo(excInfo);
#if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(excInfo);
#endif
OsGetAllTskInfo();
OsExcMemPoolCheckInfo();
#endif
}
VOID HalExcHandleEntry(UINTPTR faultAddr, EXC_CONTEXT_S *excBufAddr, UINT32 type)
{
g_excInfo.nestCnt++;
g_excInfo.faultAddr = faultAddr;
g_excInfo.type = type;
LosTaskCB *taskCB = g_losTask.runTask;
if ((taskCB == NULL) || (taskCB == OS_TCB_FROM_TID(g_taskMaxNum))) {
g_excInfo.phase = OS_EXC_IN_INIT;
g_excInfo.thrdPid = OS_NULL_INT;
} else if (HwiNumGet() != OS_NULL_INT) {
g_excInfo.phase = OS_EXC_IN_HWI;
g_excInfo.thrdPid = HwiNumGet();
} else {
g_excInfo.phase = OS_EXC_IN_TASK;
g_excInfo.thrdPid = g_losTask.runTask->taskID;
}
g_excInfo.context = excBufAddr;
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
ArchSysExit();
}
/* Stack protector */
WEAK UINT32 __stack_chk_guard = 0xd00a0dff;
WEAK VOID __stack_chk_fail(VOID)
{
/* __builtin_return_address is a builtin function, building in gcc */
LOS_Panic("stack-protector: Kernel stack is corrupted in: 0x%x\n",
__builtin_return_address(0));
}
/* ****************************************************************************
Function : HalHwiInit
Description : initialization of the hardware interrupt
Input : None
Output : None
Return : None
**************************************************************************** */
VOID HalHwiInit(VOID)
{
EnableExceptionInterface();
for (UINT32 i = 0; i < OS_HWI_MAX_NUM; i++) {
g_hwiForm[i + OS_SYS_VECTOR_CNT] = HalHwiDefaultHandler;
HwiMask(i);
}
asm volatile ("wsr %0, vecbase" : : "r"(INIT_VECTOR_START));
return;
}

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@@ -1,147 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_timer.h"
#include "los_config.h"
#include "los_tick.h"
#include "los_arch_interrupt.h"
#include "los_arch_timer.h"
#include "los_debug.h"
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler);
STATIC UINT64 SysTickReload(UINT64 nextResponseTime);
STATIC UINT64 SysTickCycleGet(UINT32 *period);
STATIC VOID SysTickLock(VOID);
STATIC VOID SysTickUnlock(VOID);
STATIC ArchTickTimer g_archTickTimer = {
.freq = 0,
.irqNum = OS_TICK_INT_NUM,
.periodMax = LOSCFG_BASE_CORE_TICK_RESPONSE_MAX,
.init = SysTickStart,
.getCycle = SysTickCycleGet,
.reload = SysTickReload,
.lock = SysTickLock,
.unlock = SysTickUnlock,
.tickHandler = NULL,
};
STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
{
ArchTickTimer *tick = &g_archTickTimer;
tick->freq = OS_SYS_CLOCK;
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(tick->irqNum, handler, NULL);
#else
OsSetVector(tick->irqNum, handler);
#endif
#endif
ResetCcount();
SetCcompare(LOSCFG_BASE_CORE_TICK_RESPONSE_MAX);
__asm__ __volatile__("wsr %0, ccompare1; rsync" : : "a"(0));
__asm__ __volatile__("wsr %0, ccompare2; rsync" : : "a"(0));
HwiUnmask(tick->irqNum);
return LOS_OK;
}
STATIC UINT64 SysTickReload(UINT64 nextResponseTime)
{
UINT32 timerL;
if (nextResponseTime > g_archTickTimer.periodMax) {
nextResponseTime = g_archTickTimer.periodMax;
}
timerL = GetCcount();
timerL += nextResponseTime;
SetCcompare(timerL);
return nextResponseTime;
}
STATIC UINT64 SysTickCycleGet(UINT32 *period)
{
UINT32 tickCycleH;
UINT32 tickCycleL;
UINT32 temp;
static UINT64 tickCycle = 0;
(VOID)period;
UINT32 intSave = LOS_IntLock();
temp = tickCycle & 0xFFFFFFFF;
tickCycleH = tickCycle >> SHIFT_32_BIT;
tickCycleL = GetCcount();
if (tickCycleL < temp) {
tickCycleH++;
}
tickCycle = (((UINT64)tickCycleH) << SHIFT_32_BIT) | tickCycleL;
LOS_IntRestore(intSave);
return tickCycle;
}
STATIC VOID SysTickLock(VOID)
{
HwiMask(OS_TICK_INT_NUM);
}
STATIC VOID SysTickUnlock(VOID)
{
HwiUnmask(OS_TICK_INT_NUM);
}
ArchTickTimer *ArchSysTickTimerGet(VOID)
{
return &g_archTickTimer;
}
VOID Wfi(VOID)
{
__asm__ volatile("waiti 0" : : : "memory");
}
VOID Dsb(VOID)
{
__asm__ volatile("dsync" : : : "memory");
}
UINT32 ArchEnterSleep(VOID)
{
Dsb();
Wfi();
return LOS_OK;
}

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@@ -1,187 +0,0 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_arch_regs.h"
.text
.align 4
.literal_position
.global SpillWindow
SpillWindow:
rsr a2, WINDOWBASE /* read windowbase reg */
movi a3, WINDOWSTARTBITS
sub a3, a3, a2 /* get the num of high bits */
addi a3, a3, -1
ssl a3 /* set left shift bit */
rsr a3, WINDOWSTART /* read windowstart reg */
sll a3, a3
movi a2, WINDOWSTARTMASK
and a3, a3, a2
beqi a3, 0, .Linvalidwindowstart /* if a3 == 0 goto Linvalidwindowstart */
rsr a2, WINDOWBASE /* read windowbase reg */
addi a2, a2, 1
ssr a2
rsr a2, WINDOWSTART
srl a2, a2
or a2, a2, a3
movi a3, 0
.bitclear0:
bbsi.l a2, 0, .bitcleardone
srli a2, a2, 1
addi a3, a3, 1
j .bitclear0
.bitcleardone:
srli a2, a2, 1 /* drop the first bit */
wsr a2, WINDOWSTART
rsr a2, WINDOWBASE
add a2, a2, a3
wsr a2, WINDOWBASE
rsync
rsr a2, WINDOWSTART
.Lspillstart:
beqi a2, 0, .Ldone
bbsi.l a2, 0, .Lspill4
bbsi.l a2, 1, .Lspill8
bbsi.l a2, 2, .Lspill12
j .Linvalidwindow
.Lspill4:
s32e a4, a9, -16
s32e a5, a9, -12
s32e a6, a9, -8
s32e a7, a9, -4
srli a6, a2, 1
rotw 1
j .Lspillstart
.Lspill8:
s32e a4, a13, -16
s32e a5, a13, -12
s32e a6, a13, -8
s32e a7, a13, -4
l32i a3, a5, -12 /* call[i - 1]'s sp */
addi a3, a3, -16 /* base area */
s32e a8, a3, -16
s32e a9, a3, -12
s32e a10, a3, -8
s32e a11, a3, -4
srli a10, a2, 2
rotw 2
j .Lspillstart
.Lspill12:
rotw 1
s32e a0, a13, -16
s32e a1, a13, -12
s32e a2, a13, -8
s32e a3, a13, -4
l32i a3, a1, -12 /* call[i - 1]'s sp */
addi a3, a3, -16 /* base area */
s32e a4, a3, -32
s32e a5, a3, -28
s32e a6, a3, -24
s32e a7, a3, -20
s32e a8, a3, -16
s32e a9, a3, -12
s32e a10, a3, -8
s32e a11, a3, -4
rotw -1
srli a14, a2, 3
rotw 3
j .Lspillstart
.Ldone:
rotw 1
rsr a2, WINDOWBASE
ssl a2
movi a2, 1
sll a2, a2
wsr a2, WINDOWSTART
rsync
movi a2, 0
ret
.Linvalidwindowstart:
movi a2, 1
ret
.Linvalidwindow:
movi a3, 1
slli a2, a2, 1
or a2, a2, a3
rsr a3, WINDOWBASE
.RestoreWindowBase:
bbsi.l a2, WINDOWSTARTBITS - 1, .RestoreWindow
slli a2, a2, 1
addi a3, a3, -1
j .RestoreWindowBase
.RestoreWindow:
extui a3, a3, 0, WINDOWSTARTBITS /* the original bit */
addi a3, a3, 1
ssl a3
sll a3, a2
slli a2, a2, 32 - WINDOWSTARTBITS
srl a2, a2
or a2, a2, a3
extui a2, a2, 0, WINDOWSTARTBITS
wsr a2, WINDOWSTART
movi a3, 31
rsr a2, SAR
sub a2, a3, a2
wsr a2, WINDOWBASE
rsync
movi a2, 2
ret

View File

@@ -1,63 +1,41 @@
```
.
├── arch --- Code of the kernel instruction architecture layer
│   ├── arm --- ARM32 architecture
│   │   ├── arm9 --- ARM9 architecture
│   │   │ └── gcc --- Implementation of the GCC toolchain
│   │   ├── cortex-m3 --- Cortex-m3 architecture
│   │   │ └── keil --- Implementation of the keil toolchain
│   │   ├── cortex-m33 --- Cortex-m33 architecture
│   │   │ │── gcc --- Implementation of the GCC toolchain
│   │   │ │ │── NTZ --- Cortex-m33 Non-TrustZone architecture
│   │   │ │ └── TZ --- Cortex-m33 TrustZone architecture
│   │   │ └── iar --- Implementation of the IAR toolchain
│   │   │ │── NTZ --- Cortex-m33 Non-TrustZone architecture
│   │   │ └── TZ --- Cortex-m33 TrustZone architecture
│   │   └── cortex-m4 --- Cortex-m4 architecture
│   │   │ │── gcc --- Implementation of the GCC toolchain
│   │   │ └── iar --- Implementation of the IAR toolchain
│   │   └── cortex-m7 --- Cortex-m7 architecture
│   │   │── gcc --- Implementation of the GCC toolchain
│   │   └── iar --- Implementation of the IAR toolchain
│   ├── csky --- csky architecture
│   │ └── v2 --- csky v2 architecture
│   │   └── gcc --- Implementation of the GCC toolchain
│   ├── xtensa --- xtensa architecture
│   │ └── lx6 --- xtensa lx6 architecture
│   │   └── gcc --- Implementation of the GCC toolchain
│   ├── risc-v --- Risc-v architecture
│   │ ├── nuclei --- Nuclei architecture
│   │   │ └── gcc --- Implementation of the GCC toolchain
│   │ └── riscv32 --- Riscv32 architecture
│   │   └── gcc --- Implementation of the GCC toolchain
│   └── include
│   ├── los_arch.h --- Arch initialization
│   ├── los_atomic.h --- Atomic operations
│   ├── los_context.h --- Context switch
│   ├── los_interrupt.h --- Interrupts
│   ├── los_mpu.h --- Memory protection unit operations
│   └── los_timer.h --- Timer operations
├── components --- Components available for porting and header files exposed externally
├── backtrace --- Backtrace support
├── cppsupport --- C++ support
├── cpup --- CPU percent (CPUP)
├── dynlink --- Dynamic loading and linking
├── exchook --- Exception hooks
├── fs --- File systems
│ ├── lmk --- Low memory killer functions
│ ├── lms --- Lite memory sanitizer functions
│ ├── net --- Networking functions
│ ├── power --- Power management
│ ├── security --- Security isolation
│ ├── shell --- Shell function
│ ├── signal --- Signal support
│ ├── fs --- File systems
│ └── trace --- Trace tool
├── drivers --- driver Kconfig
   ├── backtrace --- Backtrace
   ├── cppsupport --- C++
   ├── cpup --- CPUP
   ├── exchook --- Exception hook
   ├── fs --- File System
   └── net --- Network
├── kal --- Kernel Abstraction Layer, APIs exposed externally, including CMSIS APIs and part of POSIX APIs
│   ├── cmsis --- CMSIS
│   └── posix --- POSIX
├── kernel --- Code for defining the minimum kernel function set
│   ├── arch --- Code of the kernel instruction architecture layer
│   │   ├── arm --- ARM32 architecture
│   │   │   ├── cortex-m3 --- Cortex-m3 architecture
│   │   │   │ └── keil --- Implementation of the Keil toolchain
│   │   │   ├── cortex-m33 --- Cortex-m33 architecture
│   │   │   │ │── gcc --- Implementation of the GCC toolchain
│   │   │   │ └── iar --- Implementation of the IAR toolchain
│   │   │   └── cortex-m4 --- Cortex-m4 architecture
│   │   │   │ │── gcc --- Implementation of the GCC toolchain
│   │   │   │ └── iar --- Implementation of the IAR toolchain
│   │   │   └── cortex-m7 --- Cortex-m7 architecture
│   │   │   │ │── gcc --- Implementation of the GCC toolchain
│   │   │   │ └── iar --- Implementation of the IAR toolchain
│   │   ├── risc-v --- Risc-v architecture
│   │   │ ├── nuclei --- Nuclei architecture
│   │   │   │ └── gcc --- Implementation of the GCC toolchain
│   │   │ └── riscv32 --- Riscv32 architecture
│   │   │   │ └── gcc --- Implementation of the GCC toolchain
│   │   └── include
│   │   ├── los_arch.h --- Arch initialization
│   │   ├── los_atomic.h --- Atomic operations
│   │   ├── los_context.h --- Context switch
│   │   ├── los_interrupt.h --- Interrupts
│   │   ├── los_mpu.h --- Memory protection unit operations
│   │   └── los_timer.h --- Timer operations
│   ├── include
│   │   ├── los_config.h --- Configuration parameters
│   │   ├── los_event.h --- Events management
@@ -73,15 +51,14 @@
│   │   └── los_tick.h --- Tick
│   └── src
├── targets
│   └── riscv_nuclei_demo_soc_gcc
── GCC --- Compilation config
│ │ ├── OS_CONFIG --- Board config
│ │ ├── SoC --- SOC codes
│ │ ── Src --- Application codes
   └── riscv_nuclei_gd32vf103_soc_gcc
│   └── riscv_sifive_fe310_gcc
├── testsuites --- Kernel testsuites
├── tools --- Kernel tools
│   └── targets
   ── riscv_nuclei_demo_soc_gcc
│ ├── GCC --- Compilation config
│ ├── OS_CONFIG --- Board config
── SoC --- SOC codes
│ └── Src --- Application codes
│   └── riscv_nuclei_gd32vf103_soc_gcc
│   └── riscv_sifive_fe310_gcc
└── utils
├── internal
├── BUILD.gn --- Gn build config file
@@ -94,5 +71,6 @@
├── los_hook.h
├── los_list.h --- Doubly linked list
└── los_reg.h --- Register macros
└── src
```

View File

@@ -1,62 +1,41 @@
```
.
├── arch --- 内核指令架构层代码
│   ├── arm --- ARM32架构
│   │   ├── arm9 --- arm9架构
│   │   │ └── gcc --- gcc 编译工具链实现
│   │   ├── cortex-m3 --- Cortex-m3架构
│   │   │ └── keil --- Keil编译工具链实现
│   │   ├── cortex-m33 --- Cortex-m33架构
│   │   │ │── gcc --- GCC编译工具链实现
│   │   │ │ │── NTZ --- Cortex-m33非TrustZone架构实现
│   │   │ │ └── TZ --- Cortex-m33 TrustZone架构实现
│   │   │ └── iar --- IAR编译工具链实现
│   │   │ │── NTZ --- Cortex-m33非TrustZone架构实现
│   │   │ └── TZ --- Cortex-m33 TrustZone架构实现
│   │   └── cortex-m4 --- Cortex-m4架构
│   │   │ │── gcc --- GCC编译工具链实现
│   │   │ └── iar --- IAR编译工具链实现
│   │   └── cortex-m7 --- Cortex-m7架构
│   │   │── gcc --- GCC编译工具链实现
│   │   └── iar --- IAR编译工具链实现
│   ├── csky --- csky架构
│   │ └── v2 --- csky v2架构
│   │   └── gcc --- GCC编译工具链实现
│   ├── xtensa --- xtensa架构
│   │ └── lx6 --- xtensa lx6架构
│   │   └── gcc --- GCC编译工具链实现
│   ├── risc-v --- Risc-v架构
│   │ ├── nuclei --- Nuclei架构
│   │   │ └── gcc --- GCC编译工具链实现
│   │ └── riscv32 --- Riscv32架构
│   │   └── gcc --- GCC编译工具链实现
│   └── include
│   ├── los_arch.h --- 定义arch初始化
│   ├── los_atomic.h --- 定义通用arch原子操作
│   ├── los_context.h --- 定义通用arch上下文切换
│   ├── los_interrupt.h --- 定义通用arch中断
│   ├── los_mpu.h --- 定义通用arch内存保护
│   └── los_timer.h --- 定义通用arch定时器
├── components --- 移植可选组件,依赖内核,单独对外提供头文件
├── backtrace --- 回溯功能
├── cppsupport --- C++支持
├── cpup --- CPUP功能
├── dynlink --- 动态加载与链接
├── exchook --- 异常钩子
├── fs --- 文件系统
│ ├── lmk --- Low memory killer 机制
│ ├── lms --- Lite memory sanitizer 机制
│ ├── net --- Network功能
│ ├── power --- 低功耗管理
│ ├── security --- 安全隔离
│ ├── shell --- shell功能
│ ├── signal --- signal支持
│ └── trace --- trace 工具
├── drivers --- 驱动框架Kconfig
   ├── backtrace --- 回溯栈支持
   ├── cppsupport --- C++支持
   ├── cpup --- CPUP功能
   ├── exchook --- 异常钩子
   ├── fs --- 文件系统
   └── net --- 网络功能
├── kal --- 内核抽象层提供内核对外接口当前支持CMSIS接口和部分POSIX接口
│   ├── cmsis --- CMSIS标准支持
│   └── posix --- POSIX标准支持
├── kernel --- 内核最小功能集代码
│   ├── arch --- 内核指令架构层代码
│   │   ├── arm --- ARM32架构
│   │   │   ├── cortex-m3 --- Cortex-m3架构
│   │   │   │ └── keil --- Keil编译工具链实现
│   │   │   ├── cortex-m33 --- Cortex-m33架构
│   │   │   │ │── gcc --- GCC编译工具链实现
│   │   │   │ └── iar --- IAR编译工具链实现
│   │   │   └── cortex-m4 --- Cortex-m4架构
│   │   │   │ │── gcc --- GCC编译工具链实现
│   │   │   │ └── iar --- IAR编译工具链实现
│   │   │   └── cortex-m7 --- Cortex-m7架构
│   │   │   │ │── gcc --- GCC编译工具链实现
│   │   │   │ └── iar --- IAR编译工具链实现
│   │   ├── risc-v --- Risc-v架构
│   │   │ ├── nuclei --- Nuclei架构
│   │   │   │ └── gcc --- GCC编译工具链实现
│   │   │ └── riscv32 --- Riscv32架构
│   │   │   │ └── gcc --- GCC编译工具链实现
│   │   └── include
│   │   ├── los_arch.h --- 定义arch初始化
│   │   ├── los_atomic.h --- 定义通用arch原子操作
│   │   ├── los_context.h --- 定义通用arch上下文切换
│   │   ├── los_interrupt.h --- 定义通用arch中断
│   │   ├── los_mpu.h --- 定义通用arch内存保护
│   │   └── los_timer.h --- 定义通用arch定时器
│   ├── include
│   │   ├── los_config.h --- 功能开关和配置参数
│   │   ├── los_event.h --- 事件
@@ -72,15 +51,14 @@
│   │   └── los_tick.h --- Tick时钟
   └── src
├── targets
└── riscv_nuclei_demo_soc_gcc
── GCC --- 编译相关
│ │ ├── OS_CONFIG --- 开发板配置功能开关和配置参数
│ │ ├── SoC --- SOC相关代码
│ │ ── Src --- Application相关代码
└── riscv_nuclei_gd32vf103_soc_gcc
│ └── riscv_sifive_fe310_gcc
├── testsuites --- 内核测试用例
├── tools --- 内核工具
   └── targets
   ── riscv_nuclei_demo_soc_gcc
│ ├── GCC --- 编译相关
│ ├── OS_CONFIG --- 开发板配置功能开关和配置参数
── SoC --- SOC相关代码
│ └── Src --- Application相关代码
   └── riscv_nuclei_gd32vf103_soc_gcc
│   └── riscv_sifive_fe310_gcc
└── utils
├── internal
├── BUILD.gn --- Gn构建文件
@@ -93,5 +71,6 @@
├── los_hook.h
├── los_list.h --- 双向链表
└── los_reg.h --- 寄存器读写宏定义
└── src
```

View File

@@ -1,61 +0,0 @@
{
"name": "@ohos/liteos_m",
"version": "3.1.0",
"description": "liteos-m kernel",
"publishAs": "code-segment",
"homePage": "https://gitee.com/openharmony",
"repository": "https://gitee.com/openharmony/kernel_liteos_m",
"license": "BSD 3-clause",
"domain": "os",
"language": "",
"private": false,
"scripts": {},
"tags": [
"kernel"
],
"keywords": [
"kernel",
"liteos-m"
],
"envs": [],
"dirs": [],
"author": {},
"contributors": [],
"segment": {
"destPath": "kernel/liteos_m"
},
"component": {
"name": "liteos_m",
"subsystem": "kernel",
"syscap": [
"SystemCapability.Kernel.liteos-m"
],
"features": [],
"adapted_system_type": [
"mini"
],
"rom": "300KB",
"ram": "100KB",
"deps": {
"components": [
"utils_lite"
],
"third_party": [
"bounds_checking_function",
"cmsis",
"fatfs",
"littlefs",
"lwip",
"musl"
]
},
"build": {
"sub_component": [
"//kernel/liteos_m:kernel",
"//kernel/liteos_m:build_kernel_image"
],
"inner_kits": [],
"test": []
}
}
}

View File

@@ -1,70 +0,0 @@
# Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
# Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
group("components") {
deps = [
"backtrace",
"cppsupport",
"cpup",
"debugtools",
"dynlink",
"exchook",
"fs",
"lmk",
"lms",
"net",
"power",
"security",
"shell",
"signal",
"trace",
]
}
config("public") {
configs = [
"backtrace:public",
"cppsupport:public",
"cpup:public",
"dynlink:public",
"exchook:public",
"fs:public",
"net:public",
"power:public",
"security:public",
"shell:public",
"trace:public",
"lmk:public",
"lms:public",
"signal:public",
"debugtools:public",
]
}

View File

@@ -27,15 +27,13 @@
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_switch = defined(LOSCFG_KERNEL_BACKTRACE)
module_name = get_path_info(rebase_path("."), "name")
kernel_module(module_name) {
static_library("backtrace") {
sources = [ "los_backtrace.c" ]
configs += [ "$LITEOSTOPDIR:warn_config" ]
}
config("public") {
include_dirs = [ "." ]
include_dirs = [
"../../kernel/include",
"../../kernel/arch/include",
"../../utils",
"//third_party/bounds_checking_function/include",
]
}

View File

@@ -32,23 +32,9 @@
#include "los_backtrace.h"
#include "los_task.h"
#include "los_debug.h"
#include "los_arch.h"
#if (LOSCFG_BACKTRACE_TYPE == 4)
#include "los_arch_regs.h"
#endif
#if (LOSCFG_BACKTRACE_TYPE != 0)
/* This function is used to judge whether the data in the stack is a code section address.
The default code section is only one, but there may be more than one. Modify the
judgment condition to support multiple code sections. */
WEAK BOOL OsStackDataIsCodeAddr(UINTPTR value)
{
if ((value >= CODE_START_ADDR) && (value < CODE_END_ADDR)) {
return TRUE;
}
return FALSE;
}
#if (LOSCFG_BACKTRACE_TYPE == 1)
#define OS_BACKTRACE_START 2
/* Thumb instruction, so the pc must be an odd number */
@@ -61,6 +47,52 @@ WEAK BOOL OsStackDataIsCodeAddr(UINTPTR value)
#define OS_BLX_INX_MASK 0xFF00
#define OS_BLX_INX 0x4700
#if defined(__ICCARM__) || defined(__CC_ARM)
STATIC INLINE UINTPTR HalSpGet(VOID)
{
UINTPTR sp;
__asm("mov %0, sp" : "=r" (sp));
return sp;
}
STATIC INLINE UINTPTR HalPspGet(VOID)
{
UINTPTR psp;
__asm("mrs %0, psp" : "=r" (psp));
return psp;
}
STATIC INLINE UINTPTR HalMspGet(VOID)
{
UINTPTR msp;
__asm("mrs %0, msp" : "=r" (msp));
return msp;
}
#elif defined(__CLANG_ARM) || defined(__GNUC__)
STATIC INLINE UINTPTR HalSpGet(VOID)
{
UINTPTR sp;
__asm volatile("mov %0, sp" : "=r" (sp));
return sp;
}
STATIC INLINE UINTPTR HalPspGet(VOID)
{
UINTPTR psp;
__asm volatile("mrs %0, psp" : "=r" (psp));
return psp;
}
STATIC INLINE UINTPTR HalMspGet(VOID)
{
UINTPTR msp;
__asm volatile("mrs %0, msp" : "=r" (msp));
return msp;
}
#else
#error Unknown compiler.
#endif
STATIC INLINE BOOL OsInsIsBlOrBlx(UINTPTR addr)
{
UINT16 ins1 = *((UINT16 *)addr);
@@ -93,8 +125,8 @@ STATIC INLINE UINT32 OsStackAddrGet(UINTPTR *stackStart, UINTPTR *stackEnd, UINT
}
}
} else {
if (ArchSpGet() != ArchPspGet()) {
*stackStart = ArchMspGet();
if (HalSpGet() != HalPspGet()) {
*stackStart = HalMspGet();
*stackEnd = CSTACK_END_ADDR;
if ((*stackStart < CSTACK_START_ADDR) || (*stackStart >= CSTACK_END_ADDR)) {
PRINT_ERR("msp stack [0x%x, 0x%x], cur sp(0x%x) is overflow!\n",
@@ -103,7 +135,7 @@ STATIC INLINE UINT32 OsStackAddrGet(UINTPTR *stackStart, UINTPTR *stackEnd, UINT
}
PRINTK("msp, start = %x, end = %x\n", *stackStart, *stackEnd);
} else {
*stackStart = ArchPspGet();
*stackStart = HalPspGet();
UINT32 taskID = LOS_CurTaskIDGet();
LosTaskCB *taskCB = OS_TCB_FROM_TID(taskID);
*stackEnd = (UINTPTR)taskCB->topOfStack + taskCB->stackSize;
@@ -148,10 +180,12 @@ STATIC INLINE UINTPTR OsAddrIsValid(UINTPTR sp)
return pc;
}
#elif (LOSCFG_BACKTRACE_TYPE == 2)
STATIC INLINE BOOL OsBackTraceFpCheck(UINT32 value);
#define OS_BACKTRACE_START 1
#define OS_RA_OFFSET 4
#define OS_FP_OFFSET 8
#define OS_FP_ALIGN(value) (((UINT32)(value) & (UINT32)(LOSCFG_STACK_POINT_ALIGN_SIZE - 1)) == 0)
#define OS_FP_CHECK(value) (((UINT32)(value) != FP_INIT_VALUE) && OS_FP_ALIGN(value))
STATIC INLINE UINTPTR OsFpGet(VOID)
{
@@ -161,41 +195,12 @@ STATIC INLINE UINTPTR OsFpGet(VOID)
return fp;
}
WEAK BOOL IsValidFP(UINTPTR fp)
{
LosTaskCB *taskCB = NULL;
UINTPTR stackTop, stackBottom;
UINTPTR irqStackTop, irqStackBottom;
if ((fp == FP_INIT_VALUE) || !OS_FP_ALIGN(fp)) {
return FALSE;
}
if (LOS_TaskIsRunning()) {
taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
stackTop = taskCB->topOfStack;
stackBottom = taskCB->topOfStack + taskCB->stackSize;
irqStackTop = (UINTPTR)CSTACK_START_ADDR;
irqStackBottom = (UINTPTR)CSTACK_SECTION_END;
} else {
stackTop = 0;
stackBottom = 0;
irqStackTop = (UINTPTR)CSTACK_START_ADDR;
irqStackBottom = (UINTPTR)CSTACK_SECTION_END;
}
if (((fp > stackTop) && (fp <= stackBottom)) || ((fp > irqStackTop) && (fp <= irqStackBottom))) {
return TRUE;
}
return FALSE;
}
VOID LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP)
{
UINTPTR backFp;
UINTPTR tmpFp;
UINTPTR backRa;
UNUSED(SP);
UINT32 backFp = OsFpGet();
UINT32 tmpFp;
UINT32 backRa;
UINT32 count = 0;
UINT32 index = 0;
@@ -203,31 +208,21 @@ VOID LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP)
return;
}
if (SP != 0) {
backFp = SP;
} else {
backFp = OsFpGet();
}
if (!IsValidFP(backFp)) {
PRINT_ERR("BackTrace failed! Invalid fp 0x%x\n", backFp);
return;
}
do {
while (OS_FP_CHECK(backFp)) {
tmpFp = backFp;
backRa = *((UINTPTR *)(UINTPTR)(tmpFp - OS_RA_OFFSET));
backFp = *((UINTPTR *)(UINTPTR)(tmpFp - OS_FP_OFFSET));
backRa = *((UINT32 *)(UINTPTR)(tmpFp - OS_RA_OFFSET));
backFp = *((UINT32 *)(UINTPTR)(tmpFp - OS_FP_OFFSET));
if (index++ < jumpCount) {
continue;
}
LR[count] = backRa;
count++;
if ((count == LRSize) || (backFp == tmpFp)) {
if ((count == LRSize) || (backFp == tmpFp) ||
(!OsStackDataIsCodeAddr(backRa))) {
break;
}
} while (IsValidFP(backFp));
}
if (count < LRSize) {
LR[count] = 0;
@@ -345,323 +340,6 @@ STATIC INLINE UINTPTR OsAddrIsValid(UINTPTR sp)
return pc;
}
#elif (LOSCFG_BACKTRACE_TYPE == 4)
#define OS_BACKTRACE_START 0
#define ALIGN_MASK (4 - 1)
#define OS_REG_LR_OFFSET (CONTEXT_SIZE - 8)
UINT32 IsSpAligned(UINT32 value)
{
return (value & (UINT32)(ALIGN_MASK)) == 0;
}
STATIC INLINE UINTPTR HalGetLr(VOID)
{
UINTPTR regLr;
__asm__ __volatile__("mov %0, a0" : "=r"(regLr));
return regLr;
}
/* This function is used to check sp address. */
BOOL IsValidSP(UINTPTR regSP, UINTPTR start, UINTPTR end)
{
return (regSP >= start) && (regSP <= end) && IsSpAligned(regSP);
}
/* This function is used to check return address. */
BOOL IsValidRa(UINTPTR regRA)
{
regRA &= ~VIR_TEXT_ADDR_MASK;
regRA |= TEXT_ADDR_MASK;
return OsStackDataIsCodeAddr(regRA);
}
BOOL FindSuitableStack(UINTPTR regSP, UINTPTR *start, UINTPTR *end)
{
UINT32 stackStart;
UINT32 stackEnd;
BOOL found = FALSE;
if (LOS_TaskIsRunning()) {
UINT32 taskID = LOS_CurTaskIDGet();
LosTaskCB *taskCB = OS_TCB_FROM_TID(taskID);
stackStart = taskCB->topOfStack;
stackEnd = taskCB->topOfStack + taskCB->stackSize;
if (IsValidSP(regSP, stackStart, stackEnd)) {
found = TRUE;
goto FOUND;
}
}
if (IsValidSP(regSP, CSTACK_START_ADDR, CSTACK_END_ADDR)) {
stackStart = CSTACK_START_ADDR;
stackEnd = CSTACK_END_ADDR;
found = TRUE;
goto FOUND;
}
FOUND:
if (found == TRUE) {
*start = stackStart;
*end = stackEnd;
}
return found;
}
UINT32 HalBackTraceGet(UINTPTR sp, UINT32 retAddr, UINTPTR *callChain, UINT32 maxDepth, UINT32 jumpCount)
{
UINTPTR tmpSp;
UINT32 tmpRa;
UINTPTR backRa = retAddr;
UINTPTR backSp = sp;
UINTPTR stackStart;
UINT32 stackEnd;
UINT32 count = 0;
UINT32 index = 0;
if (FindSuitableStack(sp, &stackStart, &stackEnd) == FALSE) {
PRINTK("sp:0x%x error, backtrace failed!\n", sp);
return 0;
}
while (IsValidSP(backSp, stackStart, stackEnd)) {
if (callChain == NULL) {
PRINTK("trace%u ra:0x%x sp:0x%x\n", count, (backRa << WINDOW_INCREMENT_SHIFT) >>
WINDOW_INCREMENT_SHIFT, backSp);
} else {
if (index++ < jumpCount) {
continue;
}
backRa &= ~VIR_TEXT_ADDR_MASK;
backRa |= TEXT_ADDR_MASK;
callChain[count++] = backRa;
}
tmpRa = backRa;
tmpSp = backSp;
backRa = *((UINT32 *)(UINTPTR)(tmpSp - RA_OFFSET));
backSp = *((UINT32 *)(UINTPTR)(tmpSp - SP_OFFSET));
if ((tmpRa == backRa) || (backSp == tmpSp) || (count == maxDepth) || !IsValidRa(backRa)) {
break;
}
}
return count;
}
VOID LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP)
{
UINTPTR reglr;
if (LR == NULL) {
return;
}
if (SP == 0) {
__asm__ __volatile__("mov %0, sp" : "=a"(SP) : :);
__asm__ __volatile__("mov %0, a0" : "=a"(reglr) : :);
} else {
reglr = *(UINT32 *)(SP - OS_REG_LR_OFFSET);
}
HakSpillWindow();
HalBackTraceGet(SP, reglr, LR, LRSize, jumpCount);
}
#elif (LOSCFG_BACKTRACE_TYPE == 5)
#define OS_BACKTRACE_START 0
UINT32 IsAligned(UINT32 val, UINT32 align)
{
return ((val & (align - 1)) == 0);
}
STATIC INLINE UINTPTR OsSpGet(VOID)
{
UINTPTR regSp;
__asm__ __volatile__("mov %0, sp" : "=r"(regSp));
return regSp;
}
/* This function is used to check sp. */
BOOL IsValidSP(UINTPTR regSP, UINTPTR start, UINTPTR end)
{
return (regSP >= start) && (regSP <= end);
}
BOOL FindSuitableStack(UINTPTR regSP, UINTPTR *start, UINTPTR *end)
{
UINT32 stackStart;
UINT32 stackEnd;
BOOL found = FALSE;
if (LOS_TaskIsRunning()) {
UINT32 taskID = LOS_CurTaskIDGet();
LosTaskCB *taskCB = OS_TCB_FROM_TID(taskID);
stackStart = taskCB->topOfStack;
stackEnd = taskCB->topOfStack + taskCB->stackSize;
if (IsValidSP(regSP, stackStart, stackEnd)) {
found = TRUE;
goto FOUND;
}
}
if (IsValidSP(regSP, CSTACK_START_ADDR, CSTACK_END_ADDR)) {
stackStart = CSTACK_START_ADDR;
stackEnd = CSTACK_END_ADDR;
found = TRUE;
goto FOUND;
}
FOUND:
if (found == TRUE) {
*start = stackStart;
*end = stackEnd;
}
return found;
}
VOID LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP)
{
UINTPTR stackPointer;
UINTPTR topOfStack;
UINTPTR tmpStack = 0;
UINTPTR stackBottom;
UINTPTR checkBL;
UINT32 count = 0;
UINT32 index = 0;
if (LR == NULL) {
return;
}
if (SP == 0) {
SP = OsSpGet();
}
stackPointer = SP;
if (FindSuitableStack(stackPointer, &topOfStack, &stackBottom) == FALSE) {
return;
}
while ((stackPointer < stackBottom) && (count < LRSize)) {
if (IsValidSP(*(UINT32 *)stackPointer, topOfStack, stackBottom)
&& OsStackDataIsCodeAddr(*(UINT32 *)(stackPointer + STACK_OFFSET))
&& IsAligned(*(UINT32 *)stackPointer, ALGIN_CODE)) {
if (tmpStack == *(UINT32 *)stackPointer) {
break;
}
tmpStack = *(UINT32 *)stackPointer;
checkBL = *(UINT32 *)(stackPointer + STACK_OFFSET);
if (count++ < jumpCount) {
continue;
}
stackPointer = tmpStack;
LR[index++] = checkBL;
continue;
}
stackPointer += STACK_OFFSET;
}
if (index < LRSize) {
LR[index] = 0;
}
}
#elif (LOSCFG_BACKTRACE_TYPE == 6)
#define OS_BACKTRACE_START 1
#define STACK_OFFSET 4
#define THUMB_OFFSET 2
#define THUMB_BIT 16
#define ARM_ALIGN_CODE 4
#define THUMB_ALIGN_CODE 2
#define BL_CMD_OFFSET 4
#define ARM_BL_MASK 0xEB000000
#define THUMB_BL_MASK 0xF000F000
#define CLEAR_LOW_BIT_MASK 0xFFFFFFFE
STATIC INLINE BOOL IsAligned(UINT32 val, UINT32 align)
{
return ((val & (align - 1)) == 0);
}
STATIC INLINE UINTPTR OsSpGet(VOID)
{
UINTPTR SP;
__asm volatile("mov %0, sp" : "=r"(SP));
return SP;
}
STATIC INLINE BOOL IsArmValidLr(UINTPTR lr)
{
return ((*(UINT32 *)(lr - BL_CMD_OFFSET) & ARM_BL_MASK) == ARM_BL_MASK);
}
STATIC INLINE BOOL IsThumbValidLr(UINTPTR lr)
{
lr = (*(UINT16 *)(lr - BL_CMD_OFFSET) << THUMB_BIT) + *(UINT16 *)(lr - THUMB_OFFSET);
return ((lr & THUMB_BL_MASK) == THUMB_BL_MASK);
}
VOID LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP)
{
UINT32 count = 0;
UINT32 index = 0;
LosTaskCB *taskCB = NULL;
UINT32 taskID;
UINT32 stackStart, stackEnd;
UINTPTR framePtr, tmpFramePtr, linkReg;
if (LR == NULL) {
return;
}
if (SP == 0) {
SP = OsSpGet();
}
if (LOS_TaskIsRunning()) {
taskID = LOS_CurTaskIDGet();
taskCB = OS_TCB_FROM_TID(taskID);
stackStart = taskCB->topOfStack;
stackEnd = stackStart + taskCB->stackSize;
} else {
stackStart = CSTACK_START_ADDR;
stackEnd = CSTACK_END_ADDR;
}
while ((SP > stackStart) && (SP < stackEnd)) {
linkReg = *(UINTPTR *)SP;
if (!OsStackDataIsCodeAddr(linkReg)) {
SP += STACK_OFFSET;
continue;
}
if (((!IsAligned(linkReg, ARM_ALIGN_CODE)) || !IsArmValidLr(linkReg)) &&
((!IsAligned(linkReg - 1, THUMB_ALIGN_CODE)) || !IsThumbValidLr(linkReg - 1))) {
SP += STACK_OFFSET;
continue;
}
if (index >= jumpCount) {
LR[count++] = linkReg & CLEAR_LOW_BIT_MASK;
if (count == LRSize) {
break;
}
}
++index;
SP += STACK_OFFSET;
}
/* if linkReg is not enough,clean up the last of the effective LR as the end. */
if (count < LRSize) {
LR[count] = 0;
}
}
#else
#error Unknown backtrace type.
#endif
@@ -729,9 +407,10 @@ VOID LOS_BackTrace(VOID)
PRINTK("----- traceback end -----\r\n");
}
VOID OsBackTraceInit(VOID)
VOID OSBackTraceInit(VOID)
{
OsBackTraceHookSet(LOS_RecordLR);
}
#endif

View File

@@ -52,11 +52,11 @@ extern "C" {
#define CODE_SECTION_NAME ".text"
/* The default C stack section name is CSTACK */
#define CSTACK_SECTION_NAME "CSTACK"
#pragma section = CODE_SECTION_NAME
#pragma section = CSTACK_SECTION_NAME
#pragma section=CODE_SECTION_NAME
#pragma section=CSTACK_SECTION_NAME
/* Default only one code section. In fact, there may be more than one.
You can define more than one and redefine the OsStackDataIsCodeAddr function
You can define more than one and modify the OsStackDataIsCodeAddr function
to support searching in multiple code sections */
#define CODE_START_ADDR ((UINTPTR)__section_begin(CODE_SECTION_NAME))
#define CODE_END_ADDR ((UINTPTR)__section_end(CODE_SECTION_NAME))
@@ -84,7 +84,7 @@ extern CHAR *CODE_SECTION_START(CODE_SECTION_NAME);
extern CHAR *CODE_SECTION_END(CODE_SECTION_NAME);
/* Default only one code section. In fact, there may be more than one.
You can define more than one and redefine the OsStackDataIsCodeAddr function
You can define more than one and modify the OsStackDataIsCodeAddr function
to support searching in multiple code sections */
#define CODE_START_ADDR ((UINTPTR)&CODE_SECTION_START(CODE_SECTION_NAME))
#define CODE_END_ADDR ((UINTPTR)&CODE_SECTION_END(CODE_SECTION_NAME))
@@ -106,7 +106,7 @@ extern CHAR *CSTACK_SECTION_START;
extern CHAR *CSTACK_SECTION_END;
/* Default only one code section. In fact, there may be more than one.
You can define more than one and redefine the OsStackDataIsCodeAddr function
You can define more than one and modify the OsStackDataIsCodeAddr function
to support searching in multiple code sections */
#define CODE_START_ADDR ((UINTPTR)&CODE_SECTION_START)
#define CODE_END_ADDR ((UINTPTR)&CODE_SECTION_END)
@@ -138,85 +138,22 @@ extern CHAR *CSTACK_SECTION_END;
#else
#error Unknown compiler.
#endif
#elif (LOSCFG_BACKTRACE_TYPE == 4)
/* The default code section start address */
#define CODE_SECTION_START __text_start
/* The default code section end address */
#define CODE_SECTION_END __text_end
/* The default C stack section start address */
#define CSTACK_SECTION_START __init_stack_s
/* The default C stack section end address */
#define CSTACK_SECTION_END __init_stack_e
extern CHAR *CODE_SECTION_START;
extern CHAR *CODE_SECTION_END;
extern CHAR *CSTACK_SECTION_START;
extern CHAR *CSTACK_SECTION_END;
#define CODE_START_ADDR ((UINTPTR)&CODE_SECTION_START)
#define CODE_END_ADDR ((UINTPTR)&CODE_SECTION_END)
#define CSTACK_START_ADDR ((UINTPTR)&CSTACK_SECTION_START)
#define CSTACK_END_ADDR ((UINTPTR)&CSTACK_SECTION_END)
#define VIR_TEXT_ADDR_MASK 0x80000000
#define TEXT_ADDR_MASK 0x40000000
#define RA_OFFSET 16
#define SP_OFFSET 12
#define WINDOW_INCREMENT_SHIFT 2
UINT32 HalBackTraceGet(UINTPTR sp, UINT32 retAddr, UINTPTR *callChain, UINT32 maxDepth, UINT32 jumpCount);
#elif (LOSCFG_BACKTRACE_TYPE == 5)
/* The default code section start address */
#define CODE_SECTION_START __text_start
/* The default code section end address */
#define CODE_SECTION_END __text_end
/* The default C stack section start address */
#define CSTACK_SECTION_START __init_stack_s
/* The default C stack section end address */
#define CSTACK_SECTION_END __ram_end
extern CHAR *CODE_SECTION_START;
extern CHAR *CODE_SECTION_END;
extern CHAR *CSTACK_SECTION_START;
extern CHAR *CSTACK_SECTION_END;
#define CODE_START_ADDR ((UINTPTR)&CODE_SECTION_START)
#define CODE_END_ADDR ((UINTPTR)&CODE_SECTION_END)
#define CSTACK_START_ADDR ((UINTPTR)&CSTACK_SECTION_START)
#define CSTACK_END_ADDR ((UINTPTR)&CSTACK_SECTION_END)
#define ALGIN_CODE 2
#define STACK_OFFSET 4
#elif (LOSCFG_BACKTRACE_TYPE == 6)
extern CHAR *__svc_stack;
extern CHAR *__svc_stack_top;
/* The default code section start address */
#define CODE_SECTION_START __text_start
/* The default code section end address */
#define CODE_SECTION_END __text_end
/* The default C stack section start address */
#define CSTACK_SECTION_START __svc_stack
/* The default C stack section end address */
#define CSTACK_SECTION_END __svc_stack_top
extern CHAR *CODE_SECTION_START;
extern CHAR *CODE_SECTION_END;
extern CHAR *CSTACK_SECTION_START;
extern CHAR *CSTACK_SECTION_END;
/* Default only one code section. In fact, there may be more than one.
You can define more than one and redefine the OsStackDataIsCodeAddr function
to support searching in multiple code sections */
#define CODE_START_ADDR ((UINTPTR)&CODE_SECTION_START)
#define CODE_END_ADDR ((UINTPTR)&CODE_SECTION_END)
#define CSTACK_START_ADDR ((UINTPTR)&CSTACK_SECTION_START)
#define CSTACK_END_ADDR ((UINTPTR)&CSTACK_SECTION_END)
#endif
/* This function is used to judge whether the data in the stack is a code section address.
The default code section is only one, but there may be more than one. Modify the
judgment condition to support multiple code sections. */
STATIC INLINE BOOL OsStackDataIsCodeAddr(UINTPTR value)
{
if ((value >= CODE_START_ADDR) && (value < CODE_END_ADDR)) {
return TRUE;
}
return FALSE;
}
/* This function is currently used to register the memory leak check hook,
other uses do not need to be called temporarily. */
VOID OsBackTraceInit(VOID);
VOID OSBackTraceInit(VOID);
/* This function is used to print the function call stack. */
VOID LOS_BackTrace(VOID);
@@ -230,5 +167,4 @@ VOID LOS_RecordLR(UINTPTR *LR, UINT32 LRSize, UINT32 jumpCount, UINTPTR SP);
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif
#endif

View File

@@ -27,15 +27,8 @@
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_switch = defined(LOSCFG_KERNEL_CPPSUPPORT)
module_name = get_path_info(rebase_path("."), "name")
kernel_module(module_name) {
static_library("cppsupport") {
sources = [ "los_cppsupport.c" ]
configs += [ "$LITEOSTOPDIR:warn_config" ]
}
config("public") {
include_dirs = [ "." ]
include_dirs = [ "../../utils" ]
}

View File

@@ -31,6 +31,7 @@
#include "los_cppsupport.h"
typedef VOID (*InitFunc)(VOID);
INT32 LOS_CppSystemInit(UINTPTR initArrayStart, UINTPTR initArrayEnd)
@@ -38,10 +39,12 @@ INT32 LOS_CppSystemInit(UINTPTR initArrayStart, UINTPTR initArrayEnd)
UINTPTR *start;
InitFunc initFunc = NULL;
for (start = (UINTPTR *)initArrayStart; start < (UINTPTR *)initArrayEnd; start++) {
for (start = (UINTPTR *)initArrayStart; start < (UINTPTR *)initArrayEnd; start++){
initFunc = (InitFunc)(*start);
initFunc();
}
return 0;
}

View File

@@ -27,15 +27,13 @@
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_switch = defined(LOSCFG_BASE_CORE_CPUP)
module_name = get_path_info(rebase_path("."), "name")
kernel_module(module_name) {
static_library("cpup") {
sources = [ "los_cpup.c" ]
configs += [ "$LITEOSTOPDIR:warn_config" ]
}
config("public") {
include_dirs = [ "." ]
include_dirs = [
"../../kernel/include",
"../../kernel/arch/include",
"../../utils",
"//third_party/bounds_checking_function/include",
]
}

View File

@@ -35,15 +35,8 @@
#include "los_debug.h"
#include "los_tick.h"
#if (LOSCFG_BASE_CORE_SWTMR == 1)
#include "los_swtmr.h"
#endif
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
#include "los_arch_interrupt.h"
#endif
#if (LOSCFG_BASE_CORE_CPUP == 1)
/**
* @ingroup los_cpup
* CPU usage-type macro: used for tasks.
@@ -61,79 +54,7 @@
LITE_OS_SEC_BSS UINT16 g_cpupInitFlg = 0;
LITE_OS_SEC_BSS OsCpupCB *g_cpup = NULL;
LITE_OS_SEC_BSS UINT64 g_lastRecordTime;
LITE_OS_SEC_BSS UINT16 g_hisPos; /* current Sampling point of historyTime */
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
LITE_OS_SEC_BSS UINT16 g_irqCpupInitFlg = 0;
LITE_OS_SEC_BSS UINT16 g_irqHisPos = 0; /* current Sampling point of historyTime */
LITE_OS_SEC_BSS UINT64 g_irqLastRecordTime;
LITE_OS_SEC_BSS OsIrqCpupCB *g_irqCpup = NULL;
LITE_OS_SEC_BSS STATIC UINT64 g_cpuHistoryTime[OS_CPUP_HISTORY_RECORD_NUM];
#define OS_CPUP_USED 0x1U
#if (LOSCFG_BASE_CORE_SWTMR == 1)
LITE_OS_SEC_TEXT_INIT VOID OsCpupGuard(VOID)
{
UINT16 prevPos;
UINT32 loop;
UINT32 intSave;
intSave = LOS_IntLock();
prevPos = g_irqHisPos;
if (g_irqHisPos == OS_CPUP_HISTORY_RECORD_NUM - 1) {
g_irqHisPos = 0;
} else {
g_irqHisPos++;
}
g_cpuHistoryTime[prevPos] = 0;
for (loop = 0; loop < LOSCFG_PLATFORM_HWI_LIMIT; loop++) {
if (g_irqCpup[loop].status != OS_CPUP_USED) {
continue;
}
g_irqCpup[loop].historyTime[prevPos] = g_irqCpup[loop].allTime;
g_cpuHistoryTime[prevPos] += g_irqCpup[loop].allTime;
}
LOS_IntRestore(intSave);
return;
}
LITE_OS_SEC_TEXT_INIT UINT32 OsCpupGuardCreator(VOID)
{
UINT32 cpupSwtmrID;
#if (LOSCFG_BASE_CORE_SWTMR_ALIGN == 1)
(VOID)LOS_SwtmrCreate(LOSCFG_BASE_CORE_TICK_PER_SECOND, LOS_SWTMR_MODE_PERIOD,
(SWTMR_PROC_FUNC)OsCpupGuard, &cpupSwtmrID, 0,
OS_SWTMR_ROUSES_ALLOW, OS_SWTMR_ALIGN_INSENSITIVE);
#else
(VOID)LOS_SwtmrCreate(LOSCFG_BASE_CORE_TICK_PER_SECOND, LOS_SWTMR_MODE_PERIOD,
(SWTMR_PROC_FUNC)OsCpupGuard, &cpupSwtmrID, 0);
#endif
(VOID)LOS_SwtmrStart(cpupSwtmrID);
return LOS_OK;
}
#endif
/*****************************************************************************
Function : OsCpupDaemonInit
Description: initialization of CPUP Daemon
Input : None
Return : LOS_OK or Error Information
*****************************************************************************/
LITE_OS_SEC_TEXT_INIT UINT32 OsCpupDaemonInit()
{
#if (LOSCFG_BASE_CORE_SWTMR == 1)
(VOID)OsCpupGuardCreator();
g_irqCpupInitFlg = 1;
#endif
return LOS_OK;
}
#endif
LITE_OS_SEC_BSS UINT16 g_hisPos; /* <current Sampling point of historyTime */
/*****************************************************************************
Function : OsCpupInit
@@ -144,24 +65,16 @@ Return : LOS_OK or Error Information
LITE_OS_SEC_TEXT_INIT UINT32 OsCpupInit()
{
UINT32 size;
CHAR *cpupMem = NULL;
size = g_taskMaxNum * sizeof(OsCpupCB);
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
size += LOSCFG_PLATFORM_HWI_LIMIT * sizeof(OsIrqCpupCB);
#endif
g_cpup = (OsCpupCB *)LOS_MemAlloc(m_aucSysMem0, size);
cpupMem = LOS_MemAlloc(m_aucSysMem0, size);
if (cpupMem == NULL) {
if (g_cpup == NULL) {
return LOS_ERRNO_CPUP_NO_MEMORY;
}
(VOID)memset_s(cpupMem, size, 0, size);
g_cpup = (OsCpupCB *)cpupMem;
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
g_irqCpup = (OsIrqCpupCB *)(cpupMem + g_taskMaxNum * sizeof(OsCpupCB));
#endif
// Ignore the return code when matching CSEC rule 6.6(3).
(VOID)memset_s(g_cpup, size, 0, size);
g_cpupInitFlg = 1;
return LOS_OK;
@@ -169,7 +82,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 OsCpupInit()
/*****************************************************************************
Function : OsTskCycleStart
Description: start task to get cycles count in current task beginning
Description: start task to get cycles count in current task begining
Input : None
Return : None
*****************************************************************************/
@@ -600,146 +513,4 @@ LITE_OS_SEC_TEXT_MINOR UINT32 LOS_CpupUsageMonitor(CPUP_TYPE_E type, CPUP_MODE_E
return LOS_OK;
}
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
LITE_OS_SEC_TEXT_MINOR VOID OsCpupIrqStart(UINT32 intNum)
{
if (g_irqCpupInitFlg == 0) {
return;
}
g_irqCpup[intNum].startTime = LOS_SysCycleGet();
return;
}
LITE_OS_SEC_TEXT_MINOR VOID OsCpupIrqEnd(UINT32 intNum)
{
UINT64 cpuCycle;
UINT64 usedTime;
if (g_irqCpupInitFlg == 0) {
return;
}
if (g_irqCpup[intNum].startTime == 0) {
return;
}
cpuCycle = LOS_SysCycleGet();
if (cpuCycle < g_irqCpup[intNum].startTime) {
cpuCycle += g_cyclesPerTick;
}
g_irqCpup[intNum].cpupID = intNum;
g_irqCpup[intNum].status = OS_CPUP_USED;
usedTime = cpuCycle - g_irqCpup[intNum].startTime;
if (g_irqCpup[intNum].count <= 1000) { /* 1000, Take 1000 samples */
g_irqCpup[intNum].allTime += usedTime;
g_irqCpup[intNum].count++;
} else {
g_irqCpup[intNum].allTime = 0;
g_irqCpup[intNum].count = 0;
}
g_irqCpup[intNum].startTime = 0;
if (usedTime > g_irqCpup[intNum].timeMax) {
g_irqCpup[intNum].timeMax = usedTime;
}
return;
}
LITE_OS_SEC_TEXT_MINOR OsIrqCpupCB *OsGetIrqCpupArrayBase(VOID)
{
return g_irqCpup;
}
LITE_OS_SEC_TEXT_MINOR STATIC VOID OsGetIrqPositions(UINT16 mode, UINT16* curPosAddr, UINT16* prePosAddr)
{
UINT16 curPos;
UINT16 prePos = 0;
curPos = g_irqHisPos;
if (mode == CPUP_IN_1S) {
curPos = OsGetPrePos(curPos);
prePos = OsGetPrePos(curPos);
} else if (mode == CPUP_LESS_THAN_1S) {
curPos = OsGetPrePos(curPos);
}
*curPosAddr = curPos;
*prePosAddr = prePos;
}
LITE_OS_SEC_TEXT_MINOR STATIC UINT64 OsGetIrqAllTime(VOID)
{
INT32 i;
UINT64 cpuCycleAll = 0;
for (i = 0; i < OS_CPUP_HISTORY_RECORD_NUM; i++) {
cpuCycleAll += g_cpuHistoryTime[i];
}
return cpuCycleAll;
}
LITE_OS_SEC_TEXT_MINOR STATIC UINT64 OsGetIrqAllHisTime(UINT32 num)
{
INT32 i;
UINT64 historyTime = 0;
for (i = 0; i < OS_CPUP_HISTORY_RECORD_NUM; i++) {
historyTime += g_irqCpup[num].historyTime[i];
}
return historyTime;
}
LITE_OS_SEC_TEXT_MINOR UINT32 LOS_GetAllIrqCpuUsage(UINT16 mode, CPUP_INFO_S *cpupInfo)
{
UINT16 loopNum;
UINT16 curPos;
UINT16 prePos = 0;
UINT32 intSave;
UINT64 cpuCycleAll;
UINT64 cpuCycleCurIrq;
if (g_irqCpupInitFlg == 0) {
return LOS_ERRNO_CPUP_NO_INIT;
}
if (cpupInfo == NULL) {
return LOS_ERRNO_CPUP_TASK_PTR_NULL;
}
intSave = LOS_IntLock();
OsGetIrqPositions(mode, &curPos, &prePos);
if (mode == CPUP_IN_10S) {
cpuCycleAll = OsGetIrqAllTime();
} else {
cpuCycleAll = g_cpuHistoryTime[curPos] - g_cpuHistoryTime[prePos];
}
for (loopNum = 0; loopNum < LOSCFG_PLATFORM_HWI_LIMIT; loopNum++) {
if (g_irqCpup[loopNum].status != OS_CPUP_USED) {
continue;
}
cpupInfo[loopNum].usStatus = g_irqCpup[loopNum].status;
if (mode == CPUP_IN_10S) {
cpuCycleCurIrq = OsGetIrqAllHisTime(loopNum);
} else {
cpuCycleCurIrq = g_irqCpup[loopNum].historyTime[curPos] - g_irqCpup[loopNum].historyTime[prePos];
}
if (cpuCycleAll != 0) {
cpupInfo[loopNum].uwUsage = (UINT32)((LOS_CPUP_PRECISION * cpuCycleCurIrq) / cpuCycleAll);
}
}
LOS_IntRestore(intSave);
return LOS_OK;
}
#endif
#endif /* LOSCFG_BASE_CORE_CPUP */

View File

@@ -139,18 +139,6 @@ typedef struct {
extern OsCpupCB *g_cpup;
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
typedef struct {
UINT32 cpupID; /**< Irq ID */
UINT16 status; /**< Irq status */
UINT64 allTime; /**< Total running time */
UINT64 startTime; /**< Time before a task is invoked */
UINT64 timeMax; /**< Irq samples count */
UINT64 count; /**< Irq samples count */
UINT64 historyTime[OS_CPUP_HISTORY_RECORD_NUM]; /**< Historical running time */
} OsIrqCpupCB;
#endif
/**
* @ingroup los_cpup
* @brief Initialization cpup.
@@ -171,7 +159,6 @@ typedef struct {
*/
extern UINT32 OsCpupInit(VOID);
extern UINT32 OsCpupDaemonInit(VOID);
/**
* @ingroup los_cpup
* @brief Start task to get cycles count in current task ending.
@@ -370,13 +357,6 @@ extern UINT32 LOS_AllTaskCpuUsage(CPUP_INFO_S *cpupInfo, UINT16 mode);
*/
extern UINT32 LOS_CpupUsageMonitor(CPUP_TYPE_E type, CPUP_MODE_E mode, UINT32 taskID);
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1)
extern VOID OsCpupIrqStart(UINT32 intNum);
extern VOID OsCpupIrqEnd(UINT32 intNum);
extern OsIrqCpupCB *OsGetIrqCpupArrayBase(VOID);
extern UINT32 LOS_GetAllIrqCpuUsage(UINT16 mode, CPUP_INFO_S *cpupInfo);
#endif
#ifdef __cplusplus
#if __cplusplus
}

View File

@@ -1,44 +0,0 @@
# Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_switch = defined(LOSCFG_DEBUG_TOOLS)
module_name = get_path_info(rebase_path("."), "name")
kernel_module(module_name) {
sources = [
"los_hwidump.c",
"los_schedtrace.c",
"los_stackdump.c",
]
configs += [ "$LITEOSTOPDIR:warn_config" ]
}
config("public") {
include_dirs = [ "." ]
}

View File

@@ -1,89 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_DEBUGTOOLS_H
#define _LOS_DEBUGTOOLS_H
#include "los_config.h"
#include "los_task.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
/* StackDump print format */
#define PRINT_PER_ROW 4
/* SchedTrace records number */
#define TRACE_NUM 200
/* sched trace info, users can add their own */
typedef struct {
UINT32 newTaskID;
CHAR newTaskName[LOS_TASK_NAMELEN];
UINT32 runTaskID;
CHAR runTaskName[LOS_TASK_NAMELEN];
} SchedTraceInfo;
/* SchedTrace record callback */
typedef void (*SchedTraceRecordCB)(LosTaskCB *newTask, LosTaskCB *runTask);
/* SchedTrace show callback, buf is overwrite ringbuf, max amount of storage is TRACE_NUM */
typedef void (*SchedTraceShowCB)(SchedTraceInfo *ringBuf, UINT32 count);
/* Shell callback */
extern UINT32 OsShellCmdStackDump(INT32 argc, const CHAR **argv);
extern UINT32 OsShellCmdHwiDump(INT32 argc, const CHAR **argv);
extern UINT32 OsShellCmdSchedTrace(INT32 argc, const CHAR **argv);
/* Other module callback */
extern VOID OsSchedTraceRecord(LosTaskCB *newTask, LosTaskCB *runTask);
/* External interface */
/* dump stack by task id, can be called at any time */
extern VOID LOS_TaskStackDump(UINT32 taskID);
/* register sched trace handle, If not registered, the default fun will be used */
extern VOID LOS_SchedTraceHandleRegister(SchedTraceRecordCB recordCB, SchedTraceShowCB showCB);
/* start sched trace, will alloc buf, and start write to buf when sched */
extern VOID LOS_SchedTraceStart(VOID);
/* stop sched trace, will stop record and free buf */
extern VOID LOS_SchedTraceStop(VOID);
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif

View File

@@ -1,149 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_debugtools.h"
#include "securec.h"
#include "los_debug.h"
#include "los_memory.h"
#include "los_arch.h"
#include "los_interrupt.h"
#include "los_arch_interrupt.h"
#if (LOSCFG_DEBUG_TOOLS == 1)
#if (LOSCFG_CPUP_INCLUDE_IRQ == 1) && (LOSCFG_BASE_CORE_SWTMR == 1)
#include "los_cpup.h"
#define IRQ_CPUP_INFO_SIZE (sizeof(CPUP_INFO_S) * LOSCFG_PLATFORM_HWI_LIMIT)
#define IRQ_CPUP_ALL_INFO_SIZE (IRQ_CPUP_INFO_SIZE + IRQ_CPUP_INFO_SIZE)
#define IRQ_DATA_SIZE sizeof(OsIrqCpupCB)
#define CPUP_PRECISION_MULT LOS_CPUP_PRECISION_MULT
STATIC VOID ShellCmdHwiInfoShow(OsIrqCpupCB *irqData, CPUP_INFO_S *hwiCpup1s,
CPUP_INFO_S *hwiCpup10s)
{
UINT32 i;
UINT32 intSave;
UINT32 count;
UINT64 cycles = 0;
UINT64 timeMax = 0;
CHAR *irqName = NULL;
OsIrqCpupCB *irqDataBase = OsGetIrqCpupArrayBase();
if (irqDataBase == NULL) {
PRINT_ERR("get hwi info error\n");
return;
}
for (i = 0; i < LOSCFG_PLATFORM_HWI_LIMIT; i++) {
if ((OsGetHwiCreated(i) != TRUE) || (OsGetHwiFormCnt(i) == 0)) {
continue;
}
intSave = LOS_IntLock();
(VOID)memcpy_s(irqData, IRQ_DATA_SIZE, &irqDataBase[i], IRQ_DATA_SIZE);
LOS_IntRestore(intSave);
if (irqData->status == 0) {
continue;
}
count = OsGetHwiFormCnt(i);
if (count != 0) {
if (irqData->count != 0) {
cycles = (irqData->allTime * OS_NS_PER_CYCLE) / (irqData->count * OS_SYS_NS_PER_US);
}
timeMax = (irqData->timeMax * OS_NS_PER_CYCLE) / OS_SYS_NS_PER_US;
}
irqName = OsGetHwiFormName(i);
PRINTK(" %10d:%11u%11llu%10llu%9u.%-2u%9u.%-2u %-12s\n", i - OS_SYS_VECTOR_CNT, count, cycles, timeMax,
hwiCpup1s[i].uwUsage / CPUP_PRECISION_MULT, hwiCpup1s[i].uwUsage % CPUP_PRECISION_MULT,
hwiCpup10s[i].uwUsage / CPUP_PRECISION_MULT, hwiCpup10s[i].uwUsage % CPUP_PRECISION_MULT,
(irqName != NULL) ? irqName : NULL);
}
}
STATIC VOID HwiInfoDump(VOID)
{
UINT32 size;
size = IRQ_CPUP_ALL_INFO_SIZE + IRQ_DATA_SIZE;
CHAR *irqCpup = LOS_MemAlloc(m_aucSysMem0, size);
if (irqCpup == NULL) {
return;
}
CPUP_INFO_S *hwiCpup10s = (CPUP_INFO_S *)(irqCpup);
CPUP_INFO_S *hwiCpup1s = (CPUP_INFO_S *)(hwiCpup10s + IRQ_CPUP_INFO_SIZE);
OsIrqCpupCB *irqData = (OsIrqCpupCB *)(irqCpup + IRQ_CPUP_ALL_INFO_SIZE);
(VOID)LOS_GetAllIrqCpuUsage(CPUP_IN_1S, hwiCpup1s);
(VOID)LOS_GetAllIrqCpuUsage(CPUP_IN_10S, hwiCpup10s);
PRINTK(" InterruptNo Count ATime(us) MTime(us) CPUUSE1s CPUUSE10s Name\n");
ShellCmdHwiInfoShow(irqData, hwiCpup1s, hwiCpup10s);
(VOID)LOS_MemFree(m_aucSysMem0, irqCpup);
return;
}
#else
STATIC VOID HwiInfoDump(VOID)
{
INT32 i;
PRINTK(" InterruptNo Count Name\n");
for (i = 0; i < LOSCFG_PLATFORM_HWI_LIMIT; i++) {
if ((OsGetHwiCreated(i) != TRUE) || (OsGetHwiFormCnt(i) == 0)) {
continue;
}
if (OsGetHwiFormName(i) != NULL) {
PRINTK(" %8d:%10d %-s\n", i - OS_SYS_VECTOR_CNT, OsGetHwiFormCnt(i), OsGetHwiFormName(i));
} else {
PRINTK(" %8d:%10d\n", i - OS_SYS_VECTOR_CNT, OsGetHwiFormCnt(i));
}
}
return;
}
#endif
UINT32 OsShellCmdHwiDump(INT32 argc, const CHAR **argv)
{
(VOID)argv;
if (argc > 1) {
PRINT_ERR("\nUsage:hwi\n");
return LOS_NOK;
}
HwiInfoDump();
return LOS_OK;
}
#endif /* LOSCFG_STACK_DUMP == 1 */

View File

@@ -1,164 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_debugtools.h"
#include "securec.h"
#include "los_debug.h"
#include "los_memory.h"
#include "los_arch.h"
#if (LOSCFG_DEBUG_TOOLS == 1)
STATIC BOOL g_startTrace = FALSE;
STATIC SchedTraceInfo *g_traceRingBuf = NULL;
STATIC UINT32 g_schedCount = 0;
STATIC SchedTraceRecordCB g_recordCB = NULL;
STATIC SchedTraceShowCB g_showCB = NULL;
STATIC VOID DefaultShowFormat(SchedTraceInfo *buf, UINT32 count)
{
INT32 i;
UINT32 cycle = count / TRACE_NUM;
UINT32 point = count % TRACE_NUM;
PRINTK ("sched %u time, last %u is:\r\n", count, TRACE_NUM);
PRINTK("RunTaskID RunTaskName NewTaskID NewTaskName \r\n");
if (cycle > 0) {
for (i = point; i < TRACE_NUM; i++) {
PRINTK("%4u %20s, %4u %20s\n",
g_traceRingBuf[i].runTaskID, g_traceRingBuf[i].runTaskName,
g_traceRingBuf[i].newTaskID, g_traceRingBuf[i].newTaskName);
}
}
for (i = 0; i < point; i++) {
PRINTK("%4u %20s, %4u %20s\n",
g_traceRingBuf[i].runTaskID, g_traceRingBuf[i].runTaskName,
g_traceRingBuf[i].newTaskID, g_traceRingBuf[i].newTaskName);
}
PRINTK("\r\n");
}
STATIC VOID DefaultRecordHandle(LosTaskCB *newTask, LosTaskCB *runTask)
{
UINT32 point = g_schedCount % TRACE_NUM;
g_traceRingBuf[point].newTaskID = newTask->taskID;
(VOID)memcpy_s(g_traceRingBuf[point].newTaskName, LOS_TASK_NAMELEN, newTask->taskName, LOS_TASK_NAMELEN);
g_traceRingBuf[point].runTaskID = runTask->taskID;
(VOID)memcpy_s(g_traceRingBuf[point].runTaskName, LOS_TASK_NAMELEN, runTask->taskName, LOS_TASK_NAMELEN);
g_schedCount++;
}
STATIC VOID ShowFormat(SchedTraceInfo *buf, UINT32 count)
{
if (count == 0) {
PRINT_ERR("none shed happened\n");
return;
}
if (g_showCB != NULL) {
g_showCB(buf, count);
}
}
VOID OsSchedTraceRecord(LosTaskCB *newTask, LosTaskCB *runTask)
{
if (g_startTrace == FALSE) {
return;
}
if (g_recordCB != NULL) {
g_recordCB(newTask, runTask);
}
}
VOID LOS_SchedTraceStart(VOID)
{
if (g_recordCB == NULL) {
g_recordCB = DefaultRecordHandle;
}
g_traceRingBuf = (SchedTraceInfo *)LOS_MemAlloc(OS_SYS_MEM_ADDR, TRACE_NUM * sizeof(SchedTraceInfo));
if (g_traceRingBuf == NULL) {
PRINT_ERR("alloc failed for dump\n");
return;
}
(VOID)memset_s(g_traceRingBuf, TRACE_NUM * sizeof(SchedTraceInfo), 0, TRACE_NUM * sizeof(SchedTraceInfo));
g_startTrace = TRUE;
}
VOID LOS_SchedTraceStop(VOID)
{
if (g_showCB == NULL) {
g_showCB = DefaultShowFormat;
}
g_startTrace = FALSE;
ShowFormat(g_traceRingBuf, g_schedCount);
g_schedCount = 0;
if (g_traceRingBuf != NULL) {
(VOID)LOS_MemFree(OS_SYS_MEM_ADDR, g_traceRingBuf);
g_traceRingBuf = NULL;
}
return;
}
VOID LOS_SchedTraceHandleRegister(SchedTraceRecordCB recordCB, SchedTraceShowCB showCB)
{
g_recordCB = recordCB;
g_showCB = showCB;
}
UINT32 OsShellCmdSchedTrace(INT32 argc, const CHAR **argv)
{
if (argc != 1) {
PRINT_ERR("\nUsage: st -h\n");
return LOS_NOK;
}
if (strcmp(argv[0], "-s") == 0) {
LOS_SchedTraceStart();
} else if (strcmp(argv[0], "-e") == 0) {
LOS_SchedTraceStop();
} else if (strcmp(argv[0], "-h") == 0) {
PRINTK("\nUsage: \nst -s , SchedTrace start\n");
PRINTK("st -e , SchedTrace end and show\n");
} else {
PRINTK("\nUsage: st -h\n");
return OS_ERROR;
}
return LOS_OK;
}
#endif /* LOSCFG_STACK_DUMP == 1 */

View File

@@ -1,155 +0,0 @@
/*
* Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_debugtools.h"
#include "securec.h"
#include "los_debug.h"
#include "los_memory.h"
#include "los_arch.h"
#if (LOSCFG_DEBUG_TOOLS == 1)
typedef struct {
UINT32 waterLine;
UINT32 taskSPTop;
UINT32 taskSPLimit;
UINTPTR taskSP;
} DumpInfo;
STATIC VOID ShowFormat(UINTPTR *buf, DumpInfo *info)
{
INT32 i;
UINT32 len = info->waterLine / sizeof(UINTPTR);
UINTPTR addr = (info->taskSPLimit - info->waterLine);
for (i = 0; i < len; i++) {
if ((i % PRINT_PER_ROW) == 0) {
PRINTK("\r\n 0x%08x: ", addr);
}
if (addr == info->taskSP) {
PRINTK(" *%08x", buf[i]);
} else {
PRINTK(" %08x", buf[i]);
}
addr += sizeof(UINTPTR);
}
PRINTK("\r\n");
}
STATIC INT32 DumpTaskInfo(UINT32 taskID, UINTPTR *buf, DumpInfo *info)
{
errno_t ret;
LosTaskCB *taskCB = OS_TCB_FROM_TID(taskID);
if (taskID == LOS_CurTaskIDGet()) {
info->taskSP = ArchSpGet();
} else {
info->taskSP = (UINTPTR)taskCB->stackPointer;
}
info->taskSPTop = taskCB->topOfStack;
info->taskSPLimit = taskCB->topOfStack + taskCB->stackSize;
if ((info->taskSP > info->taskSPLimit) || (info->taskSP < info->taskSPTop)) {
return LOS_NOK;
}
ret = memcpy_s(buf, info->waterLine, (const VOID *)(info->taskSPLimit - info->waterLine), info->waterLine);
if (ret != EOK) {
return LOS_NOK;
}
return LOS_OK;
}
VOID LOS_TaskStackDump(UINT32 taskID)
{
UINTPTR *buf = NULL;
DumpInfo info;
UINT32 intSave;
INT32 ret;
if (taskID > g_taskMaxNum) {
PRINT_ERR("error taskID %u\r\n", taskID);
return;
}
if (OS_INT_ACTIVE) {
PRINT_ERR("called during an interrupt.\r\n");
return;
}
intSave = LOS_IntLock();
info.waterLine = OsGetTaskWaterLine(taskID);
if (info.waterLine == OS_NULL_INT) {
LOS_IntRestore(intSave);
return;
}
buf = (UINTPTR *)LOS_MemAlloc(OS_SYS_MEM_ADDR, info.waterLine);
if (buf == NULL) {
LOS_IntRestore(intSave);
PRINT_ERR("alloc failed for dump\n");
return;
}
(VOID)memset_s(buf, info.waterLine, 0, info.waterLine);
ret = DumpTaskInfo(taskID, buf, &info);
if (ret != LOS_OK) {
LOS_IntRestore(intSave);
(VOID)LOS_MemFree(OS_SYS_MEM_ADDR, buf);
PRINT_ERR("SP 0x%x may error or memcpy_s failed, stack space from 0x%x to 0x%x\r\n", \
info.taskSP, info.taskSPTop, info.taskSPLimit);
return;
}
LOS_IntRestore(intSave);
PRINTK("Task %u, SP 0x%x, WaterLine 0x%x", taskID, info.taskSP, info.waterLine);
ShowFormat(buf, &info);
(VOID)LOS_MemFree(OS_SYS_MEM_ADDR, buf);
return;
}
UINT32 OsShellCmdStackDump(INT32 argc, const CHAR **argv)
{
UINT32 taskID;
if (argc != 1) {
PRINT_ERR("\nUsage: stack taskID\n");
return LOS_NOK;
}
taskID = (UINT32)atoi(argv[0]);
LOS_TaskStackDump(taskID);
return LOS_OK;
}
#endif /* LOSCFG_STACK_DUMP == 1 */

View File

@@ -1,40 +0,0 @@
# Copyright (c) 2021-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_switch = defined(LOSCFG_KERNEL_DYNLINK)
module_name = get_path_info(rebase_path("."), "name")
kernel_module(module_name) {
sources = [ "los_dynlink.c" ]
configs += [ "$LITEOSTOPDIR:warn_config" ]
}
config("public") {
include_dirs = [ "." ]
}

View File

@@ -1,938 +0,0 @@
/*
* Copyright (c) 2021-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "los_dynlink.h"
#include "stdlib.h"
#include "string.h"
#include "unistd.h"
#include "fcntl.h"
#include "errno.h"
#include "limits.h"
#include "sys/stat.h"
#include "securec.h"
#include "arch_elf.h"
#include "los_task.h"
#include "los_debug.h"
#include "los_mux.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#if (LOSCFG_DYNLINK == 1)
#if defined(__ICCARM__) || defined(__CC_ARM)
/**
* Place instructions below in .icf linker file:
*
* keep {section .TABLE.START};
* keep {section .sym.*};
* keep {section .table.end};
* define block SYMBOL_TABLE with fixed order
* {
* section .TABLE.START,
* section .sym.*,
* section .table.end
* };
* place in ROM_region {readonly, block SYMBOL_TABLE};
*/
const SymInfo symTableStart __attribute__((section(".TABLE.START"))) = {
.name = "start",
.addr = 0
};
const SymInfo symTableEnd __attribute__((section(".table.end"))) = {
.name = "end",
.addr = 0
};
#pragma section = ".TABLE.START"
#pragma section = ".table.end"
#elif defined(__CLANG_ARM) || defined(__GNUC__)
/**
* Place instructions below in rodata segment of .ld linker file:
*
* __sym_table_start = .;
* KEEP(*( SORT (.sym.*)));
* __sym_table_end = .;
*/
extern char __sym_table_start[];
extern char __sym_table_end[];
#else
#error Unknown compiler.
#endif
STATIC LOS_DL_LIST g_dynSharedObjLink;
STATIC UINT32 g_dynlinkMux;
STATIC DynSharedObj *OsIsPreLoaded(const CHAR *fileName)
{
DynSharedObj *dso = NULL;
LOS_DL_LIST_FOR_EACH_ENTRY(dso, &g_dynSharedObjLink, DynSharedObj, dsoNode) {
if (!strcmp(fileName, dso->fileName)) {
++dso->ref;
return dso;
}
}
return NULL;
}
STATIC INT32 OsVerifyEhdr(const LD_ELF_EHDR *ehdr, UINT32 fileLen)
{
if (memcmp(ehdr->e_ident, LD_ELFMAG, LD_SELFMAG) != LOS_OK) {
PRINT_ERR("The file is not elf format\n");
return LOS_NOK;
}
if (ehdr->e_type != ET_DYN) {
PRINT_ERR("The file is not shared library\n");
return LOS_NOK;
}
if (!check_arch(ehdr)) {
PRINT_ERR("The file can not load in current platform\n");
return LOS_NOK;
}
if (ehdr->e_phnum > PHDR_NUM_MAX) {
PRINT_ERR("The num of program header is out of limit\n");
return LOS_NOK;
}
if (ehdr->e_phoff > fileLen) {
PRINT_ERR("The offset of program header is invalid, elf file is bad\n");
return LOS_NOK;
}
return LOS_OK;
}
STATIC INT32 OsReadELFInfo(INT32 fd, UINT8 *buffer, size_t readSize, off_t offset)
{
ssize_t byteNum;
off_t returnPos;
if (readSize > 0) {
returnPos = lseek(fd, offset, SEEK_SET);
if (returnPos != offset) {
PRINT_ERR("Failed to seek the position!, offset: %#x\n", offset);
return LOS_NOK;
}
byteNum = read(fd, buffer, readSize);
if (byteNum <= 0) {
PRINT_ERR("Failed to read from offset: %#x!\n", offset);
return LOS_NOK;
}
}
return LOS_OK;
}
STATIC INT32 OsGetFileLength(UINT32 *fileLen, const CHAR *fileName)
{
struct stat buf;
INT32 ret;
ret = stat(fileName, &buf);
if (ret < 0) {
PRINT_ERR("Failed to stat file: %s, errno: %d\n", fileName, errno);
return LOS_NOK;
}
if (buf.st_size > FILE_LENGTH_MAX) {
PRINT_ERR("The file: %s length is out of limit!\n", fileName);
return LOS_NOK;
}
*fileLen = (UINT32)buf.st_size;
return LOS_OK;
}
STATIC INT32 OsReadEhdr(INT32 fd, UINT32 fileLen, DynLinkInfo *dlInfo)
{
INT32 ret;
ret = OsReadELFInfo(fd, (UINT8 *)&dlInfo->elfEhdr, sizeof(LD_ELF_EHDR), 0);
if (ret != LOS_OK) {
return -EIO;
}
ret = OsVerifyEhdr(&dlInfo->elfEhdr, fileLen);
if (ret != LOS_OK) {
return -ELIBBAD;
}
return LOS_OK;
}
STATIC INT32 OsReadPhdrs(INT32 fd, UINT32 fileLen, DynLinkInfo *dlInfo)
{
INT32 ret;
UINT32 size;
LD_ELF_EHDR *ehdr = &dlInfo->elfEhdr;
if ((ehdr->e_phnum == 0) || (ehdr->e_phentsize != sizeof(LD_ELF_PHDR))) {
goto ERR;
}
size = sizeof(LD_ELF_PHDR) * ehdr->e_phnum;
if ((ehdr->e_phoff + size) > fileLen) {
goto ERR;
}
dlInfo->elfPhdr = (LD_ELF_PHDR *)LOS_MemAlloc(OS_SYS_MEM_ADDR, size);
if (dlInfo->elfPhdr == NULL) {
return -ENOMEM;
}
ret = OsReadELFInfo(fd, (UINT8 *)dlInfo->elfPhdr, size, ehdr->e_phoff);
if (ret != LOS_OK) {
LOS_MemFree(OS_SYS_MEM_ADDR, dlInfo->elfPhdr);
return -EIO;
}
return LOS_OK;
ERR:
PRINT_ERR("the file is bad\n");
return -ELIBBAD;
}
STATIC DynSharedObj *OsLoadInit(const CHAR *fileName, VOID *pool)
{
DynSharedObj *dso = NULL;
UINT32 allocSize, nameLen;
UINT32 fileLen = 0;
INT32 ret;
nameLen = strlen(fileName);
if (nameLen > PATH_MAX) {
PRINT_ERR("file name length is too long\n");
errno = ENAMETOOLONG;
return NULL;
}
allocSize = sizeof(DynSharedObj) + nameLen + 1;
dso = (DynSharedObj *)LOS_MemAlloc(OS_SYS_MEM_ADDR, allocSize);
if (dso == NULL) {
PRINT_ERR("failed to alloc for dso\n");
errno = ENOMEM;
return NULL;
}
(VOID)memset_s(dso, allocSize, 0, allocSize);
dso->dlInfo = (DynLinkInfo *)LOS_MemAlloc(OS_SYS_MEM_ADDR, sizeof(DynLinkInfo));
if (dso->dlInfo == NULL) {
LOS_MemFree(OS_SYS_MEM_ADDR, dso);
PRINT_ERR("failed to alloc for loadInfo\n");
errno = ENOMEM;
return NULL;
}
(VOID)memset_s(dso->dlInfo, sizeof(DynLinkInfo), 0, sizeof(DynLinkInfo));
ret = OsGetFileLength(&fileLen, fileName);
if (ret != LOS_OK) {
errno = ENOENT;
goto ERR1;
}
dso->fd = open(fileName, O_RDONLY);
if (dso->fd < 0) {
PRINT_ERR("Failed to open ELF file: %s!\n", fileName);
goto ERR1;
}
ret = OsReadEhdr(dso->fd, fileLen, dso->dlInfo);
if (ret != LOS_OK) {
errno = -ret;
goto ERR2;
}
ret = OsReadPhdrs(dso->fd, fileLen, dso->dlInfo);
if (ret != LOS_OK) {
errno = -ret;
goto ERR2;
}
strcpy(dso->buf, fileName);
dso->fileName = dso->buf;
dso->ref = 1;
dso->pool = (pool ? pool : OS_SYS_MEM_ADDR);
LOS_ListInit(&dso->dsoNode);
return dso;
ERR2:
close(dso->fd);
ERR1:
LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo);
LOS_MemFree(OS_SYS_MEM_ADDR, dso);
return NULL;
}
STATIC INT32 OsReserveSpace(const DynLinkInfo *dlInfo, UINT32 *boundary)
{
const LD_ELF_PHDR *elfPhdrTemp = dlInfo->elfPhdr;
INT32 phdrNum = dlInfo->elfEhdr.e_phnum;
UINTPTR addrMin = SIZE_MAX;
UINTPTR addrMax = 0;
UINT32 offStart = 0;
UINT64 size;
INT32 i;
for (i = 0; i < phdrNum; ++i, ++elfPhdrTemp) {
if (elfPhdrTemp->p_type == PT_TLS) {
PRINT_ERR("unsupport tls\n");
return 0;
}
if (elfPhdrTemp->p_type != PT_LOAD) {
continue;
}
if (*boundary == 0) {
*boundary = elfPhdrTemp->p_align;
}
if (elfPhdrTemp->p_vaddr < addrMin) {
addrMin = elfPhdrTemp->p_vaddr;
offStart = elfPhdrTemp->p_offset;
}
if ((elfPhdrTemp->p_vaddr + elfPhdrTemp->p_memsz) > addrMax) {
addrMax = elfPhdrTemp->p_vaddr + elfPhdrTemp->p_memsz;
}
}
if ((addrMin == addrMax) || (addrMax < addrMin)) {
return 0;
}
size = ELF_ALIGN_UP(addrMax, *boundary) - ELF_ALIGN_DOWN(addrMin, *boundary) + ELF_ALIGN_DOWN(offStart, *boundary);
return (size > UINT_MAX) ? 0 : (UINT32)size;
}
STATIC UINTPTR OsDoLoadFile(INT32 fd, UINTPTR addr, const LD_ELF_PHDR *elfPhdr, UINT32 boundary)
{
INT32 ret;
UINT32 offset = elfPhdr->p_offset - ELF_ALIGN_OFFSET(elfPhdr->p_vaddr, boundary);
UINT32 size = elfPhdr->p_filesz + ELF_ALIGN_OFFSET(elfPhdr->p_vaddr, boundary);
if (size == 0) {
return 0;
}
addr = ELF_ALIGN_DOWN(addr, boundary);
ret = OsReadELFInfo(fd, (UINT8 *)addr, size, offset);
if (ret != LOS_OK) {
return 0;
}
return addr;
}
STATIC INT32 OsLoadELFFile(DynSharedObj *dso, UINT32 boundary)
{
DynLinkInfo *dlInfo = dso->dlInfo;
const LD_ELF_PHDR *elfPhdrTemp = dlInfo->elfPhdr;
const LD_ELF_EHDR *elfEhdr = &dlInfo->elfEhdr;
UINTPTR loadBase = dso->loadBase;
UINTPTR vAddr, loadAddr, bssStart, bssEnd;
INT32 i;
for (i = 0; i < elfEhdr->e_phnum; ++i, ++elfPhdrTemp) {
if (elfPhdrTemp->p_type != PT_LOAD) {
continue;
}
if ((elfPhdrTemp->p_flags & PF_R) == 0) {
return -ENOEXEC;
}
vAddr = elfPhdrTemp->p_vaddr;
loadAddr = OsDoLoadFile(dso->fd, (vAddr + loadBase), elfPhdrTemp, boundary);
if (loadAddr == 0) {
return -EFAULT;
}
if ((elfPhdrTemp->p_memsz > elfPhdrTemp->p_filesz) && (elfPhdrTemp->p_flags & PF_W)) {
bssStart = loadAddr + ELF_ALIGN_OFFSET(vAddr, boundary) + elfPhdrTemp->p_filesz;
bssEnd = loadAddr + ELF_ALIGN_OFFSET(vAddr, boundary) + elfPhdrTemp->p_memsz;
(VOID)memset_s((VOID *)bssStart, bssEnd - bssStart, 0, bssEnd - bssStart);
}
}
return LOS_OK;
}
STATIC INT32 OsLoadLibrary(DynSharedObj *dso)
{
UINT32 loadSize;
UINT32 boundary = 0;
INT32 ret;
loadSize = OsReserveSpace(dso->dlInfo, &boundary);
if (loadSize == 0) {
PRINT_ERR("failed to reserve space!\n");
return -EINVAL;
}
dso->loadBase = (UINTPTR)LOS_MemAllocAlign(dso->pool, loadSize, boundary);
if (dso->loadBase == 0) {
PRINT_ERR("failed to alloc memory for loading shared library\n");
return -ENOMEM;
}
ret = OsLoadELFFile(dso, boundary);
if (ret != LOS_OK) {
LOS_MemFree(dso->pool, (VOID *)dso->loadBase);
PRINT_ERR("failed to load shared library\n");
return ret;
}
return LOS_OK;
}
STATIC INT32 OsGetDynBase(DynSharedObj *dso)
{
DynLinkInfo *dlInfo = dso->dlInfo;
const LD_ELF_PHDR *elfPhdrTemp = dlInfo->elfPhdr;
INT32 phdrNum = dlInfo->elfEhdr.e_phnum;
INT32 i;
for (i = 0; i < phdrNum; ++i, ++elfPhdrTemp) {
if (elfPhdrTemp->p_type != PT_DYNAMIC) {
continue;
}
dlInfo->dynBase = dso->loadBase + elfPhdrTemp->p_vaddr;
return LOS_OK;
}
return LOS_NOK;
}
STATIC INT32 OsParseDynamic(DynSharedObj *dso)
{
LD_ELF_DYN *dyn = NULL;
DynLinkInfo *dlInfo = dso->dlInfo;
RelocInfoTab *relInfoTab = &dlInfo->relInfoTab;
for (dyn = (LD_ELF_DYN *)dlInfo->dynBase; dyn->d_tag != DT_NULL; ++dyn) {
switch (dyn->d_tag) {
case DT_NEEDED:
PRINT_ERR("shared library should not depend on others\n");
return -ENOTSUP;
case DT_TEXTREL:
PRINT_ERR("you should recompile shared library with -fPIC\n");
return -EFAULT;
case DT_HASH:
dlInfo->hashTab = (UINT32 *)(dso->loadBase + dyn->d_un.d_ptr);
break;
case DT_SYMTAB:
dlInfo->symTab = (LD_ELF_SYM *)(dso->loadBase + dyn->d_un.d_ptr);
break;
case DT_STRTAB:
dlInfo->symStrings = (CHAR *)(dso->loadBase + dyn->d_un.d_ptr);
break;
case DT_REL:
relInfoTab->rel.relTab = dso->loadBase + dyn->d_un.d_ptr;
relInfoTab->rel.relEntSize = sizeof(LD_ELF_REL);
break;
case DT_RELSZ:
relInfoTab->rel.relTabSize = dyn->d_un.d_val;
break;
case DT_RELA:
relInfoTab->rela.relTab = dso->loadBase + dyn->d_un.d_ptr;
relInfoTab->rela.relEntSize = sizeof(LD_ELF_RELA);
break;
case DT_RELASZ:
relInfoTab->rela.relTabSize = dyn->d_un.d_val;
break;
case DT_JMPREL:
relInfoTab->jmpRel.relTab = dso->loadBase + dyn->d_un.d_ptr;
break;
case DT_PLTRELSZ:
relInfoTab->jmpRel.relTabSize = dyn->d_un.d_val;
break;
case DT_PLTREL:
relInfoTab->jmpRel.relEntSize = (dyn->d_un.d_val == DT_REL) ? sizeof(LD_ELF_REL) : sizeof(LD_ELF_RELA);
default:
break;
}
}
return LOS_OK;
}
STATIC UINT32 OsGetHashVal(const CHAR *name)
{
UINT32 hashVal = 0;
UINT32 tmp;
const UINT8 *str = (const UINT8 *)name;
while (*str) {
hashVal = (*str) + (hashVal << WORD_SHIFT);
tmp = hashVal & HASH_MASK;
if (tmp != 0) {
hashVal ^= tmp >> HASH_SHIFT;
}
hashVal &= ~tmp;
++str;
}
return hashVal;
}
STATIC LD_ELF_SYM *OsFindSymInDso(const DynLinkInfo *dlInfo, const CHAR *name)
{
LD_ELF_SYM *symTab = dlInfo->symTab;
LD_ELF_SYM *sym = NULL;
CHAR *symStr = dlInfo->symStrings;
UINT32 *hashTab = dlInfo->hashTab;
UINT32 bucketNum = hashTab[0];
UINT32 *bucket = &hashTab[BUCKET_IDX];
UINT32 *chain = &bucket[bucketNum];
UINT32 hashVal = OsGetHashVal(name);
UINT32 symIdx;
for (symIdx = bucket[hashVal % bucketNum]; symIdx; symIdx = chain[symIdx]) {
if (strcmp(name, symStr + symTab[symIdx].st_name) != 0) {
continue;
}
sym = symTab + symIdx;
if ((sym->st_value == 0) || (sym->st_shndx == 0)) {
return NULL;
}
return symTab + symIdx;
}
return NULL;
}
STATIC SymInfo *OsFindSymInTable(const CHAR *name)
{
#if defined(__ICCARM__) || defined(__CC_ARM)
SymInfo *symTab = (SymInfo *)__section_end(".TABLE.START");
UINT32 symTableSize = ((UINTPTR)__section_begin(".table.end") -
(UINTPTR)__section_end(".TABLE.START")) / sizeof(SymInfo);
#elif defined(__CLANG_ARM) || defined(__GNUC__)
SymInfo *symTab = (SymInfo *)__sym_table_start;
UINT32 symTableSize = (__sym_table_end - __sym_table_start) / sizeof(SymInfo);
#endif
INT32 startIdx = 0;
INT32 endIdx = symTableSize - 1;
INT32 ret, midIdx;
while (startIdx <= endIdx) {
midIdx = startIdx + ((UINT32)(endIdx - startIdx) >> 1);
ret = strcmp(symTab[midIdx].name, name);
if (ret > 0) {
endIdx = midIdx - 1;
} else if (ret < 0) {
startIdx = midIdx + 1;
} else {
return symTab + midIdx;
}
}
return NULL;
}
STATIC UINTPTR OsFindSym(const DynSharedObj *dso, INT32 symIdx)
{
DynLinkInfo *dlInfo = dso->dlInfo;
CHAR *symStrings = dlInfo->symStrings;
CHAR *symStr = NULL;
LD_ELF_SYM *symTab = dlInfo->symTab;
LD_ELF_SYM *sym = NULL;
LD_ELF_SYM *symInDso = NULL;
SymInfo *symInTab = NULL;
sym = symTab + symIdx;
symStr = symStrings + sym->st_name;
if ((symInDso = OsFindSymInDso(dlInfo, symStr)) != NULL) {
return dso->loadBase + symInDso->st_value;
} else if ((symInTab = OsFindSymInTable(symStr)) != NULL) {
return symInTab->addr;
} else {
PRINT_ERR("failed to relocate %s, symbol: %s not found\n", dso->fileName, symStr);
return 0;
}
}
STATIC INT32 OsDoReloc(const DynSharedObj *dso, INT32 type, UINTPTR relocAddr, UINT32 addend, UINTPTR symAddr)
{
switch (type) {
case R_ARCH_NONE:
break;
case R_ARCH_GLOB_DAT:
case R_ARCH_JUMP_SLOT:
*(UINTPTR *)relocAddr = symAddr + addend;
break;
case R_ARCH_ABS32:
*(UINTPTR *)relocAddr = symAddr + ((addend != 0) ? addend : *(UINTPTR *)relocAddr);
break;
case R_ARCH_RELATIVE:
*(UINTPTR *)relocAddr = dso->loadBase + ((addend != 0) ? addend : *(UINTPTR *)relocAddr);
break;
default:
PRINT_ERR("failed to relocate %s, unsupported reloc type: %d\n", dso->fileName, type);
return -ENOTSUP;
}
return LOS_OK;
}
STATIC INT32 OsDoRelocSyms(DynSharedObj *dso, RelocInfo *relInfo)
{
UINT32 relStride = relInfo->relEntSize / sizeof(UINT32);
UINT32 *relTab = (UINT32 *)relInfo->relTab;
UINT32 addend;
UINTPTR relocAddr, symAddr;
INT32 i, symIdx, ret, type;
for (i = 0; i < relInfo->relTabSize; i += relInfo->relEntSize, relTab += relStride) {
type = REL_TYPE(relTab[1]);
if (type == R_ARCH_NONE) {
continue;
}
symIdx = REL_SYM(relTab[1]);
if (symIdx == 0) {
symAddr = 0;
} else {
symAddr = OsFindSym(dso, symIdx);
if (symAddr == 0) {
return -EFAULT;
}
}
relocAddr = dso->loadBase + relTab[0];
addend = (relInfo->relEntSize == sizeof(LD_ELF_REL)) ? 0 : relTab[relStride - 1];
ret = OsDoReloc(dso, type, relocAddr, addend, symAddr);
if (ret != LOS_OK) {
return ret;
}
}
return LOS_OK;
}
STATIC INT32 OsRelocSyms(DynSharedObj *dso)
{
DynLinkInfo *dlInfo = dso->dlInfo;
RelocInfo *relInfo = (RelocInfo *)&dlInfo->relInfoTab;
INT32 relTypes = sizeof(RelocInfoTab) / sizeof(RelocInfo);
INT32 i, ret;
for (i = 0; i < relTypes; ++i, ++relInfo) {
if (relInfo->relTab == 0) {
continue;
}
ret = OsDoRelocSyms(dso, relInfo);
if (ret != LOS_OK) {
return ret;
}
}
return LOS_OK;
}
STATIC INT32 OsDoDynLink(DynSharedObj *dso)
{
INT32 ret;
ret = OsGetDynBase(dso);
if (ret != LOS_OK) {
PRINT_ERR("there are no dynamic segments in elf file\n");
return -ELIBBAD;
}
ret = OsParseDynamic(dso);
if (ret != LOS_OK) {
return ret;
}
ret = OsRelocSyms(dso);
if (ret != LOS_OK) {
return ret;
}
return LOS_OK;
}
STATIC VOID OsDeLoadInit(DynSharedObj *dso)
{
LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo->elfPhdr);
dso->dlInfo->elfPhdr = NULL;
close(dso->fd);
}
STATIC VOID OsGetInitFini(DynSharedObj *dso)
{
LD_ELF_DYN *dyn = NULL;
DynLinkInfo *dlInfo = dso->dlInfo;
InitFiniTab *initFiniTab = &dso->initFiniTab;
for (dyn = (LD_ELF_DYN *)dlInfo->dynBase; dyn->d_tag != DT_NULL; ++dyn) {
switch (dyn->d_tag) {
case DT_INIT:
initFiniTab->init.func = dyn->d_un.d_ptr;
break;
case DT_INIT_ARRAY:
initFiniTab->init.array = dyn->d_un.d_ptr;
break;
case DT_INIT_ARRAYSZ:
initFiniTab->init.arraySz = dyn->d_un.d_val;
break;
case DT_FINI:
initFiniTab->fini.func = dyn->d_un.d_ptr;
break;
case DT_FINI_ARRAY:
initFiniTab->fini.array = dyn->d_un.d_ptr;
break;
case DT_FINI_ARRAYSZ:
initFiniTab->fini.arraySz = dyn->d_un.d_val;
break;
default:
break;
}
}
}
STATIC VOID OsDoInit(DynSharedObj *dso)
{
InitFiniTab *initFiniTab = &dso->initFiniTab;
INIT_FINI_FUNC initFunc = NULL;
UINTPTR *func = NULL;
UINT32 funcNum;
OsGetInitFini(dso);
if (initFiniTab->init.func != 0) {
initFunc = (INIT_FINI_FUNC)(dso->loadBase + initFiniTab->init.func);
initFunc();
}
if (initFiniTab->init.array == 0) {
return;
}
funcNum = initFiniTab->init.arraySz / sizeof(UINTPTR);
func = (UINTPTR *)(dso->loadBase + initFiniTab->init.array);
while (funcNum--) {
initFunc = (INIT_FINI_FUNC)(*func);
initFunc();
++func;
}
}
VOID *LOS_SoLoad(const CHAR *fileName, VOID *pool)
{
INT32 ret;
DynSharedObj *dso = NULL;
if (fileName == NULL) {
PRINT_ERR("invalid file name\n");
errno = EINVAL;
return NULL;
}
(VOID)LOS_MuxPend(g_dynlinkMux, LOS_WAIT_FOREVER);
dso = OsIsPreLoaded(fileName);
if (dso != NULL) {
(VOID)LOS_MuxPost(g_dynlinkMux);
return dso;
}
dso = OsLoadInit(fileName, pool);
if (dso == NULL) {
(VOID)LOS_MuxPost(g_dynlinkMux);
return NULL;
}
ret = OsLoadLibrary(dso);
if (ret != LOS_OK) {
errno = -ret;
goto ERR1;
}
ret = OsDoDynLink(dso);
if (ret != LOS_OK) {
errno = -ret;
goto ERR2;
}
OsDoInit(dso);
LOS_ListAdd(&g_dynSharedObjLink, &dso->dsoNode);
(VOID)LOS_MuxPost(g_dynlinkMux);
OsDeLoadInit(dso);
return dso;
ERR2:
(VOID)LOS_MemFree(dso->pool, (VOID *)dso->loadBase);
ERR1:
close(dso->fd);
(VOID)LOS_MuxPost(g_dynlinkMux);
(VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo->elfPhdr);
(VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo);
(VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso);
return NULL;
}
STATIC DynSharedObj *OsCheckHandle(VOID *handle)
{
DynSharedObj *dso = NULL;
LOS_DL_LIST_FOR_EACH_ENTRY(dso, &g_dynSharedObjLink, DynSharedObj, dsoNode) {
if (handle == dso) {
return dso;
}
}
return NULL;
}
VOID *LOS_FindSym(VOID *handle, const CHAR *name)
{
LD_ELF_SYM *sym = NULL;
DynSharedObj *dso = NULL;
VOID *symAddr = NULL;
if ((handle == NULL) || (name == NULL)) {
goto ERR;
}
(VOID)LOS_MuxPend(g_dynlinkMux, LOS_WAIT_FOREVER);
dso = OsCheckHandle(handle);
if (dso == NULL) {
(VOID)LOS_MuxPost(g_dynlinkMux);
goto ERR;
}
sym = OsFindSymInDso(dso->dlInfo, name);
if (sym == NULL) {
(VOID)LOS_MuxPost(g_dynlinkMux);
PRINT_ERR("failed to find symbol: %s\n", name);
errno = EFAULT;
return NULL;
}
symAddr = (VOID *)(dso->loadBase + sym->st_value);
(VOID)LOS_MuxPost(g_dynlinkMux);
return symAddr;
ERR:
PRINT_ERR("invalid input param\n");
errno = EINVAL;
return NULL;
}
STATIC VOID OsDoFini(DynSharedObj *dso)
{
InitFiniTab *initFiniTab = &dso->initFiniTab;
INIT_FINI_FUNC finiFunc = NULL;
UINTPTR *func = NULL;
UINT32 funcNum;
if (initFiniTab->fini.array != 0) {
funcNum = initFiniTab->fini.arraySz / sizeof(UINTPTR);
func = (UINTPTR *)(dso->loadBase + initFiniTab->fini.array) + funcNum;
while (funcNum--) {
--func;
finiFunc = (INIT_FINI_FUNC)(*func);
finiFunc();
}
}
if (initFiniTab->fini.func != 0) {
finiFunc = (INIT_FINI_FUNC)(dso->loadBase + initFiniTab->fini.func);
finiFunc();
}
}
INT32 LOS_SoUnload(VOID *handle)
{
DynSharedObj *dso = NULL;
if (handle == NULL) {
goto ERR;
}
(VOID)LOS_MuxPend(g_dynlinkMux, LOS_WAIT_FOREVER);
dso = OsCheckHandle(handle);
if (dso == NULL) {
(VOID)LOS_MuxPost(g_dynlinkMux);
goto ERR;
}
if (dso->ref > 1) {
--dso->ref;
(VOID)LOS_MuxPost(g_dynlinkMux);
return LOS_OK;
}
OsDoFini(dso);
LOS_ListDelete(&dso->dsoNode);
(VOID)LOS_MuxPost(g_dynlinkMux);
(VOID)LOS_MemFree(dso->pool, (VOID *)dso->loadBase);
if (dso->dlInfo != NULL) {
(VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo->elfPhdr);
}
(VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso->dlInfo);
(VOID)LOS_MemFree(OS_SYS_MEM_ADDR, dso);
return LOS_OK;
ERR:
PRINT_ERR("invalid handle\n");
errno = EINVAL;
return LOS_NOK;
}
INT32 LOS_DynlinkInit(VOID)
{
UINT32 ret;
LOS_ListInit(&g_dynSharedObjLink);
ret = LOS_MuxCreate(&g_dynlinkMux);
if (ret != LOS_OK) {
return LOS_NOK;
}
return LOS_OK;
}
#endif /* LOSCFG_DYNLINK */
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */

View File

@@ -1,201 +0,0 @@
/*
* Copyright (c) 2021-2021 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this list of
* conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice, this list
* of conditions and the following disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific prior written
* permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef _LOS_DYNLINK_H
#define _LOS_DYNLINK_H
#include "elf.h"
#include "los_compiler.h"
#include "los_list.h"
#include "los_memory.h"
#ifdef __cplusplus
#if __cplusplus
extern "C" {
#endif /* __cplusplus */
#endif /* __cplusplus */
#ifdef LOSCFG_AARCH64
typedef Elf64_Ehdr LD_ELF_EHDR;
typedef Elf64_Phdr LD_ELF_PHDR;
typedef Elf64_Sym LD_ELF_SYM;
typedef Elf64_Dyn LD_ELF_DYN;
typedef Elf64_Rel LD_ELF_REL;
typedef Elf64_Rela LD_ELF_RELA;
#define REL_TYPE(x) ELF64_R_TYPE(x)
#define REL_SYM(x) ELF64_R_SYM(x)
#define REL_INFO ELF64_R_INFO
#else
typedef Elf32_Ehdr LD_ELF_EHDR;
typedef Elf32_Phdr LD_ELF_PHDR;
typedef Elf32_Sym LD_ELF_SYM;
typedef Elf32_Dyn LD_ELF_DYN;
typedef Elf32_Rel LD_ELF_REL;
typedef Elf32_Rela LD_ELF_RELA;
#define REL_TYPE(x) ELF32_R_TYPE(x)
#define REL_SYM(x) ELF32_R_SYM(x)
#define REL_INFO ELF32_R_INFO
#endif
#define LD_ELFMAG "\177ELF"
#define LD_SELFMAG 4
#define PHDR_NUM_MAX 128
#define DYNAMIC_CNT 32
#define HASH_MASK 0xf0000000
#define WORD_SHIFT 4
#define HASH_SHIFT 24
#define BUCKET_IDX 2
#define ELF_ALIGN_UP(a, b) (((a) + ((b) - 1)) & ~((b) - 1))
#define ELF_ALIGN_DOWN(a, b) ((a) & ~((b) - 1))
#define ELF_ALIGN_OFFSET(a, b) ((a) & ((b) - 1))
#ifndef PATH_MAX
#define PATH_MAX 256
#endif
#ifndef FILE_LENGTH_MAX
#define FILE_LENGTH_MAX 0x40000
#endif
typedef VOID (*INIT_FINI_FUNC)(VOID);
typedef struct {
UINTPTR relTab;
UINT32 relTabSize;
UINT32 relEntSize;
} RelocInfo;
typedef struct {
RelocInfo rel;
RelocInfo rela;
RelocInfo jmpRel;
} RelocInfoTab;
typedef struct {
UINTPTR func;
UINTPTR array;
UINT32 arraySz;
} InitFiniInfo;
typedef struct {
InitFiniInfo init;
InitFiniInfo fini;
} InitFiniTab;
typedef struct {
LD_ELF_EHDR elfEhdr;
LD_ELF_PHDR *elfPhdr;
UINTPTR dynBase;
UINT32 *hashTab;
LD_ELF_SYM *symTab;
CHAR *symStrings;
RelocInfoTab relInfoTab;
} DynLinkInfo;
typedef struct {
CHAR *fileName;
INT32 fd;
DynLinkInfo *dlInfo;
UINTPTR loadBase;
InitFiniTab initFiniTab;
LOS_DL_LIST dsoNode;
UINT32 ref;
VOID *pool;
CHAR buf[];
} DynSharedObj;
typedef struct {
CHAR *name;
UINTPTR addr;
} SymInfo;
#define SYM_EXPORT(func) \
const SymInfo sym_##func __attribute__((__used__, section(".sym."#func))) = { \
.name = #func, \
.addr = (UINTPTR)func \
};
/*
* @brief Load the shared library file named by the NULL-terminated string filename and
* return a valid handle for the loaded library.
*
* @param fileName The name pointer of shared library.
* @param pool The heap for shared library to load. If the parameter, pool, is NULL, then
* the dynamic loader & linker module will use the default heap and the pool is not NULL,
* then the shared library will be loaded to the heap by pool.
*
* @note When the heap, pool, is not NULL, you should call LOS_MemInit() to initialize the
* pool before calling LOS_SoLoad(). By the way, the system will consume a certain amount
* of memory to initialize the pool. LOS_SoLoad must not be called in interrupt callback.
*
* @return Return NULL if error. Return non-NULL if success.
*/
VOID *LOS_SoLoad(const CHAR *fileName, VOID *pool);
/*
* @brief Get the address of symbol named by the parameter, name, from the parameter, handle.
*
* @param handle The handle for the loaded shared library.
* @param name The name of symbol to search.
*
* @note LOS_FindSym must not be called in interrupt callback.
*
* @return Return NULL if error. Return non-NULL if success.
*/
VOID *LOS_FindSym(VOID *handle, const CHAR *name);
/*
* @brief Decrement the reference count on the loaded shared library referred to by handle.
* If the reference count drops to zero, then the library is unloaded.
*
* This function validates that the handle is valid.
*
* @param handle The handle for the loaded shared library by LOS_SoLoad() interface.
*
* @note LOS_SoUnload must not be called in interrupt callback.
*
* @return Return 1 if error. Return 0 if success.
*/
INT32 LOS_SoUnload(VOID *handle);
/*
* @brief Initialization for dynamic loader & linker module.
*
* @param VOID.
*
* @return Return LOS_NOK if error. Return LOS_OK if success.
*/
INT32 LOS_DynlinkInit(VOID);
#ifdef __cplusplus
#if __cplusplus
}
#endif /* __cplusplus */
#endif /* __cplusplus */
#endif /* _LOS_DYNLINK_H */

View File

@@ -1,65 +0,0 @@
#!/bin/bash
# Copyright (c) 2021-2021 Huawei Device Co., Ltd. All rights reserved.
#
# Redistribution and use in source and binary forms, with or without modification,
# are permitted provided that the following conditions are met:
#
# 1. Redistributions of source code must retain the above copyright notice, this list of
# conditions and the following disclaimer.
#
# 2. Redistributions in binary form must reproduce the above copyright notice, this list
# of conditions and the following disclaimer in the documentation and/or other materials
# provided with the distribution.
#
# 3. Neither the name of the copyright holder nor the names of its contributors may be used
# to endorse or promote products derived from this software without specific prior written
# permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
# Description: The script is used to calculate the memory size that the specified shared library
# will occupy when loading to the RAM.
READELF=readelf
RM=rm
SIZE=0x0
SIZE_ALL=0x0
SIZE_MAX=0
TMP_FILE=tmp.txt
if [ $# -lt 1 ]; then
echo "Usage: ./so_parse lib.so"
exit 1
fi
parse_line()
{
MEM_SIZE=$(echo $1 | awk '{print $6}')
echo ${MEM_SIZE}
}
${READELF} -l $1 | while read line; do
HEAD_STRING=$(echo ${line} | awk '{print $1}')
if [[ "${HEAD_STRING}" == *"LOAD"* ]]; then
SIZE=`parse_line "${line}"`
SIZE=`echo ${SIZE}`
SIZE_ALL=$((SIZE_ALL+SIZE))
fi
echo ${SIZE_ALL} >> ${TMP_FILE}
done
NEED_SIZE=`tail -n 1 ${TMP_FILE}`
echo "${NEED_SIZE} bytes memory to reserve for $1!"
${RM} -f ${TMP_FILE}

View File

@@ -27,18 +27,15 @@
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_switch = defined(LOSCFG_PLATFORM_EXC)
module_name = get_path_info(rebase_path("."), "name")
kernel_module(module_name) {
static_library("exchook") {
sources = [
"los_exc_info.c",
"los_exchook.c",
]
configs += [ "$LITEOSTOPDIR:warn_config" ]
}
config("public") {
include_dirs = [ "." ]
include_dirs = [
"../../kernel/arch/include",
"../../kernel/include",
"../../utils",
"//third_party/bounds_checking_function/include",
]
}

View File

@@ -55,7 +55,7 @@ STATIC ExcInfoArray g_excArray[OS_EXC_TYPE_MAX];
STATIC UINT32 OsExcSaveIntStatus(UINT32 type, VOID *arg)
{
errno_t ret;
UINT32 ret;
UINTPTR excContentEnd = (UINTPTR)MAX_INT_INFO_SIZE + (UINTPTR)g_excContent;
(VOID)arg;
@@ -92,9 +92,6 @@ STATIC UINT32 OsExcSaveIntStatus(UINT32 type, VOID *arg)
/* save IRQ Priority reg group */
ret = memcpy_s(g_excContent, excContentEnd - (UINTPTR)g_excContent,
(const VOID *)OS_NVIC_PRI_BASE, OS_NVIC_INT_PRI_SIZE);
if (ret != EOK) {
return LOS_NOK;
}
g_excContent = (UINT8 *)g_excContent + OS_NVIC_INT_PRI_SIZE;
/* save Exception Priority reg group */
@@ -241,7 +238,7 @@ VOID OsExcRegister(ExcInfoType type, EXC_INFO_SAVE_CALLBACK func, VOID *arg)
{
ExcInfoArray *excInfo = NULL;
if ((type >= OS_EXC_TYPE_MAX) || (func == NULL)) {
PRINT_ERR("OsExcRegister ERROR!\n");
PRINT_ERR("HalExcRegister ERROR!\n");
return;
}
excInfo = &(g_excArray[type]);
@@ -297,3 +294,5 @@ VOID OsExcMsgDumpInit(VOID)
(VOID)LOS_RegExcHook(EXC_INTERRUPT, (ExcHookFn)OsExcMsgDump);
}
#endif

View File

@@ -27,13 +27,34 @@
# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
import("//kernel/liteos_m/liteos.gni")
module_name = get_path_info(rebase_path("."), "name")
module_group(module_name) {
modules = [
"vfs",
"littlefs",
"fatfs",
static_library("fs_operations") {
sources = [
"./fs.c",
]
include_dirs = [
"../../../kernel/arch/include",
"../../../kernel/include",
"../../../utils",
"../../../kal/posix/include",
"./",
]
deps = [ "//kernel/liteos_m/kal/posix" ]
}
declare_args() {
enable_ohos_kernel_liteos_m_fatfs = true
enable_ohos_kernel_liteos_m_littlefs = true
}
group("fs") {
deps = []
deps += [ ".:fs_operations" ]
if (enable_ohos_kernel_liteos_m_fatfs == true) {
deps += [ "fatfs:fatfs" ]
}
if (enable_ohos_kernel_liteos_m_littlefs == true) {
deps += [ "littlefs:littlefs" ]
}
}

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