!572 kernel部件化编译构建（liteos_m仓库修改）

Merge pull request !572 from Hongjin Li/lihongjin/br_dev

.gitee/PULL_REQUEST_TEMPLATE.zh-CN.md

@@ -10,3 +10,12 @@
 ### 测试用例（新增、改动、可能影响的功能）
 
 
+### 是否需要同步至release（如：3.0LTS ... ）分支？
+
+必须选择一项（在MarkDown模式下用[x]替换[ ]即可勾选对应选项）:
+- [ ] 是，需要同步的分支：
+- [ ] 否
+
+理由：
+
+

BUILD.gn

@@ -143,6 +143,7 @@ config("kconfig_config") {
     "$LITEOS_MENUCONFIG_H",
   ]
   asmflags = cflags
+  cflags_cc = cflags
 }
 
 config("warn_config") {

Kconfig

@@ -286,6 +286,8 @@ config KERNEL_CPPSUPPORT
     help
       If you wish to build LiteOS with support for C++.
 
+rsource "components/signal/Kconfig"
+
 config BASE_CORE_CPUP
     bool
     default n

arch/arm/arm9/gcc/BUILD.gn

@@ -39,6 +39,7 @@ kernel_module(module_name) {
     "los_timer.c",
     "reset_vector.S",
   ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

arch/arm/arm9/gcc/los_arch_interrupt.h

@@ -97,7 +97,8 @@ extern UINT32 g_intCount;
  *
  * Value: 0x02000900
  *
- * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a arm9 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
  */
 #define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
 
@@ -147,7 +148,8 @@ extern UINT32 g_intCount;
  *
  * Value: 0x02000905
  *
- * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15].
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a arm9 platform is [0,15].
  */
 #define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
 
@@ -157,7 +159,8 @@ extern UINT32 g_intCount;
  *
  * Value: 0x02000906
  *
- * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
  */
 #define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
 
@@ -204,25 +207,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_arch_interrupt
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_arch_interrupt
  * @brief: Default vector handling function.

arch/arm/arm9/gcc/los_context.c

@@ -75,18 +75,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    LosTaskCB *taskCB = OS_TCB_FROM_TID(taskID);
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        PRINT_ERR("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
     context->r0 = taskID;
     context->r1 = 0x01010101L;

arch/arm/arm9/gcc/los_interrupt.c

@@ -48,9 +48,6 @@
 #define OS_INT_ENABLE_ADDR          (OS_INT_REG_BASE)
 #define OS_INT_STATUS_ADDR          (OS_INT_REG_BASE + 12)
 
-#define OS_INT_ENABLE(num)          (*((volatile UINT32 *)OS_INT_ENABLE_ADDR) |= (1U << (num)))
-#define OS_INT_DISABLE(num)         (*((volatile UINT32 *)OS_INT_ENABLE_ADDR ) &= ~(1U << (num)))
-
 #define OS_INSTR_SET_MASK           0x01000020U
 #define OS_ARM_INSTR_LEN            4
 #define OS_THUMB_INSTR_LEN          2
@@ -112,20 +109,49 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
 
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     UINT32 status;
 
     READ_UINT32(status, OS_INT_STATUS_ADDR);
+
     return (31 - CLZ(status));
 }
 
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    *((volatile UINT32 *)OS_INT_ENABLE_ADDR) |= (1U << (hwiNum));
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    *((volatile UINT32 *)OS_INT_ENABLE_ADDR) &= ~(1U << (hwiNum));
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .getCurIrqNum   = HwiNumGet,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -140,8 +166,8 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -175,7 +201,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
     OsSchedUpdateSleepTime();
 #endif
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -237,7 +263,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    OS_INT_ENABLE(hwiNum);
+    HwiUnmask(hwiNum);
     LOS_IntRestore(intSave);
 
     return LOS_OK;
@@ -258,7 +284,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
         return OS_ERRNO_HWI_NUM_INVALID;
     }
 
-    OS_INT_DISABLE(hwiNum);
+    HwiMask(hwiNum);
 
     intSave = LOS_IntLock();
     g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
@@ -316,6 +342,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     PRINTK("xPSR      = 0x%x\n", excInfo->context->spsr);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -332,6 +359,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -381,7 +409,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcMemPoolCheckInfo();
 #endif

arch/arm/cortex-m3/keil/los_arch_atomic.h

@@ -40,73 +40,6 @@ extern "C" {
 #endif /* __cplusplus */
 #endif /* __cplusplus */
 
-STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
-{
-    INT32 val;
-    UINT32 intSave;
-
-    intSave = LOS_IntLock();
-
-    __asm__ __volatile__("ldrex   %0, [%1]\n"
-                         : "=&r"(val)
-                         : "r"(v)
-                         : "cc");
-    LOS_IntRestore(intSave);
-
-    return val;
-}
-
-STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
-{
-    UINT32 status;
-    UINT32 intSave;
-
-    intSave = LOS_IntLock();
-
-    __asm__ __volatile__("1:ldrex   %0, [%1]\n"
-                         "  strex   %0, %2, [%1]\n"
-                         "  teq %0, #0\n"
-                         "  bne 1b"
-                         : "=&r"(status)
-                         : "r"(v), "r"(setVal)
-                         : "cc");
-    LOS_IntRestore(intSave);
-}
-
-STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
-{
-    INT32 val;
-    UINT32 status;
-
-    do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
-                             "add   %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
-                             : "=&r"(status), "=&r"(val)
-                             : "r"(v), "r"(addVal)
-                             : "cc");
-    } while (__builtin_expect(status != 0, 0));
-
-    return val;
-}
-
-STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
-{
-    INT32 val;
-    UINT32 status;
-
-    do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
-                             "sub   %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
-                             : "=&r"(status), "=&r"(val)
-                             : "r"(v), "r"(subVal)
-                             : "cc");
-    } while (__builtin_expect(status != 0, 0));
-
-    return val;
-}
-
 STATIC INLINE VOID ArchAtomicInc(Atomic *v)
 {
     (VOID)ArchAtomicAdd(v, 1);
@@ -127,91 +60,6 @@ STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
     return ArchAtomicSub(v, 1);
 }
 
-/**
- * @ingroup  los_arch_atomic
- * @brief Atomic exchange for 32-bit variable.
- *
- * @par Description:
- * This API is used to implement the atomic exchange for 32-bit variable
- * and return the previous value of the atomic variable.
- * @attention
- * <ul>The pointer v must not be NULL.</ul>
- *
- * @param  v       [IN] The variable pointer.
- * @param  val     [IN] The exchange value.
- *
- * @retval #INT32       The previous value of the atomic variable
- * @par Dependency:
- * <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
- * @see
- */
-STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
-{
-    INT32 prevVal = 0;
-    UINT32 status = 0;
-
-    do {
-        __asm__ __volatile__("ldrex   %0, [%3]\n"
-                             "strex   %1, %4, [%3]"
-                             : "=&r"(prevVal), "=&r"(status), "+m"(*v)
-                             : "r"(v), "r"(val)
-                             : "cc");
-    } while (__builtin_expect(status != 0, 0));
-
-    return prevVal;
-}
-
-/**
- * @ingroup  los_arch_atomic
- * @brief Atomic exchange for 32-bit variable with compare.
- *
- * @par Description:
- * This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal.
- * @attention
- * <ul>The pointer v must not be NULL.</ul>
- *
- * @param  v       [IN] The variable pointer.
- * @param  val     [IN] The new value.
- * @param  oldVal  [IN] The old value.
- *
- * @retval TRUE  The previous value of the atomic variable is not equal to oldVal.
- * @retval FALSE The previous value of the atomic variable is equal to oldVal.
- * @par Dependency:
- * <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
- * @see
- */
-STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
-{
-    INT32 prevVal = 0;
-    UINT32 status = 0;
-
-    do {
-        __asm__ __volatile__("1: ldrex %0, %2\n"
-                             "    mov %1, #0\n"
-                             "    cmp %0, %3\n"
-                             "    bne 2f\n"
-                             "    strex %1, %4, %2\n"
-                             "2:"
-                             : "=&r"(prevVal), "=&r"(status), "+Q"(*v)
-                             : "r"(oldVal), "r"(val)
-                             : "cc");
-    } while (__builtin_expect(status != 0, 0));
-
-    return prevVal != oldVal;
-}
-
-STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v)
-{
-    INT64 val;
-    UINT32 intSave;
-
-    intSave = LOS_IntLock();
-    val = *v;
-    LOS_IntRestore(intSave);
-
-    return val;
-}
-
 STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal)
 {
     UINT32 intSave;

arch/arm/cortex-m3/keil/los_arch_interrupt.h

@@ -109,7 +109,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000900
  *
- * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a Cortex-M3 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
  */
 #define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
 
@@ -159,7 +160,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000905
  *
- * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15].
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a Cortex-M3 platform is [0,15].
  */
 #define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
 
@@ -169,7 +171,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000906
  *
- * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
  */
 #define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
 
@@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_arch_interrupt
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_arch_interrupt
  * @brief: Default vector handling function.

arch/arm/cortex-m3/keil/los_atomic.S

@@ -0,0 +1,98 @@
+;
+; Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+;
+; Redistribution and use in source and binary forms, with or without modification,
+; are permitted provided that the following conditions are met:
+;
+; 1. Redistributions of source code must retain the above copyright notice, this list of
+;    conditions and the following disclaimer.
+;
+; 2. Redistributions in binary form must reproduce the above copyright notice, this list
+;    of conditions and the following disclaimer in the documentation and/or other materials
+;    provided with the distribution.
+;
+; 3. Neither the name of the copyright holder nor the names of its contributors may be used
+;    to endorse or promote products derived from this software without specific prior written
+;    permission.
+;
+; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+; THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+; PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+; CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+; EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+; PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+; WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+; OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+; ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;
+
+        EXPORT  ArchAtomicRead
+        EXPORT  ArchAtomicSet
+        EXPORT  ArchAtomicAdd
+        EXPORT  ArchAtomicSub
+        EXPORT  ArchAtomicXchg32bits
+        EXPORT  ArchAtomicCmpXchg32bits
+
+    PRESERVE8
+    AREA  |.text|, CODE, READONLY
+    THUMB
+
+
+        EXPORT  ArchAtomicRead
+        EXPORT  ArchAtomicSet
+        EXPORT  ArchAtomicAdd
+        EXPORT  ArchAtomicSub
+        EXPORT  ArchAtomicXchg32bits
+        EXPORT  ArchAtomicCmpXchg32bits
+
+    PRESERVE8
+    AREA  |.text|, CODE, READONLY
+    THUMB
+
+ArchAtomicRead
+    ldrex r1, [r0]
+    mov r0, r1
+    bx lr
+
+ArchAtomicSet
+    ldrex r2, [r0]
+    strex r3, r1, [r0]
+    teq r3, #0
+    bne ArchAtomicSet
+    bx lr
+
+ArchAtomicAdd
+    ldrex r2, [r0]
+    add r2, r2, r1
+    strex r3, r2, [r0]
+    teq r3, #0
+    bne ArchAtomicAdd
+    mov r0, r2
+    bx lr
+
+ArchAtomicSub
+    ldrex r2, [r0]
+    sub r2, r2, r1
+    strex r3, r2, [r0]
+    teq r3, #0
+    bne ArchAtomicSub
+    mov r0, r2
+    bx lr
+
+ArchAtomicXchg32bits
+    ldrex r2, [r0]
+    strex r3, r1, [r0]
+    teq r3, #0
+    bne ArchAtomicXchg32bits
+    mov r0, r2
+
+ArchAtomicCmpXchg32bits
+    ldrex r3, [r0]
+    cmp r3, r2
+    bne end
+    strex r4, r1, [r0]
+    teq r4, #0
+    bne ArchAtomicCmpXchg32bits
+end

arch/arm/cortex-m3/keil/los_context.c

@@ -76,17 +76,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))

arch/arm/cortex-m3/keil/los_interrupt.c

@@ -108,17 +108,85 @@ WEAK VOID SysTick_Handler(VOID)
 }
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     return __get_IPSR();
 }
 
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    NVIC_SetPriority((IRQn_Type)hwiNum, priority);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .triggerIrq     = HwiPending,
+    .clearIrq       = HwiClear,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -133,8 +201,8 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -168,7 +236,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
     g_intCount++;
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -234,8 +302,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+    HwiUnmask((IRQn_Type)hwiNum);
-    NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio);
+    HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
 
     LOS_IntRestore(intSave);
 
@@ -257,7 +325,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
         return OS_ERRNO_HWI_NUM_INVALID;
     }
 
-    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+    HwiMask((IRQn_Type)hwiNum);
 
     intSave = LOS_IntLock();
 
@@ -378,6 +446,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -394,6 +463,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -443,7 +513,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcNvicDump();
     OsExcMemPoolCheckInfo();

arch/arm/cortex-m33/gcc/NTZ/BUILD.gn

@@ -38,6 +38,7 @@ kernel_module(module_name) {
     "los_interrupt.c",
     "los_timer.c",
   ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

arch/arm/cortex-m33/gcc/NTZ/los_arch_atomic.h

@@ -43,15 +43,11 @@ extern "C" {
 STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 {
     INT32 val;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    __asm__ __volatile__("ldrex %0, [%1]\n"
-
-    __asm__ __volatile__("ldrex   %0, [%1]\n"
                          : "=&r"(val)
                          : "r"(v)
                          : "cc");
-    LOS_IntRestore(intSave);
 
     return val;
 }
@@ -59,18 +55,14 @@ STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
 {
     UINT32 status;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    do {
-
+        __asm__ __volatile__("ldrex %0, [%1]\n"
-    __asm__ __volatile__("1:ldrex   %0, [%1]\n"
+                             "strex %0, %2, [%1]\n"
-                         "  strex   %0, %2, [%1]\n"
+                             : "=&r"(status)
-                         "  teq %0, #0\n"
+                             : "r"(v), "r"(setVal)
-                         "  bne 1b"
+                             : "cc");
-                         : "=&r"(status)
+    } while (__builtin_expect(status != 0, 0));
-                         : "r"(v), "r"(setVal)
-                         : "cc");
-    LOS_IntRestore(intSave);
 }
 
 STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
@@ -79,9 +71,9 @@ STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        __asm__ __volatile__("ldrex %1, [%2]\n"
-                             "add   %1, %1, %3\n"
+                             "add %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                             "strex %0, %1, [%2]"
                              : "=&r"(status), "=&r"(val)
                              : "r"(v), "r"(addVal)
                              : "cc");
@@ -96,9 +88,9 @@ STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        __asm__ __volatile__("ldrex %1, [%2]\n"
-                             "sub   %1, %1, %3\n"
+                             "sub %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                             "strex %0, %1, [%2]"
                              : "=&r"(status), "=&r"(val)
                              : "r"(v), "r"(subVal)
                              : "cc");
@@ -151,8 +143,8 @@ STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("ldrex   %0, [%3]\n"
+        __asm__ __volatile__("ldrex %0, [%3]\n"
-                             "strex   %1, %4, [%3]"
+                             "strex %1, %4, [%3]"
                              : "=&r"(prevVal), "=&r"(status), "+m"(*v)
                              : "r"(v), "r"(val)
                              : "cc");
@@ -186,12 +178,12 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("1: ldrex %0, %2\n"
+        __asm__ __volatile__("ldrex %0, %2\n"
-                             "    mov %1, #0\n"
+                             "mov %1, #0\n"
-                             "    cmp %0, %3\n"
+                             "cmp %0, %3\n"
-                             "    bne 2f\n"
+                             "bne 1f\n"
-                             "    strex %1, %4, %2\n"
+                             "strex %1, %4, %2\n"
-                             "2:"
+                             "1:"
                              : "=&r"(prevVal), "=&r"(status), "+Q"(*v)
                              : "r"(oldVal), "r"(val)
                              : "cc");

arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h

@@ -109,7 +109,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000900
  *
- * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a Cortex-M33 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
  */
 #define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
 
@@ -159,7 +160,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000905
  *
- * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15].
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a Cortex-M33 platform is [0,15].
  */
 #define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
 
@@ -169,7 +171,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000906
  *
- * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
  */
 #define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
 
@@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_arch_interrupt
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_arch_interrupt
  * @brief: Default vector handling function.

arch/arm/cortex-m33/gcc/NTZ/los_context.c

@@ -75,17 +75,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))
@@ -146,6 +136,21 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
     return (VOID *)context;
 }
 
+#if (LOSCFG_KERNEL_SIGNAL == 1)
+VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
+{
+    UNUSED(stackTop);
+    TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
+    (VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
+
+    context->uwR0 = param;
+    context->uwPC = sigHandler;
+    context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
+
+    return (VOID *)context;
+}
+#endif
+
 LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
 {
     (VOID)LOS_IntLock();

arch/arm/cortex-m33/gcc/NTZ/los_dispatch.S

@@ -47,6 +47,15 @@
     .section .text
     .thumb
 
+.macro SIGNAL_CONTEXT_RESTORE
+    push    {r12, lr}
+    blx     OsSignalTaskContextRestore
+    pop     {r12, lr}
+    cmp     r0, #0
+    mov     r1, r0
+    bne     SignalContextRestore
+.endm
+
     .type HalStartToRun, %function
     .global HalStartToRun
 HalStartToRun:
@@ -90,10 +99,8 @@ __DisabledFPU:
     MOV     lr, r5
     cpsie   I
     BX      r6
-
     .fnend
 
-
     .type ArchIntLock, %function
     .global ArchIntLock
 ArchIntLock:
@@ -140,9 +147,6 @@ ArchTaskSchedule:
     bx      lr
    .fnend
 
-
-
-
     .type HalPendSV, %function
     .global HalPendSV
 HalPendSV:
@@ -153,6 +157,8 @@ HalPendSV:
     cpsid   I
 
 HalTaskSwitch:
+    SIGNAL_CONTEXT_RESTORE
+
     push    {r12, lr}
     blx     OsSchedTaskSwitch
     pop     {r12, lr}
@@ -182,9 +188,11 @@ __DisabledFPU1:
 
     ldr     r0, [r5, #4]
     str     r0, [r5]
-
     ldr     r1,   [r0]
 
+SignalContextRestore:
+    ldr.w   r3, =OS_FPU_CPACR
+    ldr     r3, [r3]
     and     r3, r3, #OS_FPU_CPACR_ENABLE
     cmp     r3, #OS_FPU_CPACR_ENABLE
     bne     __DisabledFPU2
@@ -193,9 +201,7 @@ __DisabledFPU1:
 __DisabledFPU2:
     ldmfd   r1!, {r4-r12}
     msr     psp,  r1
-
     msr     PRIMASK, r12
-
-
     bx      lr
+
     .fnend

arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c

@@ -40,6 +40,7 @@
 #include "los_memory.h"
 #include "los_membox.h"
 
+#define DEF_HANDLER_START_INDEX 2
 /*lint -save -e40 -e522 -e533*/
 UINT32 g_intCount = 0;
 
@@ -98,17 +99,85 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
 #endif
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     return __get_IPSR();
 }
 
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    NVIC_SetPriority((IRQn_Type)hwiNum, priority);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .triggerIrq     = HwiPending,
+    .clearIrq       = HwiClear,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -123,8 +192,8 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -158,7 +227,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
     g_intCount++;
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -224,8 +293,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+    HwiUnmask((IRQn_Type)hwiNum);
-    NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio);
+    HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
 
     LOS_IntRestore(intSave);
 
@@ -247,7 +316,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
         return OS_ERRNO_HWI_NUM_INVALID;
     }
 
-    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+    HwiMask((IRQn_Type)hwiNum);
 
     intSave = LOS_IntLock();
 
@@ -368,6 +437,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -384,6 +454,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -433,7 +504,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcNvicDump();
     OsExcMemPoolCheckInfo();
@@ -489,7 +562,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
     UINT32 index;
     g_hwiForm[0] = 0;             /* [0] Top of Stack */
     g_hwiForm[1] = 0; /* [1] reset */
-    for (index = 2; index < OS_VECTOR_CNT; index++) {
+    for (index = DEF_HANDLER_START_INDEX; index < OS_VECTOR_CNT; index++) {
         g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
     }
     /* Exception handler register */

arch/arm/cortex-m33/gcc/TZ/BUILD.gn

@@ -39,6 +39,7 @@ kernel_module(module_name) {
     "non_secure/los_timer.c",
     "non_secure/los_trustzone.c",
   ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 
   include_dirs = [
     "non_secure",

arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_atomic.h

@@ -43,15 +43,11 @@ extern "C" {
 STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 {
     INT32 val;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    __asm__ __volatile__("ldrex %0, [%1]\n"
-
-    __asm__ __volatile__("ldrex   %0, [%1]\n"
                          : "=&r"(val)
                          : "r"(v)
                          : "cc");
-    LOS_IntRestore(intSave);
 
     return val;
 }
@@ -59,18 +55,14 @@ STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
 {
     UINT32 status;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    do {
-
+        __asm__ __volatile__("ldrex %0, [%1]\n"
-    __asm__ __volatile__("1:ldrex   %0, [%1]\n"
+                             "strex %0, %2, [%1]\n"
-                         "  strex   %0, %2, [%1]\n"
+                             : "=&r"(status)
-                         "  teq %0, #0\n"
+                             : "r"(v), "r"(setVal)
-                         "  bne 1b"
+                             : "cc");
-                         : "=&r"(status)
+    } while (__builtin_expect(status != 0, 0));
-                         : "r"(v), "r"(setVal)
-                         : "cc");
-    LOS_IntRestore(intSave);
 }
 
 STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
@@ -79,9 +71,9 @@ STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        __asm__ __volatile__("ldrex %1, [%2]\n"
-                             "add   %1, %1, %3\n"
+                             "add %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                             "strex %0, %1, [%2]"
                              : "=&r"(status), "=&r"(val)
                              : "r"(v), "r"(addVal)
                              : "cc");
@@ -96,9 +88,9 @@ STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        __asm__ __volatile__("ldrex %1, [%2]\n"
-                             "sub   %1, %1, %3\n"
+                             "sub %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                             "strex %0, %1, [%2]"
                              : "=&r"(status), "=&r"(val)
                              : "r"(v), "r"(subVal)
                              : "cc");
@@ -151,8 +143,8 @@ STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("ldrex   %0, [%3]\n"
+        __asm__ __volatile__("ldrex %0, [%3]\n"
-                             "strex   %1, %4, [%3]"
+                             "strex %1, %4, [%3]"
                              : "=&r"(prevVal), "=&r"(status), "+m"(*v)
                              : "r"(v), "r"(val)
                              : "cc");
@@ -186,12 +178,12 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("1: ldrex %0, %2\n"
+        __asm__ __volatile__("ldrex %0, %2\n"
-                             "    mov %1, #0\n"
+                             "mov %1, #0\n"
-                             "    cmp %0, %3\n"
+                             "cmp %0, %3\n"
-                             "    bne 2f\n"
+                             "bne 1f\n"
-                             "    strex %1, %4, %2\n"
+                             "strex %1, %4, %2\n"
-                             "2:"
+                             "1:"
                              : "=&r"(prevVal), "=&r"(status), "+Q"(*v)
                              : "r"(oldVal), "r"(val)
                              : "cc");

arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h

@@ -109,7 +109,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000900
  *
- * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a Cortex-M33 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
  */
 #define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
 
@@ -159,7 +160,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000905
  *
- * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15].
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a Cortex-M33 platform is [0,15].
  */
 #define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
 
@@ -169,7 +171,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000906
  *
- * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
  */
 #define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
 
@@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_arch_interrupt
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_arch_interrupt
  * @brief: Default vector handling function.

arch/arm/cortex-m33/gcc/TZ/non_secure/los_context.c

@@ -75,17 +75,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))
@@ -150,6 +140,20 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
     return (VOID *)context;
 }
 
+VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
+{
+    TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
+    (VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
+
+    context->uwR0 = param;
+    context->uwPC = sigHandler;
+    context->stackLimit = (UINT32)stackTop;
+    context->excReturn = 0xFFFFFFBC;
+    context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
+
+    return (VOID *)context;
+}
+
 LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
 {
     (VOID)LOS_IntLock();

arch/arm/cortex-m33/gcc/TZ/non_secure/los_dispatch.S

@@ -45,6 +45,15 @@
     .section .text
     .thumb
 
+.macro SIGNAL_CONTEXT_RESTORE
+    PUSH    {R12, LR}
+    BLX     OsSignalTaskContextRestore
+    POP     {R12, LR}
+    CMP     R0, #0
+    MOV     R1, R0
+    BNE     SignalContextRestore
+.endm
+
     .type HalStartFirstTask, %function
     .global HalStartFirstTask
 HalStartFirstTask:
@@ -132,6 +141,8 @@ HalPendSV:
     cpsid   I
 
 HalTaskSwitch:
+    SIGNAL_CONTEXT_RESTORE
+
     push    {r12, lr}
     blx     OsSchedTaskSwitch
     pop     {r12, lr}
@@ -175,8 +186,9 @@ __DisabledFPU2:
 
     LDR     R0, [R5, #4]
     STR     R0, [R5]
-
     LDR     R1, [R0]
+
+SignalContextRestore:
     LDMIA   R1!, {R0, R2-R3}                  /* Restore secureContext, PSPLIM and LR from the current task stack. */
     MSR     PSPLIM, R2
     MOV     LR, R3

arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c

@@ -40,6 +40,7 @@
 #include "los_memory.h"
 #include "los_membox.h"
 
+#define DEF_HANDLER_START_INDEX 2
 /*lint -save -e40 -e522 -e533*/
 UINT32 g_intCount = 0;
 
@@ -98,17 +99,85 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
 #endif
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     return __get_IPSR();
 }
 
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    NVIC_SetPriority((IRQn_Type)hwiNum, priority);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .triggerIrq     = HwiPending,
+    .clearIrq       = HwiClear,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -123,8 +192,8 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -158,7 +227,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
     g_intCount++;
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -224,8 +293,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+    HwiUnmask((IRQn_Type)hwiNum);
-    NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio);
+    HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
 
     LOS_IntRestore(intSave);
 
@@ -368,6 +437,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -384,6 +454,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -433,7 +504,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcNvicDump();
     OsExcMemPoolCheckInfo();
@@ -487,9 +560,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 {
 #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
     UINT32 index;
-    g_hwiForm[0] = 0;             /* [0] Top of Stack */
+    g_hwiForm[0] = 0; /* [0] Top of Stack */
     g_hwiForm[1] = 0; /* [1] reset */
-    for (index = 2; index < OS_VECTOR_CNT; index++) {
+    for (index = DEF_HANDLER_START_INDEX; index < OS_VECTOR_CNT; index++) {
         g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
     }
     /* Exception handler register */

arch/arm/cortex-m33/iar/NTZ/los_arch_atomic.h

@@ -43,15 +43,11 @@ extern "C" {
 STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 {
     INT32 val;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    asm volatile("ldrex %0, [%1]\n"
-
+                 : "=&r"(val)
-    __asm__ __volatile__("ldrex   %0, [%1]\n"
+                 : "r"(v)
-                         : "=&r"(val)
+                 : "cc");
-                         : "r"(v)
-                         : "cc");
-    LOS_IntRestore(intSave);
 
     return val;
 }
@@ -59,18 +55,14 @@ STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
 {
     UINT32 status;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    do {
-
+        asm volatile("ldrex %0, [%1]\n"
-    __asm__ __volatile__("1:ldrex   %0, [%1]\n"
+                     "strex %0, %2, [%1]\n"
-                         "  strex   %0, %2, [%1]\n"
+                     : "=&r"(status)
-                         "  teq %0, #0\n"
+                     : "r"(v), "r"(setVal)
-                         "  bne 1b"
+                     : "cc");
-                         : "=&r"(status)
+    } while (status != 0);
-                         : "r"(v), "r"(setVal)
-                         : "cc");
-    LOS_IntRestore(intSave);
 }
 
 STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
@@ -79,13 +71,13 @@ STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        asm volatile("ldrex %1, [%2]\n"
-                             "add   %1, %1, %3\n"
+                     "add %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                     "strex %0, %1, [%2]"
-                             : "=&r"(status), "=&r"(val)
+                     : "=&r"(status), "=&r"(val)
-                             : "r"(v), "r"(addVal)
+                     : "r"(v), "r"(addVal)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return val;
 }
@@ -96,13 +88,13 @@ STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        asm volatile("ldrex %1, [%2]\n"
-                             "sub   %1, %1, %3\n"
+                     "sub %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                     "strex %0, %1, [%2]"
-                             : "=&r"(status), "=&r"(val)
+                     : "=&r"(status), "=&r"(val)
-                             : "r"(v), "r"(subVal)
+                     : "r"(v), "r"(subVal)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return val;
 }
@@ -151,12 +143,12 @@ STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("ldrex   %0, [%3]\n"
+        asm volatile("ldrex %0, [%2]\n"
-                             "strex   %1, %4, [%3]"
+                     "strex %1, %3, [%2]"
-                             : "=&r"(prevVal), "=&r"(status), "+m"(*v)
+                     : "=&r"(prevVal), "=&r"(status)
-                             : "r"(v), "r"(val)
+                     : "r"(v), "r"(val)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return prevVal;
 }
@@ -186,16 +178,16 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("1: ldrex %0, %2\n"
+        asm volatile("ldrex %0, [%2]\n"
-                             "    mov %1, #0\n"
+                     "mov %1, #0\n"
-                             "    cmp %0, %3\n"
+                     "cmp %0, %3\n"
-                             "    bne 2f\n"
+                     "bne 1f\n"
-                             "    strex %1, %4, %2\n"
+                     "strex %1, %4, [%2]\n"
-                             "2:"
+                     "1:"
-                             : "=&r"(prevVal), "=&r"(status), "+Q"(*v)
+                     : "=&r"(prevVal), "=&r"(status)
-                             : "r"(oldVal), "r"(val)
+                     : "r"(v), "r"(oldVal), "r"(val)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return prevVal != oldVal;
 }

arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h

@@ -109,7 +109,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000900
  *
- * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a Cortex-M33 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
  */
 #define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
 
@@ -159,7 +160,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000905
  *
- * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15].
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a Cortex-M33 platform is [0,15].
  */
 #define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
 
@@ -169,7 +171,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000906
  *
- * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
  */
 #define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
 
@@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_hwi
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_hwi.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_hwi
  * @brief: Default vector handling function.

arch/arm/cortex-m33/iar/NTZ/los_context.c

@@ -75,17 +75,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))
@@ -146,6 +136,19 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
     return (VOID *)context;
 }
 
+VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
+{
+    UNUSED(stackTop);
+    TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
+    (VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
+
+    context->uwR0 = param;
+    context->uwPC = sigHandler;
+    context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
+
+    return (VOID *)context;
+}
+
 LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
 {
     (VOID)LOS_IntLock();

arch/arm/cortex-m33/iar/NTZ/los_dispatch.S

@@ -38,6 +38,7 @@
     EXPORT  ArchTaskSchedule
     EXPORT  HalPendSV
     IMPORT  OsSchedTaskSwitch
+    IMPORT  OsSignalTaskContextRestore
     IMPORT  g_losTask
 
 OS_FPU_CPACR                EQU     0xE000ED88
@@ -52,6 +53,15 @@ OS_TASK_STATUS_RUNNING      EQU     0x0010
     THUMB
     REQUIRE8
 
+    MACRO SIGNAL_CONTEXT_RESTORE
+    PUSH    {R12, LR}
+    BLX     OsSignalTaskContextRestore
+    POP     {R12, LR}
+    CMP     R0, #0
+    MOV     R1, R0
+    BNE     SignalContextRestore
+    ENDM
+
 HalStartToRun
     LDR     R4, =OS_NVIC_SYSPRI2
     LDR     R5, =OS_NVIC_PENDSV_PRI
@@ -145,8 +155,11 @@ __DisabledFPU1
 
     LDR     R0, [R5, #4]
     STR     R0, [R5]
-
     LDR     R1, [R0]
+
+SignalContextRestore
+    LDR.W   R3, =OS_FPU_CPACR
+    LDR     R3, [R3]
     AND     R3, R3, #OS_FPU_CPACR_ENABLE
     CMP     R3, #OS_FPU_CPACR_ENABLE
     BNE     __DisabledFPU2

arch/arm/cortex-m33/iar/NTZ/los_interrupt.c

@@ -105,17 +105,85 @@ WEAK VOID SysTick_Handler(VOID)
 }
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     return __get_IPSR();
 }
 
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    NVIC_SetPriority((IRQn_Type)hwiNum, priority);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .triggerIrq     = HwiPending,
+    .clearIrq       = HwiClear,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -130,8 +198,8 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -167,7 +235,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
 
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -233,8 +301,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+    HwiUnmask((IRQn_Type)hwiNum);
-    NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio);
+    HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
 
     LOS_IntRestore(intSave);
 
@@ -376,6 +444,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -392,6 +461,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -441,7 +511,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcNvicDump();
     OsExcMemPoolCheckInfo();

arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_atomic.h

@@ -43,15 +43,11 @@ extern "C" {
 STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 {
     INT32 val;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    asm volatile("ldrex %0, [%1]\n"
-
+                 : "=&r"(val)
-    __asm__ __volatile__("ldrex   %0, [%1]\n"
+                 : "r"(v)
-                         : "=&r"(val)
+                 : "cc");
-                         : "r"(v)
-                         : "cc");
-    LOS_IntRestore(intSave);
 
     return val;
 }
@@ -59,18 +55,14 @@ STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
 {
     UINT32 status;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    do {
-
+        asm volatile("ldrex %0, [%1]\n"
-    __asm__ __volatile__("1:ldrex   %0, [%1]\n"
+                     "strex %0, %2, [%1]\n"
-                         "  strex   %0, %2, [%1]\n"
+                     : "=&r"(status)
-                         "  teq %0, #0\n"
+                     : "r"(v), "r"(setVal)
-                         "  bne 1b"
+                     : "cc");
-                         : "=&r"(status)
+    } while (status != 0);
-                         : "r"(v), "r"(setVal)
-                         : "cc");
-    LOS_IntRestore(intSave);
 }
 
 STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
@@ -79,13 +71,13 @@ STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        asm volatile("ldrex %1, [%2]\n"
-                             "add   %1, %1, %3\n"
+                     "add %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                     "strex %0, %1, [%2]"
-                             : "=&r"(status), "=&r"(val)
+                     : "=&r"(status), "=&r"(val)
-                             : "r"(v), "r"(addVal)
+                     : "r"(v), "r"(addVal)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return val;
 }
@@ -96,13 +88,13 @@ STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        asm volatile("ldrex %1, [%2]\n"
-                             "sub   %1, %1, %3\n"
+                     "sub %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                     "strex %0, %1, [%2]"
-                             : "=&r"(status), "=&r"(val)
+                     : "=&r"(status), "=&r"(val)
-                             : "r"(v), "r"(subVal)
+                     : "r"(v), "r"(subVal)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return val;
 }
@@ -151,12 +143,12 @@ STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("ldrex   %0, [%3]\n"
+        asm volatile("ldrex %0, [%2]\n"
-                             "strex   %1, %4, [%3]"
+                     "strex %1, %3, [%2]"
-                             : "=&r"(prevVal), "=&r"(status), "+m"(*v)
+                     : "=&r"(prevVal), "=&r"(status)
-                             : "r"(v), "r"(val)
+                     : "r"(v), "r"(val)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return prevVal;
 }
@@ -186,16 +178,16 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("1: ldrex %0, %2\n"
+        asm volatile("ldrex %0, [%2]\n"
-                             "    mov %1, #0\n"
+                     "mov %1, #0\n"
-                             "    cmp %0, %3\n"
+                     "cmp %0, %3\n"
-                             "    bne 2f\n"
+                     "bne 1f\n"
-                             "    strex %1, %4, %2\n"
+                     "strex %1, %4, [%2]\n"
-                             "2:"
+                     "1:"
-                             : "=&r"(prevVal), "=&r"(status), "+Q"(*v)
+                     : "=&r"(prevVal), "=&r"(status)
-                             : "r"(oldVal), "r"(val)
+                     : "r"(v), "r"(oldVal), "r"(val)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return prevVal != oldVal;
 }

arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h

@@ -109,7 +109,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000900
  *
- * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a Cortex-M33 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
  */
 #define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
 
@@ -159,7 +160,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000905
  *
- * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15].
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a Cortex-M33 platform is [0,15].
  */
 #define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
 
@@ -169,7 +171,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000906
  *
- * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
  */
 #define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
 
@@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_hwi
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_hwi.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_hwi
  * @brief: Default vector handling function.

arch/arm/cortex-m33/iar/TZ/non_secure/los_context.c

@@ -75,17 +75,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))
@@ -150,6 +140,20 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
     return (VOID *)context;
 }
 
+VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
+{
+    TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
+    (VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
+
+    context->uwR0 = param;
+    context->uwPC = sigHandler;
+    context->stackLimit = (UINT32)stackTop;
+    context->excReturn = 0xFFFFFFBC;
+    context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
+
+    return (VOID *)context;
+}
+
 LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
 {
     (VOID)LOS_IntLock();

arch/arm/cortex-m33/iar/TZ/non_secure/los_dispatch.S

@@ -41,7 +41,7 @@
     EXPORT  HalSVCStartSchedule
     EXPORT  HalSVCSecureContextAlloc
     EXPORT  HalSVCSecureContextFree
-
+    IMPORT  OsSignalTaskContextRestore
     IMPORT  OsSchedTaskSwitch
     IMPORT  g_losTask
 
@@ -62,6 +62,15 @@ OS_TASK_STATUS_RUNNING      EQU     0x0010
     THUMB
     REQUIRE8
 
+    MACRO SIGNAL_CONTEXT_RESTORE
+    PUSH    {R12, LR}
+    BLX     OsSignalTaskContextRestore
+    POP     {R12, LR}
+    CMP     R0, #0
+    MOV     R1, R0
+    BNE     SignalContextRestore
+    ENDM
+
 HalStartFirstTask
     MOV     R0, #2
     MSR     CONTROL, R0
@@ -118,6 +127,8 @@ HalPendSV
     CPSID   I
 
 HalTaskSwitch
+    SIGNAL_CONTEXT_RESTORE
+
     PUSH    {R12, LR}
     BLX     OsSchedTaskSwitch
     POP     {R12, LR}
@@ -161,8 +172,9 @@ __DisabledFPU2
 
     LDR     R0, [R5, #4]
     STR     R0, [R5]
-
     LDR     R1, [R0]
+
+SignalContextRestore
     LDMIA   R1!, {R0, R2-R3}                  /* Restore secureContext, PSPLIM and LR from the current task stack. */
     MSR     PSPLIM, R2
     MOV     LR, R3

arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c

@@ -105,17 +105,85 @@ WEAK VOID SysTick_Handler(VOID)
 }
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     return __get_IPSR();
 }
 
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    NVIC_SetPriority((IRQn_Type)hwiNum, priority);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .triggerIrq     = HwiPending,
+    .clearIrq       = HwiClear,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -130,8 +198,8 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -167,7 +235,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
 
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -233,8 +301,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+    HwiUnmask((IRQn_Type)hwiNum);
-    NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio);
+    HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
 
     LOS_IntRestore(intSave);
 
@@ -376,6 +444,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -392,6 +461,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -441,7 +511,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcNvicDump();
     OsExcMemPoolCheckInfo();

arch/arm/cortex-m4/gcc/BUILD.gn

@@ -39,6 +39,7 @@ kernel_module(module_name) {
     "los_mpu.c",
     "los_timer.c",
   ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

arch/arm/cortex-m4/gcc/los_arch_atomic.h

@@ -43,15 +43,11 @@ extern "C" {
 STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 {
     INT32 val;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    __asm__ __volatile__("ldrex %0, [%1]\n"
-
-    __asm__ __volatile__("ldrex   %0, [%1]\n"
                          : "=&r"(val)
                          : "r"(v)
                          : "cc");
-    LOS_IntRestore(intSave);
 
     return val;
 }
@@ -59,18 +55,14 @@ STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
 {
     UINT32 status;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    do {
-
+        __asm__ __volatile__("ldrex %0, [%1]\n"
-    __asm__ __volatile__("1:ldrex   %0, [%1]\n"
+                             "strex %0, %2, [%1]\n"
-                         "  strex   %0, %2, [%1]\n"
+                             : "=&r"(status)
-                         "  teq %0, #0\n"
+                             : "r"(v), "r"(setVal)
-                         "  bne 1b"
+                             : "cc");
-                         : "=&r"(status)
+    } while (__builtin_expect(status != 0, 0));
-                         : "r"(v), "r"(setVal)
-                         : "cc");
-    LOS_IntRestore(intSave);
 }
 
 STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
@@ -79,9 +71,9 @@ STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        __asm__ __volatile__("ldrex %1, [%2]\n"
-                             "add   %1, %1, %3\n"
+                             "add %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                             "strex %0, %1, [%2]"
                              : "=&r"(status), "=&r"(val)
                              : "r"(v), "r"(addVal)
                              : "cc");
@@ -96,9 +88,9 @@ STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        __asm__ __volatile__("ldrex %1, [%2]\n"
-                             "sub   %1, %1, %3\n"
+                             "sub %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                             "strex %0, %1, [%2]"
                              : "=&r"(status), "=&r"(val)
                              : "r"(v), "r"(subVal)
                              : "cc");
@@ -151,8 +143,8 @@ STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("ldrex   %0, [%3]\n"
+        __asm__ __volatile__("ldrex %0, [%3]\n"
-                             "strex   %1, %4, [%3]"
+                             "strex %1, %4, [%3]"
                              : "=&r"(prevVal), "=&r"(status), "+m"(*v)
                              : "r"(v), "r"(val)
                              : "cc");
@@ -186,12 +178,12 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("1: ldrex %0, %2\n"
+        __asm__ __volatile__("ldrex %0, %2\n"
-                             "    mov %1, #0\n"
+                             "mov %1, #0\n"
-                             "    cmp %0, %3\n"
+                             "cmp %0, %3\n"
-                             "    bne 2f\n"
+                             "bne 1f\n"
-                             "    strex %1, %4, %2\n"
+                             "strex %1, %4, %2\n"
-                             "2:"
+                             "1:"
                              : "=&r"(prevVal), "=&r"(status), "+Q"(*v)
                              : "r"(oldVal), "r"(val)
                              : "cc");

arch/arm/cortex-m4/gcc/los_arch_interrupt.h

@@ -109,7 +109,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000900
  *
- * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a Cortex-M4 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
  */
 #define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
 
@@ -159,7 +160,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000905
  *
- * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15].
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a Cortex-M4 platform is [0,15].
  */
 #define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
 
@@ -169,7 +171,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000906
  *
- * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
  */
 #define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
 
@@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_arch_interrupt
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_arch_interrupt
  * @brief: Default vector handling function.

arch/arm/cortex-m4/gcc/los_context.c

@@ -74,17 +74,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))
@@ -145,6 +135,19 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
     return (VOID *)context;
 }
 
+VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
+{
+    UNUSED(stackTop);
+    TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
+    (VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
+
+    context->uwR0 = param;
+    context->uwPC = sigHandler;
+    context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
+
+    return (VOID *)context;
+}
+
 LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
 {
     (VOID)LOS_IntLock();

arch/arm/cortex-m4/gcc/los_dispatch.S

@@ -44,6 +44,15 @@
     .section .text
     .thumb
 
+.macro SIGNAL_CONTEXT_RESTORE
+    push    {r12, lr}
+    blx     OsSignalTaskContextRestore
+    pop     {r12, lr}
+    cmp     r0, #0
+    mov     r1, r0
+    bne     SignalContextRestore
+.endm
+
     .type HalStartToRun, %function
     .global HalStartToRun
 HalStartToRun:
@@ -88,7 +97,6 @@ __DisabledFPU:
 
     .fnend
 
-
     .type ArchIntLock, %function
     .global ArchIntLock
 ArchIntLock:
@@ -135,9 +143,6 @@ ArchTaskSchedule:
     isb
    .fnend
 
-
-
-
     .type HalPendSV, %function
     .global HalPendSV
 HalPendSV:
@@ -148,6 +153,8 @@ HalPendSV:
     cpsid   I
 
 HalTaskSwitch:
+    SIGNAL_CONTEXT_RESTORE
+
     push    {r12, lr}
     blx     OsSchedTaskSwitch
     pop     {r12, lr}
@@ -176,8 +183,11 @@ __DisabledFPU1:
 
     ldr     r0, [r5, #4]
     str     r0, [r5]
-
     ldr     r1, [r0]
+
+SignalContextRestore:
+    ldr.w   r3, =OS_FPU_CPACR
+    ldr     r3, [r3]
     and     r3, r3, #OS_FPU_CPACR_ENABLE
     cmp     r3, #OS_FPU_CPACR_ENABLE
     bne     __DisabledFPU2

arch/arm/cortex-m4/gcc/los_interrupt.c

@@ -103,17 +103,85 @@ WEAK VOID SysTick_Handler(VOID)
 }
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     return __get_IPSR();
 }
 
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    NVIC_SetPriority((IRQn_Type)hwiNum, priority);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .triggerIrq     = HwiPending,
+    .clearIrq       = HwiClear,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -128,8 +196,8 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -163,7 +231,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
     g_intCount++;
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -229,8 +297,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+    HwiUnmask((IRQn_Type)hwiNum);
-    NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio);
+    HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
 
     LOS_IntRestore(intSave);
 
@@ -252,7 +320,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
         return OS_ERRNO_HWI_NUM_INVALID;
     }
 
-    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+    HwiMask((IRQn_Type)hwiNum);
 
     intSave = LOS_IntLock();
 
@@ -373,6 +441,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -389,6 +458,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -438,7 +508,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcNvicDump();
     OsExcMemPoolCheckInfo();

arch/arm/cortex-m4/iar/los_arch_atomic.h

@@ -43,15 +43,11 @@ extern "C" {
 STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 {
     INT32 val;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    asm volatile("ldrex %0, [%1]\n"
-
+                 : "=&r"(val)
-    __asm__ __volatile__("ldrex   %0, [%1]\n"
+                 : "r"(v)
-                         : "=&r"(val)
+                 : "cc");
-                         : "r"(v)
-                         : "cc");
-    LOS_IntRestore(intSave);
 
     return val;
 }
@@ -59,18 +55,14 @@ STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
 {
     UINT32 status;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    asm volatile("1:ldrex %0, [%1]\n"
-
+                 "  strex %0, %2, [%1]\n"
-    __asm__ __volatile__("1:ldrex   %0, [%1]\n"
+                 "  teq %0, #0\n"
-                         "  strex   %0, %2, [%1]\n"
+                 "  bne 1b"
-                         "  teq %0, #0\n"
+                 : "=&r"(status)
-                         "  bne 1b"
+                 : "r"(v), "r"(setVal)
-                         : "=&r"(status)
+                 : "cc");
-                         : "r"(v), "r"(setVal)
-                         : "cc");
-    LOS_IntRestore(intSave);
 }
 
 STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
@@ -79,13 +71,13 @@ STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        asm volatile("ldrex %1, [%2]\n"
-                             "add   %1, %1, %3\n"
+                     "add %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                     "strex %0, %1, [%2]"
-                             : "=&r"(status), "=&r"(val)
+                     : "=&r"(status), "=&r"(val)
-                             : "r"(v), "r"(addVal)
+                     : "r"(v), "r"(addVal)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return val;
 }
@@ -96,13 +88,13 @@ STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        asm volatile("ldrex %1, [%2]\n"
-                             "sub   %1, %1, %3\n"
+                     "sub %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                     "strex %0, %1, [%2]"
-                             : "=&r"(status), "=&r"(val)
+                     : "=&r"(status), "=&r"(val)
-                             : "r"(v), "r"(subVal)
+                     : "r"(v), "r"(subVal)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return val;
 }
@@ -151,12 +143,12 @@ STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("ldrex   %0, [%3]\n"
+        asm volatile("ldrex %0, [%2]\n"
-                             "strex   %1, %4, [%3]"
+                     "strex %1, %3, [%2]"
-                             : "=&r"(prevVal), "=&r"(status), "+m"(*v)
+                     : "=&r"(prevVal), "=&r"(status)
-                             : "r"(v), "r"(val)
+                     : "r"(v), "r"(val)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return prevVal;
 }
@@ -186,16 +178,16 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("1: ldrex %0, %2\n"
+        asm volatile("ldrex %0, [%2]\n"
-                             "    mov %1, #0\n"
+                     "mov %1, #0\n"
-                             "    cmp %0, %3\n"
+                     "cmp %0, %3\n"
-                             "    bne 2f\n"
+                     "bne 1f\n"
-                             "    strex %1, %4, %2\n"
+                     "strex %1, %4, [%2]\n"
-                             "2:"
+                     "1:"
-                             : "=&r"(prevVal), "=&r"(status), "+Q"(*v)
+                     : "=&r"(prevVal), "=&r"(status)
-                             : "r"(oldVal), "r"(val)
+                     : "r"(v), "r"(oldVal), "r"(val)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return prevVal != oldVal;
 }

arch/arm/cortex-m4/iar/los_arch_interrupt.h

@@ -109,7 +109,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000900
  *
- * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a Cortex-M4 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
  */
 #define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
 
@@ -159,7 +160,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000905
  *
- * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15].
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a Cortex-M4 platform is [0,15].
  */
 #define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
 
@@ -169,7 +171,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000906
  *
- * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
  */
 #define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
 
@@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_arch_interrupt
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_arch_interrupt
  * @brief: Default vector handling function.

arch/arm/cortex-m4/iar/los_context.c

@@ -77,17 +77,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))
@@ -141,13 +131,26 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
     context->uwR2 = 0x02020202L;
     context->uwR3 = 0x03030303L;
     context->uwR12 = 0x12121212L;
-    context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
+    context->uwLR = (UINTPTR)ArchSysExit;
-    context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
+    context->uwPC = (UINTPTR)OsTaskEntry;
     context->uwxPSR = 0x01000000L;
 
     return (VOID *)context;
 }
 
+VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
+{
+    UNUSED(stackTop);
+    TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
+    (VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
+
+    context->uwR0 = param;
+    context->uwPC = sigHandler;
+    context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
+
+    return (VOID *)context;
+}
+
 LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
 {
     (VOID)LOS_IntLock();

arch/arm/cortex-m4/iar/los_dispatch.S

@@ -38,6 +38,7 @@
     EXPORT  ArchTaskSchedule
     EXPORT  HalPendSV
     IMPORT  OsSchedTaskSwitch
+    IMPORT  OsSignalTaskContextRestore
     IMPORT  g_losTask
 
 OS_FPU_CPACR                EQU     0xE000ED88
@@ -52,6 +53,15 @@ OS_TASK_STATUS_RUNNING      EQU     0x0010
     THUMB
     REQUIRE8
 
+    MACRO SIGNAL_CONTEXT_RESTORE
+    PUSH    {R12, LR}
+    BLX     OsSignalTaskContextRestore
+    POP     {R12, LR}
+    CMP     R0, #0
+    MOV     R1, R0
+    BNE     SignalContextRestore
+    ENDM
+
 HalStartToRun
     LDR     R4, =OS_NVIC_SYSPRI2
     LDR     R5, =OS_NVIC_PENDSV_PRI
@@ -117,6 +127,8 @@ HalPendSV
     CPSID   I
 
 HalTaskSwitch
+    SIGNAL_CONTEXT_RESTORE
+
     PUSH    {R12, LR}
     BLX     OsSchedTaskSwitch
     POP     {R12, LR}
@@ -128,8 +140,8 @@ HalTaskSwitch
 
 TaskContextSwitch
     MOV     LR, R0
-    MRS     R0, PSP
 
+    MRS     R0, PSP
     STMFD   R0!, {R4-R12}
     LDR.W   R3, =OS_FPU_CPACR
     LDR     R3, [R3]
@@ -145,8 +157,11 @@ __DisabledFPU1
 
     LDR     R0, [R5, #4]
     STR     R0, [R5]
-
     LDR     R1, [R0]
+
+SignalContextRestore
+    LDR.W   R3, =OS_FPU_CPACR
+    LDR     R3, [R3]
     AND     R3, R3, #OS_FPU_CPACR_ENABLE
     CMP     R3, #OS_FPU_CPACR_ENABLE
     BNE     __DisabledFPU2

arch/arm/cortex-m4/iar/los_interrupt.c

@@ -109,17 +109,85 @@ WEAK VOID SysTick_Handler(VOID)
 }
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     return __get_IPSR();
 }
 
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    NVIC_SetPriority((IRQn_Type)hwiNum, priority);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .triggerIrq     = HwiPending,
+    .clearIrq       = HwiClear,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -134,8 +202,8 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -169,7 +237,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
     g_intCount++;
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -235,8 +303,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+    HwiUnmask((IRQn_Type)hwiNum);
-    NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio);
+    HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
 
     LOS_IntRestore(intSave);
 
@@ -379,6 +447,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -395,6 +464,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -444,7 +514,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcNvicDump();
     OsExcMemPoolCheckInfo();

arch/arm/cortex-m7/gcc/BUILD.gn

@@ -39,6 +39,7 @@ kernel_module(module_name) {
     "los_mpu.c",
     "los_timer.c",
   ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

arch/arm/cortex-m7/gcc/los_arch_atomic.h

@@ -43,15 +43,11 @@ extern "C" {
 STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 {
     INT32 val;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    __asm__ __volatile__("ldrex %0, [%1]\n"
-
-    __asm__ __volatile__("ldrex   %0, [%1]\n"
                          : "=&r"(val)
                          : "r"(v)
                          : "cc");
-    LOS_IntRestore(intSave);
 
     return val;
 }
@@ -59,18 +55,14 @@ STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
 {
     UINT32 status;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    do {
-
+        __asm__ __volatile__("ldrex %0, [%1]\n"
-    __asm__ __volatile__("1:ldrex   %0, [%1]\n"
+                             "strex %0, %2, [%1]\n"
-                         "  strex   %0, %2, [%1]\n"
+                             : "=&r"(status)
-                         "  teq %0, #0\n"
+                             : "r"(v), "r"(setVal)
-                         "  bne 1b"
+                             : "cc");
-                         : "=&r"(status)
+    } while (__builtin_expect(status != 0, 0));
-                         : "r"(v), "r"(setVal)
-                         : "cc");
-    LOS_IntRestore(intSave);
 }
 
 STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
@@ -79,9 +71,9 @@ STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        __asm__ __volatile__("ldrex %1, [%2]\n"
-                             "add   %1, %1, %3\n"
+                             "add %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                             "strex %0, %1, [%2]"
                              : "=&r"(status), "=&r"(val)
                              : "r"(v), "r"(addVal)
                              : "cc");
@@ -96,9 +88,9 @@ STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        __asm__ __volatile__("ldrex %1, [%2]\n"
-                             "sub   %1, %1, %3\n"
+                             "sub %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                             "strex %0, %1, [%2]"
                              : "=&r"(status), "=&r"(val)
                              : "r"(v), "r"(subVal)
                              : "cc");
@@ -151,8 +143,8 @@ STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("ldrex   %0, [%3]\n"
+        __asm__ __volatile__("ldrex %0, [%3]\n"
-                             "strex   %1, %4, [%3]"
+                             "strex %1, %4, [%3]"
                              : "=&r"(prevVal), "=&r"(status), "+m"(*v)
                              : "r"(v), "r"(val)
                              : "cc");
@@ -186,12 +178,12 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("1: ldrex %0, %2\n"
+        __asm__ __volatile__("ldrex %0, %2\n"
-                             "    mov %1, #0\n"
+                             "mov %1, #0\n"
-                             "    cmp %0, %3\n"
+                             "cmp %0, %3\n"
-                             "    bne 2f\n"
+                             "bne 1f\n"
-                             "    strex %1, %4, %2\n"
+                             "strex %1, %4, %2\n"
-                             "2:"
+                             "1:"
                              : "=&r"(prevVal), "=&r"(status), "+Q"(*v)
                              : "r"(oldVal), "r"(val)
                              : "cc");

arch/arm/cortex-m7/gcc/los_arch_interrupt.h

@@ -109,7 +109,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000900
  *
- * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a Cortex-M7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
  */
 #define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
 
@@ -159,7 +160,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000905
  *
- * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15].
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a Cortex-M7 platform is [0,15].
  */
 #define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
 
@@ -169,7 +171,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000906
  *
- * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
  */
 #define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
 
@@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_arch_interrupt
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_arch_interrupt
  * @brief: Default vector handling function.

arch/arm/cortex-m7/gcc/los_context.c

@@ -75,17 +75,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))
@@ -146,6 +136,19 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
     return (VOID *)context;
 }
 
+VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
+{
+    UNUSED(stackTop);
+    TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
+    (VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
+
+    context->uwR0 = param;
+    context->uwPC = sigHandler;
+    context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
+
+    return (VOID *)context;
+}
+
 LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
 {
     (VOID)LOS_IntLock();

arch/arm/cortex-m7/gcc/los_dispatch.S

@@ -35,8 +35,6 @@
  .fpu fpv5-d16
 //;.arch_extension sec
 
-
-
 .equ    OS_NVIC_INT_CTRL,            0xE000ED04
 .equ    OS_NVIC_SYSPRI2,             0xE000ED20
 .equ    OS_NVIC_PENDSV_PRI,          0xF0F00000
@@ -46,6 +44,15 @@
     .section .text
     .thumb
 
+.macro SIGNAL_CONTEXT_RESTORE
+    push    {r12, lr}
+    blx     OsSignalTaskContextRestore
+    pop     {r12, lr}
+    cmp     r0, #0
+    mov     r1, r0
+    bne     SignalContextRestore
+.endm
+
     .type HalStartToRun, %function
     .global HalStartToRun
 HalStartToRun:
@@ -142,6 +149,8 @@ HalPendSV:
     cpsid   I
 
 HalTaskSwitch:
+    SIGNAL_CONTEXT_RESTORE
+
     push    {r12, lr}
     blx     OsSchedTaskSwitch
     pop     {r12, lr}
@@ -167,9 +176,9 @@ TaskContextSwitch:
 
     ldr     r0, [r5, #4]
     str     r0, [r5]
-
     ldr     r1, [r0]
 
+ SignalContextRestore:
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))
     vldmia   r1!, {d8-d15}

arch/arm/cortex-m7/gcc/los_interrupt.c

@@ -98,17 +98,85 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
 #endif
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     return __get_IPSR();
 }
 
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    NVIC_SetPriority((IRQn_Type)hwiNum, priority);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .triggerIrq     = HwiPending,
+    .clearIrq       = HwiClear,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -123,8 +191,8 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -158,7 +226,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
     g_intCount++;
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -224,8 +292,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+    HwiUnmask((IRQn_Type)hwiNum);
-    NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio);
+    HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
 
     LOS_IntRestore(intSave);
 
@@ -368,6 +436,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -384,6 +453,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -433,7 +503,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcNvicDump();
     OsExcMemPoolCheckInfo();

arch/arm/cortex-m7/iar/los_arch_atomic.h

@@ -43,15 +43,11 @@ extern "C" {
 STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 {
     INT32 val;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    asm volatile("ldrex %0, [%1]\n"
-
+                 : "=&r"(val)
-    __asm__ __volatile__("ldrex   %0, [%1]\n"
+                 : "r"(v)
-                         : "=&r"(val)
+                 : "cc");
-                         : "r"(v)
-                         : "cc");
-    LOS_IntRestore(intSave);
 
     return val;
 }
@@ -59,18 +55,14 @@ STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
 {
     UINT32 status;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    do {
-
+        asm volatile("ldrex %0, [%1]\n"
-    __asm__ __volatile__("1:ldrex   %0, [%1]\n"
+                     "strex %0, %2, [%1]\n"
-                         "  strex   %0, %2, [%1]\n"
+                     : "=&r"(status)
-                         "  teq %0, #0\n"
+                     : "r"(v), "r"(setVal)
-                         "  bne 1b"
+                     : "cc");
-                         : "=&r"(status)
+    } while (status != 0);
-                         : "r"(v), "r"(setVal)
-                         : "cc");
-    LOS_IntRestore(intSave);
 }
 
 STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
@@ -79,13 +71,13 @@ STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        asm volatile("ldrex %1, [%2]\n"
-                             "add   %1, %1, %3\n"
+                     "add %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                     "strex %0, %1, [%2]"
-                             : "=&r"(status), "=&r"(val)
+                     : "=&r"(status), "=&r"(val)
-                             : "r"(v), "r"(addVal)
+                     : "r"(v), "r"(addVal)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return val;
 }
@@ -96,13 +88,13 @@ STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
     UINT32 status;
 
     do {
-        __asm__ __volatile__("ldrex   %1, [%2]\n"
+        asm volatile("ldrex %1, [%2]\n"
-                             "sub   %1, %1, %3\n"
+                     "sub %1, %1, %3\n"
-                             "strex   %0, %1, [%2]"
+                     "strex %0, %1, [%2]"
-                             : "=&r"(status), "=&r"(val)
+                     : "=&r"(status), "=&r"(val)
-                             : "r"(v), "r"(subVal)
+                     : "r"(v), "r"(subVal)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return val;
 }
@@ -151,12 +143,12 @@ STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("ldrex   %0, [%3]\n"
+        asm volatile("ldrex %0, [%2]\n"
-                             "strex   %1, %4, [%3]"
+                     "strex %1, %3, [%2]"
-                             : "=&r"(prevVal), "=&r"(status), "+m"(*v)
+                     : "=&r"(prevVal), "=&r"(status)
-                             : "r"(v), "r"(val)
+                     : "r"(v), "r"(val)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return prevVal;
 }
@@ -186,16 +178,16 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
     UINT32 status = 0;
 
     do {
-        __asm__ __volatile__("1: ldrex %0, %2\n"
+        asm volatile("ldrex %0, [%2]\n"
-                             "    mov %1, #0\n"
+                     "mov %1, #0\n"
-                             "    cmp %0, %3\n"
+                     "cmp %0, %3\n"
-                             "    bne 2f\n"
+                     "bne 1f\n"
-                             "    strex %1, %4, %2\n"
+                     "strex %1, %4, [%2]\n"
-                             "2:"
+                     "1:"
-                             : "=&r"(prevVal), "=&r"(status), "+Q"(*v)
+                     : "=&r"(prevVal), "=&r"(status)
-                             : "r"(oldVal), "r"(val)
+                     : "r"(v), "r"(oldVal), "r"(val)
-                             : "cc");
+                     : "cc");
-    } while (__builtin_expect(status != 0, 0));
+    } while (status != 0);
 
     return prevVal != oldVal;
 }

arch/arm/cortex-m7/iar/los_arch_interrupt.h

@@ -109,7 +109,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000900
  *
- * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
+ * Solution: Ensure that the interrupt number is valid.
+ * The value range of the interrupt number applicable for a Cortex-M7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX].
  */
 #define OS_ERRNO_HWI_NUM_INVALID              LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00)
 
@@ -159,7 +160,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000905
  *
- * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15].
+ * Solution: Ensure that the interrupt priority is valid.
+ * The value range of the interrupt priority applicable for a Cortex-M7 platform is [0,15].
  */
 #define OS_ERRNO_HWI_PRIO_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05)
 
@@ -169,7 +171,8 @@ extern UINT32 _BootVectors[];
  *
  * Value: 0x02000906
  *
- * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1.
+ * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or
+ * OS_HWI_MODE_FAST of which the value can be 0 or 1.
  */
 #define OS_ERRNO_HWI_MODE_INVALID             LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06)
 
@@ -342,25 +345,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_arch_interrupt
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_arch_interrupt
  * @brief: Default vector handling function.

arch/arm/cortex-m7/iar/los_context.c

@@ -75,17 +75,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
 #if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
      (defined(__FPU_USED) && (__FPU_USED == 1U)))
@@ -146,6 +136,19 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
     return (VOID *)context;
 }
 
+VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param)
+{
+    UNUSED(stackTop);
+    TaskContext *context = (TaskContext *)((UINTPTR)stackPointer - sizeof(TaskContext));
+    (VOID)memset_s((VOID *)context, sizeof(TaskContext), 0, sizeof(TaskContext));
+
+    context->uwR0 = param;
+    context->uwPC = sigHandler;
+    context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
+
+    return (VOID *)context;
+}
+
 LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
 {
     (VOID)LOS_IntLock();

arch/arm/cortex-m7/iar/los_dispatch.S

@@ -38,6 +38,7 @@
     EXPORT  ArchTaskSchedule
     EXPORT  HalPendSV
     IMPORT  OsSchedTaskSwitch
+    IMPORT  OsSignalTaskContextRestore
     IMPORT  g_losTask
 
 OS_FPU_CPACR                EQU     0xE000ED88
@@ -52,6 +53,15 @@ OS_TASK_STATUS_RUNNING      EQU     0x0010
     THUMB
     REQUIRE8
 
+    MACRO SIGNAL_CONTEXT_RESTORE
+    PUSH    {R12, LR}
+    BLX     OsSignalTaskContextRestore
+    POP     {R12, LR}
+    CMP     R0, #0
+    MOV     R1, R0
+    BNE     SignalContextRestore
+    ENDM
+
 HalStartToRun
     LDR     R4, =OS_NVIC_SYSPRI2
     LDR     R5, =OS_NVIC_PENDSV_PRI
@@ -117,6 +127,8 @@ HalPendSV
     CPSID   I
 
 HalTaskSwitch
+    SIGNAL_CONTEXT_RESTORE
+
     PUSH    {R12, LR}
     BLX     OsSchedTaskSwitch
     POP     {R12, LR}
@@ -145,8 +157,11 @@ __DisabledFPU1
 
     LDR     R0, [R5, #4]
     STR     R0, [R5]
-
     LDR     R1, [R0]
+
+SignalContextRestore
+    LDR.W   R3, =OS_FPU_CPACR
+    LDR     R3, [R3]
     AND     R3, R3, #OS_FPU_CPACR_ENABLE
     CMP     R3, #OS_FPU_CPACR_ENABLE
     BNE     __DisabledFPU2

arch/arm/cortex-m7/iar/los_interrupt.c

@@ -105,17 +105,85 @@ WEAK VOID SysTick_Handler(VOID)
 }
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     return __get_IPSR();
 }
 
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_DisableIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    NVIC_SetPriority((IRQn_Type)hwiNum, priority);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
+
+    return LOS_OK;
+}
+
+HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .triggerIrq     = HwiPending,
+    .clearIrq       = HwiClear,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -130,8 +198,8 @@ inline UINT32 ArchIsIntActive(VOID)
 /*lint -e529*/
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -165,7 +233,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
     g_intCount++;
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -231,8 +299,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    NVIC_EnableIRQ((IRQn_Type)hwiNum);
+    HwiUnmask((IRQn_Type)hwiNum);
-    NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio);
+    HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
 
     LOS_IntRestore(intSave);
 
@@ -375,6 +443,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -391,6 +460,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -440,7 +510,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcNvicDump();
     OsExcMemPoolCheckInfo();

arch/csky/v2/gcc/BUILD.gn

@@ -38,6 +38,7 @@ kernel_module(module_name) {
     "los_interrupt.c",
     "los_timer.c",
   ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

arch/csky/v2/gcc/los_arch_atomic.h

@@ -183,11 +183,11 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
 
     intSave = LOS_IntLock();
 
-    __asm__ __volatile__("1: ldw %0, (%1)\n"
+    __asm__ __volatile__("ldw %0, (%1)\n"
-                         "   cmpne %0, %2\n"
+                         "cmpne %0, %2\n"
-                         "   bt 2f\n"
+                         "bt 1f\n"
-                         "   stw %3, (%1)\n"
+                         "stw %3, (%1)\n"
-                         "2:"
+                         "1:"
                          : "=&r"(prevVal)
                          : "r"(v), "r"(oldVal), "r"(val)
                          : "cc");

arch/csky/v2/gcc/los_arch_interrupt.h

@@ -251,25 +251,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
  */
 extern VOID HalInterrupt(VOID);
 
-/* *
- * @ingroup  los_arch_interrupt
- * @brief: Get an interrupt number.
- *
- * @par Description:
- * This API is used to get the current interrupt number.
- *
- * @attention:
- * <ul><li>None.</li></ul>
- *
- * @param: None.
- *
- * @retval: Interrupt Indexes number.
- * @par Dependency:
- * <ul><li>los_arch_interrupt.h: the header file that contains the API declaration.</li></ul>
- * @see None.
- */
-extern UINT32 HalIntNumGet(VOID);
-
 /* *
  * @ingroup  los_arch_interrupt
  * @brief: Default vector handling function.

arch/csky/v2/gcc/los_context.c

@@ -77,17 +77,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    errno_t result;
-
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
     context->R0  = taskID;
     context->R1  = 0x01010101L;

arch/csky/v2/gcc/los_interrupt.c

@@ -117,64 +117,79 @@ UINT32 ArchIntLocked(VOID)
     return !(intSave & (1 << INT_OFFSET));
 }
 
-UINT32 HalIrqUnmask(UINT32 hwiNum)
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
 {
     UINT32 intSave;
+
     if (!HwiNumValid(hwiNum)) {
         return LOS_ERRNO_HWI_NUM_INVALID;
     }
+
     intSave = LOS_IntLock();
     VIC_REG->ISER[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
     VIC_REG->ISSR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
     LOS_IntRestore(intSave);
+
     return LOS_OK;
 }
 
-UINT32 HalIrqSetPriority(UINT32 hwiNum, UINT8 priority)
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
 {
     UINT32 intSave;
+
     if (!HwiNumValid(hwiNum)) {
         return LOS_ERRNO_HWI_NUM_INVALID;
     }
+
     if (!HWI_PRI_VALID(priority)) {
         return OS_ERRNO_HWI_PRIO_INVALID;
     }
+
     intSave = LOS_IntLock();
     VIC_REG->IPR[hwiNum / PRI_PER_REG] |= (((priority << PRI_OFF_IN_REG) << (hwiNum % PRI_PER_REG)) * PRI_OFF_PER_INT);
     LOS_IntRestore(intSave);
+
     return LOS_OK;
 }
 
-UINT32 HalIrqMask(HWI_HANDLE_T hwiNum)
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
 {
     UINT32 intSave;
+
     if (!HwiNumValid(hwiNum)) {
         return LOS_ERRNO_HWI_NUM_INVALID;
     }
+
     intSave = LOS_IntLock();
     VIC_REG->ICER[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
     LOS_IntRestore(intSave);
+
     return LOS_OK;
 }
 
-UINT32 HalIrqPending(UINT32 hwiNum)
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
 {
     UINT32 intSave;
+
     if (!HwiNumValid(hwiNum)) {
         return LOS_ERRNO_HWI_NUM_INVALID;
     }
+
     intSave = LOS_IntLock();
     VIC_REG->ISPR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
     LOS_IntRestore(intSave);
+
     return LOS_OK;
 }
 
-UINT32 HalIrqClear(UINT32 hwiNum)
+STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
 {
     if (!HwiNumValid(hwiNum)) {
         return LOS_ERRNO_HWI_NUM_INVALID;
     }
+
     VIC_REG->ICPR[hwiNum / OS_SYS_VECTOR_CNT] = (UINT32)(1UL << (hwiNum % OS_SYS_VECTOR_CNT));
+
     return LOS_OK;
 }
 
@@ -207,7 +222,7 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
         g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)IrqEntry;
         g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
         g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
-        HalIrqUnmask(num);
+        HwiUnmask(num);
     }
 }
 
@@ -227,23 +242,32 @@ VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
     if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
         g_hwiForm[num + OS_SYS_VECTOR_CNT] = IrqEntry;
         g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
-        HalIrqUnmask(num);
+        HwiUnmask(num);
     }
 }
 #endif
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     return HalGetPsr();
 }
 
+HwiControllerOps g_archHwiOps = {
+    .triggerIrq     = HwiPending,
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+    .getCurIrqNum   = HwiNumGet,
+    .clearIrq       = HwiClear,
+};
+
 inline UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -258,7 +282,7 @@ inline UINT32 ArchIsIntActive(VOID)
  **************************************************************************** */
 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
     irqNum = (irqNum >> PSR_VEC_OFFSET) & MASK_8_BITS;
     PRINT_ERR("%s irqnum:%x\n", __FUNCTION__, irqNum);
     while (1) {}
@@ -290,7 +314,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
     g_intCount++;
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
     hwiIndex = (hwiIndex >> PSR_VEC_OFFSET) & MASK_8_BITS;
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -355,8 +379,8 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    HalIrqUnmask(hwiNum);
+    HwiUnmask(hwiNum);
-    (VOID)HalIrqSetPriority(hwiNum, (UINT8)hwiPrio);
+    (VOID)HwiSetPriority(hwiNum, (UINT8)hwiPrio);
     LOS_IntRestore(intSave);
 
     return LOS_OK;
@@ -376,7 +400,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
     if (hwiNum >= OS_HWI_MAX_NUM) {
         return OS_ERRNO_HWI_NUM_INVALID;
     }
-    HalIrqMask(hwiNum);
+    HwiMask(hwiNum);
     intSave = LOS_IntLock();
     g_hwiHandlerForm[hwiNum + OS_SYS_VECTOR_CNT] = 0;
     LOS_IntRestore(intSave);
@@ -442,6 +466,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
            excContext->EPC);
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -458,6 +483,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -507,7 +533,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcMemPoolCheckInfo();
 #endif

arch/csky/v2/gcc/los_timer.c

@@ -42,8 +42,6 @@ typedef struct {
     UINT32 CALIB;
 } CORE_TIM_TYPE;
 
-#define OS_CYCLE_PER_TICK    (OS_SYS_CLOCK / LOSCFG_BASE_CORE_TICK_PER_SECOND)
-
 #define CORE_TIM_BASE        (0xE000E010UL)
 #define SysTick              ((CORE_TIM_TYPE *)CORE_TIM_BASE)
 

arch/include/los_context.h

@@ -106,6 +106,7 @@ LITE_OS_SEC_TEXT_MINOR NORETURN VOID ArchSysExit(VOID);
 VOID ArchTaskSchedule(VOID);
 
 UINT32 ArchStartSchedule(VOID);
+VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandler, UINT32 param);
 
 #ifdef __cplusplus
 #if __cplusplus

arch/include/los_interrupt.h

@@ -54,6 +54,17 @@ typedef VOID (*HWI_PROC_FUNC)(VOID *parm);
 typedef VOID (*HWI_PROC_FUNC)(void);
 #endif
 
+typedef struct {
+    UINT32 (*triggerIrq)(HWI_HANDLE_T hwiNum);
+    UINT32 (*clearIrq)(HWI_HANDLE_T hwiNum);
+    UINT32 (*enableIrq)(HWI_HANDLE_T hwiNum);
+    UINT32 (*disableIrq)(HWI_HANDLE_T hwiNum);
+    UINT32 (*setIrqPriority)(HWI_HANDLE_T hwiNum, UINT8 priority);
+    UINT32 (*getCurIrqNum)(VOID);
+} HwiControllerOps;
+
+extern HwiControllerOps g_archHwiOps;
+
 /* stack protector */
 extern UINT32 __stack_chk_guard;
 
@@ -64,6 +75,11 @@ UINT32 ArchIsIntActive(VOID);
 #define OS_INT_INACTIVE  (!(OS_INT_ACTIVE))
 #define LOS_HwiCreate ArchHwiCreate
 #define LOS_HwiDelete ArchHwiDelete
+#define LOS_HwiTrigger ArchIntTrigger
+#define LOS_HwiEnable ArchIntEnable
+#define LOS_HwiDisable ArchIntDisable
+#define LOS_HwiClear ArchIntClear
+#define LOS_HwiSetPriority ArchIntSetPriority
 
 UINT32 ArchIntLock(VOID);
 #define LOS_IntLock ArchIntLock
@@ -74,6 +90,8 @@ VOID ArchIntRestore(UINT32 intSave);
 UINT32 ArchIntUnLock(VOID);
 #define LOS_IntUnLock ArchIntUnLock
 
+#define LOS_HwiOpsGet ArchIntOpsGet
+
 /**
  * @ingroup  los_interrupt
  * @brief Delete hardware interrupt.
@@ -135,6 +153,51 @@ UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
                      HWI_PROC_FUNC handler,
                      HWI_ARG_T arg);
 
+STATIC INLINE UINT32 ArchIntTrigger(HWI_HANDLE_T hwiNum)
+{
+    if (g_archHwiOps.triggerIrq == NULL) {
+        return LOS_NOK;
+    }
+    return g_archHwiOps.triggerIrq(hwiNum);
+}
+
+STATIC INLINE UINT32 ArchIntEnable(HWI_HANDLE_T hwiNum)
+{
+    if (g_archHwiOps.enableIrq == NULL) {
+        return LOS_NOK;
+    }
+    return g_archHwiOps.enableIrq(hwiNum);
+}
+
+STATIC INLINE UINT32 ArchIntDisable(HWI_HANDLE_T hwiNum)
+{
+    if (g_archHwiOps.disableIrq == NULL) {
+        return LOS_NOK;
+    }
+    return g_archHwiOps.disableIrq(hwiNum);
+}
+
+STATIC INLINE UINT32 ArchIntClear(HWI_HANDLE_T hwiNum)
+{
+    if (g_archHwiOps.clearIrq == NULL) {
+        return LOS_NOK;
+    }
+    return g_archHwiOps.clearIrq(hwiNum);
+}
+
+STATIC INLINE UINT32 ArchIntSetPriority(HWI_HANDLE_T hwiNum, HWI_PRIOR_T priority)
+{
+    if (g_archHwiOps.setIrqPriority == NULL) {
+        return LOS_NOK;
+    }
+    return g_archHwiOps.setIrqPriority(hwiNum, priority);
+}
+
+STATIC INLINE HwiControllerOps *ArchIntOpsGet(VOID)
+{
+    return &g_archHwiOps;
+}
+
 #ifdef __cplusplus
 #if __cplusplus
 }

arch/include/los_mpu.h

@@ -80,7 +80,7 @@ typedef struct {
 } MPU_CFG_PARA;
 
 VOID ArchMpuEnable(UINT32 defaultRegionEnable);
-VOID ArchMpuDisable();
+VOID ArchMpuDisable(VOID);
 UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para);
 UINT32 ArchMpuDisableRegion(UINT32 regionId);
 INT32 ArchMpuUnusedRegionGet(VOID);

arch/risc-v/nuclei/gcc/los_arch_atomic.h

@@ -187,10 +187,10 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
     UINT32 intSave;
 
     intSave = LOS_IntLock();
-    __asm__ __volatile__("1: lw %0, 0(%1)\n"
+    __asm__ __volatile__("lw %0, 0(%1)\n"
-                         "   bne %0, %2, 2f\n"
+                         "bne %0, %2, 1f\n"
-                         "   amoswap.w %0, %3, (%1)\n"
+                         "amoswap.w %0, %3, (%1)\n"
-                         "2:"
+                         "1:"
                          : "=&r"(prevVal)
                          : "r"(v), "r"(oldVal), "r"(val)
                          : "memory");

arch/risc-v/nuclei/gcc/los_context.c

@@ -45,10 +45,7 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO
 {
     UINT32 index;
     UINT8 *stk = 0;
-    TaskContext  *context = NULL;
+    TaskContext *context = NULL;
-
-    /* initialize the task stack, write magic num to stack top */
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
 
     stk = ((UINT8 *)topStack) + stackSize + sizeof(STACK_TYPE);
     stk = (UINT8 *)ALIGN_DOWN((uintptr_t)stk, REGBYTES);

arch/risc-v/nuclei/gcc/los_interrupt.c

@@ -39,7 +39,43 @@
 
 UINT32 g_intCount = 0;
 
-// LosExcInfo g_excInfo;
+STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    ECLIC_EnableIRQ(hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    ECLIC_DisableIRQ(hwiNum);
+
+    return LOS_OK;
+}
+
+STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
+{
+    if (hwiNum >= OS_HWI_MAX_NUM) {
+        return OS_ERRNO_HWI_NUM_INVALID;
+    }
+
+    if (priority > OS_HWI_PRIO_HIGHEST || priority < OS_HWI_PRIO_LOWEST) {
+        return OS_ERRNO_HWI_PRIO_INVALID;
+    }
+
+    ECLIC_SetPriorityIRQ(hwiNum, (hwiPrio & 0xffff));
+
+    return LOS_OK;
+}
+
 LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 {
     // already setup interrupt vectors
@@ -59,11 +95,11 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
  Output      : None
  Return      : LOS_OK on success or error code on failure
  *****************************************************************************/
- UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
+UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
-                      HWI_PRIOR_T hwiPrio,
+                     HWI_PRIOR_T hwiPrio,
-                      HWI_MODE_T mode,
+                     HWI_MODE_T mode,
-                      HWI_PROC_FUNC handler,
+                     HWI_PROC_FUNC handler,
-                      HWI_ARG_T arg)
+                     HWI_ARG_T arg)
 {
     if (hwiNum > SOC_INT_MAX) {
         return OS_ERRNO_HWI_NUM_INVALID;
@@ -93,7 +129,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
         ECLIC_SetVector(hwiNum, (rv_csr_t)handler);
     }
     /* enable interrupt */
-    ECLIC_EnableIRQ(hwiNum);
+    HwiUnmask(hwiNum);
     return LOS_OK;
 }
 
@@ -108,7 +144,7 @@ LITE_OS_SEC_TEXT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
     // change func to default func
     ECLIC_SetVector(hwiNum, (rv_csr_t)HalHwiDefaultHandler);
     // disable interrupt
-    ECLIC_DisableIRQ(hwiNum);
+    HwiMask(hwiNum);
     return LOS_OK;
 }
 
@@ -182,3 +218,8 @@ __attribute__((always_inline)) inline UINT32 ArchIsIntActive(VOID)
     return (g_intCount > 0);
 }
 
+const HwiControllerOps g_archHwiOps = {
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .setIrqPriority = HwiSetPriority,
+};

arch/risc-v/riscv32/gcc/BUILD.gn

@@ -38,6 +38,7 @@ kernel_module(module_name) {
     "los_interrupt.c",
     "los_timer.c",
   ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

arch/risc-v/riscv32/gcc/los_arch_atomic.h

@@ -187,10 +187,10 @@ STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 o
     UINT32 intSave;
 
     intSave = LOS_IntLock();
-    __asm__ __volatile__("1: lw %0, 0(%1)\n"
+    __asm__ __volatile__("lw %0, 0(%1)\n"
-                         "   bne %0, %2, 2f\n"
+                         "bne %0, %2, 1f\n"
-                         "   amoswap.w %0, %3, (%1)\n"
+                         "amoswap.w %0, %3, (%1)\n"
-                         "2:"
+                         "1:"
                          : "=&r"(prevVal)
                          : "r"(v), "r"(oldVal), "r"(val)
                          : "memory");

arch/risc-v/riscv32/gcc/los_context.c

@@ -81,16 +81,7 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
 
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    UINT32 index;
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    TaskContext  *context = NULL;
-
-    /* initialize the task stack, write magic num to stack top */
-    for (index = 1; index < (stackSize / sizeof(UINT32)); index++) {
-        *((UINT32 *)topStack + index) = OS_TASK_STACK_INIT;
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext));
 
     context->mstatus = RISCV_MSTATUS_MPP | RISCV_MSTATUS_MPIE;
     context->mepc = (UINT32)(UINTPTR)OsTaskEntry;

arch/xtensa/lx6/gcc/BUILD.gn

@@ -39,6 +39,7 @@ kernel_module(module_name) {
     "los_timer.c",
     "los_window.S",
   ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

arch/xtensa/lx6/gcc/los_arch_atomic.h

@@ -43,15 +43,11 @@ extern "C" {
 STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 {
     INT32 val;
-    UINT32 intSave;
-
-    intSave = LOS_IntLock();
 
     __asm__ __volatile__("l32ai %0, %1, 0\n"
                          : "=&a"(val)
                          : "a"(v)
                          : "memory");
-    LOS_IntRestore(intSave);
 
     return val;
 }
@@ -59,34 +55,30 @@ STATIC INLINE INT32 ArchAtomicRead(const Atomic *v)
 STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal)
 {
     INT32 val;
-    UINT32 intSave;
 
-    intSave = LOS_IntLock();
+    __asm__ __volatile__("1:l32ai %0, %2, 0\n"
-
+                         "  wsr %0, SCOMPARE1\n"
-    __asm__ __volatile__("l32ai %0, %2, 0\n"
+                         "  s32c1i %3, %1\n"
-                         "wsr %0, SCOMPARE1\n"
+                         "  bne %3, %0, 1b"
-                         "s32c1i %3, %1"
                          : "=&a"(val), "+m"(*v)
                          :  "a"(v), "a"(setVal)
                          : "memory");
-    LOS_IntRestore(intSave);
 }
 
 STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
 {
     INT32 val;
-    UINT32 intSave;
+    INT32 tmp;
 
-    intSave = LOS_IntLock();
+    __asm__ __volatile__("1:l32ai %0, %3, 0\n"
-
+                         "  wsr %0, SCOMPARE1\n"
-    __asm__ __volatile__("l32ai %0, %2, 0\n"
+                         "  mov %1, %0\n"
-                         "wsr %0, SCOMPARE1\n"
+                         "  add %0, %0, %4\n"
-                         "add   %0, %0, %3\n"
+                         "  s32c1i %0, %2\n"
-                         "s32c1i %0, %1\n"
+                         "  bne %0, %1, 1b"
-                         : "=&a"(val), "+m"(*v)
+                         : "=&a"(val), "=&a"(tmp), "+m"(*v)
                          : "a"(v), "a"(addVal)
                          : "memory");
-    LOS_IntRestore(intSave);
 
     return *v;
 }
@@ -94,18 +86,17 @@ STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal)
 STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal)
 {
     INT32 val;
-    UINT32 intSave;
+    INT32 tmp;
 
-    intSave = LOS_IntLock();
+    __asm__ __volatile__("1:l32ai %0, %3, 0\n"
-
+                         "  wsr %0, SCOMPARE1\n"
-    __asm__ __volatile__("l32ai %0, %2, 0\n"
+                         "  mov %1, %0\n"
-                         "wsr %0, SCOMPARE1\n"
+                         "  sub %0, %0, %4\n"
-                         "sub   %0, %0, %3\n"
+                         "  s32c1i %0, %2\n"
-                         "s32c1i %0, %1\n"
+                         "  bne %0, %1, 1b"
-                         : "=&a"(val), "+m"(*v)
+                         : "=&a"(val), "=&a"(tmp), "+m"(*v)
                          : "a"(v), "a"(subVal)
                          : "memory");
-    LOS_IntRestore(intSave);
     return *v;
 }
 
@@ -150,17 +141,16 @@ STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v)
 STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
 {
     INT32 prevVal = 0;
-    UINT32 intSave;
+    INT32 tmp;
 
-    intSave = LOS_IntLock();
+    __asm__ __volatile__("1:l32ai %0, %3, 0\n"
-
+                         "  wsr %0, SCOMPARE1\n"
-    __asm__ __volatile__("l32ai %0, %2, 0\n"
+                         "  mov %1, %0\n"
-                         "wsr %0, SCOMPARE1\n"
+                         "  s32c1i %4, %2\n"
-                         "s32c1i %3, %1\n"
+                         "  bne %4, %1, 1b"
-                         : "=&a"(prevVal), "+m"(*v)
+                         : "=&a"(prevVal), "=&a"(tmp), "+m"(*v)
                          : "a"(v), "a"(val)
                          : "memory");
-    LOS_IntRestore(intSave);
 
     return prevVal;
 }
@@ -187,19 +177,15 @@ STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
 STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
 {
     INT32 prevVal = 0;
-    UINT32 intSave;
-
-    intSave = LOS_IntLock();
 
     __asm__ __volatile__("l32ai %0, %2, 0\n"
                          "wsr %0, SCOMPARE1\n"
-                         "bne %0, %3, 2f\n"
+                         "bne %0, %3, 1f\n"
                          "s32c1i %4, %1\n"
-                         "2:\n"
+                         "1:"
                          : "=&a"(prevVal), "+m"(*v)
                          : "a"(v), "a"(oldVal), "a"(val)
                          : "cc");
-    LOS_IntRestore(intSave);
 
     return prevVal != oldVal;
 }

arch/xtensa/lx6/gcc/los_arch_interrupt.h

@@ -214,7 +214,6 @@ extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector);
 #endif
 
 VOID HalInterrupt(VOID);
-UINT32 HalIntNumGet(VOID);
 VOID HalHwiDefaultHandler(VOID);
 VOID HalExcHandleEntry(UINTPTR faultAddr, EXC_CONTEXT_S *excBufAddr, UINT32 type);
 VOID HalHwiInit(VOID);

arch/xtensa/lx6/gcc/los_context.c

@@ -110,17 +110,8 @@ LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
 
 LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
 {
-    TaskContext *context = NULL;
     errno_t result;
-
+    TaskContext *context = (TaskContext *)((UINTPTR)topStack + stackSize - sizeof(TaskContext));
-    /* initialize the task stack, write magic num to stack top */
-    result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize);
-    if (result != EOK) {
-        printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__);
-    }
-    *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD;
-
-    context = (TaskContext *)((((UINTPTR)topStack + stackSize) - sizeof(TaskContext)));
 
     /* initialize the task context */
     result = memcpy_s(context, sizeof(TaskContext), g_stackDefault, sizeof(TaskContext));

arch/xtensa/lx6/gcc/los_interrupt.c

@@ -142,6 +142,7 @@ UINT32 ArchIntUnLock(VOID)
 STATIC INLINE UINT32 ArchIntLocked(VOID)
 {
     UINT32 intSave;
+
     __asm__ volatile("rsr %0, ps " : "=r"(intSave) : : "memory");
 
     return (intSave & SPREG_PS_DI_MASK);
@@ -151,7 +152,7 @@ STATIC INLINE UINT32 ArchIntLocked(VOID)
  * @ingroup los_hwi
  * Trigger the interrupt
  */
-UINT32 HalIrqPending(HWI_HANDLE_T hwiNum)
+STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
 {
     if (!HwiNumValid(hwiNum)) {
         return OS_ERRNO_HWI_NUM_INVALID;
@@ -162,11 +163,7 @@ UINT32 HalIrqPending(HWI_HANDLE_T hwiNum)
     return LOS_OK;
 }
 
-/* *
+UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
- * @ingroup los_hwi
- * Unmask the interrupt
- */
-UINT32 HalIrqUnmask(HWI_HANDLE_T hwiNum)
 {
     UINT32 ier;
 
@@ -180,11 +177,7 @@ UINT32 HalIrqUnmask(HWI_HANDLE_T hwiNum)
     return LOS_OK;
 }
 
-/* *
+UINT32 HwiMask(HWI_HANDLE_T hwiNum)
- * @ingroup los_hwi
- * Mask the interrupt
- */
-UINT32 HalIrqMask(HWI_HANDLE_T hwiNum)
 {
     UINT32 ier;
 
@@ -199,13 +192,13 @@ UINT32 HalIrqMask(HWI_HANDLE_T hwiNum)
 }
 
 /* ****************************************************************************
- Function    : HalIntNumGet
+ Function    : HwiNumGet
  Description : Get an interrupt number
  Input       : None
  Output      : None
  Return      : Interrupt Indexes number
  **************************************************************************** */
-UINT32 HalIntNumGet(VOID)
+STATIC UINT32 HwiNumGet(VOID)
 {
     UINT32 ier;
     UINT32 intenable;
@@ -223,7 +216,7 @@ UINT32 HalIntNumGet(VOID)
  * @ingroup los_hwi
  * Clear the interrupt
  */
-UINT32 HalIrqClear(HWI_HANDLE_T vector)
+STATIC UINT32 HwiClear(HWI_HANDLE_T vector)
 {
     if (!HwiNumValid(vector)) {
         return OS_ERRNO_HWI_NUM_INVALID;
@@ -234,6 +227,14 @@ UINT32 HalIrqClear(HWI_HANDLE_T vector)
     return LOS_OK;
 }
 
+HwiControllerOps g_archHwiOps = {
+    .triggerIrq     = HwiPending,
+    .enableIrq      = HwiUnmask,
+    .disableIrq     = HwiMask,
+    .getCurIrqNum   = HwiNumGet,
+    .clearIrq       = HwiClear,
+};
+
 INLINE UINT32 ArchIsIntActive(VOID)
 {
     return (g_intCount > 0);
@@ -248,8 +249,8 @@ INLINE UINT32 ArchIsIntActive(VOID)
  **************************************************************************** */
 VOID HalHwiDefaultHandler(VOID)
 {
-    UINT32 irqNum = HalIntNumGet();
+    UINT32 irqNum = HwiNumGet();
-    PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum);
+    PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, irqNum);
     while (1) {}
 }
 
@@ -279,8 +280,8 @@ VOID HalInterrupt(VOID)
     g_intCount++;
     LOS_IntRestore(intSave);
 
-    hwiIndex = HalIntNumGet();
+    hwiIndex = HwiNumGet();
-    HalIrqClear(hwiIndex);
+    HwiClear(hwiIndex);
 
     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
 
@@ -347,7 +348,7 @@ UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
 #else
     OsSetVector(hwiNum, handler);
 #endif
-    HalIrqUnmask(hwiNum);
+    HwiUnmask(hwiNum);
 
     LOS_IntRestore(intSave);
 
@@ -369,7 +370,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
         return OS_ERRNO_HWI_NUM_INVALID;
     }
 
-    HalIrqMask(hwiNum);
+    HwiMask(hwiNum);
 
     intSave = LOS_IntLock();
 
@@ -428,6 +429,7 @@ STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
     }
 }
 
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
 {
     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
@@ -444,6 +446,7 @@ STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
     }
     PRINTK("----- backtrace end -----\n");
 }
+#endif
 
 STATIC VOID OsExcMemPoolCheckInfo(VOID)
 {
@@ -493,7 +496,9 @@ STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
     OsExcTypeInfo(excInfo);
     OsExcCurTaskInfo(excInfo);
     OsExcRegInfo(excInfo);
+#if (LOSCFG_KERNEL_BACKTRACE == 1)
     OsExcBackTraceInfo(excInfo);
+#endif
     OsGetAllTskInfo();
     OsExcMemPoolCheckInfo();
 #endif
@@ -510,9 +515,9 @@ VOID HalExcHandleEntry(UINTPTR faultAddr, EXC_CONTEXT_S *excBufAddr, UINT32 type
     if ((taskCB == NULL) || (taskCB == OS_TCB_FROM_TID(g_taskMaxNum))) {
         g_excInfo.phase = OS_EXC_IN_INIT;
         g_excInfo.thrdPid = OS_NULL_INT;
-    } else if (HalIntNumGet() != OS_NULL_INT) {
+    } else if (HwiNumGet() != OS_NULL_INT) {
         g_excInfo.phase = OS_EXC_IN_HWI;
-        g_excInfo.thrdPid = HalIntNumGet();
+        g_excInfo.thrdPid = HwiNumGet();
     } else {
         g_excInfo.phase = OS_EXC_IN_TASK;
         g_excInfo.thrdPid = g_losTask.runTask->taskID;
@@ -547,7 +552,7 @@ VOID HalHwiInit(VOID)
     EnableExceptionInterface();
     for (UINT32 i = 0; i < OS_HWI_MAX_NUM; i++) {
         g_hwiForm[i + OS_SYS_VECTOR_CNT] = HalHwiDefaultHandler;
-        HalIrqMask(i);
+        HwiMask(i);
     }
     asm volatile ("wsr %0, vecbase" : : "r"(INIT_VECTOR_START));
     return;

arch/xtensa/lx6/gcc/los_timer.c

@@ -73,7 +73,7 @@ STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler)
     __asm__ __volatile__("wsr %0, ccompare1; rsync" : : "a"(0));
     __asm__ __volatile__("wsr %0, ccompare2; rsync" : : "a"(0));
 
-    HalIrqUnmask(tick->irqNum);
+    HwiUnmask(tick->irqNum);
     return LOS_OK;
 }
 
@@ -109,12 +109,12 @@ STATIC UINT64 SysTickCycleGet(UINT32 *period)
 
 STATIC VOID SysTickLock(VOID)
 {
-    HalIrqMask(OS_TICK_INT_NUM);
+    HwiMask(OS_TICK_INT_NUM);
 }
 
 STATIC VOID SysTickUnlock(VOID)
 {
-    HalIrqUnmask(OS_TICK_INT_NUM);
+    HwiUnmask(OS_TICK_INT_NUM);
 }
 
 ArchTickTimer *ArchSysTickTimerGet(VOID)

bundle.json

@@ -0,0 +1,61 @@
+{
+    "name": "@ohos/liteos_m",
+    "version": "3.1.0",
+    "description": "liteos-m kernel",
+    "publishAs": "code-segment",
+    "homePage": "https://gitee.com/openharmony",
+    "repository": "https://gitee.com/openharmony/kernel_liteos_m",
+    "license": "BSD 3-clause",
+    "domain": "os",
+    "language": "",
+    "private": false,
+    "scripts": {},
+    "tags": [
+        "kernel"
+    ],
+    "keywords": [
+        "kernel",
+        "liteos-m"
+    ],
+    "envs": [],
+    "dirs": [],
+    "author": {},
+    "contributors": [],
+    "segment": {
+        "destPath": "kernel/liteos_m"
+    },
+    "component": {
+        "name": "liteos_m",
+        "subsystem": "kernel",
+        "syscap": [
+            "SystemCapability.Kernel.liteos-m"
+        ],
+        "features": [],
+        "adapted_system_type": [
+            "mini"
+        ],
+        "rom": "300KB",
+        "ram": "100KB",
+        "deps": {
+            "components": [
+                "utils_lite"
+            ],
+            "third_party": [
+                "bounds_checking_function",
+                "cmsis",
+                "fatfs",
+                "littlefs",
+                "lwip",
+                "musl"
+            ]
+        },
+        "build": {
+            "sub_component": [
+                "//kernel/liteos_m:kernel",
+                "//kernel/liteos_m:build_kernel_image"
+            ],
+            "inner_kits": [],
+            "test": []
+        }
+    }
+}

components/BUILD.gn

@@ -42,6 +42,7 @@ group("components") {
     "net",
     "power",
     "shell",
+    "signal",
     "trace",
   ]
 }
@@ -60,5 +61,6 @@ config("public") {
     "trace:public",
     "lmk:public",
     "lms:public",
+    "signal:public",
   ]
 }

components/backtrace/BUILD.gn

@@ -33,6 +33,7 @@ module_switch = defined(LOSCFG_KERNEL_BACKTRACE)
 module_name = get_path_info(rebase_path("."), "name")
 kernel_module(module_name) {
   sources = [ "los_backtrace.c" ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

components/cppsupport/BUILD.gn

@@ -33,6 +33,7 @@ module_switch = defined(LOSCFG_KERNEL_CPPSUPPORT)
 module_name = get_path_info(rebase_path("."), "name")
 kernel_module(module_name) {
   sources = [ "los_cppsupport.c" ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

components/cpup/BUILD.gn

@@ -33,6 +33,7 @@ module_switch = defined(LOSCFG_BASE_CORE_CPUP)
 module_name = get_path_info(rebase_path("."), "name")
 kernel_module(module_name) {
   sources = [ "los_cpup.c" ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

components/dynlink/BUILD.gn

@@ -32,6 +32,7 @@ module_switch = defined(LOSCFG_KERNEL_DYNLINK)
 module_name = get_path_info(rebase_path("."), "name")
 kernel_module(module_name) {
   sources = [ "los_dynlink.c" ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

components/exchook/BUILD.gn

@@ -36,6 +36,7 @@ kernel_module(module_name) {
     "los_exc_info.c",
     "los_exchook.c",
   ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

components/fs/fatfs/BUILD.gn

@@ -28,20 +28,15 @@
 # ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 import("//kernel/liteos_m/liteos.gni")
+import("//third_party/FatFs/FatFs.gni")
 
 module_switch = defined(LOSCFG_FS_FAT)
 module_name = get_path_info(rebase_path("."), "name")
 kernel_module(module_name) {
-  sources = [
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
-    "$LITEOSTHIRDPARTY/FatFs/source/diskio.c",
+  sources = FATFS_SRC_FILES + [ "fatfs.c" ]
-    "$LITEOSTHIRDPARTY/FatFs/source/ff.c",
-    "$LITEOSTHIRDPARTY/FatFs/source/ffsystem.c",
-    "$LITEOSTHIRDPARTY/FatFs/source/ffunicode.c",
-    "fatfs.c",
-  ]
 }
 
 config("public") {
-  include_dirs = [ "." ]
+  include_dirs = FATFS_INCLUDE_DIRS + [ "." ]
-  include_dirs += [ "$LITEOSTHIRDPARTY/FatFs/source" ]
 }

components/fs/fatfs/fatfs.h

@@ -32,28 +32,21 @@
 #ifndef _FATFS_H
 #define _FATFS_H
 
-#include "fcntl.h"
 #include "dirent.h"
-#include "unistd.h"
+#include "fatfs_conf.h"
+#include "fcntl.h"
+#include "fs_config.h"
 #include "sys/mount.h"
 #include "sys/stat.h"
 #include "sys/statfs.h"
-#include "fs_config.h"
+#include "unistd.h"
+
 #ifdef __cplusplus
 #if __cplusplus
 extern "C" {
 #endif /* __cplusplus */
 #endif /* __cplusplus */
 
-#ifndef FAT_MAX_OPEN_FILES
-#define FAT_MAX_OPEN_FILES    50
-#endif /* FAT_MAX_OPEN_FILES */
-
-/* Format options */
-#define FMT_FAT      0x01
-#define FMT_FAT32    0x02
-#define FMT_ANY      0x07
-
 int fatfs_mount(const char *source, const char *target,
           const char *filesystemtype, unsigned long mountflags,
           const void *data);

components/fs/fatfs/fatfs_conf.h

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _FATFS_CONF_H
+#define _FATFS_CONF_H
+
+#ifndef FAT_MAX_OPEN_FILES
+#define FAT_MAX_OPEN_FILES    50
+#endif /* FAT_MAX_OPEN_FILES */
+
+/* Format options */
+#define FMT_FAT      0x01
+#define FMT_FAT32    0x02
+#define FMT_ANY      0x07
+
+#endif // _FATFS_CONF_H

components/fs/littlefs/BUILD.gn

@@ -28,20 +28,15 @@
 # ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 import("//kernel/liteos_m/liteos.gni")
+import("//third_party/littlefs/littlefs.gni")
 
 module_switch = defined(LOSCFG_FS_LITTLEFS)
 module_name = get_path_info(rebase_path("."), "name")
 kernel_module(module_name) {
-  sources = [
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
-    "$LITEOSTHIRDPARTY/littlefs/bd/lfs_rambd.c",
+  sources = LITTLEFS_SRC_FILES_FOR_KERNEL_MODULE + [ "lfs_api.c" ]
-    "$LITEOSTHIRDPARTY/littlefs/lfs.c",
-    "$LITEOSTHIRDPARTY/littlefs/lfs_util.c",
-    "lfs_api.c",
-  ]
 }
 
 config("public") {
-  include_dirs = [ "." ]
+  include_dirs = LITTLEFS_INCLUDE_DIRS + [ "." ]
-  include_dirs += [ "$LITEOSTHIRDPARTY/littlefs" ]
-  include_dirs += [ "$LITEOSTHIRDPARTY/littlefs/bd" ]
 }

components/fs/littlefs/lfs_api.c

@@ -41,7 +41,7 @@ struct FileOpInfo g_fsOp[LOSCFG_LFS_MAX_MOUNT_SIZE] = {0};
 static LittleFsHandleStruct g_handle[LITTLE_FS_MAX_OPEN_FILES] = {0};
 struct dirent g_nameValue;
 static pthread_mutex_t g_FslocalMutex = PTHREAD_MUTEX_INITIALIZER;
-static const char *g_littlefsMntName[LOSCFG_LFS_MAX_MOUNT_SIZE] = {"/a", "/b", "/c"};
+static const char *g_littlefsMntName[LOSCFG_LFS_MAX_MOUNT_SIZE] = {"/a"};
 
 LittleFsHandleStruct *LfsAllocFd(const char *fileName, int *fd)
 {
@@ -573,7 +573,7 @@ int LfsClosedir(DIR *dir)
     return ret;
 }
 
-int LfsOpen(const char *pathName, int openFlag, int mode)
+int LfsOpen(const char *pathName, int openFlag, ...)
 {
     int fd = INVALID_FD;
     int err = INVALID_FD;

components/fs/littlefs/lfs_api.h

@@ -39,6 +39,7 @@
 #include "errno.h"
 #include "fs_operations.h"
 #include "lfs.h"
+#include "lfs_conf.h"
 #include "lfs_util.h"
 #include "memory.h"
 #include "pthread.h"
@@ -74,20 +75,6 @@ typedef struct {
     lfs_dir_t dir;
 } FileDirInfo;
 
-#define LITTLE_FS_MAX_OPEN_FILES 100
-#define LITTLE_FS_STANDARD_NAME_LENGTH 50
-#define LITTLE_FS_MAX_NAME_LEN 255
-
-#define MAX_DEF_BUF_NUM 21
-#define MAX_BUFFER_LEN 100
-#define MAX_WRITE_FILE_LEN 500
-#define MAX_READ_FILE_LEN 500
-#define LITTLEFS_MAX_LFN_LEN 255
-
-#ifndef LFS_MAX_OPEN_DIRS
-#define LFS_MAX_OPEN_DIRS 10
-#endif
-
 LittleFsHandleStruct *GetFreeFd(int *fd);
 
 int LfsMount(const char *source, const char *target, const char *fileSystemType, unsigned long mountflags,
@@ -100,7 +87,7 @@ int LfsRmdir(const char *dirName);
 DIR *LfsOpendir(const char *dirName);
 struct dirent *LfsReaddir(DIR *dir);
 int LfsClosedir(DIR *dir);
-int LfsOpen(const char *pathName, int openFlag, int mode);
+int LfsOpen(const char *pathName, int openFlag, ...);
 int LfsRead(int fd, void *buf, unsigned int len);
 int LfsWrite(int fd, const void *buf, unsigned int len);
 off_t LfsSeek(int fd, off_t offset, int whence);

components/fs/littlefs/lfs_conf.h

@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2022-2022 Huawei Device Co., Ltd. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this list of
+ *    conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice, this list
+ *    of conditions and the following disclaimer in the documentation and/or other materials
+ *    provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its contributors may be used
+ *    to endorse or promote products derived from this software without specific prior written
+ *    permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _LFS_CONF_H
+#define _LFS_CONF_H
+
+#define LITTLE_FS_MAX_OPEN_FILES 100
+#define LITTLE_FS_STANDARD_NAME_LENGTH 50
+#define LITTLE_FS_MAX_NAME_LEN 255
+
+#define MAX_DEF_BUF_NUM 21
+#define MAX_WRITE_FILE_LEN 500
+#define MAX_READ_FILE_LEN 500
+#define LITTLEFS_MAX_LFN_LEN 255
+
+#ifndef LFS_MAX_OPEN_DIRS
+#define LFS_MAX_OPEN_DIRS 10
+#endif
+
+#endif // _LFS_CONF_H

components/fs/vfs/los_fs.c

@@ -60,6 +60,24 @@
 #define RANDOM_DEV_PATH  "/dev/random"
 #endif
 
+#if (LOSCFG_POSIX_PIPE_API == 1)
+#include "pipe_impl.h"
+#ifdef LOSCFG_RANDOM_DEV
+#define PIPE_DEV_FD (RANDOM_DEV_FD + 1)
+#else
+#define PIPE_DEV_FD (CONFIG_NFILE_DESCRIPTORS + CONFIG_NSOCKET_DESCRIPTORS)
+#endif
+
+int PollQueryFd(int fd, struct PollTable *table)
+{
+    if (fd >= PIPE_DEV_FD) {
+        return PipePoll(fd, table);
+    }
+
+    return -ENODEV;
+}
+#endif
+
 #define FREE_AND_SET_NULL(ptr) do { \
     free(ptr);                      \
     ptr = NULL;                     \
@@ -285,6 +303,13 @@ int LOS_Open(const char *path, int oflag, ...)
     }
     FREE_AND_SET_NULL(canonicalPath);
 #endif
+
+#if (LOSCFG_POSIX_PIPE_API == 1)
+    if ((path != NULL) && !strncmp(path, PIPE_DEV_PATH, strlen(PIPE_DEV_PATH))) {
+        return PipeOpen(path, oflag, PIPE_DEV_FD);
+    }
+#endif
+
     if (g_fs == NULL) {
         errno = ENODEV;
         return FS_FAILURE;
@@ -308,6 +333,13 @@ int LOS_Close(int fd)
         return closesocket(fd);
     }
 #endif
+
+#if (LOSCFG_POSIX_PIPE_API == 1)
+    if (fd >= PIPE_DEV_FD) {
+        return PipeClose(fd);
+    }
+#endif
+
     if (g_fs == NULL) {
         errno = ENODEV;
         return FS_FAILURE;
@@ -346,6 +378,13 @@ ssize_t LOS_Read(int fd, void *buf, size_t nbyte)
         return recv(fd, buf, nbyte, 0);
     }
 #endif
+
+#if (LOSCFG_POSIX_PIPE_API == 1)
+    if (fd >= PIPE_DEV_FD) {
+        return PipeRead(fd, buf, nbyte);
+    }
+#endif
+
     if (g_fs == NULL) {
         errno = ENODEV;
         return FS_FAILURE;
@@ -370,6 +409,13 @@ ssize_t LOS_Write(int fd, const void *buf, size_t nbyte)
         return send(fd, buf, nbyte, 0);
     }
 #endif
+
+#if (LOSCFG_POSIX_PIPE_API == 1)
+    if (fd >= PIPE_DEV_FD) {
+        return PipeWrite(fd, buf, nbyte);
+    }
+#endif
+
     if (g_fs == NULL) {
         errno = ENODEV;
         return FS_FAILURE;

components/fs/vfs/vfs_config.h

@@ -98,14 +98,14 @@
 /* max numbers of other descriptors except socket descriptors */
 
 #ifdef LOSCFG_FS_FAT
-#include "fatfs.h"
+#include "fatfs_conf.h"
 #define __FAT_NFILE FAT_MAX_OPEN_FILES
 #else
 #define __FAT_NFILE 0
 #endif
 
 #ifdef LOSCFG_FS_LITTLEFS
-#include "lfs_api.h"
+#include "lfs_conf.h"
 #define __LFS_NFILE LITTLE_FS_MAX_OPEN_FILES
 #else
 #define __LFS_NFILE 0
@@ -123,12 +123,10 @@
 
 #define CONFIG_NQUEUE_DESCRIPTORS    256
 
-#undef FD_SETSIZE
+#define TIMER_FD_OFFSET                 (CONFIG_NFILE_DESCRIPTORS + CONFIG_NSOCKET_DESCRIPTORS)
-#define FD_SETSIZE                      (CONFIG_NFILE_DESCRIPTORS + CONFIG_NSOCKET_DESCRIPTORS)
 #define CONFIG_NEXPANED_DESCRIPTORS     (CONFIG_NTIME_DESCRIPTORS + CONFIG_NQUEUE_DESCRIPTORS)
-#define FD_SET_TOTAL_SIZE               (FD_SETSIZE + CONFIG_NEXPANED_DESCRIPTORS)
+#define FD_SET_TOTAL_SIZE               (TIMER_FD_OFFSET + CONFIG_NEXPANED_DESCRIPTORS)
-#define TIMER_FD_OFFSET                 FD_SETSIZE
+#define MQUEUE_FD_OFFSET                (TIMER_FD_OFFSET + CONFIG_NTIME_DESCRIPTORS)
-#define MQUEUE_FD_OFFSET                (FD_SETSIZE + CONFIG_NTIME_DESCRIPTORS)
 
 /* directory configure */
 

components/lmk/BUILD.gn

@@ -33,6 +33,7 @@ module_switch = defined(LOSCFG_KERNEL_LMK)
 module_name = get_path_info(rebase_path("."), "name")
 kernel_module(module_name) {
   sources = [ "los_lmk.c" ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

components/lms/BUILD.gn

@@ -36,6 +36,7 @@ kernel_module(module_name) {
     "lms_libc.c",
     "los_lms.c",
   ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

components/net/lwip-2.1/porting/include/lwip/lwipopts.h

@@ -134,10 +134,6 @@
 #define LWIP_NETIF_LOOPBACK             1
 #define LWIP_POSIX_SOCKETS_IO_NAMES     0
 #define LWIP_RAW                        1
-#ifdef LOSCFG_FS_VFS
-#include "vfs_config.h"
-#define LWIP_SOCKET_OFFSET              CONFIG_NFILE_DESCRIPTORS
-#endif
 #define LWIP_SO_RCVBUF                  1
 #define LWIP_SO_RCVTIMEO                1
 #define LWIP_SO_SNDTIMEO                1
@@ -234,4 +230,9 @@
 // use PBUF_RAM instead of PBUF_POOL in udp_input
 #define USE_PBUF_RAM_UDP_INPUT          1
 
+#ifdef LOSCFG_FS_VFS
+#include "vfs_config.h"
+#define LWIP_SOCKET_OFFSET              CONFIG_NFILE_DESCRIPTORS
+#endif
+
 #endif /* _LWIP_PORTING_LWIPOPTS_H_ */

components/net/lwip-2.1/porting/src/api_shell.c

@@ -39,9 +39,12 @@
 #include "lwip/err.h"
 #include "lwip/ip_addr.h"
 #include "lwip/icmp.h"
+#include "lwip/tcpip.h"
+#include "lwip/inet_chksum.h"
 #include "los_config.h"
 #include <string.h>
 #include <time.h>
+#include <stdlib.h>
 #include "los_debug.h"
 #include "los_task.h"
 

components/net/lwip-2.1/porting/src/sockets_porting.c

@@ -34,6 +34,7 @@
 #include "lwip/priv/sockets_priv.h"
 #include "lwip/prot/dhcp.h"
 #include "lwip/dhcp.h"
+#include "lwip/if_api.h"
 
 #if !LWIP_COMPAT_SOCKETS
 #if LWIP_SOCKET

components/power/BUILD.gn

@@ -33,6 +33,7 @@ module_switch = defined(LOSCFG_KERNEL_PM)
 module_name = get_path_info(rebase_path("."), "name")
 kernel_module(module_name) {
   sources = [ "los_pm.c" ]
+  configs += [ "$LITEOSTOPDIR:warn_config" ]
 }
 
 config("public") {

components/power/los_pm.c

@@ -105,7 +105,7 @@ STATIC VOID OsPmTickTimerStart(LosPmCB *pm)
         tickTimer->timerStop();
 
         realSleepTime = OS_SYS_CYCLE_TO_NS(sleepTime, tickTimer->freq);
-        realSleepTime = OS_SYS_NS_TO_CYCLE(realSleepTime, OS_SYS_CLOCK);
+        realSleepTime = OS_SYS_NS_TO_CYCLE(realSleepTime, g_sysClock);
         currTime = pm->enterSleepTime + realSleepTime;
         pm->enterSleepTime = 0;
 
@@ -136,7 +136,7 @@ STATIC BOOL OsPmTickTimerStop(LosPmCB *pm)
             return FALSE;
         }
 
-        sleepCycle = OS_SYS_CYCLE_TO_NS(realSleepTime, OS_SYS_CLOCK);
+        sleepCycle = OS_SYS_CYCLE_TO_NS(realSleepTime, g_sysClock);
         sleepCycle = OS_SYS_NS_TO_CYCLE(sleepCycle, tickTimer->freq);
 
         /* The main CPU reduces the frequency */