openharmony_ci
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a4c14e1614
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!13 支持使用默认中断矢量寄存器地址
Merge pull request !13 from likailong/master
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2021-01-11 18:43:34 +08:00 |
likailong
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c766d49a4d
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Description: support original vector base address
Reviewed-by: shenwei
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2021-01-11 11:04:40 +08:00 |
zhushengle
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6252cad79b
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update kernel/arch/risc-v/asm/soc_common.h.
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2021-01-09 16:08:14 +08:00 |
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likailong
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5cee04fb0c
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Description: support original vector base address
Reviewed-by: shenwei
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2021-01-08 19:04:35 +08:00 |
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likailong
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992410db46
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Description: fix float-abi=soft bug
Reviewed-by: shenwei
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2021-01-08 08:50:29 +08:00 |
lixilun
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f4d93476d6
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Description: Port NUCLEO-F767ZI as an example.
Reviewed-by: likailong
Change-Id: I13482a4d1933de607c4782f71cf285c6602ee1db
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2021-01-07 14:59:06 +08:00 |
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zhushengle
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df9dc72e45
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Description:The interrupt handling interface supports multiple architectures.
Reviewed-by:likailong
Change-Id: I9d6e40f6889ff6a8e3de2054b979b8dece3584a5
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2020-12-31 16:24:40 +08:00 |
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lixilun@huawei.com
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87dc04812d
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Description: Port Cortex-M7
Reviewed-by: Likailong
Change-Id: I10bd6fc60111c3059fcc5b4d0d36d13790e5b73d
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2020-12-23 02:36:06 +00:00 |
Caoruihong
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1405111aa9
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Description: refactor
Reviewed-by: likailong
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2020-12-16 17:30:08 +08:00 |
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zhushengle
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64c784bb46
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move riscv32 qemu form liteos_m to /device/qemu
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2020-12-10 17:48:32 +08:00 |
likailong
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72c4acf01e
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Description: liteos-m refactoring
Reviewed-by: wangmihu, zhushengle
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2020-12-02 19:40:34 +08:00 |
zhushengle
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82082fc0e6
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Description:Liteos_m Support risc-v
Reviewed-by:likailong, zhangfanfan
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2020-11-27 15:20:02 +08:00 |
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l00278955
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07d25a8ae8
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Description: liteos-m refactoring
Reviewed-by: liulei, shenwei
Change-Id: I7baba352c02b78aefc81fc5eca000d840d3b2fe3
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2020-11-13 09:55:39 +08:00 |
wenjun
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dc16ffa8cb
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add OpenHarmony 1.0 baseline
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2020-09-08 16:46:24 +08:00 |