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fix:pendsv trigger for cortex-m SOC:some cpu will not enter pendsv when set the flag,and we need dsb and isb to fix this

This commit is contained in:
金永生 2021-03-24 15:47:54 +08:00
parent 5d8e3802b6
commit bc31d46e42
6 changed files with 12 additions and 0 deletions
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2
kernel/arch/arm/cortex-m3/keil/los_dispatch.S
View File

@ -111,6 +111,8 @@ HalTaskSchedule
LDR R0, =OS_NVIC_INT_CTRL LDR R0, =OS_NVIC_INT_CTRL
LDR R1, =OS_NVIC_PENDSVSET LDR R1, =OS_NVIC_PENDSVSET
STR R1, [R0] STR R1, [R0]
DSB
ISB
BX LR BX LR
HalPendSV HalPendSV

2
kernel/arch/arm/cortex-m33/gcc/los_dispatch.S
View File

@ -142,6 +142,8 @@ HalTaskSchedule:
ldr r0, =OS_NVIC_INT_CTRL ldr r0, =OS_NVIC_INT_CTRL
ldr r1, =OS_NVIC_PENDSVSET ldr r1, =OS_NVIC_PENDSVSET
str r1, [r0] str r1, [r0]
dsb
isb
bx lr bx lr
.fnend .fnend

2
kernel/arch/arm/cortex-m4/gcc/los_dispatch.S
View File

@ -145,6 +145,8 @@ HalTaskSchedule:
ldr r1, =OS_NVIC_PENDSVSET ldr r1, =OS_NVIC_PENDSVSET
str r1, [r0] str r1, [r0]
bx lr bx lr
dsb
isb
.fnend .fnend

2
kernel/arch/arm/cortex-m4/iar/los_dispatch.S
View File

@ -124,6 +124,8 @@ HalTaskSchedule
LDR R0, =OS_NVIC_INT_CTRL LDR R0, =OS_NVIC_INT_CTRL
LDR R1, =OS_NVIC_PENDSVSET LDR R1, =OS_NVIC_PENDSVSET
STR R1, [R0] STR R1, [R0]
DSB
ISB
BX LR BX LR
HalPendSV HalPendSV

2
kernel/arch/arm/cortex-m7/gcc/los_dispatch.S
View File

@ -142,6 +142,8 @@ HalTaskSchedule:
ldr r0, =OS_NVIC_INT_CTRL ldr r0, =OS_NVIC_INT_CTRL
ldr r1, =OS_NVIC_PENDSVSET ldr r1, =OS_NVIC_PENDSVSET
str r1, [r0] str r1, [r0]
dsb
isb
bx lr bx lr
.fnend .fnend

2
kernel/arch/arm/cortex-m7/iar/los_dispatch.S
View File

@ -124,6 +124,8 @@ HalTaskSchedule
LDR R0, =OS_NVIC_INT_CTRL LDR R0, =OS_NVIC_INT_CTRL
LDR R1, =OS_NVIC_PENDSVSET LDR R1, =OS_NVIC_PENDSVSET
STR R1, [R0] STR R1, [R0]
DSB
ISB
BX LR BX LR
HalPendSV HalPendSV