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feat: synchronizing arch api

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命名规范：修改少量Arch接口，命名规范化调整：
1.修改arch/include下接口声明，所有arch对外提供调用函数均以ArchXX命名
2.提取多个架构均有实现的公共函数声明至arch/include对应头文件中以供外部调用，并修改命名格式为ArchXX
3.修改OS_HWI_WITH_ARG为LOSCFG_PLATFORM_HWI_WITH_ARG并移至los_config.h中
4.typedef VOID (*OS_TICK_HANDLER)(VOID);暂时移至arch/include/los_timer.h中
5.实现atomic原子操作相关接口，位于arch/include/los_atomic.h,arm架构部分与汇编指令相关原子操作接口使用ARCH_ARM宏进行控制是否编译

BREAKING CHANGE: 1.修改arch/include下接口，以ArchXX命名函数
2.提取公共函数声明:ArchAtomicXchg32bits、ArchAtomicDecRet、ArchAtomicCmpXchg32bits
3.新增部分原子操作c内联实现

Close #I4N7XV

Signed-off-by: LiteOS2021 <dinglu@huawei.com>
This commit is contained in:
LiteOS2021
2021-12-22 20:47:16 +08:00
committed by wcc0
parent 4334b3e18b
commit 04bf3a682f
116 changed files with 942 additions and 1042 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/arm9/gcc/los_arch_atomic.h
+5 -4
View File
@@ -45,7 +45,8 @@ extern "C" {
* @brief Atomic exchange for 32-bit variable.
*
* @par Description:
* This API is used to implement the atomic exchange for 32-bit variable and return the previous value of the atomic variable.
* This API is used to implement the atomic exchange for 32-bit variable
* and return the previous value of the atomic variable.
* @attention
* <ul>The pointer v must not be NULL.</ul>
*
@@ -57,7 +58,7 @@ extern "C" {
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
return -1;
}
@@ -81,7 +82,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v)
{
return -1;
}
@@ -105,7 +106,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
return FALSE;
}
arch/arm/arm9/gcc/los_arch_interrupt.h
+7 -4
View File
@@ -171,7 +171,7 @@ extern UINT32 g_intCount;
*/
#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07)
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_hwi
* Set interrupt vector table.
@@ -322,15 +322,18 @@ VOID HalHwiInit(VOID);
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 19 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
arch/arm/arm9/gcc/los_arch_timer.h
+1 -1
View File
@@ -34,7 +34,7 @@
#include "los_config.h"
#include "los_compiler.h"
#include "los_context.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
arch/arm/arm9/gcc/los_context.c
+9 -10
View File
@@ -36,17 +36,16 @@
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : HalArchInit
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
UINT32 ret;
HalHwiInit();
@@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
}
/* ****************************************************************************
Function : HalSysExit
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
@@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
}
/* ****************************************************************************
Function : HalTskStackInit
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
@@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = NULL;
LosTaskCB *taskCB = OS_TCB_FROM_TID(taskID);
@@ -109,7 +108,7 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
context->r11 = 0x11111111L;
context->r12 = 0x12121212L;
context->sp = (UINTPTR)topStack + stackSize;
context->lr = (UINTPTR)HalSysExit;
context->lr = (UINTPTR)ArchSysExit;
if ((UINTPTR)taskCB->taskEntry & 0x01) {
context->pc = (UINTPTR)OsTaskEntryThumb;
@@ -122,7 +121,7 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
@@ -131,7 +130,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
return LOS_OK; /* never return */
}
LITE_OS_SEC_TEXT_INIT VOID HalTaskSchedule(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchTaskSchedule(VOID)
{
__asm__ __volatile__("swi 0");
}
arch/arm/arm9/gcc/los_interrupt.c
+17 -17
View File
@@ -64,7 +64,7 @@ ExcInfo g_excInfo = {0};
*/
STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
@@ -126,7 +126,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
return (31 - CLZ(status));
}
inline UINT32 HalIsIntActive(VOID)
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
@@ -181,7 +181,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
HalPreInterruptHandler(hwiIndex);
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
@@ -201,7 +201,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
}
/* ****************************************************************************
Function : HalHwiCreate
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
@@ -211,11 +211,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
{
UINT32 intSave;
@@ -232,7 +232,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
intSave = LOS_IntLock();
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(hwiNum, handler, arg);
#else
OsSetVector(hwiNum, handler);
@@ -244,13 +244,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
/* ****************************************************************************
Function : HalHwiDelete
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
@@ -414,7 +414,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
HalSysExit();
ArchSysExit();
}
/* ****************************************************************************
@@ -431,7 +431,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
UINT32 val;
for (val = OS_SYS_VECTOR_CNT; val < OS_VECTOR_CNT; val++) {
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
g_hwiForm[val].pfnHook = HalHwiDefaultHandler;
g_hwiForm[val].uwParam = 0;
#else
@@ -447,7 +447,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
return;
}
UINT32 HalIntLock(VOID)
UINT32 ArchIntLock(VOID)
{
UINT32 ret;
UINT32 temp;
@@ -461,12 +461,12 @@ UINT32 HalIntLock(VOID)
return ret;
}
VOID HalIntRestore(UINT32 intSave)
VOID ArchIntRestore(UINT32 intSave)
{
__asm__ __volatile__("MSR CPSR_c, %0" : : "r"(intSave));
}
UINT32 HalIntUnLock(VOID)
UINT32 ArchIntUnLock(VOID)
{
UINT32 intSave;
arch/arm/arm9/gcc/los_timer.c
+8 -8
View File
@@ -77,7 +77,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
value |= OS_TIMER_ENABLE; // Enable timer.
WRITE_UINT32(value, OS_TIMER_CTL_REG_ADDR);
(VOID)HalHwiCreate(OS_TIMER_IRQ_NUM, 0, 0, (HWI_PROC_FUNC)handler, 0);
(VOID)ArchHwiCreate(OS_TIMER_IRQ_NUM, 0, 0, (HWI_PROC_FUNC)handler, 0);
LOS_IntRestore(intSave);
return LOS_OK;
@@ -94,15 +94,15 @@ STATIC VOID HalClockIrqClear(VOID)
} while (status & mask);
}
WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
{
HalTickLock();
ArchTickLock();
WRITE_UINT32(nextResponseTime, OS_TIMER_PERIOD_REG_ADDR);
HalClockIrqClear();
HalTickUnlock();
ArchTickUnlock();
}
WEAK UINT64 HalGetTickCycle(UINT32 *period)
WEAK UINT64 ArchGetTickCycle(UINT32 *period)
{
UINT32 val;
@@ -118,7 +118,7 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
return (UINT64)val;
}
WEAK VOID HalTickLock(VOID)
WEAK VOID ArchTickLock(VOID)
{
UINT32 value;
@@ -129,7 +129,7 @@ WEAK VOID HalTickLock(VOID)
WRITE_UINT32(value, OS_TIMER_CTL_REG_ADDR);
}
WEAK VOID HalTickUnlock(VOID)
WEAK VOID ArchTickUnlock(VOID)
{
UINT32 value;
@@ -140,7 +140,7 @@ WEAK VOID HalTickUnlock(VOID)
WRITE_UINT32(value, OS_TIMER_CTL_REG_ADDR);
}
UINT32 HalEnterSleep(VOID)
UINT32 ArchEnterSleep(VOID)
{
dsb();
wfi();
arch/arm/cortex-m3/keil/los_arch_atomic.h
+3 -3
View File
@@ -57,7 +57,7 @@ extern "C" {
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
@@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v)
{
INT32 val = 0;
UINT32 status = 0;
@@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
arch/arm/cortex-m3/keil/los_arch_interrupt.h
+7 -5
View File
@@ -309,7 +309,7 @@ extern UINT32 _BootVectors[];
*/
#define OS_EXC_SYS_TICK 15
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
@@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID);
VOID HalExcSvcCall(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
@@ -665,15 +664,18 @@ VOID HalHwiInit(VOID);
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
arch/arm/cortex-m3/keil/los_arch_timer.h
+1 -1
View File
@@ -34,7 +34,7 @@
#include "los_config.h"
#include "los_compiler.h"
#include "los_context.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
arch/arm/cortex-m3/keil/los_context.c
+8 -9
View File
@@ -37,17 +37,16 @@
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : HalArchInit
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
UINT32 ret;
HalHwiInit();
@@ -59,13 +58,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
}
/* ****************************************************************************
Function : HalSysExit
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
@@ -73,7 +72,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
}
/* ****************************************************************************
Function : HalTskStackInit
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
@@ -81,7 +80,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = NULL;
errno_t result;
@@ -147,14 +146,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)HalSysExit;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
arch/arm/cortex-m3/keil/los_dispatch.S
+8 -8
View File
@@ -31,11 +31,11 @@
PRESERVE8
EXPORT HalIntLock
EXPORT HalIntUnLock
EXPORT HalIntRestore
EXPORT ArchIntLock
EXPORT ArchIntUnLock
EXPORT ArchIntRestore
EXPORT HalStartToRun
EXPORT HalTaskSchedule
EXPORT ArchTaskSchedule
EXPORT HalPendSV
IMPORT OsSchedTaskSwitch
IMPORT g_losTask
@@ -77,21 +77,21 @@ HalStartToRun
BX R6
HalIntLock
ArchIntLock
MRS R0, PRIMASK
CPSID I
BX LR
HalIntUnLock
ArchIntUnLock
MRS R0, PRIMASK
CPSIE I
BX LR
HalIntRestore
ArchIntRestore
MSR PRIMASK, R0
BX LR
HalTaskSchedule
ArchTaskSchedule
LDR R0, =OS_NVIC_INT_CTRL
LDR R1, =OS_NVIC_PENDSVSET
STR R1, [R0]
arch/arm/cortex-m3/keil/los_interrupt.c
+13 -13
View File
@@ -56,7 +56,7 @@ LITE_OS_SEC_VEC
*/
STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
@@ -119,7 +119,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
return __get_IPSR();
}
inline UINT32 HalIsIntActive(VOID)
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
@@ -174,7 +174,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
HalPreInterruptHandler(hwiIndex);
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
@@ -194,7 +194,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
}
/* ****************************************************************************
Function : HalHwiCreate
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
@@ -204,11 +204,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
{
UINT32 intSave;
@@ -229,7 +229,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
intSave = LOS_IntLock();
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(hwiNum, handler, arg);
#else
OsSetVector(hwiNum, handler);
@@ -243,13 +243,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
/* ****************************************************************************
Function : HalHwiDelete
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
@@ -483,7 +483,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
HalSysExit();
ArchSysExit();
}
/* ****************************************************************************
arch/arm/cortex-m3/keil/los_timer.c
+6 -6
View File
@@ -56,7 +56,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
@@ -74,7 +74,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
return LOS_OK;
}
WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
@@ -83,7 +83,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
WEAK UINT64 HalGetTickCycle(UINT32 *period)
WEAK UINT64 ArchGetTickCycle(UINT32 *period)
{
UINT32 hwCycle = 0;
UINT32 intSave = LOS_IntLock();
@@ -96,17 +96,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
return (UINT64)hwCycle;
}
WEAK VOID HalTickLock(VOID)
WEAK VOID ArchTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
WEAK VOID HalTickUnlock(VOID)
WEAK VOID ArchTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
UINT32 HalEnterSleep(VOID)
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
arch/arm/cortex-m33/gcc/NTZ/los_arch_atomic.h
+3 -3
View File
@@ -57,7 +57,7 @@ extern "C" {
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
@@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v)
{
INT32 val = 0;
UINT32 status = 0;
@@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h
+7 -5
View File
@@ -309,7 +309,7 @@ extern UINT32 _BootVectors[];
*/
#define OS_EXC_SYS_TICK 15
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
@@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID);
VOID HalSVCHandler(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
@@ -665,15 +664,18 @@ VOID HalHwiInit(VOID);
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
arch/arm/cortex-m33/gcc/NTZ/los_arch_timer.h
Executable → Regular
+1 -1
View File
@@ -34,7 +34,7 @@
#include "los_config.h"
#include "los_compiler.h"
#include "los_context.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
arch/arm/cortex-m33/gcc/NTZ/los_context.c
+8 -9
View File
@@ -36,17 +36,16 @@
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : HalArchInit
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
UINT32 ret;
HalHwiInit();
@@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
}
/* ****************************************************************************
Function : HalSysExit
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
@@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
}
/* ****************************************************************************
Function : HalTskStackInit
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
@@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = NULL;
errno_t result;
@@ -146,14 +145,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)HalSysExit;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
arch/arm/cortex-m33/gcc/NTZ/los_dispatch.S
+12 -12
View File
@@ -94,9 +94,9 @@ __DisabledFPU:
.fnend
.type HalIntLock, %function
.global HalIntLock
HalIntLock:
.type ArchIntLock, %function
.global ArchIntLock
ArchIntLock:
.fnstart
.cantunwind
@@ -105,9 +105,9 @@ HalIntLock:
BX LR
.fnend
.type HalIntUnLock, %function
.global HalIntUnLock
HalIntUnLock:
.type ArchIntUnLock, %function
.global ArchIntUnLock
ArchIntUnLock:
.fnstart
.cantunwind
@@ -116,9 +116,9 @@ HalIntUnLock:
BX LR
.fnend
.type HalIntRestore, %function
.global HalIntRestore
HalIntRestore:
.type ArchIntRestore, %function
.global ArchIntRestore
ArchIntRestore:
.fnstart
.cantunwind
@@ -126,9 +126,9 @@ HalIntRestore:
BX LR
.fnend
.type HalTaskSchedule, %function
.global HalTaskSchedule
HalTaskSchedule:
.type ArchTaskSchedule, %function
.global ArchTaskSchedule
ArchTaskSchedule:
.fnstart
.cantunwind
arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c
+13 -13
View File
@@ -51,7 +51,7 @@ UINT32 g_intCount = 0;
*/
STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
@@ -109,7 +109,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
return __get_IPSR();
}
inline UINT32 HalIsIntActive(VOID)
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
@@ -164,7 +164,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
HalPreInterruptHandler(hwiIndex);
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
@@ -184,7 +184,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
}
/* ****************************************************************************
Function : HalHwiCreate
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
@@ -194,11 +194,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
{
UINT32 intSave;
@@ -219,7 +219,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
intSave = LOS_IntLock();
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(hwiNum, handler, arg);
#else
OsSetVector(hwiNum, handler);
@@ -233,13 +233,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
/* ****************************************************************************
Function : HalHwiDelete
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
@@ -473,7 +473,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
HalSysExit();
ArchSysExit();
}
/* ****************************************************************************
arch/arm/cortex-m33/gcc/NTZ/los_timer.c
+6 -6
View File
@@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
@@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
return LOS_OK;
}
WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
@@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
WEAK UINT64 HalGetTickCycle(UINT32 *period)
WEAK UINT64 ArchGetTickCycle(UINT32 *period)
{
UINT32 hwCycle = 0;
UINT32 intSave = LOS_IntLock();
@@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
return (UINT64)hwCycle;
}
WEAK VOID HalTickLock(VOID)
WEAK VOID ArchTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
WEAK VOID HalTickUnlock(VOID)
WEAK VOID ArchTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
UINT32 HalEnterSleep(VOID)
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_atomic.h
+3 -3
View File
@@ -57,7 +57,7 @@ extern "C" {
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
@@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v)
{
INT32 val = 0;
UINT32 status = 0;
@@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h
+7 -5
View File
@@ -309,7 +309,7 @@ extern UINT32 _BootVectors[];
*/
#define OS_EXC_SYS_TICK 15
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
@@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID);
VOID HalSVCHandler(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
@@ -665,15 +664,18 @@ VOID HalHwiInit(VOID);
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_timer.h
Executable → Regular
+1 -1
View File
@@ -34,7 +34,7 @@
#include "los_config.h"
#include "los_compiler.h"
#include "los_context.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
arch/arm/cortex-m33/gcc/TZ/non_secure/los_context.c
+8 -9
View File
@@ -36,17 +36,16 @@
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : HalArchInit
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
UINT32 ret;
HalHwiInit();
@@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
}
/* ****************************************************************************
Function : HalSysExit
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
@@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
}
/* ****************************************************************************
Function : HalTskStackInit
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
@@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = NULL;
errno_t result;
@@ -150,14 +149,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)HalSysExit;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
arch/arm/cortex-m33/gcc/TZ/non_secure/los_dispatch.S
+12 -12
View File
@@ -76,9 +76,9 @@ __DisabledFPU1:
CPSIE I
BX R3
.type HalIntLock, %function
.global HalIntLock
HalIntLock:
.type ArchIntLock, %function
.global ArchIntLock
ArchIntLock:
.fnstart
.cantunwind
@@ -87,9 +87,9 @@ HalIntLock:
BX LR
.fnend
.type HalIntUnLock, %function
.global HalIntUnLock
HalIntUnLock:
.type ArchIntUnLock, %function
.global ArchIntUnLock
ArchIntUnLock:
.fnstart
.cantunwind
@@ -98,9 +98,9 @@ HalIntUnLock:
BX LR
.fnend
.type HalIntRestore, %function
.global HalIntRestore
HalIntRestore:
.type ArchIntRestore, %function
.global ArchIntRestore
ArchIntRestore:
.fnstart
.cantunwind
@@ -108,9 +108,9 @@ HalIntRestore:
BX LR
.fnend
.type HalTaskSchedule, %function
.global HalTaskSchedule
HalTaskSchedule:
.type ArchTaskSchedule, %function
.global ArchTaskSchedule
ArchTaskSchedule:
.fnstart
.cantunwind
arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c
+13 -13
View File
@@ -51,7 +51,7 @@ UINT32 g_intCount = 0;
*/
STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
@@ -109,7 +109,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
return __get_IPSR();
}
inline UINT32 HalIsIntActive(VOID)
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
@@ -164,7 +164,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
HalPreInterruptHandler(hwiIndex);
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
@@ -184,7 +184,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
}
/* ****************************************************************************
Function : HalHwiCreate
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
@@ -194,11 +194,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
{
UINT32 intSave;
@@ -219,7 +219,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
intSave = LOS_IntLock();
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(hwiNum, handler, arg);
#else
OsSetVector(hwiNum, handler);
@@ -233,13 +233,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
/* ****************************************************************************
Function : HalHwiDelete
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
@@ -473,7 +473,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
HalSysExit();
ArchSysExit();
}
/* ****************************************************************************
arch/arm/cortex-m33/gcc/TZ/non_secure/los_timer.c
+6 -6
View File
@@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
@@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
return LOS_OK;
}
WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
@@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
WEAK UINT64 HalGetTickCycle(UINT32 *period)
WEAK UINT64 ArchGetTickCycle(UINT32 *period)
{
UINT32 hwCycle = 0；
UINT32 intSave = LOS_IntLock();
@@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
return (UINT64)hwCycle;
}
WEAK VOID HalTickLock(VOID)
WEAK VOID ArchTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
WEAK VOID HalTickUnlock(VOID)
WEAK VOID ArchTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
UINT32 HalEnterSleep(VOID)
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
arch/arm/cortex-m33/iar/NTZ/los_arch_atomic.h
+3 -3
View File
@@ -57,7 +57,7 @@ extern "C" {
* <ul><li>los_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
@@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
* <ul><li>los_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v)
{
INT32 val = 0;
UINT32 status = 0;
@@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
* <ul><li>los_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h
+7 -5
View File
@@ -309,7 +309,7 @@ extern UINT32 _BootVectors[];
*/
#define OS_EXC_SYS_TICK 15
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_hwi
* Set interrupt vector table.
@@ -529,7 +529,6 @@ VOID HalExcUsageFault(VOID);
VOID HalSVCHandler(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
@@ -666,15 +665,18 @@ VOID HalHwiInit(VOID);
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
arch/arm/cortex-m33/iar/NTZ/los_arch_timer.h
+1 -1
View File
@@ -34,7 +34,7 @@
#include "los_config.h"
#include "los_compiler.h"
#include "los_context.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
arch/arm/cortex-m33/iar/NTZ/los_context.c
+8 -9
View File
@@ -36,17 +36,16 @@
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : HalArchInit
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
UINT32 ret;
HalHwiInit();
@@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
}
/* ****************************************************************************
Function : HalSysExit
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
@@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
}
/* ****************************************************************************
Function : HalTskStackInit
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
@@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = NULL;
errno_t result;
@@ -146,14 +145,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)HalSysExit;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
arch/arm/cortex-m33/iar/NTZ/los_dispatch.S
+8 -8
View File
@@ -31,11 +31,11 @@
PRESERVE8
EXPORT HalIntLock
EXPORT HalIntUnLock
EXPORT HalIntRestore
EXPORT ArchIntLock
EXPORT ArchIntUnLock
EXPORT ArchIntRestore
EXPORT HalStartToRun
EXPORT HalTaskSchedule
EXPORT ArchTaskSchedule
EXPORT HalPendSV
IMPORT OsSchedTaskSwitch
IMPORT g_losTask
@@ -90,21 +90,21 @@ __DisabledFPU
BX R6
HalIntLock
ArchIntLock
MRS R0, PRIMASK
CPSID I
BX LR
HalIntUnLock
ArchIntUnLock
MRS R0, PRIMASK
CPSIE I
BX LR
HalIntRestore
ArchIntRestore
MSR PRIMASK, R0
BX LR
HalTaskSchedule
ArchTaskSchedule
LDR R0, =OS_NVIC_INT_CTRL
LDR R1, =OS_NVIC_PENDSVSET
STR R1, [R0]
arch/arm/cortex-m33/iar/NTZ/los_interrupt.c
+13 -13
View File
@@ -53,7 +53,7 @@ UINT32 g_intCount = 0;
*/
STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
@@ -116,7 +116,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
return __get_IPSR();
}
inline UINT32 HalIsIntActive(VOID)
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
@@ -173,7 +173,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
HalPreInterruptHandler(hwiIndex);
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
@@ -193,7 +193,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
}
/* ****************************************************************************
Function : HalHwiCreate
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
@@ -203,11 +203,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
{
UINTPTR intSave;
@@ -228,7 +228,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
intSave = LOS_IntLock();
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(hwiNum, handler, arg);
#else
OsSetVector(hwiNum, handler);
@@ -242,13 +242,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
/* ****************************************************************************
Function : HalHwiDelete
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
@@ -481,7 +481,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
HalSysExit();
ArchSysExit();
}
/* ****************************************************************************
arch/arm/cortex-m33/iar/NTZ/los_timer.c
+6 -6
View File
@@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
@@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
return LOS_OK;
}
WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
@@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
WEAK UINT64 HalGetTickCycle(UINT32 *period)
WEAK UINT64 ArchGetTickCycle(UINT32 *period)
{
UINT32 hwCycle = 0;
UINTPTR intSave = LOS_IntLock();
@@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
return (UINT64)hwCycle;
}
WEAK VOID HalTickLock(VOID)
WEAK VOID ArchTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
WEAK VOID HalTickUnlock(VOID)
WEAK VOID ArchTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
UINT32 HalEnterSleep(VOID)
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_atomic.h
+3 -3
View File
@@ -57,7 +57,7 @@ extern "C" {
* <ul><li>los_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
@@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
* <ul><li>los_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v)
{
INT32 val = 0;
UINT32 status = 0;
@@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
* <ul><li>los_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h
+7 -5
View File
@@ -309,7 +309,7 @@ extern UINT32 _BootVectors[];
*/
#define OS_EXC_SYS_TICK 15
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_hwi
* Set interrupt vector table.
@@ -529,7 +529,6 @@ VOID HalExcUsageFault(VOID);
VOID HalSVCHandler(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
@@ -666,15 +665,18 @@ VOID HalHwiInit(VOID);
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_timer.h
+1 -1
View File
@@ -34,7 +34,7 @@
#include "los_config.h"
#include "los_compiler.h"
#include "los_context.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
arch/arm/cortex-m33/iar/TZ/non_secure/los_context.c
+8 -9
View File
@@ -36,17 +36,16 @@
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : HalArchInit
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
UINT32 ret;
HalHwiInit();
@@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
}
/* ****************************************************************************
Function : HalSysExit
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
@@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
}
/* ****************************************************************************
Function : HalTskStackInit
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
@@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = NULL;
errno_t result;
@@ -150,14 +149,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)HalSysExit;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
arch/arm/cortex-m33/iar/TZ/non_secure/los_dispatch.S
+8 -8
View File
@@ -31,10 +31,10 @@
PRESERVE8
EXPORT HalIntLock
EXPORT HalIntUnLock
EXPORT HalIntRestore
EXPORT HalTaskSchedule
EXPORT ArchIntLock
EXPORT ArchIntUnLock
EXPORT ArchIntRestore
EXPORT ArchTaskSchedule
EXPORT HalPendSV
EXPORT HalSVCHandler
EXPORT HalStartFirstTask
@@ -91,21 +91,21 @@ __DisabledFPU1
CPSIE I
BX R3
HalIntLock
ArchIntLock
MRS R0, PRIMASK
CPSID I
BX LR
HalIntUnLock
ArchIntUnLock
MRS R0, PRIMASK
CPSIE I
BX LR
HalIntRestore
ArchIntRestore
MSR PRIMASK, R0
BX LR
HalTaskSchedule
ArchTaskSchedule
LDR R0, =OS_NVIC_INT_CTRL
LDR R1, =OS_NVIC_PENDSVSET
STR R1, [R0]
arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c
+13 -13
View File
@@ -53,7 +53,7 @@ UINT32 g_intCount = 0;
*/
STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
@@ -116,7 +116,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
return __get_IPSR();
}
inline UINT32 HalIsIntActive(VOID)
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
@@ -173,7 +173,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
HalPreInterruptHandler(hwiIndex);
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
@@ -193,7 +193,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
}
/* ****************************************************************************
Function : HalHwiCreate
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
@@ -203,11 +203,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
{
UINTPTR intSave;
@@ -228,7 +228,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
intSave = LOS_IntLock();
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(hwiNum, handler, arg);
#else
OsSetVector(hwiNum, handler);
@@ -242,13 +242,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
/* ****************************************************************************
Function : HalHwiDelete
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
@@ -481,7 +481,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
HalSysExit();
ArchSysExit();
}
/* ****************************************************************************
arch/arm/cortex-m33/iar/TZ/non_secure/los_timer.c
+6 -6
View File
@@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
@@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
return LOS_OK;
}
WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
@@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
WEAK UINT64 HalGetTickCycle(UINT32 *period)
WEAK UINT64 ArchGetTickCycle(UINT32 *period)
{
UINT32 hwCycle = 0;
UINTPTR intSave = LOS_IntLock();
@@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
return (UINT64)hwCycle;
}
WEAK VOID HalTickLock(VOID)
WEAK VOID ArchTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
WEAK VOID HalTickUnlock(VOID)
WEAK VOID ArchTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
UINT32 HalEnterSleep(VOID)
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
arch/arm/cortex-m4/gcc/los_arch_atomic.h
+3 -3
View File
@@ -57,7 +57,7 @@ extern "C" {
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
@@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v)
{
INT32 val = 0;
UINT32 status = 0;
@@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
arch/arm/cortex-m4/gcc/los_arch_interrupt.h
+7 -5
View File
@@ -309,7 +309,7 @@ extern UINT32 _BootVectors[];
*/
#define OS_EXC_SYS_TICK 15
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
@@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID);
VOID HalExcSvcCall(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
@@ -665,15 +664,18 @@ VOID HalHwiInit(VOID);
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
arch/arm/cortex-m4/gcc/los_arch_timer.h
+1 -1
View File
@@ -34,7 +34,7 @@
#include "los_config.h"
#include "los_compiler.h"
#include "los_context.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
arch/arm/cortex-m4/gcc/los_context.c
+8 -9
View File
@@ -36,18 +36,17 @@
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : HalArchInit
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
UINT32 ret;
@@ -60,13 +59,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
}
/* ****************************************************************************
Function : HalSysExit
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
@@ -74,7 +73,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
}
/* ****************************************************************************
Function : HalTskStackInit
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
@@ -82,7 +81,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = NULL;
errno_t result;
@@ -148,14 +147,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)HalSysExit;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
arch/arm/cortex-m4/gcc/los_dispatch.S
+12 -12
View File
@@ -89,9 +89,9 @@ __DisabledFPU:
.fnend
.type HalIntLock, %function
.global HalIntLock
HalIntLock:
.type ArchIntLock, %function
.global ArchIntLock
ArchIntLock:
.fnstart
.cantunwind
@@ -100,9 +100,9 @@ HalIntLock:
BX LR
.fnend
.type HalIntUnLock, %function
.global HalIntUnLock
HalIntUnLock:
.type ArchIntUnLock, %function
.global ArchIntUnLock
ArchIntUnLock:
.fnstart
.cantunwind
@@ -111,9 +111,9 @@ HalIntUnLock:
BX LR
.fnend
.type HalIntRestore, %function
.global HalIntRestore
HalIntRestore:
.type ArchIntRestore, %function
.global ArchIntRestore
ArchIntRestore:
.fnstart
.cantunwind
@@ -121,9 +121,9 @@ HalIntRestore:
BX LR
.fnend
.type HalTaskSchedule, %function
.global HalTaskSchedule
HalTaskSchedule:
.type ArchTaskSchedule, %function
.global ArchTaskSchedule
ArchTaskSchedule:
.fnstart
.cantunwind
arch/arm/cortex-m4/gcc/los_interrupt.c
+13 -13
View File
@@ -56,7 +56,7 @@ LITE_OS_SEC_VEC
*/
STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
@@ -119,7 +119,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
return __get_IPSR();
}
inline UINT32 HalIsIntActive(VOID)
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
@@ -174,7 +174,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
HalPreInterruptHandler(hwiIndex);
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
@@ -194,7 +194,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
}
/* ****************************************************************************
Function : HalHwiCreate
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
@@ -204,11 +204,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
{
UINT32 intSave;
@@ -229,7 +229,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
intSave = LOS_IntLock();
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(hwiNum, handler, arg);
#else
OsSetVector(hwiNum, handler);
@@ -243,13 +243,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
/* ****************************************************************************
Function : HalHwiDelete
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
@@ -483,7 +483,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
HalSysExit();
ArchSysExit();
}
/* stack protector */
arch/arm/cortex-m4/gcc/los_mpu.c
+17 -17
View File
@@ -49,22 +49,22 @@ typedef enum {
MPU_AP_RO_USER_RO = 0x6, /* Privileged:Read-only Unprivileged:Read-only */
} MpuApConfig;
VOID HalMpuEnable(UINT32 defaultRegionEnable)
VOID ArchMpuEnable(UINT32 defaultRegionEnable)
{
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
MPU->CTRL = (MPU_CTRL_ENABLE_Msk | ((defaultRegionEnable << MPU_CTRL_PRIVDEFENA_Pos) & MPU_CTRL_PRIVDEFENA_Msk));
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
__DSB();
__ISB();
HalIntRestore(intSave);
ArchIntRestore(intSave);
}
VOID HalMpuDisable(VOID)
VOID ArchMpuDisable(VOID)
{
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
MPU->CTRL = 0;
__DSB();
__ISB();
HalIntRestore(intSave);
ArchIntRestore(intSave);
}
STATIC VOID HalMpuRASRAddMemAttr(MPU_CFG_PARA *para, UINT32 *RASR)
@@ -147,7 +147,7 @@ STATIC UINT32 HalMpuGetRASR(UINT32 encodeSize, MPU_CFG_PARA *para)
return RASR;
}
UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
{
UINT32 RASR;
UINT32 RBAR;
@@ -175,9 +175,9 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
}
RBAR = para->baseAddr & MPU_RBAR_ADDR_Msk;
RASR = HalMpuGetRASR(encodeSize, para);
intSave = HalIntLock();
intSave = ArchIntLock();
if (g_regionNumBeUsed[regionId]) {
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_NOK;
}
MPU->RNR = RNR;
@@ -186,11 +186,11 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
__DSB();
__ISB();
g_regionNumBeUsed[regionId] = 1; /* Set mpu region used flag */
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_OK;
}
UINT32 HalMpuDisableRegion(UINT32 regionId)
UINT32 ArchMpuDisableRegion(UINT32 regionId)
{
volatile UINT32 type;
UINT32 intSave;
@@ -199,9 +199,9 @@ UINT32 HalMpuDisableRegion(UINT32 regionId)
return LOS_NOK;
}
intSave = HalIntLock();
intSave = ArchIntLock();
if (!g_regionNumBeUsed[regionId]) {
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_NOK;
}
@@ -213,20 +213,20 @@ UINT32 HalMpuDisableRegion(UINT32 regionId)
__ISB();
}
g_regionNumBeUsed[regionId] = 0; /* clear mpu region used flag */
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_OK;
}
INT32 HalMpuUnusedRegionGet(VOID)
INT32 ArchMpuUnusedRegionGet(VOID)
{
INT32 id;
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
for (id = 0; id < MPU_MAX_REGION_NUM; id++) {
if (!g_regionNumBeUsed[id]) {
break;
}
}
HalIntRestore(intSave);
ArchIntRestore(intSave);
if (id == MPU_MAX_REGION_NUM) {
return -1;
arch/arm/cortex-m4/gcc/los_timer.c
+6 -6
View File
@@ -56,7 +56,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
@@ -74,7 +74,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
return LOS_OK;
}
WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
@@ -83,7 +83,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
WEAK UINT64 HalGetTickCycle(UINT32 *period)
WEAK UINT64 ArchGetTickCycle(UINT32 *period)
{
UINT32 hwCycle = 0;
UINT32 intSave = LOS_IntLock();
@@ -96,17 +96,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
return (UINT64)hwCycle;
}
WEAK VOID HalTickLock(VOID)
WEAK VOID ArchTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
WEAK VOID HalTickUnlock(VOID)
WEAK VOID ArchTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
UINT32 HalEnterSleep(VOID)
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
arch/arm/cortex-m4/iar/los_arch_atomic.h
+3 -3
View File
@@ -57,7 +57,7 @@ extern "C" {
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
@@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v)
{
INT32 val = 0;
UINT32 status = 0;
@@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
arch/arm/cortex-m4/iar/los_arch_interrupt.h
+7 -5
View File
@@ -309,7 +309,7 @@ extern UINT32 _BootVectors[];
*/
#define OS_EXC_SYS_TICK 15
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
@@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID);
VOID HalExcSvcCall(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
@@ -665,15 +664,18 @@ VOID HalHwiInit(VOID);
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
arch/arm/cortex-m4/iar/los_arch_timer.h
+1 -1
View File
@@ -34,7 +34,7 @@
#include "los_config.h"
#include "los_compiler.h"
#include "los_context.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
arch/arm/cortex-m4/iar/los_context.c
+8 -9
View File
@@ -36,19 +36,18 @@
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : HalArchInit
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
UINT32 ret;
HalHwiInit();
@@ -61,13 +60,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
}
/* ****************************************************************************
Function : HalSysExit
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
@@ -75,7 +74,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
}
/* ****************************************************************************
Function : HalTskStackInit
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
@@ -83,7 +82,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = NULL;
errno_t result;
@@ -149,14 +148,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)HalSysExit;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
arch/arm/cortex-m4/iar/los_dispatch.S
+8 -8
View File
@@ -31,11 +31,11 @@
PRESERVE8
EXPORT HalIntLock
EXPORT HalIntUnLock
EXPORT HalIntRestore
EXPORT ArchIntLock
EXPORT ArchIntUnLock
EXPORT ArchIntRestore
EXPORT HalStartToRun
EXPORT HalTaskSchedule
EXPORT ArchTaskSchedule
EXPORT HalPendSV
IMPORT OsSchedTaskSwitch
IMPORT g_losTask
@@ -90,21 +90,21 @@ __DisabledFPU
BX R6
HalIntLock
ArchIntLock
MRS R0, PRIMASK
CPSID I
BX LR
HalIntUnLock
ArchIntUnLock
MRS R0, PRIMASK
CPSIE I
BX LR
HalIntRestore
ArchIntRestore
MSR PRIMASK, R0
BX LR
HalTaskSchedule
ArchTaskSchedule
LDR R0, =OS_NVIC_INT_CTRL
LDR R1, =OS_NVIC_PENDSVSET
STR R1, [R0]
arch/arm/cortex-m4/iar/los_interrupt.c
+13 -13
View File
@@ -57,7 +57,7 @@ LITE_OS_SEC_VEC
*/
STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
@@ -120,7 +120,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
return __get_IPSR();
}
inline UINT32 HalIsIntActive(VOID)
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
@@ -175,7 +175,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
HalPreInterruptHandler(hwiIndex);
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
@@ -195,7 +195,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
}
/* ****************************************************************************
Function : HalHwiCreate
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
@@ -205,11 +205,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
{
UINT32 intSave;
@@ -230,7 +230,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
intSave = LOS_IntLock();
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(hwiNum, handler, arg);
#else
OsSetVector(hwiNum, handler);
@@ -244,13 +244,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
/* ****************************************************************************
Function : HalHwiDelete
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
@@ -484,7 +484,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
HalSysExit();
ArchSysExit();
}
/* ****************************************************************************
arch/arm/cortex-m4/iar/los_mpu.c
+17 -17
View File
@@ -49,22 +49,22 @@ typedef enum {
MPU_AP_RO_USER_RO = 0x6, /* Privileged:Read-only Unprivileged:Read-only */
} MpuApConfig;
VOID HalMpuEnable(UINT32 defaultRegionEnable)
VOID ArchMpuEnable(UINT32 defaultRegionEnable)
{
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
MPU->CTRL = (MPU_CTRL_ENABLE_Msk | ((defaultRegionEnable << MPU_CTRL_PRIVDEFENA_Pos) & MPU_CTRL_PRIVDEFENA_Msk));
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
__DSB();
__ISB();
HalIntRestore(intSave);
ArchIntRestore(intSave);
}
VOID HalMpuDisable(VOID)
VOID ArchMpuDisable(VOID)
{
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
MPU->CTRL = 0;
__DSB();
__ISB();
HalIntRestore(intSave);
ArchIntRestore(intSave);
}
STATIC VOID HalMpuRASRAddMemAttr(MPU_CFG_PARA *para, UINT32 *RASR)
@@ -147,7 +147,7 @@ STATIC UINT32 HalMpuGetRASR(UINT32 encodeSize, MPU_CFG_PARA *para)
return RASR;
}
UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
{
UINT32 RASR;
UINT32 RBAR;
@@ -175,9 +175,9 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
}
RBAR = para->baseAddr & MPU_RBAR_ADDR_Msk;
RASR = HalMpuGetRASR(encodeSize, para);
intSave = HalIntLock();
intSave = ArchIntLock();
if (g_regionNumBeUsed[regionId]) {
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_NOK;
}
MPU->RNR = RNR;
@@ -186,11 +186,11 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
__DSB();
__ISB();
g_regionNumBeUsed[regionId] = 1; /* Set mpu region used flag */
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_OK;
}
UINT32 HalMpuDisableRegion(UINT32 regionId)
UINT32 ArchMpuDisableRegion(UINT32 regionId)
{
volatile UINT32 type;
UINT32 intSave;
@@ -199,9 +199,9 @@ UINT32 HalMpuDisableRegion(UINT32 regionId)
return LOS_NOK;
}
intSave = HalIntLock();
intSave = ArchIntLock();
if (!g_regionNumBeUsed[regionId]) {
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_NOK;
}
@@ -213,20 +213,20 @@ UINT32 HalMpuDisableRegion(UINT32 regionId)
__ISB();
}
g_regionNumBeUsed[regionId] = 0; /* clear mpu region used flag */
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_OK;
}
INT32 HalMpuUnusedRegionGet(VOID)
INT32 ArchMpuUnusedRegionGet(VOID)
{
INT32 id;
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
for (id = 0; id < MPU_MAX_REGION_NUM; id++) {
if (!g_regionNumBeUsed[id]) {
break;
}
}
HalIntRestore(intSave);
ArchIntRestore(intSave);
if (id == MPU_MAX_REGION_NUM) {
return -1;
arch/arm/cortex-m4/iar/los_timer.c
+6 -6
View File
@@ -56,7 +56,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
@@ -74,7 +74,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
return LOS_OK;
}
WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
@@ -83,7 +83,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
WEAK UINT64 HalGetTickCycle(UINT32 *period)
WEAK UINT64 ArchGetTickCycle(UINT32 *period)
{
UINT32 hwCycle = 0;
UINT32 intSave = LOS_IntLock();
@@ -96,17 +96,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
return (UINT64)hwCycle;
}
WEAK VOID HalTickLock(VOID)
WEAK VOID ArchTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
WEAK VOID HalTickUnlock(VOID)
WEAK VOID ArchTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
UINT32 HalEnterSleep(VOID)
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
arch/arm/cortex-m7/gcc/los_arch_atomic.h
+3 -3
View File
@@ -57,7 +57,7 @@ extern "C" {
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
@@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v)
{
INT32 val = 0;
UINT32 status = 0;
@@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
arch/arm/cortex-m7/gcc/los_arch_interrupt.h
+7 -5
View File
@@ -309,7 +309,7 @@ extern UINT32 _BootVectors[];
*/
#define OS_EXC_SYS_TICK 15
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
@@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID);
VOID HalExcSvcCall(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
@@ -665,15 +664,18 @@ VOID HalHwiInit(VOID);
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
arch/arm/cortex-m7/gcc/los_arch_timer.h
+1 -1
View File
@@ -34,7 +34,7 @@
#include "los_config.h"
#include "los_compiler.h"
#include "los_context.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
arch/arm/cortex-m7/gcc/los_context.c
+8 -9
View File
@@ -36,17 +36,16 @@
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : HalArchInit
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
UINT32 ret;
HalHwiInit();
@@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
}
/* ****************************************************************************
Function : HalSysExit
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
@@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
}
/* ****************************************************************************
Function : HalTskStackInit
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
@@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = NULL;
errno_t result;
@@ -146,14 +145,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)HalSysExit;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
arch/arm/cortex-m7/gcc/los_dispatch.S
+12 -12
View File
@@ -86,9 +86,9 @@ HalStartToRun:
.fnend
.type HalIntLock, %function
.global HalIntLock
HalIntLock:
.type ArchIntLock, %function
.global ArchIntLock
ArchIntLock:
.fnstart
.cantunwind
@@ -97,9 +97,9 @@ HalIntLock:
BX LR
.fnend
.type HalIntUnLock, %function
.global HalIntUnLock
HalIntUnLock:
.type ArchIntUnLock, %function
.global ArchIntUnLock
ArchIntUnLock:
.fnstart
.cantunwind
@@ -108,9 +108,9 @@ HalIntUnLock:
BX LR
.fnend
.type HalIntRestore, %function
.global HalIntRestore
HalIntRestore:
.type ArchIntRestore, %function
.global ArchIntRestore
ArchIntRestore:
.fnstart
.cantunwind
@@ -118,9 +118,9 @@ HalIntRestore:
BX LR
.fnend
.type HalTaskSchedule, %function
.global HalTaskSchedule
HalTaskSchedule:
.type ArchTaskSchedule, %function
.global ArchTaskSchedule
ArchTaskSchedule:
.fnstart
.cantunwind
arch/arm/cortex-m7/gcc/los_interrupt.c
+13 -13
View File
@@ -51,7 +51,7 @@ UINT32 g_intCount = 0;
*/
STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
@@ -109,7 +109,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
return __get_IPSR();
}
inline UINT32 HalIsIntActive(VOID)
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
@@ -164,7 +164,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
HalPreInterruptHandler(hwiIndex);
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
@@ -184,7 +184,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
}
/* ****************************************************************************
Function : HalHwiCreate
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
@@ -194,11 +194,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
{
UINT32 intSave;
@@ -219,7 +219,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
intSave = LOS_IntLock();
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(hwiNum, handler, arg);
#else
OsSetVector(hwiNum, handler);
@@ -233,13 +233,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
/* ****************************************************************************
Function : HalHwiDelete
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
@@ -473,7 +473,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
HalSysExit();
ArchSysExit();
}
/* ****************************************************************************
arch/arm/cortex-m7/gcc/los_mpu.c
+17 -17
View File
@@ -49,22 +49,22 @@ typedef enum {
MPU_AP_RO_USER_RO = 0x6, /* Privileged:Read-only Unprivileged:Read-only */
} MpuApConfig;
VOID HalMpuEnable(UINT32 defaultRegionEnable)
VOID ArchMpuEnable(UINT32 defaultRegionEnable)
{
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
MPU->CTRL = (MPU_CTRL_ENABLE_Msk | ((defaultRegionEnable << MPU_CTRL_PRIVDEFENA_Pos) & MPU_CTRL_PRIVDEFENA_Msk));
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
__DSB();
__ISB();
HalIntRestore(intSave);
ArchIntRestore(intSave);
}
VOID HalMpuDisable(VOID)
VOID ArchMpuDisable(VOID)
{
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
MPU->CTRL = 0;
__DSB();
__ISB();
HalIntRestore(intSave);
ArchIntRestore(intSave);
}
STATIC VOID HalMpuRASRAddMemAttr(MPU_CFG_PARA *para, UINT32 *RASR)
@@ -147,7 +147,7 @@ STATIC UINT32 HalMpuGetRASR(UINT32 encodeSize, MPU_CFG_PARA *para)
return RASR;
}
UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
{
UINT32 RASR;
UINT32 RBAR;
@@ -175,9 +175,9 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
}
RBAR = para->baseAddr & MPU_RBAR_ADDR_Msk;
RASR = HalMpuGetRASR(encodeSize, para);
intSave = HalIntLock();
intSave = ArchIntLock();
if (g_regionNumBeUsed[regionId]) {
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_NOK;
}
MPU->RNR = RNR;
@@ -186,11 +186,11 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
__DSB();
__ISB();
g_regionNumBeUsed[regionId] = 1; /* Set mpu region used flag */
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_OK;
}
UINT32 HalMpuDisableRegion(UINT32 regionId)
UINT32 ArchMpuDisableRegion(UINT32 regionId)
{
volatile UINT32 type;
UINT32 intSave;
@@ -199,9 +199,9 @@ UINT32 HalMpuDisableRegion(UINT32 regionId)
return LOS_NOK;
}
intSave = HalIntLock();
intSave = ArchIntLock();
if (!g_regionNumBeUsed[regionId]) {
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_NOK;
}
@@ -213,20 +213,20 @@ UINT32 HalMpuDisableRegion(UINT32 regionId)
__ISB();
}
g_regionNumBeUsed[regionId] = 0; /* clear mpu region used flag */
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_OK;
}
INT32 HalMpuUnusedRegionGet(VOID)
INT32 ArchMpuUnusedRegionGet(VOID)
{
INT32 id;
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
for (id = 0; id < MPU_MAX_REGION_NUM; id++) {
if (!g_regionNumBeUsed[id]) {
break;
}
}
HalIntRestore(intSave);
ArchIntRestore(intSave);
if (id == MPU_MAX_REGION_NUM) {
return -1;
arch/arm/cortex-m7/gcc/los_timer.c
+6 -6
View File
@@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
@@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
return LOS_OK;
}
WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
@@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
WEAK UINT64 HalGetTickCycle(UINT32 *period)
WEAK UINT64 ArchGetTickCycle(UINT32 *period)
{
UINT32 hwCycle = 0;
UINT32 intSave = LOS_IntLock();
@@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
return (UINT64)hwCycle;
}
WEAK VOID HalTickLock(VOID)
WEAK VOID ArchTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
WEAK VOID HalTickUnlock(VOID)
WEAK VOID ArchTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
UINT32 HalEnterSleep(VOID)
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();
arch/arm/cortex-m7/iar/los_arch_atomic.h
+3 -3
View File
@@ -57,7 +57,7 @@ extern "C" {
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val)
{
INT32 prevVal = 0;
UINT32 status = 0;
@@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v)
{
INT32 val = 0;
UINT32 status = 0;
@@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v)
* <ul><li>los_arch_atomic.h: the header file that contains the API declaration.</li></ul>
* @see
*/
STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal)
{
INT32 prevVal = 0;
UINT32 status = 0;
arch/arm/cortex-m7/iar/los_arch_interrupt.h
+7 -5
View File
@@ -309,7 +309,7 @@ extern UINT32 _BootVectors[];
*/
#define OS_EXC_SYS_TICK 15
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
/* *
* @ingroup los_arch_interrupt
* Set interrupt vector table.
@@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID);
VOID HalExcSvcCall(VOID);
VOID HalHwiInit(VOID);
/**
* @ingroup los_exc
* Cortex-M exception types: An error occurred while the bus status register was being pushed.
@@ -665,15 +664,18 @@ VOID HalHwiInit(VOID);
*
*/
typedef struct TagExcInfo {
/**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
/**< Exception occurrence phase: 0 means that an exception occurs in initialization,
* 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
UINT16 phase;
/**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
UINT16 type;
/**< If the exact address access error indicates the wrong access address when the exception occurred */
UINT32 faultAddr;
/**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
/**< An exception occurs in an interrupt, indicating the interrupt number.
* An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */
UINT32 thrdPid;
/**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */
/**< Number of nested exceptions. Currently only registered hook functions are supported
* when an exception is entered for the first time */
UINT16 nestCnt;
/**< reserve */
UINT16 reserved;
arch/arm/cortex-m7/iar/los_arch_timer.h
+1 -1
View File
@@ -34,7 +34,7 @@
#include "los_config.h"
#include "los_compiler.h"
#include "los_context.h"
#include "los_timer.h"
#ifdef __cplusplus
#if __cplusplus
arch/arm/cortex-m7/iar/los_context.c
+8 -9
View File
@@ -36,17 +36,16 @@
#include "los_task.h"
#include "los_sched.h"
#include "los_interrupt.h"
#include "los_arch_timer.h"
#include "los_debug.h"
/* ****************************************************************************
Function : HalArchInit
Function : ArchInit
Description : arch init function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID)
{
UINT32 ret;
HalHwiInit();
@@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID)
}
/* ****************************************************************************
Function : HalSysExit
Function : ArchSysExit
Description : Task exit function
Input : None
Output : None
Return : None
**************************************************************************** */
LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID)
{
LOS_IntLock();
while (1) {
@@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
}
/* ****************************************************************************
Function : HalTskStackInit
Function : ArchTskStackInit
Description : Task stack initialization function
Input : taskID --- TaskID
stackSize --- Total size of the stack
@@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID)
Output : None
Return : Context pointer
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack)
{
TaskContext *context = NULL;
errno_t result;
@@ -146,14 +145,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI
context->uwR2 = 0x02020202L;
context->uwR3 = 0x03030303L;
context->uwR12 = 0x12121212L;
context->uwLR = (UINT32)(UINTPTR)HalSysExit;
context->uwLR = (UINT32)(UINTPTR)ArchSysExit;
context->uwPC = (UINT32)(UINTPTR)OsTaskEntry;
context->uwxPSR = 0x01000000L;
return (VOID *)context;
}
LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID)
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();
OsSchedStart();
arch/arm/cortex-m7/iar/los_dispatch.S
+8 -8
View File
@@ -31,11 +31,11 @@
PRESERVE8
EXPORT HalIntLock
EXPORT HalIntUnLock
EXPORT HalIntRestore
EXPORT ArchIntLock
EXPORT ArchIntUnLock
EXPORT ArchIntRestore
EXPORT HalStartToRun
EXPORT HalTaskSchedule
EXPORT ArchTaskSchedule
EXPORT HalPendSV
IMPORT OsSchedTaskSwitch
IMPORT g_losTask
@@ -90,21 +90,21 @@ __DisabledFPU
BX R6
HalIntLock
ArchIntLock
MRS R0, PRIMASK
CPSID I
BX LR
HalIntUnLock
ArchIntUnLock
MRS R0, PRIMASK
CPSIE I
BX LR
HalIntRestore
ArchIntRestore
MSR PRIMASK, R0
BX LR
HalTaskSchedule
ArchTaskSchedule
LDR R0, =OS_NVIC_INT_CTRL
LDR R1, =OS_NVIC_PENDSVSET
STR R1, [R0]
arch/arm/cortex-m7/iar/los_interrupt.c
+13 -13
View File
@@ -53,7 +53,7 @@ UINT32 g_intCount = 0;
*/
STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
typedef struct {
HWI_PROC_FUNC pfnHandler;
@@ -116,7 +116,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID)
return __get_IPSR();
}
inline UINT32 HalIsIntActive(VOID)
inline UINT32 ArchIsIntActive(VOID)
{
return (g_intCount > 0);
}
@@ -171,7 +171,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
HalPreInterruptHandler(hwiIndex);
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
}
@@ -191,7 +191,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
}
/* ****************************************************************************
Function : HalHwiCreate
Function : ArchHwiCreate
Description : create hardware interrupt
Input : hwiNum --- hwi num to create
hwiPrio --- priority of the hwi
@@ -201,11 +201,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
HWI_PRIOR_T hwiPrio,
HWI_MODE_T mode,
HWI_PROC_FUNC handler,
HWI_ARG_T arg)
{
UINT32 intSave;
@@ -226,7 +226,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
intSave = LOS_IntLock();
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(hwiNum, handler, arg);
#else
OsSetVector(hwiNum, handler);
@@ -240,13 +240,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum,
}
/* ****************************************************************************
Function : HalHwiDelete
Function : ArchHwiDelete
Description : Delete hardware interrupt
Input : hwiNum --- hwi num to delete
Output : None
Return : LOS_OK on success or error code on failure
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum)
{
UINT32 intSave;
@@ -480,7 +480,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U
OsDoExcHook(EXC_INTERRUPT);
OsExcInfoDisplay(&g_excInfo);
HalSysExit();
ArchSysExit();
}
/* ****************************************************************************
arch/arm/cortex-m7/iar/los_mpu.c
+17 -17
View File
@@ -49,22 +49,22 @@ typedef enum {
MPU_AP_RO_USER_RO = 0x6, /* Privileged:Read-only Unprivileged:Read-only */
} MpuApConfig;
VOID HalMpuEnable(UINT32 defaultRegionEnable)
VOID ArchMpuEnable(UINT32 defaultRegionEnable)
{
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
MPU->CTRL = (MPU_CTRL_ENABLE_Msk | ((defaultRegionEnable << MPU_CTRL_PRIVDEFENA_Pos) & MPU_CTRL_PRIVDEFENA_Msk));
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
__DSB();
__ISB();
HalIntRestore(intSave);
ArchIntRestore(intSave);
}
VOID HalMpuDisable(VOID)
VOID ArchMpuDisable(VOID)
{
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
MPU->CTRL = 0;
__DSB();
__ISB();
HalIntRestore(intSave);
ArchIntRestore(intSave);
}
STATIC VOID HalMpuRASRAddMemAttr(MPU_CFG_PARA *para, UINT32 *RASR)
@@ -147,7 +147,7 @@ STATIC UINT32 HalMpuGetRASR(UINT32 encodeSize, MPU_CFG_PARA *para)
return RASR;
}
UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
{
UINT32 RASR;
UINT32 RBAR;
@@ -175,9 +175,9 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
}
RBAR = para->baseAddr & MPU_RBAR_ADDR_Msk;
RASR = HalMpuGetRASR(encodeSize, para);
intSave = HalIntLock();
intSave = ArchIntLock();
if (g_regionNumBeUsed[regionId]) {
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_NOK;
}
MPU->RNR = RNR;
@@ -186,11 +186,11 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para)
__DSB();
__ISB();
g_regionNumBeUsed[regionId] = 1; /* Set mpu region used flag */
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_OK;
}
UINT32 HalMpuDisableRegion(UINT32 regionId)
UINT32 ArchMpuDisableRegion(UINT32 regionId)
{
volatile UINT32 type;
UINT32 intSave;
@@ -199,9 +199,9 @@ UINT32 HalMpuDisableRegion(UINT32 regionId)
return LOS_NOK;
}
intSave = HalIntLock();
intSave = ArchIntLock();
if (!g_regionNumBeUsed[regionId]) {
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_NOK;
}
@@ -213,20 +213,20 @@ UINT32 HalMpuDisableRegion(UINT32 regionId)
__ISB();
}
g_regionNumBeUsed[regionId] = 0; /* clear mpu region used flag */
HalIntRestore(intSave);
ArchIntRestore(intSave);
return LOS_OK;
}
INT32 HalMpuUnusedRegionGet(VOID)
INT32 ArchMpuUnusedRegionGet(VOID)
{
INT32 id;
UINT32 intSave = HalIntLock();
UINT32 intSave = ArchIntLock();
for (id = 0; id < MPU_MAX_REGION_NUM; id++) {
if (!g_regionNumBeUsed[id]) {
break;
}
}
HalIntRestore(intSave);
ArchIntRestore(intSave);
if (id == MPU_MAX_REGION_NUM) {
return -1;
arch/arm/cortex-m7/iar/los_timer.c
+6 -6
View File
@@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
@@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
return LOS_OK;
}
WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
WEAK VOID ArchSysTickReload(UINT64 nextResponseTime)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
@@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
WEAK UINT64 HalGetTickCycle(UINT32 *period)
WEAK UINT64 ArchGetTickCycle(UINT32 *period)
{
UINT32 hwCycle = 0;
UINT32 intSave = LOS_IntLock();
@@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period)
return (UINT64)hwCycle;
}
WEAK VOID HalTickLock(VOID)
WEAK VOID ArchTickLock(VOID)
{
SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk;
}
WEAK VOID HalTickUnlock(VOID)
WEAK VOID ArchTickUnlock(VOID)
{
SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk;
}
UINT32 HalEnterSleep(VOID)
UINT32 ArchEnterSleep(VOID)
{
__DSB();
__WFI();