diff --git a/arch/arm/arm9/gcc/los_arch_atomic.h b/arch/arm/arm9/gcc/los_arch_atomic.h index 19a6a1af..9a8a0adc 100644 --- a/arch/arm/arm9/gcc/los_arch_atomic.h +++ b/arch/arm/arm9/gcc/los_arch_atomic.h @@ -45,7 +45,8 @@ extern "C" { * @brief Atomic exchange for 32-bit variable. * * @par Description: - * This API is used to implement the atomic exchange for 32-bit variable and return the previous value of the atomic variable. + * This API is used to implement the atomic exchange for 32-bit variable + * and return the previous value of the atomic variable. * @attention * * @@ -57,7 +58,7 @@ extern "C" { * * @see */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) +STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val) { return -1; } @@ -81,7 +82,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) * * @see */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) +STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v) { return -1; } @@ -105,7 +106,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) * * @see */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) { return FALSE; } diff --git a/arch/arm/arm9/gcc/los_arch_interrupt.h b/arch/arm/arm9/gcc/los_arch_interrupt.h index da76a53a..bf8a2272 100644 --- a/arch/arm/arm9/gcc/los_arch_interrupt.h +++ b/arch/arm/arm9/gcc/los_arch_interrupt.h @@ -171,7 +171,7 @@ extern UINT32 g_intCount; */ #define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_hwi * Set interrupt vector table. @@ -322,15 +322,18 @@ VOID HalHwiInit(VOID); * */ typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ + /**< Exception occurrence phase: 0 means that an exception occurs in initialization, + * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ UINT16 phase; /**< Exception type. When exceptions occur, check the numbers 1 - 19 listed above */ UINT16 type; /**< If the exact address access error indicates the wrong access address when the exception occurred */ UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ + /**< An exception occurs in an interrupt, indicating the interrupt number. + * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ + /**< Number of nested exceptions. Currently only registered hook functions are supported + * when an exception is entered for the first time */ UINT16 nestCnt; /**< reserve */ UINT16 reserved; diff --git a/arch/arm/arm9/gcc/los_arch_timer.h b/arch/arm/arm9/gcc/los_arch_timer.h index 97ec28d1..4bf043fb 100644 --- a/arch/arm/arm9/gcc/los_arch_timer.h +++ b/arch/arm/arm9/gcc/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/arm/arm9/gcc/los_context.c b/arch/arm/arm9/gcc/los_context.c index c4715162..2417c95e 100644 --- a/arch/arm/arm9/gcc/los_context.c +++ b/arch/arm/arm9/gcc/los_context.c @@ -36,17 +36,16 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_debug.h" /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; LosTaskCB *taskCB = OS_TCB_FROM_TID(taskID); @@ -109,7 +108,7 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->r11 = 0x11111111L; context->r12 = 0x12121212L; context->sp = (UINTPTR)topStack + stackSize; - context->lr = (UINTPTR)HalSysExit; + context->lr = (UINTPTR)ArchSysExit; if ((UINTPTR)taskCB->taskEntry & 0x01) { context->pc = (UINTPTR)OsTaskEntryThumb; @@ -122,7 +121,7 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); @@ -131,7 +130,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) return LOS_OK; /* never return */ } -LITE_OS_SEC_TEXT_INIT VOID HalTaskSchedule(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchTaskSchedule(VOID) { __asm__ __volatile__("swi 0"); } diff --git a/arch/arm/arm9/gcc/los_interrupt.c b/arch/arm/arm9/gcc/los_interrupt.c index 06d7d929..f6e1fdbd 100644 --- a/arch/arm/arm9/gcc/los_interrupt.c +++ b/arch/arm/arm9/gcc/los_interrupt.c @@ -64,7 +64,7 @@ ExcInfo g_excInfo = {0}; */ STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -126,7 +126,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return (31 - CLZ(status)); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -181,7 +181,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -201,7 +201,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -211,11 +211,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINT32 intSave; @@ -232,7 +232,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -244,13 +244,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -414,7 +414,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* **************************************************************************** @@ -431,7 +431,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) UINT32 val; for (val = OS_SYS_VECTOR_CNT; val < OS_VECTOR_CNT; val++) { -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) g_hwiForm[val].pfnHook = HalHwiDefaultHandler; g_hwiForm[val].uwParam = 0; #else @@ -447,7 +447,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) return; } -UINT32 HalIntLock(VOID) +UINT32 ArchIntLock(VOID) { UINT32 ret; UINT32 temp; @@ -461,12 +461,12 @@ UINT32 HalIntLock(VOID) return ret; } -VOID HalIntRestore(UINT32 intSave) +VOID ArchIntRestore(UINT32 intSave) { __asm__ __volatile__("MSR CPSR_c, %0" : : "r"(intSave)); } -UINT32 HalIntUnLock(VOID) +UINT32 ArchIntUnLock(VOID) { UINT32 intSave; diff --git a/arch/arm/arm9/gcc/los_timer.c b/arch/arm/arm9/gcc/los_timer.c index 37062285..932d6e76 100644 --- a/arch/arm/arm9/gcc/los_timer.c +++ b/arch/arm/arm9/gcc/los_timer.c @@ -77,7 +77,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) value |= OS_TIMER_ENABLE; // Enable timer. WRITE_UINT32(value, OS_TIMER_CTL_REG_ADDR); - (VOID)HalHwiCreate(OS_TIMER_IRQ_NUM, 0, 0, (HWI_PROC_FUNC)handler, 0); + (VOID)ArchHwiCreate(OS_TIMER_IRQ_NUM, 0, 0, (HWI_PROC_FUNC)handler, 0); LOS_IntRestore(intSave); return LOS_OK; @@ -94,15 +94,15 @@ STATIC VOID HalClockIrqClear(VOID) } while (status & mask); } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { - HalTickLock(); + ArchTickLock(); WRITE_UINT32(nextResponseTime, OS_TIMER_PERIOD_REG_ADDR); HalClockIrqClear(); - HalTickUnlock(); + ArchTickUnlock(); } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 val; @@ -118,7 +118,7 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)val; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { UINT32 value; @@ -129,7 +129,7 @@ WEAK VOID HalTickLock(VOID) WRITE_UINT32(value, OS_TIMER_CTL_REG_ADDR); } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { UINT32 value; @@ -140,7 +140,7 @@ WEAK VOID HalTickUnlock(VOID) WRITE_UINT32(value, OS_TIMER_CTL_REG_ADDR); } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { dsb(); wfi(); diff --git a/arch/arm/cortex-m3/keil/los_arch_atomic.h b/arch/arm/cortex-m3/keil/los_arch_atomic.h index 74ac4ff7..12ed5bc8 100644 --- a/arch/arm/cortex-m3/keil/los_arch_atomic.h +++ b/arch/arm/cortex-m3/keil/los_arch_atomic.h @@ -57,7 +57,7 @@ extern "C" { * * @see */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) +STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val) { INT32 prevVal = 0; UINT32 status = 0; @@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) * * @see */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) +STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v) { INT32 val = 0; UINT32 status = 0; @@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) * * @see */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) { INT32 prevVal = 0; UINT32 status = 0; diff --git a/arch/arm/cortex-m3/keil/los_arch_interrupt.h b/arch/arm/cortex-m3/keil/los_arch_interrupt.h index 5980054d..2f0c67ea 100644 --- a/arch/arm/cortex-m3/keil/los_arch_interrupt.h +++ b/arch/arm/cortex-m3/keil/los_arch_interrupt.h @@ -309,7 +309,7 @@ extern UINT32 _BootVectors[]; */ #define OS_EXC_SYS_TICK 15 -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_arch_interrupt * Set interrupt vector table. @@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID); VOID HalExcSvcCall(VOID); VOID HalHwiInit(VOID); - /** * @ingroup los_exc * Cortex-M exception types: An error occurred while the bus status register was being pushed. @@ -665,15 +664,18 @@ VOID HalHwiInit(VOID); * */ typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ + /**< Exception occurrence phase: 0 means that an exception occurs in initialization, + * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ UINT16 phase; /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */ UINT16 type; /**< If the exact address access error indicates the wrong access address when the exception occurred */ UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ + /**< An exception occurs in an interrupt, indicating the interrupt number. + * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ + /**< Number of nested exceptions. Currently only registered hook functions are supported + * when an exception is entered for the first time */ UINT16 nestCnt; /**< reserve */ UINT16 reserved; diff --git a/arch/arm/cortex-m3/keil/los_arch_timer.h b/arch/arm/cortex-m3/keil/los_arch_timer.h index 97ec28d1..4bf043fb 100644 --- a/arch/arm/cortex-m3/keil/los_arch_timer.h +++ b/arch/arm/cortex-m3/keil/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/arm/cortex-m3/keil/los_context.c b/arch/arm/cortex-m3/keil/los_context.c index cf452530..59bd4272 100644 --- a/arch/arm/cortex-m3/keil/los_context.c +++ b/arch/arm/cortex-m3/keil/los_context.c @@ -37,17 +37,16 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_debug.h" /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -59,13 +58,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -73,7 +72,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -81,7 +80,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -147,14 +146,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->uwR2 = 0x02020202L; context->uwR3 = 0x03030303L; context->uwR12 = 0x12121212L; - context->uwLR = (UINT32)(UINTPTR)HalSysExit; + context->uwLR = (UINT32)(UINTPTR)ArchSysExit; context->uwPC = (UINT32)(UINTPTR)OsTaskEntry; context->uwxPSR = 0x01000000L; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); diff --git a/arch/arm/cortex-m3/keil/los_dispatch.S b/arch/arm/cortex-m3/keil/los_dispatch.S index b4d1c254..dd82a2e7 100644 --- a/arch/arm/cortex-m3/keil/los_dispatch.S +++ b/arch/arm/cortex-m3/keil/los_dispatch.S @@ -31,11 +31,11 @@ PRESERVE8 - EXPORT HalIntLock - EXPORT HalIntUnLock - EXPORT HalIntRestore + EXPORT ArchIntLock + EXPORT ArchIntUnLock + EXPORT ArchIntRestore EXPORT HalStartToRun - EXPORT HalTaskSchedule + EXPORT ArchTaskSchedule EXPORT HalPendSV IMPORT OsSchedTaskSwitch IMPORT g_losTask @@ -77,21 +77,21 @@ HalStartToRun BX R6 -HalIntLock +ArchIntLock MRS R0, PRIMASK CPSID I BX LR -HalIntUnLock +ArchIntUnLock MRS R0, PRIMASK CPSIE I BX LR -HalIntRestore +ArchIntRestore MSR PRIMASK, R0 BX LR -HalTaskSchedule +ArchTaskSchedule LDR R0, =OS_NVIC_INT_CTRL LDR R1, =OS_NVIC_PENDSVSET STR R1, [R0] diff --git a/arch/arm/cortex-m3/keil/los_interrupt.c b/arch/arm/cortex-m3/keil/los_interrupt.c index 352b39eb..41f3544f 100644 --- a/arch/arm/cortex-m3/keil/los_interrupt.c +++ b/arch/arm/cortex-m3/keil/los_interrupt.c @@ -56,7 +56,7 @@ LITE_OS_SEC_VEC */ STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -119,7 +119,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return __get_IPSR(); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -174,7 +174,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -194,7 +194,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -204,11 +204,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINT32 intSave; @@ -229,7 +229,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -243,13 +243,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -483,7 +483,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* **************************************************************************** diff --git a/arch/arm/cortex-m3/keil/los_timer.c b/arch/arm/cortex-m3/keil/los_timer.c index ad59cff8..eb979a6d 100644 --- a/arch/arm/cortex-m3/keil/los_timer.c +++ b/arch/arm/cortex-m3/keil/los_timer.c @@ -56,7 +56,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) } #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler); @@ -74,7 +74,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ @@ -83,7 +83,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 hwCycle = 0; UINT32 intSave = LOS_IntLock(); @@ -96,17 +96,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)hwCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { __DSB(); __WFI(); diff --git a/arch/arm/cortex-m33/gcc/NTZ/los_arch_atomic.h b/arch/arm/cortex-m33/gcc/NTZ/los_arch_atomic.h index 74ac4ff7..12ed5bc8 100755 --- a/arch/arm/cortex-m33/gcc/NTZ/los_arch_atomic.h +++ b/arch/arm/cortex-m33/gcc/NTZ/los_arch_atomic.h @@ -57,7 +57,7 @@ extern "C" { * * @see */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) +STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val) { INT32 prevVal = 0; UINT32 status = 0; @@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) * * @see */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) +STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v) { INT32 val = 0; UINT32 status = 0; @@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) * * @see */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) { INT32 prevVal = 0; UINT32 status = 0; diff --git a/arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h b/arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h index a9e4294f..99c53032 100755 --- a/arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h +++ b/arch/arm/cortex-m33/gcc/NTZ/los_arch_interrupt.h @@ -309,7 +309,7 @@ extern UINT32 _BootVectors[]; */ #define OS_EXC_SYS_TICK 15 -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_arch_interrupt * Set interrupt vector table. @@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID); VOID HalSVCHandler(VOID); VOID HalHwiInit(VOID); - /** * @ingroup los_exc * Cortex-M exception types: An error occurred while the bus status register was being pushed. @@ -665,15 +664,18 @@ VOID HalHwiInit(VOID); * */ typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ + /**< Exception occurrence phase: 0 means that an exception occurs in initialization, + * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ UINT16 phase; /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */ UINT16 type; /**< If the exact address access error indicates the wrong access address when the exception occurred */ UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ + /**< An exception occurs in an interrupt, indicating the interrupt number. + * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ + /**< Number of nested exceptions. Currently only registered hook functions are supported + * when an exception is entered for the first time */ UINT16 nestCnt; /**< reserve */ UINT16 reserved; diff --git a/arch/arm/cortex-m33/gcc/NTZ/los_arch_timer.h b/arch/arm/cortex-m33/gcc/NTZ/los_arch_timer.h old mode 100755 new mode 100644 index 97ec28d1..4bf043fb --- a/arch/arm/cortex-m33/gcc/NTZ/los_arch_timer.h +++ b/arch/arm/cortex-m33/gcc/NTZ/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/arm/cortex-m33/gcc/NTZ/los_context.c b/arch/arm/cortex-m33/gcc/NTZ/los_context.c index 67f74f70..f4de61f7 100755 --- a/arch/arm/cortex-m33/gcc/NTZ/los_context.c +++ b/arch/arm/cortex-m33/gcc/NTZ/los_context.c @@ -36,17 +36,16 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_debug.h" /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -146,14 +145,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->uwR2 = 0x02020202L; context->uwR3 = 0x03030303L; context->uwR12 = 0x12121212L; - context->uwLR = (UINT32)(UINTPTR)HalSysExit; + context->uwLR = (UINT32)(UINTPTR)ArchSysExit; context->uwPC = (UINT32)(UINTPTR)OsTaskEntry; context->uwxPSR = 0x01000000L; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); diff --git a/arch/arm/cortex-m33/gcc/NTZ/los_dispatch.S b/arch/arm/cortex-m33/gcc/NTZ/los_dispatch.S index 965e1eee..e6134d1f 100755 --- a/arch/arm/cortex-m33/gcc/NTZ/los_dispatch.S +++ b/arch/arm/cortex-m33/gcc/NTZ/los_dispatch.S @@ -94,9 +94,9 @@ __DisabledFPU: .fnend - .type HalIntLock, %function - .global HalIntLock -HalIntLock: + .type ArchIntLock, %function + .global ArchIntLock +ArchIntLock: .fnstart .cantunwind @@ -105,9 +105,9 @@ HalIntLock: BX LR .fnend - .type HalIntUnLock, %function - .global HalIntUnLock -HalIntUnLock: + .type ArchIntUnLock, %function + .global ArchIntUnLock +ArchIntUnLock: .fnstart .cantunwind @@ -116,9 +116,9 @@ HalIntUnLock: BX LR .fnend - .type HalIntRestore, %function - .global HalIntRestore -HalIntRestore: + .type ArchIntRestore, %function + .global ArchIntRestore +ArchIntRestore: .fnstart .cantunwind @@ -126,9 +126,9 @@ HalIntRestore: BX LR .fnend - .type HalTaskSchedule, %function - .global HalTaskSchedule -HalTaskSchedule: + .type ArchTaskSchedule, %function + .global ArchTaskSchedule +ArchTaskSchedule: .fnstart .cantunwind diff --git a/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c b/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c index 6666583d..f0378c8f 100755 --- a/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c +++ b/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c @@ -51,7 +51,7 @@ UINT32 g_intCount = 0; */ STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -109,7 +109,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return __get_IPSR(); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -164,7 +164,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -184,7 +184,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -194,11 +194,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINT32 intSave; @@ -219,7 +219,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -233,13 +233,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -473,7 +473,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* **************************************************************************** diff --git a/arch/arm/cortex-m33/gcc/NTZ/los_timer.c b/arch/arm/cortex-m33/gcc/NTZ/los_timer.c index 66e1f0de..a5dd7865 100755 --- a/arch/arm/cortex-m33/gcc/NTZ/los_timer.c +++ b/arch/arm/cortex-m33/gcc/NTZ/los_timer.c @@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) } #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler); @@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ @@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 hwCycle = 0; UINT32 intSave = LOS_IntLock(); @@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)hwCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { __DSB(); __WFI(); diff --git a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_atomic.h b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_atomic.h index 74ac4ff7..12ed5bc8 100755 --- a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_atomic.h +++ b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_atomic.h @@ -57,7 +57,7 @@ extern "C" { * * @see */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) +STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val) { INT32 prevVal = 0; UINT32 status = 0; @@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) * * @see */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) +STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v) { INT32 val = 0; UINT32 status = 0; @@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) * * @see */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) { INT32 prevVal = 0; UINT32 status = 0; diff --git a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h index a9e4294f..99c53032 100755 --- a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h +++ b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_interrupt.h @@ -309,7 +309,7 @@ extern UINT32 _BootVectors[]; */ #define OS_EXC_SYS_TICK 15 -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_arch_interrupt * Set interrupt vector table. @@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID); VOID HalSVCHandler(VOID); VOID HalHwiInit(VOID); - /** * @ingroup los_exc * Cortex-M exception types: An error occurred while the bus status register was being pushed. @@ -665,15 +664,18 @@ VOID HalHwiInit(VOID); * */ typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ + /**< Exception occurrence phase: 0 means that an exception occurs in initialization, + * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ UINT16 phase; /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */ UINT16 type; /**< If the exact address access error indicates the wrong access address when the exception occurred */ UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ + /**< An exception occurs in an interrupt, indicating the interrupt number. + * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ + /**< Number of nested exceptions. Currently only registered hook functions are supported + * when an exception is entered for the first time */ UINT16 nestCnt; /**< reserve */ UINT16 reserved; diff --git a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_timer.h b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_timer.h old mode 100755 new mode 100644 index 97ec28d1..4bf043fb --- a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_timer.h +++ b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_context.c b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_context.c index 306e580e..372391d0 100755 --- a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_context.c +++ b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_context.c @@ -36,17 +36,16 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_debug.h" /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -150,14 +149,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->uwR2 = 0x02020202L; context->uwR3 = 0x03030303L; context->uwR12 = 0x12121212L; - context->uwLR = (UINT32)(UINTPTR)HalSysExit; + context->uwLR = (UINT32)(UINTPTR)ArchSysExit; context->uwPC = (UINT32)(UINTPTR)OsTaskEntry; context->uwxPSR = 0x01000000L; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); diff --git a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_dispatch.S b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_dispatch.S index 08ac871e..77e9673d 100644 --- a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_dispatch.S +++ b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_dispatch.S @@ -76,9 +76,9 @@ __DisabledFPU1: CPSIE I BX R3 - .type HalIntLock, %function - .global HalIntLock -HalIntLock: + .type ArchIntLock, %function + .global ArchIntLock +ArchIntLock: .fnstart .cantunwind @@ -87,9 +87,9 @@ HalIntLock: BX LR .fnend - .type HalIntUnLock, %function - .global HalIntUnLock -HalIntUnLock: + .type ArchIntUnLock, %function + .global ArchIntUnLock +ArchIntUnLock: .fnstart .cantunwind @@ -98,9 +98,9 @@ HalIntUnLock: BX LR .fnend - .type HalIntRestore, %function - .global HalIntRestore -HalIntRestore: + .type ArchIntRestore, %function + .global ArchIntRestore +ArchIntRestore: .fnstart .cantunwind @@ -108,9 +108,9 @@ HalIntRestore: BX LR .fnend - .type HalTaskSchedule, %function - .global HalTaskSchedule -HalTaskSchedule: + .type ArchTaskSchedule, %function + .global ArchTaskSchedule +ArchTaskSchedule: .fnstart .cantunwind diff --git a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c index 6666583d..f0378c8f 100755 --- a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c +++ b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c @@ -51,7 +51,7 @@ UINT32 g_intCount = 0; */ STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -109,7 +109,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return __get_IPSR(); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -164,7 +164,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -184,7 +184,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -194,11 +194,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINT32 intSave; @@ -219,7 +219,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -233,13 +233,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -473,7 +473,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* **************************************************************************** diff --git a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_timer.c b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_timer.c index a8deecd9..52a8e0f0 100755 --- a/arch/arm/cortex-m33/gcc/TZ/non_secure/los_timer.c +++ b/arch/arm/cortex-m33/gcc/TZ/non_secure/los_timer.c @@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) } #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler); @@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ @@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 hwCycle = 0； UINT32 intSave = LOS_IntLock(); @@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)hwCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { __DSB(); __WFI(); diff --git a/arch/arm/cortex-m33/iar/NTZ/los_arch_atomic.h b/arch/arm/cortex-m33/iar/NTZ/los_arch_atomic.h index 2ba9a8e5..25a1ed52 100644 --- a/arch/arm/cortex-m33/iar/NTZ/los_arch_atomic.h +++ b/arch/arm/cortex-m33/iar/NTZ/los_arch_atomic.h @@ -57,7 +57,7 @@ extern "C" { * * @see */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) +STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val) { INT32 prevVal = 0; UINT32 status = 0; @@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) * * @see */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) +STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v) { INT32 val = 0; UINT32 status = 0; @@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) * * @see */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) { INT32 prevVal = 0; UINT32 status = 0; diff --git a/arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h b/arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h index 0fe8a78a..f7cab4fe 100644 --- a/arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h +++ b/arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h @@ -309,7 +309,7 @@ extern UINT32 _BootVectors[]; */ #define OS_EXC_SYS_TICK 15 -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_hwi * Set interrupt vector table. @@ -529,7 +529,6 @@ VOID HalExcUsageFault(VOID); VOID HalSVCHandler(VOID); VOID HalHwiInit(VOID); - /** * @ingroup los_exc * Cortex-M exception types: An error occurred while the bus status register was being pushed. @@ -666,15 +665,18 @@ VOID HalHwiInit(VOID); * */ typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ + /**< Exception occurrence phase: 0 means that an exception occurs in initialization, + * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ UINT16 phase; /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */ UINT16 type; /**< If the exact address access error indicates the wrong access address when the exception occurred */ UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ + /**< An exception occurs in an interrupt, indicating the interrupt number. + * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ + /**< Number of nested exceptions. Currently only registered hook functions are supported + * when an exception is entered for the first time */ UINT16 nestCnt; /**< reserve */ UINT16 reserved; diff --git a/arch/arm/cortex-m33/iar/NTZ/los_arch_timer.h b/arch/arm/cortex-m33/iar/NTZ/los_arch_timer.h index 48e48d8d..c4f9abb2 100644 --- a/arch/arm/cortex-m33/iar/NTZ/los_arch_timer.h +++ b/arch/arm/cortex-m33/iar/NTZ/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/arm/cortex-m33/iar/NTZ/los_context.c b/arch/arm/cortex-m33/iar/NTZ/los_context.c index b058362c..93ee7630 100644 --- a/arch/arm/cortex-m33/iar/NTZ/los_context.c +++ b/arch/arm/cortex-m33/iar/NTZ/los_context.c @@ -36,17 +36,16 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_debug.h" /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -146,14 +145,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->uwR2 = 0x02020202L; context->uwR3 = 0x03030303L; context->uwR12 = 0x12121212L; - context->uwLR = (UINT32)(UINTPTR)HalSysExit; + context->uwLR = (UINT32)(UINTPTR)ArchSysExit; context->uwPC = (UINT32)(UINTPTR)OsTaskEntry; context->uwxPSR = 0x01000000L; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); diff --git a/arch/arm/cortex-m33/iar/NTZ/los_dispatch.S b/arch/arm/cortex-m33/iar/NTZ/los_dispatch.S index 14198f9f..f8f0d188 100644 --- a/arch/arm/cortex-m33/iar/NTZ/los_dispatch.S +++ b/arch/arm/cortex-m33/iar/NTZ/los_dispatch.S @@ -31,11 +31,11 @@ PRESERVE8 - EXPORT HalIntLock - EXPORT HalIntUnLock - EXPORT HalIntRestore + EXPORT ArchIntLock + EXPORT ArchIntUnLock + EXPORT ArchIntRestore EXPORT HalStartToRun - EXPORT HalTaskSchedule + EXPORT ArchTaskSchedule EXPORT HalPendSV IMPORT OsSchedTaskSwitch IMPORT g_losTask @@ -90,21 +90,21 @@ __DisabledFPU BX R6 -HalIntLock +ArchIntLock MRS R0, PRIMASK CPSID I BX LR -HalIntUnLock +ArchIntUnLock MRS R0, PRIMASK CPSIE I BX LR -HalIntRestore +ArchIntRestore MSR PRIMASK, R0 BX LR -HalTaskSchedule +ArchTaskSchedule LDR R0, =OS_NVIC_INT_CTRL LDR R1, =OS_NVIC_PENDSVSET STR R1, [R0] diff --git a/arch/arm/cortex-m33/iar/NTZ/los_interrupt.c b/arch/arm/cortex-m33/iar/NTZ/los_interrupt.c index 40f75272..b12bb5ac 100644 --- a/arch/arm/cortex-m33/iar/NTZ/los_interrupt.c +++ b/arch/arm/cortex-m33/iar/NTZ/los_interrupt.c @@ -53,7 +53,7 @@ UINT32 g_intCount = 0; */ STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -116,7 +116,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return __get_IPSR(); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -173,7 +173,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -193,7 +193,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -203,11 +203,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINTPTR intSave; @@ -228,7 +228,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -242,13 +242,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -481,7 +481,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* **************************************************************************** diff --git a/arch/arm/cortex-m33/iar/NTZ/los_timer.c b/arch/arm/cortex-m33/iar/NTZ/los_timer.c index 8ed46258..26d5c5f6 100644 --- a/arch/arm/cortex-m33/iar/NTZ/los_timer.c +++ b/arch/arm/cortex-m33/iar/NTZ/los_timer.c @@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) } #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler); @@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ @@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 hwCycle = 0; UINTPTR intSave = LOS_IntLock(); @@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)hwCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { __DSB(); __WFI(); diff --git a/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_atomic.h b/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_atomic.h index 2ba9a8e5..25a1ed52 100644 --- a/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_atomic.h +++ b/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_atomic.h @@ -57,7 +57,7 @@ extern "C" { * * @see */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) +STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val) { INT32 prevVal = 0; UINT32 status = 0; @@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) * * @see */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) +STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v) { INT32 val = 0; UINT32 status = 0; @@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) * * @see */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) { INT32 prevVal = 0; UINT32 status = 0; diff --git a/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h b/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h index 0fe8a78a..f7cab4fe 100644 --- a/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h +++ b/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h @@ -309,7 +309,7 @@ extern UINT32 _BootVectors[]; */ #define OS_EXC_SYS_TICK 15 -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_hwi * Set interrupt vector table. @@ -529,7 +529,6 @@ VOID HalExcUsageFault(VOID); VOID HalSVCHandler(VOID); VOID HalHwiInit(VOID); - /** * @ingroup los_exc * Cortex-M exception types: An error occurred while the bus status register was being pushed. @@ -666,15 +665,18 @@ VOID HalHwiInit(VOID); * */ typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ + /**< Exception occurrence phase: 0 means that an exception occurs in initialization, + * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ UINT16 phase; /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */ UINT16 type; /**< If the exact address access error indicates the wrong access address when the exception occurred */ UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ + /**< An exception occurs in an interrupt, indicating the interrupt number. + * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ + /**< Number of nested exceptions. Currently only registered hook functions are supported + * when an exception is entered for the first time */ UINT16 nestCnt; /**< reserve */ UINT16 reserved; diff --git a/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_timer.h b/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_timer.h index 48e48d8d..c4f9abb2 100644 --- a/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_timer.h +++ b/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/arm/cortex-m33/iar/TZ/non_secure/los_context.c b/arch/arm/cortex-m33/iar/TZ/non_secure/los_context.c index 4aa333d8..50ce4ea0 100644 --- a/arch/arm/cortex-m33/iar/TZ/non_secure/los_context.c +++ b/arch/arm/cortex-m33/iar/TZ/non_secure/los_context.c @@ -36,17 +36,16 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_debug.h" /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -150,14 +149,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->uwR2 = 0x02020202L; context->uwR3 = 0x03030303L; context->uwR12 = 0x12121212L; - context->uwLR = (UINT32)(UINTPTR)HalSysExit; + context->uwLR = (UINT32)(UINTPTR)ArchSysExit; context->uwPC = (UINT32)(UINTPTR)OsTaskEntry; context->uwxPSR = 0x01000000L; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); diff --git a/arch/arm/cortex-m33/iar/TZ/non_secure/los_dispatch.S b/arch/arm/cortex-m33/iar/TZ/non_secure/los_dispatch.S index f786e0b4..03a8696f 100644 --- a/arch/arm/cortex-m33/iar/TZ/non_secure/los_dispatch.S +++ b/arch/arm/cortex-m33/iar/TZ/non_secure/los_dispatch.S @@ -31,10 +31,10 @@ PRESERVE8 - EXPORT HalIntLock - EXPORT HalIntUnLock - EXPORT HalIntRestore - EXPORT HalTaskSchedule + EXPORT ArchIntLock + EXPORT ArchIntUnLock + EXPORT ArchIntRestore + EXPORT ArchTaskSchedule EXPORT HalPendSV EXPORT HalSVCHandler EXPORT HalStartFirstTask @@ -91,21 +91,21 @@ __DisabledFPU1 CPSIE I BX R3 -HalIntLock +ArchIntLock MRS R0, PRIMASK CPSID I BX LR -HalIntUnLock +ArchIntUnLock MRS R0, PRIMASK CPSIE I BX LR -HalIntRestore +ArchIntRestore MSR PRIMASK, R0 BX LR -HalTaskSchedule +ArchTaskSchedule LDR R0, =OS_NVIC_INT_CTRL LDR R1, =OS_NVIC_PENDSVSET STR R1, [R0] diff --git a/arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c b/arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c index 40f75272..b12bb5ac 100644 --- a/arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c +++ b/arch/arm/cortex-m33/iar/TZ/non_secure/los_interrupt.c @@ -53,7 +53,7 @@ UINT32 g_intCount = 0; */ STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -116,7 +116,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return __get_IPSR(); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -173,7 +173,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -193,7 +193,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -203,11 +203,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINTPTR intSave; @@ -228,7 +228,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -242,13 +242,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -481,7 +481,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* **************************************************************************** diff --git a/arch/arm/cortex-m33/iar/TZ/non_secure/los_timer.c b/arch/arm/cortex-m33/iar/TZ/non_secure/los_timer.c index 8bf355f2..12176bb3 100644 --- a/arch/arm/cortex-m33/iar/TZ/non_secure/los_timer.c +++ b/arch/arm/cortex-m33/iar/TZ/non_secure/los_timer.c @@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) } #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler); @@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ @@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 hwCycle = 0; UINTPTR intSave = LOS_IntLock(); @@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)hwCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { __DSB(); __WFI(); diff --git a/arch/arm/cortex-m4/gcc/los_arch_atomic.h b/arch/arm/cortex-m4/gcc/los_arch_atomic.h index 74ac4ff7..12ed5bc8 100644 --- a/arch/arm/cortex-m4/gcc/los_arch_atomic.h +++ b/arch/arm/cortex-m4/gcc/los_arch_atomic.h @@ -57,7 +57,7 @@ extern "C" { * * @see */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) +STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val) { INT32 prevVal = 0; UINT32 status = 0; @@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) * * @see */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) +STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v) { INT32 val = 0; UINT32 status = 0; @@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) * * @see */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) { INT32 prevVal = 0; UINT32 status = 0; diff --git a/arch/arm/cortex-m4/gcc/los_arch_interrupt.h b/arch/arm/cortex-m4/gcc/los_arch_interrupt.h index 53361984..5ac9ecc0 100644 --- a/arch/arm/cortex-m4/gcc/los_arch_interrupt.h +++ b/arch/arm/cortex-m4/gcc/los_arch_interrupt.h @@ -309,7 +309,7 @@ extern UINT32 _BootVectors[]; */ #define OS_EXC_SYS_TICK 15 -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_arch_interrupt * Set interrupt vector table. @@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID); VOID HalExcSvcCall(VOID); VOID HalHwiInit(VOID); - /** * @ingroup los_exc * Cortex-M exception types: An error occurred while the bus status register was being pushed. @@ -665,15 +664,18 @@ VOID HalHwiInit(VOID); * */ typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ + /**< Exception occurrence phase: 0 means that an exception occurs in initialization, + * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ UINT16 phase; /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */ UINT16 type; /**< If the exact address access error indicates the wrong access address when the exception occurred */ UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ + /**< An exception occurs in an interrupt, indicating the interrupt number. + * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ + /**< Number of nested exceptions. Currently only registered hook functions are supported + * when an exception is entered for the first time */ UINT16 nestCnt; /**< reserve */ UINT16 reserved; diff --git a/arch/arm/cortex-m4/gcc/los_arch_timer.h b/arch/arm/cortex-m4/gcc/los_arch_timer.h index 97ec28d1..4bf043fb 100644 --- a/arch/arm/cortex-m4/gcc/los_arch_timer.h +++ b/arch/arm/cortex-m4/gcc/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/arm/cortex-m4/gcc/los_context.c b/arch/arm/cortex-m4/gcc/los_context.c index 2a257440..3d0a2551 100644 --- a/arch/arm/cortex-m4/gcc/los_context.c +++ b/arch/arm/cortex-m4/gcc/los_context.c @@ -36,18 +36,17 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_timer.h" #include "los_debug.h" /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; @@ -60,13 +59,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -74,7 +73,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -82,7 +81,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -148,14 +147,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->uwR2 = 0x02020202L; context->uwR3 = 0x03030303L; context->uwR12 = 0x12121212L; - context->uwLR = (UINT32)(UINTPTR)HalSysExit; + context->uwLR = (UINT32)(UINTPTR)ArchSysExit; context->uwPC = (UINT32)(UINTPTR)OsTaskEntry; context->uwxPSR = 0x01000000L; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); diff --git a/arch/arm/cortex-m4/gcc/los_dispatch.S b/arch/arm/cortex-m4/gcc/los_dispatch.S index 9fb66127..19f0b9da 100644 --- a/arch/arm/cortex-m4/gcc/los_dispatch.S +++ b/arch/arm/cortex-m4/gcc/los_dispatch.S @@ -89,9 +89,9 @@ __DisabledFPU: .fnend - .type HalIntLock, %function - .global HalIntLock -HalIntLock: + .type ArchIntLock, %function + .global ArchIntLock +ArchIntLock: .fnstart .cantunwind @@ -100,9 +100,9 @@ HalIntLock: BX LR .fnend - .type HalIntUnLock, %function - .global HalIntUnLock -HalIntUnLock: + .type ArchIntUnLock, %function + .global ArchIntUnLock +ArchIntUnLock: .fnstart .cantunwind @@ -111,9 +111,9 @@ HalIntUnLock: BX LR .fnend - .type HalIntRestore, %function - .global HalIntRestore -HalIntRestore: + .type ArchIntRestore, %function + .global ArchIntRestore +ArchIntRestore: .fnstart .cantunwind @@ -121,9 +121,9 @@ HalIntRestore: BX LR .fnend - .type HalTaskSchedule, %function - .global HalTaskSchedule -HalTaskSchedule: + .type ArchTaskSchedule, %function + .global ArchTaskSchedule +ArchTaskSchedule: .fnstart .cantunwind diff --git a/arch/arm/cortex-m4/gcc/los_interrupt.c b/arch/arm/cortex-m4/gcc/los_interrupt.c index 986b44b5..7aa9f794 100644 --- a/arch/arm/cortex-m4/gcc/los_interrupt.c +++ b/arch/arm/cortex-m4/gcc/los_interrupt.c @@ -56,7 +56,7 @@ LITE_OS_SEC_VEC */ STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -119,7 +119,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return __get_IPSR(); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -174,7 +174,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -194,7 +194,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -204,11 +204,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINT32 intSave; @@ -229,7 +229,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -243,13 +243,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -483,7 +483,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* stack protector */ diff --git a/arch/arm/cortex-m4/gcc/los_mpu.c b/arch/arm/cortex-m4/gcc/los_mpu.c index d1f76ea0..8d1dc25b 100644 --- a/arch/arm/cortex-m4/gcc/los_mpu.c +++ b/arch/arm/cortex-m4/gcc/los_mpu.c @@ -49,22 +49,22 @@ typedef enum { MPU_AP_RO_USER_RO = 0x6, /* Privileged:Read-only Unprivileged:Read-only */ } MpuApConfig; -VOID HalMpuEnable(UINT32 defaultRegionEnable) +VOID ArchMpuEnable(UINT32 defaultRegionEnable) { - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); MPU->CTRL = (MPU_CTRL_ENABLE_Msk | ((defaultRegionEnable << MPU_CTRL_PRIVDEFENA_Pos) & MPU_CTRL_PRIVDEFENA_Msk)); SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; __DSB(); __ISB(); - HalIntRestore(intSave); + ArchIntRestore(intSave); } -VOID HalMpuDisable(VOID) +VOID ArchMpuDisable(VOID) { - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); MPU->CTRL = 0; __DSB(); __ISB(); - HalIntRestore(intSave); + ArchIntRestore(intSave); } STATIC VOID HalMpuRASRAddMemAttr(MPU_CFG_PARA *para, UINT32 *RASR) @@ -147,7 +147,7 @@ STATIC UINT32 HalMpuGetRASR(UINT32 encodeSize, MPU_CFG_PARA *para) return RASR; } -UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) +UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) { UINT32 RASR; UINT32 RBAR; @@ -175,9 +175,9 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) } RBAR = para->baseAddr & MPU_RBAR_ADDR_Msk; RASR = HalMpuGetRASR(encodeSize, para); - intSave = HalIntLock(); + intSave = ArchIntLock(); if (g_regionNumBeUsed[regionId]) { - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_NOK; } MPU->RNR = RNR; @@ -186,11 +186,11 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) __DSB(); __ISB(); g_regionNumBeUsed[regionId] = 1; /* Set mpu region used flag */ - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_OK; } -UINT32 HalMpuDisableRegion(UINT32 regionId) +UINT32 ArchMpuDisableRegion(UINT32 regionId) { volatile UINT32 type; UINT32 intSave; @@ -199,9 +199,9 @@ UINT32 HalMpuDisableRegion(UINT32 regionId) return LOS_NOK; } - intSave = HalIntLock(); + intSave = ArchIntLock(); if (!g_regionNumBeUsed[regionId]) { - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_NOK; } @@ -213,20 +213,20 @@ UINT32 HalMpuDisableRegion(UINT32 regionId) __ISB(); } g_regionNumBeUsed[regionId] = 0; /* clear mpu region used flag */ - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_OK; } -INT32 HalMpuUnusedRegionGet(VOID) +INT32 ArchMpuUnusedRegionGet(VOID) { INT32 id; - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); for (id = 0; id < MPU_MAX_REGION_NUM; id++) { if (!g_regionNumBeUsed[id]) { break; } } - HalIntRestore(intSave); + ArchIntRestore(intSave); if (id == MPU_MAX_REGION_NUM) { return -1; diff --git a/arch/arm/cortex-m4/gcc/los_timer.c b/arch/arm/cortex-m4/gcc/los_timer.c index 776c5102..21046e8d 100644 --- a/arch/arm/cortex-m4/gcc/los_timer.c +++ b/arch/arm/cortex-m4/gcc/los_timer.c @@ -56,7 +56,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) } #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler); @@ -74,7 +74,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ @@ -83,7 +83,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 hwCycle = 0; UINT32 intSave = LOS_IntLock(); @@ -96,17 +96,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)hwCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { __DSB(); __WFI(); diff --git a/arch/arm/cortex-m4/iar/los_arch_atomic.h b/arch/arm/cortex-m4/iar/los_arch_atomic.h index 4c16305e..4302b0f4 100644 --- a/arch/arm/cortex-m4/iar/los_arch_atomic.h +++ b/arch/arm/cortex-m4/iar/los_arch_atomic.h @@ -57,7 +57,7 @@ extern "C" { * * @see */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) +STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val) { INT32 prevVal = 0; UINT32 status = 0; @@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) * * @see */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) +STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v) { INT32 val = 0; UINT32 status = 0; @@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) * * @see */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) { INT32 prevVal = 0; UINT32 status = 0; diff --git a/arch/arm/cortex-m4/iar/los_arch_interrupt.h b/arch/arm/cortex-m4/iar/los_arch_interrupt.h index 53361984..5ac9ecc0 100644 --- a/arch/arm/cortex-m4/iar/los_arch_interrupt.h +++ b/arch/arm/cortex-m4/iar/los_arch_interrupt.h @@ -309,7 +309,7 @@ extern UINT32 _BootVectors[]; */ #define OS_EXC_SYS_TICK 15 -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_arch_interrupt * Set interrupt vector table. @@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID); VOID HalExcSvcCall(VOID); VOID HalHwiInit(VOID); - /** * @ingroup los_exc * Cortex-M exception types: An error occurred while the bus status register was being pushed. @@ -665,15 +664,18 @@ VOID HalHwiInit(VOID); * */ typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ + /**< Exception occurrence phase: 0 means that an exception occurs in initialization, + * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ UINT16 phase; /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */ UINT16 type; /**< If the exact address access error indicates the wrong access address when the exception occurred */ UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ + /**< An exception occurs in an interrupt, indicating the interrupt number. + * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ + /**< Number of nested exceptions. Currently only registered hook functions are supported + * when an exception is entered for the first time */ UINT16 nestCnt; /**< reserve */ UINT16 reserved; diff --git a/arch/arm/cortex-m4/iar/los_arch_timer.h b/arch/arm/cortex-m4/iar/los_arch_timer.h index 97ec28d1..4bf043fb 100644 --- a/arch/arm/cortex-m4/iar/los_arch_timer.h +++ b/arch/arm/cortex-m4/iar/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/arm/cortex-m4/iar/los_context.c b/arch/arm/cortex-m4/iar/los_context.c index a8a4a866..722bb6bc 100644 --- a/arch/arm/cortex-m4/iar/los_context.c +++ b/arch/arm/cortex-m4/iar/los_context.c @@ -36,19 +36,18 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_timer.h" #include "los_debug.h" /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -61,13 +60,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -75,7 +74,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -83,7 +82,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -149,14 +148,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->uwR2 = 0x02020202L; context->uwR3 = 0x03030303L; context->uwR12 = 0x12121212L; - context->uwLR = (UINT32)(UINTPTR)HalSysExit; + context->uwLR = (UINT32)(UINTPTR)ArchSysExit; context->uwPC = (UINT32)(UINTPTR)OsTaskEntry; context->uwxPSR = 0x01000000L; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); diff --git a/arch/arm/cortex-m4/iar/los_dispatch.S b/arch/arm/cortex-m4/iar/los_dispatch.S index 14198f9f..f8f0d188 100644 --- a/arch/arm/cortex-m4/iar/los_dispatch.S +++ b/arch/arm/cortex-m4/iar/los_dispatch.S @@ -31,11 +31,11 @@ PRESERVE8 - EXPORT HalIntLock - EXPORT HalIntUnLock - EXPORT HalIntRestore + EXPORT ArchIntLock + EXPORT ArchIntUnLock + EXPORT ArchIntRestore EXPORT HalStartToRun - EXPORT HalTaskSchedule + EXPORT ArchTaskSchedule EXPORT HalPendSV IMPORT OsSchedTaskSwitch IMPORT g_losTask @@ -90,21 +90,21 @@ __DisabledFPU BX R6 -HalIntLock +ArchIntLock MRS R0, PRIMASK CPSID I BX LR -HalIntUnLock +ArchIntUnLock MRS R0, PRIMASK CPSIE I BX LR -HalIntRestore +ArchIntRestore MSR PRIMASK, R0 BX LR -HalTaskSchedule +ArchTaskSchedule LDR R0, =OS_NVIC_INT_CTRL LDR R1, =OS_NVIC_PENDSVSET STR R1, [R0] diff --git a/arch/arm/cortex-m4/iar/los_interrupt.c b/arch/arm/cortex-m4/iar/los_interrupt.c index 106acde2..fa60e5be 100644 --- a/arch/arm/cortex-m4/iar/los_interrupt.c +++ b/arch/arm/cortex-m4/iar/los_interrupt.c @@ -57,7 +57,7 @@ LITE_OS_SEC_VEC */ STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -120,7 +120,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return __get_IPSR(); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -175,7 +175,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -195,7 +195,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -205,11 +205,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINT32 intSave; @@ -230,7 +230,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -244,13 +244,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -484,7 +484,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* **************************************************************************** diff --git a/arch/arm/cortex-m4/iar/los_mpu.c b/arch/arm/cortex-m4/iar/los_mpu.c index d1f76ea0..8d1dc25b 100644 --- a/arch/arm/cortex-m4/iar/los_mpu.c +++ b/arch/arm/cortex-m4/iar/los_mpu.c @@ -49,22 +49,22 @@ typedef enum { MPU_AP_RO_USER_RO = 0x6, /* Privileged:Read-only Unprivileged:Read-only */ } MpuApConfig; -VOID HalMpuEnable(UINT32 defaultRegionEnable) +VOID ArchMpuEnable(UINT32 defaultRegionEnable) { - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); MPU->CTRL = (MPU_CTRL_ENABLE_Msk | ((defaultRegionEnable << MPU_CTRL_PRIVDEFENA_Pos) & MPU_CTRL_PRIVDEFENA_Msk)); SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; __DSB(); __ISB(); - HalIntRestore(intSave); + ArchIntRestore(intSave); } -VOID HalMpuDisable(VOID) +VOID ArchMpuDisable(VOID) { - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); MPU->CTRL = 0; __DSB(); __ISB(); - HalIntRestore(intSave); + ArchIntRestore(intSave); } STATIC VOID HalMpuRASRAddMemAttr(MPU_CFG_PARA *para, UINT32 *RASR) @@ -147,7 +147,7 @@ STATIC UINT32 HalMpuGetRASR(UINT32 encodeSize, MPU_CFG_PARA *para) return RASR; } -UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) +UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) { UINT32 RASR; UINT32 RBAR; @@ -175,9 +175,9 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) } RBAR = para->baseAddr & MPU_RBAR_ADDR_Msk; RASR = HalMpuGetRASR(encodeSize, para); - intSave = HalIntLock(); + intSave = ArchIntLock(); if (g_regionNumBeUsed[regionId]) { - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_NOK; } MPU->RNR = RNR; @@ -186,11 +186,11 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) __DSB(); __ISB(); g_regionNumBeUsed[regionId] = 1; /* Set mpu region used flag */ - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_OK; } -UINT32 HalMpuDisableRegion(UINT32 regionId) +UINT32 ArchMpuDisableRegion(UINT32 regionId) { volatile UINT32 type; UINT32 intSave; @@ -199,9 +199,9 @@ UINT32 HalMpuDisableRegion(UINT32 regionId) return LOS_NOK; } - intSave = HalIntLock(); + intSave = ArchIntLock(); if (!g_regionNumBeUsed[regionId]) { - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_NOK; } @@ -213,20 +213,20 @@ UINT32 HalMpuDisableRegion(UINT32 regionId) __ISB(); } g_regionNumBeUsed[regionId] = 0; /* clear mpu region used flag */ - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_OK; } -INT32 HalMpuUnusedRegionGet(VOID) +INT32 ArchMpuUnusedRegionGet(VOID) { INT32 id; - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); for (id = 0; id < MPU_MAX_REGION_NUM; id++) { if (!g_regionNumBeUsed[id]) { break; } } - HalIntRestore(intSave); + ArchIntRestore(intSave); if (id == MPU_MAX_REGION_NUM) { return -1; diff --git a/arch/arm/cortex-m4/iar/los_timer.c b/arch/arm/cortex-m4/iar/los_timer.c index 2029890b..8862d6ae 100644 --- a/arch/arm/cortex-m4/iar/los_timer.c +++ b/arch/arm/cortex-m4/iar/los_timer.c @@ -56,7 +56,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) } #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler); @@ -74,7 +74,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ @@ -83,7 +83,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 hwCycle = 0; UINT32 intSave = LOS_IntLock(); @@ -96,17 +96,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)hwCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { __DSB(); __WFI(); diff --git a/arch/arm/cortex-m7/gcc/los_arch_atomic.h b/arch/arm/cortex-m7/gcc/los_arch_atomic.h index 4c16305e..4302b0f4 100644 --- a/arch/arm/cortex-m7/gcc/los_arch_atomic.h +++ b/arch/arm/cortex-m7/gcc/los_arch_atomic.h @@ -57,7 +57,7 @@ extern "C" { * * @see */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) +STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val) { INT32 prevVal = 0; UINT32 status = 0; @@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) * * @see */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) +STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v) { INT32 val = 0; UINT32 status = 0; @@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) * * @see */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) { INT32 prevVal = 0; UINT32 status = 0; diff --git a/arch/arm/cortex-m7/gcc/los_arch_interrupt.h b/arch/arm/cortex-m7/gcc/los_arch_interrupt.h index 4bbb595e..2b21441c 100644 --- a/arch/arm/cortex-m7/gcc/los_arch_interrupt.h +++ b/arch/arm/cortex-m7/gcc/los_arch_interrupt.h @@ -309,7 +309,7 @@ extern UINT32 _BootVectors[]; */ #define OS_EXC_SYS_TICK 15 -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_arch_interrupt * Set interrupt vector table. @@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID); VOID HalExcSvcCall(VOID); VOID HalHwiInit(VOID); - /** * @ingroup los_exc * Cortex-M exception types: An error occurred while the bus status register was being pushed. @@ -665,15 +664,18 @@ VOID HalHwiInit(VOID); * */ typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ + /**< Exception occurrence phase: 0 means that an exception occurs in initialization, + * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ UINT16 phase; /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */ UINT16 type; /**< If the exact address access error indicates the wrong access address when the exception occurred */ UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ + /**< An exception occurs in an interrupt, indicating the interrupt number. + * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ + /**< Number of nested exceptions. Currently only registered hook functions are supported + * when an exception is entered for the first time */ UINT16 nestCnt; /**< reserve */ UINT16 reserved; diff --git a/arch/arm/cortex-m7/gcc/los_arch_timer.h b/arch/arm/cortex-m7/gcc/los_arch_timer.h index 97ec28d1..4bf043fb 100644 --- a/arch/arm/cortex-m7/gcc/los_arch_timer.h +++ b/arch/arm/cortex-m7/gcc/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/arm/cortex-m7/gcc/los_context.c b/arch/arm/cortex-m7/gcc/los_context.c index 67f74f70..f4de61f7 100644 --- a/arch/arm/cortex-m7/gcc/los_context.c +++ b/arch/arm/cortex-m7/gcc/los_context.c @@ -36,17 +36,16 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_debug.h" /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -146,14 +145,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->uwR2 = 0x02020202L; context->uwR3 = 0x03030303L; context->uwR12 = 0x12121212L; - context->uwLR = (UINT32)(UINTPTR)HalSysExit; + context->uwLR = (UINT32)(UINTPTR)ArchSysExit; context->uwPC = (UINT32)(UINTPTR)OsTaskEntry; context->uwxPSR = 0x01000000L; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); diff --git a/arch/arm/cortex-m7/gcc/los_dispatch.S b/arch/arm/cortex-m7/gcc/los_dispatch.S index 8f99bc8c..46193a64 100644 --- a/arch/arm/cortex-m7/gcc/los_dispatch.S +++ b/arch/arm/cortex-m7/gcc/los_dispatch.S @@ -86,9 +86,9 @@ HalStartToRun: .fnend - .type HalIntLock, %function - .global HalIntLock -HalIntLock: + .type ArchIntLock, %function + .global ArchIntLock +ArchIntLock: .fnstart .cantunwind @@ -97,9 +97,9 @@ HalIntLock: BX LR .fnend - .type HalIntUnLock, %function - .global HalIntUnLock -HalIntUnLock: + .type ArchIntUnLock, %function + .global ArchIntUnLock +ArchIntUnLock: .fnstart .cantunwind @@ -108,9 +108,9 @@ HalIntUnLock: BX LR .fnend - .type HalIntRestore, %function - .global HalIntRestore -HalIntRestore: + .type ArchIntRestore, %function + .global ArchIntRestore +ArchIntRestore: .fnstart .cantunwind @@ -118,9 +118,9 @@ HalIntRestore: BX LR .fnend - .type HalTaskSchedule, %function - .global HalTaskSchedule -HalTaskSchedule: + .type ArchTaskSchedule, %function + .global ArchTaskSchedule +ArchTaskSchedule: .fnstart .cantunwind diff --git a/arch/arm/cortex-m7/gcc/los_interrupt.c b/arch/arm/cortex-m7/gcc/los_interrupt.c index fab6b729..65c55774 100644 --- a/arch/arm/cortex-m7/gcc/los_interrupt.c +++ b/arch/arm/cortex-m7/gcc/los_interrupt.c @@ -51,7 +51,7 @@ UINT32 g_intCount = 0; */ STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -109,7 +109,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return __get_IPSR(); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -164,7 +164,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -184,7 +184,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -194,11 +194,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINT32 intSave; @@ -219,7 +219,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -233,13 +233,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -473,7 +473,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* **************************************************************************** diff --git a/arch/arm/cortex-m7/gcc/los_mpu.c b/arch/arm/cortex-m7/gcc/los_mpu.c index d1f76ea0..8d1dc25b 100644 --- a/arch/arm/cortex-m7/gcc/los_mpu.c +++ b/arch/arm/cortex-m7/gcc/los_mpu.c @@ -49,22 +49,22 @@ typedef enum { MPU_AP_RO_USER_RO = 0x6, /* Privileged:Read-only Unprivileged:Read-only */ } MpuApConfig; -VOID HalMpuEnable(UINT32 defaultRegionEnable) +VOID ArchMpuEnable(UINT32 defaultRegionEnable) { - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); MPU->CTRL = (MPU_CTRL_ENABLE_Msk | ((defaultRegionEnable << MPU_CTRL_PRIVDEFENA_Pos) & MPU_CTRL_PRIVDEFENA_Msk)); SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; __DSB(); __ISB(); - HalIntRestore(intSave); + ArchIntRestore(intSave); } -VOID HalMpuDisable(VOID) +VOID ArchMpuDisable(VOID) { - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); MPU->CTRL = 0; __DSB(); __ISB(); - HalIntRestore(intSave); + ArchIntRestore(intSave); } STATIC VOID HalMpuRASRAddMemAttr(MPU_CFG_PARA *para, UINT32 *RASR) @@ -147,7 +147,7 @@ STATIC UINT32 HalMpuGetRASR(UINT32 encodeSize, MPU_CFG_PARA *para) return RASR; } -UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) +UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) { UINT32 RASR; UINT32 RBAR; @@ -175,9 +175,9 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) } RBAR = para->baseAddr & MPU_RBAR_ADDR_Msk; RASR = HalMpuGetRASR(encodeSize, para); - intSave = HalIntLock(); + intSave = ArchIntLock(); if (g_regionNumBeUsed[regionId]) { - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_NOK; } MPU->RNR = RNR; @@ -186,11 +186,11 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) __DSB(); __ISB(); g_regionNumBeUsed[regionId] = 1; /* Set mpu region used flag */ - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_OK; } -UINT32 HalMpuDisableRegion(UINT32 regionId) +UINT32 ArchMpuDisableRegion(UINT32 regionId) { volatile UINT32 type; UINT32 intSave; @@ -199,9 +199,9 @@ UINT32 HalMpuDisableRegion(UINT32 regionId) return LOS_NOK; } - intSave = HalIntLock(); + intSave = ArchIntLock(); if (!g_regionNumBeUsed[regionId]) { - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_NOK; } @@ -213,20 +213,20 @@ UINT32 HalMpuDisableRegion(UINT32 regionId) __ISB(); } g_regionNumBeUsed[regionId] = 0; /* clear mpu region used flag */ - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_OK; } -INT32 HalMpuUnusedRegionGet(VOID) +INT32 ArchMpuUnusedRegionGet(VOID) { INT32 id; - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); for (id = 0; id < MPU_MAX_REGION_NUM; id++) { if (!g_regionNumBeUsed[id]) { break; } } - HalIntRestore(intSave); + ArchIntRestore(intSave); if (id == MPU_MAX_REGION_NUM) { return -1; diff --git a/arch/arm/cortex-m7/gcc/los_timer.c b/arch/arm/cortex-m7/gcc/los_timer.c index 66e1f0de..a5dd7865 100644 --- a/arch/arm/cortex-m7/gcc/los_timer.c +++ b/arch/arm/cortex-m7/gcc/los_timer.c @@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) } #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler); @@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ @@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 hwCycle = 0; UINT32 intSave = LOS_IntLock(); @@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)hwCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { __DSB(); __WFI(); diff --git a/arch/arm/cortex-m7/iar/los_arch_atomic.h b/arch/arm/cortex-m7/iar/los_arch_atomic.h index 4c16305e..4302b0f4 100644 --- a/arch/arm/cortex-m7/iar/los_arch_atomic.h +++ b/arch/arm/cortex-m7/iar/los_arch_atomic.h @@ -57,7 +57,7 @@ extern "C" { * * @see */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) +STATIC INLINE INT32 ArchAtomicXchg32bits(volatile INT32 *v, INT32 val) { INT32 prevVal = 0; UINT32 status = 0; @@ -92,7 +92,7 @@ STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) * * @see */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) +STATIC INLINE INT32 ArchAtomicDecRet(volatile INT32 *v) { INT32 val = 0; UINT32 status = 0; @@ -128,7 +128,7 @@ STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) * * @see */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) { INT32 prevVal = 0; UINT32 status = 0; diff --git a/arch/arm/cortex-m7/iar/los_arch_interrupt.h b/arch/arm/cortex-m7/iar/los_arch_interrupt.h index 4bbb595e..2b21441c 100644 --- a/arch/arm/cortex-m7/iar/los_arch_interrupt.h +++ b/arch/arm/cortex-m7/iar/los_arch_interrupt.h @@ -309,7 +309,7 @@ extern UINT32 _BootVectors[]; */ #define OS_EXC_SYS_TICK 15 -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_arch_interrupt * Set interrupt vector table. @@ -528,7 +528,6 @@ VOID HalExcUsageFault(VOID); VOID HalExcSvcCall(VOID); VOID HalHwiInit(VOID); - /** * @ingroup los_exc * Cortex-M exception types: An error occurred while the bus status register was being pushed. @@ -665,15 +664,18 @@ VOID HalHwiInit(VOID); * */ typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ + /**< Exception occurrence phase: 0 means that an exception occurs in initialization, + * 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ UINT16 phase; /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */ UINT16 type; /**< If the exact address access error indicates the wrong access address when the exception occurred */ UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ + /**< An exception occurs in an interrupt, indicating the interrupt number. + * An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ + /**< Number of nested exceptions. Currently only registered hook functions are supported + * when an exception is entered for the first time */ UINT16 nestCnt; /**< reserve */ UINT16 reserved; diff --git a/arch/arm/cortex-m7/iar/los_arch_timer.h b/arch/arm/cortex-m7/iar/los_arch_timer.h index 97ec28d1..4bf043fb 100644 --- a/arch/arm/cortex-m7/iar/los_arch_timer.h +++ b/arch/arm/cortex-m7/iar/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/arm/cortex-m7/iar/los_context.c b/arch/arm/cortex-m7/iar/los_context.c index 67f74f70..f4de61f7 100644 --- a/arch/arm/cortex-m7/iar/los_context.c +++ b/arch/arm/cortex-m7/iar/los_context.c @@ -36,17 +36,16 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_debug.h" /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -58,13 +57,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -72,7 +71,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -80,7 +79,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -146,14 +145,14 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->uwR2 = 0x02020202L; context->uwR3 = 0x03030303L; context->uwR12 = 0x12121212L; - context->uwLR = (UINT32)(UINTPTR)HalSysExit; + context->uwLR = (UINT32)(UINTPTR)ArchSysExit; context->uwPC = (UINT32)(UINTPTR)OsTaskEntry; context->uwxPSR = 0x01000000L; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); diff --git a/arch/arm/cortex-m7/iar/los_dispatch.S b/arch/arm/cortex-m7/iar/los_dispatch.S index 14198f9f..f8f0d188 100644 --- a/arch/arm/cortex-m7/iar/los_dispatch.S +++ b/arch/arm/cortex-m7/iar/los_dispatch.S @@ -31,11 +31,11 @@ PRESERVE8 - EXPORT HalIntLock - EXPORT HalIntUnLock - EXPORT HalIntRestore + EXPORT ArchIntLock + EXPORT ArchIntUnLock + EXPORT ArchIntRestore EXPORT HalStartToRun - EXPORT HalTaskSchedule + EXPORT ArchTaskSchedule EXPORT HalPendSV IMPORT OsSchedTaskSwitch IMPORT g_losTask @@ -90,21 +90,21 @@ __DisabledFPU BX R6 -HalIntLock +ArchIntLock MRS R0, PRIMASK CPSID I BX LR -HalIntUnLock +ArchIntUnLock MRS R0, PRIMASK CPSIE I BX LR -HalIntRestore +ArchIntRestore MSR PRIMASK, R0 BX LR -HalTaskSchedule +ArchTaskSchedule LDR R0, =OS_NVIC_INT_CTRL LDR R1, =OS_NVIC_PENDSVSET STR R1, [R0] diff --git a/arch/arm/cortex-m7/iar/los_interrupt.c b/arch/arm/cortex-m7/iar/los_interrupt.c index 69326c97..99f207e4 100644 --- a/arch/arm/cortex-m7/iar/los_interrupt.c +++ b/arch/arm/cortex-m7/iar/los_interrupt.c @@ -53,7 +53,7 @@ UINT32 g_intCount = 0; */ STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -116,7 +116,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return __get_IPSR(); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -171,7 +171,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -191,7 +191,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -201,11 +201,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINT32 intSave; @@ -226,7 +226,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -240,13 +240,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -480,7 +480,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, U OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* **************************************************************************** diff --git a/arch/arm/cortex-m7/iar/los_mpu.c b/arch/arm/cortex-m7/iar/los_mpu.c index d1f76ea0..8d1dc25b 100644 --- a/arch/arm/cortex-m7/iar/los_mpu.c +++ b/arch/arm/cortex-m7/iar/los_mpu.c @@ -49,22 +49,22 @@ typedef enum { MPU_AP_RO_USER_RO = 0x6, /* Privileged:Read-only Unprivileged:Read-only */ } MpuApConfig; -VOID HalMpuEnable(UINT32 defaultRegionEnable) +VOID ArchMpuEnable(UINT32 defaultRegionEnable) { - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); MPU->CTRL = (MPU_CTRL_ENABLE_Msk | ((defaultRegionEnable << MPU_CTRL_PRIVDEFENA_Pos) & MPU_CTRL_PRIVDEFENA_Msk)); SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk; __DSB(); __ISB(); - HalIntRestore(intSave); + ArchIntRestore(intSave); } -VOID HalMpuDisable(VOID) +VOID ArchMpuDisable(VOID) { - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); MPU->CTRL = 0; __DSB(); __ISB(); - HalIntRestore(intSave); + ArchIntRestore(intSave); } STATIC VOID HalMpuRASRAddMemAttr(MPU_CFG_PARA *para, UINT32 *RASR) @@ -147,7 +147,7 @@ STATIC UINT32 HalMpuGetRASR(UINT32 encodeSize, MPU_CFG_PARA *para) return RASR; } -UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) +UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) { UINT32 RASR; UINT32 RBAR; @@ -175,9 +175,9 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) } RBAR = para->baseAddr & MPU_RBAR_ADDR_Msk; RASR = HalMpuGetRASR(encodeSize, para); - intSave = HalIntLock(); + intSave = ArchIntLock(); if (g_regionNumBeUsed[regionId]) { - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_NOK; } MPU->RNR = RNR; @@ -186,11 +186,11 @@ UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para) __DSB(); __ISB(); g_regionNumBeUsed[regionId] = 1; /* Set mpu region used flag */ - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_OK; } -UINT32 HalMpuDisableRegion(UINT32 regionId) +UINT32 ArchMpuDisableRegion(UINT32 regionId) { volatile UINT32 type; UINT32 intSave; @@ -199,9 +199,9 @@ UINT32 HalMpuDisableRegion(UINT32 regionId) return LOS_NOK; } - intSave = HalIntLock(); + intSave = ArchIntLock(); if (!g_regionNumBeUsed[regionId]) { - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_NOK; } @@ -213,20 +213,20 @@ UINT32 HalMpuDisableRegion(UINT32 regionId) __ISB(); } g_regionNumBeUsed[regionId] = 0; /* clear mpu region used flag */ - HalIntRestore(intSave); + ArchIntRestore(intSave); return LOS_OK; } -INT32 HalMpuUnusedRegionGet(VOID) +INT32 ArchMpuUnusedRegionGet(VOID) { INT32 id; - UINT32 intSave = HalIntLock(); + UINT32 intSave = ArchIntLock(); for (id = 0; id < MPU_MAX_REGION_NUM; id++) { if (!g_regionNumBeUsed[id]) { break; } } - HalIntRestore(intSave); + ArchIntRestore(intSave); if (id == MPU_MAX_REGION_NUM) { return -1; diff --git a/arch/arm/cortex-m7/iar/los_timer.c b/arch/arm/cortex-m7/iar/los_timer.c index 66e1f0de..a5dd7865 100644 --- a/arch/arm/cortex-m7/iar/los_timer.c +++ b/arch/arm/cortex-m7/iar/los_timer.c @@ -55,7 +55,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) } #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler); @@ -73,7 +73,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ @@ -82,7 +82,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 hwCycle = 0; UINT32 intSave = LOS_IntLock(); @@ -95,17 +95,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)hwCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { __DSB(); __WFI(); diff --git a/arch/csky/v2/gcc/los_arch_atomic.h b/arch/csky/v2/gcc/los_arch_atomic.h deleted file mode 100644 index 5efc8e61..00000000 --- a/arch/csky/v2/gcc/los_arch_atomic.h +++ /dev/null @@ -1,146 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _LOS_ARCH_ATOMIC_H -#define _LOS_ARCH_ATOMIC_H - -#include "los_compiler.h" - -#ifdef __cplusplus -#if __cplusplus -extern "C" { -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -/** - * @ingroup los_arch_atomic - * @brief Atomic exchange for 32-bit variable. - * - * @par Description: - * This API is used to implement the atomic exchange for 32-bit variable. - * @attention - * - * - * @param v [IN] The variable pointer. - * @param val [IN] The exchange value. - * - * @retval #INT32 The previous value of the atomic variable - * @par Dependency: - * - * @see - */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) -{ - INT32 prevVal; - UINT32 intSave; - - intSave = LOS_IntLock(); - prevVal = *v; - *v = val; - LOS_IntRestore(intSave); - - return prevVal; -} - -/** - * @ingroup los_arch_atomic - * @brief Atomic auto-decrement. - * - * @par Description: - * This API is used to implement the atomic auto-decrement and return the result of auto-decrement. - * @attention - * - * - * @param v [IN] The addSelf variable pointer. - * - * @retval #INT32 The return value of variable auto-decrement. - * @par Dependency: - * - * @see - */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) -{ - INT32 val; - UINT32 intSave; - - intSave = LOS_IntLock(); - *v -= 1; - val = *v; - LOS_IntRestore(intSave); - - return val; -} - -/** - * @ingroup los_arch_atomic - * @brief Atomic exchange for 32-bit variable with compare. - * - * @par Description: - * This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal. - * @attention - * - * - * @param v [IN] The variable pointer. - * @param val [IN] The new value. - * @param oldVal [IN] The old value. - * - * @retval TRUE The previous value of the atomic variable is not equal to oldVal. - * @retval FALSE The previous value of the atomic variable is equal to oldVal. - * @par Dependency: - * - * @see - */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) -{ - INT32 prevVal; - UINT32 intSave; - - intSave = LOS_IntLock(); - prevVal = *v; - if (prevVal == oldVal) { - *v = val; - } - LOS_IntRestore(intSave); - - return prevVal != oldVal; -} - -#ifdef __cplusplus -#if __cplusplus -} -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -#endif /* _LOS_ARCH_ATOMIC_H */ - diff --git a/arch/csky/v2/gcc/los_arch_interrupt.h b/arch/csky/v2/gcc/los_arch_interrupt.h index 67f47863..1cb4c359 100644 --- a/arch/csky/v2/gcc/los_arch_interrupt.h +++ b/arch/csky/v2/gcc/los_arch_interrupt.h @@ -218,7 +218,7 @@ extern VIC_TYPE *VIC_REG; */ #define LOS_ERRNO_HWI_NUM_INVALID OS_ERRNO_HWI_NUM_INVALID -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_arch_interrupt * Set interrupt vector table. diff --git a/arch/csky/v2/gcc/los_arch_timer.h b/arch/csky/v2/gcc/los_arch_timer.h index 97ec28d1..4bf043fb 100644 --- a/arch/csky/v2/gcc/los_arch_timer.h +++ b/arch/csky/v2/gcc/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/csky/v2/gcc/los_context.c b/arch/csky/v2/gcc/los_context.c index d79c498f..f2171e22 100644 --- a/arch/csky/v2/gcc/los_context.c +++ b/arch/csky/v2/gcc/los_context.c @@ -36,19 +36,18 @@ #include "los_task.h" #include "los_sched.h" #include "los_interrupt.h" -#include "los_arch_timer.h" #include "los_debug.h" STATIC UINT32 g_sysNeedSched = FALSE; /* **************************************************************************** - Function : HalArchInit + Function : ArchInit Description : arch init function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -60,13 +59,13 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } /* **************************************************************************** - Function : HalSysExit + Function : ArchSysExit Description : Task exit function Input : None Output : None Return : None **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { @@ -74,7 +73,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) } /* **************************************************************************** - Function : HalTskStackInit + Function : ArchTskStackInit Description : Task stack initialization function Input : taskID --- TaskID stackSize --- Total size of the stack @@ -82,7 +81,7 @@ LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) Output : None Return : Context pointer **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -110,13 +109,13 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->R11 = 0x11111111L; context->R12 = 0x12121212L; context->R13 = 0x13131313L; - context->R15 = (UINT32)HalSysExit; + context->R15 = (UINT32)ArchSysExit; context->EPSR = 0xe0000144L; context->EPC = (UINT32)OsTaskEntry; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); @@ -127,11 +126,11 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) VOID HalIrqEndCheckNeedSched(VOID) { if (g_sysNeedSched && g_taskScheduled && LOS_CHECK_SCHEDULE) { - HalTaskSchedule(); + ArchTaskSchedule(); } } -VOID HalTaskSchedule(VOID) +VOID ArchTaskSchedule(VOID) { UINT32 intSave; diff --git a/arch/csky/v2/gcc/los_exc.S b/arch/csky/v2/gcc/los_exc.S index 23f2a33f..7a59c1f6 100644 --- a/arch/csky/v2/gcc/los_exc.S +++ b/arch/csky/v2/gcc/los_exc.S @@ -53,25 +53,3 @@ HandleEntry: lrw r2, HalExcHandleEntry jmp r2 -.section .text -.align 2 -.global IrqEntry -IrqEntry: - psrset ee - subi sp, 72 - stm r0-r15, (sp) - mfcr r0, epsr - stw r0, (sp, 64) - mfcr r0, epc - stw r0, (sp, 68) - - jbsr HalInterrupt - - ldw r0, (sp, 68) - mtcr r0, epc - ldw r0, (sp, 64) - bseti r0, r0, 6 - mtcr r0, epsr - ldm r0-r15, (sp) - addi sp, 72 - rte diff --git a/arch/csky/v2/gcc/los_interrupt.c b/arch/csky/v2/gcc/los_interrupt.c index 16326d02..31f25782 100644 --- a/arch/csky/v2/gcc/los_interrupt.c +++ b/arch/csky/v2/gcc/los_interrupt.c @@ -81,7 +81,7 @@ UINT32 HalSetVbr(UINT32 intSave) return intSave; } -UINT32 HalIntLock(VOID) +UINT32 ArchIntLock(VOID) { UINT32 intSave; __asm__ __volatile__( @@ -93,7 +93,7 @@ UINT32 HalIntLock(VOID) return intSave; } -UINT32 HalIntUnLock(VOID) +UINT32 ArchIntUnLock(VOID) { UINT32 intSave; __asm__ __volatile__( @@ -105,12 +105,12 @@ UINT32 HalIntUnLock(VOID) return intSave; } -VOID HalIntRestore(UINT32 intSave) +VOID ArchIntRestore(UINT32 intSave) { __asm__ __volatile__("mtcr %0, psr" : : "r"(intSave)); } -UINT32 HalIntLocked(VOID) +UINT32 ArchIntLocked(VOID) { UINT32 intSave; __asm__ volatile("mfcr %0, psr" : "=r" (intSave) : : "memory"); @@ -184,7 +184,7 @@ UINT32 HalIrqClear(UINT32 hwiNum) */ STATIC HWI_PROC_FUNC __attribute__((aligned(HWI_ALIGNSIZE))) g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -244,7 +244,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) return HalGetPsr(); } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -295,7 +295,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -316,7 +316,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -326,11 +326,11 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINT32 intSave; @@ -350,7 +350,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, return OS_ERRNO_HWI_PRIO_INVALID; } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -363,13 +363,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -538,7 +538,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(EXC_CONTEXT_S *excBufAddr, UINT32 f OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* stack protector */ diff --git a/arch/csky/v2/gcc/los_timer.c b/arch/csky/v2/gcc/los_timer.c index 4fd1b151..c7f26c37 100644 --- a/arch/csky/v2/gcc/los_timer.c +++ b/arch/csky/v2/gcc/los_timer.c @@ -79,7 +79,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) VIC_REG->IWER[0] = 0x1 << TIM_INT_NUM; #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(TIM_INT_NUM, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(TIM_INT_NUM, (HWI_PROC_FUNC)handler); @@ -88,7 +88,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick->CTRL &= ~CORETIM_ENABLE; SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ @@ -96,7 +96,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SysTick->CTRL |= CORETIM_ENABLE; } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 hwCycle; UINT32 intSave = LOS_IntLock(); @@ -106,12 +106,12 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return (UINT64)hwCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTick->CTRL &= ~CORETIM_ENABLE; } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTick->CTRL |= CORETIM_ENABLE; } @@ -126,7 +126,7 @@ VOID Dsb(VOID) __asm__ volatile("sync" : : : "memory"); } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { Dsb(); Wfi(); diff --git a/arch/include/los_arch.h b/arch/include/los_arch.h index 359bc7f4..193b7fa6 100644 --- a/arch/include/los_arch.h +++ b/arch/include/los_arch.h @@ -41,7 +41,7 @@ extern "C" { #endif /* __cplusplus */ #endif /* __cplusplus */ -VOID HalArchInit(VOID); +VOID ArchInit(VOID); #ifdef __cplusplus #if __cplusplus diff --git a/arch/include/los_atomic.h b/arch/include/los_atomic.h index b0dae42b..6373a053 100755 --- a/arch/include/los_atomic.h +++ b/arch/include/los_atomic.h @@ -40,7 +40,210 @@ extern "C" { #endif /* __cplusplus */ #endif /* __cplusplus */ +typedef volatile INT32 Atomic; +typedef volatile INT64 Atomic64; +STATIC INLINE INT32 ArchAtomicRead(const Atomic *v) +{ + return *v; +} + +STATIC INLINE VOID ArchAtomicSet(Atomic *v, INT32 setVal) +{ + *v = setVal; +} + +STATIC INLINE INT32 ArchAtomicAdd(Atomic *v, INT32 addVal) +{ + INT32 val; + UINT32 intSave; + + intSave = LOS_IntLock(); + *v += addVal; + val = *v; + LOS_IntRestore(intSave); + + return val; +} + +STATIC INLINE INT32 ArchAtomicSub(Atomic *v, INT32 subVal) +{ + INT32 val; + UINT32 intSave; + + intSave = LOS_IntLock(); + *v -= subVal; + val = *v; + LOS_IntRestore(intSave); + + return val; +} + +STATIC INLINE VOID ArchAtomicInc(Atomic *v) +{ + (VOID)ArchAtomicAdd(v, 1); +} + +STATIC INLINE VOID ArchAtomicDec(Atomic *v) +{ + (VOID)ArchAtomicSub(v, 1); +} + +STATIC INLINE INT32 ArchAtomicIncRet(Atomic *v) +{ + return ArchAtomicAdd(v, 1); +} + +#ifndef ARCH_ARM +STATIC INLINE INT32 ArchAtomicDecRet(Atomic *v) +{ + return ArchAtomicSub(v, 1); +} + +STATIC INLINE INT32 ArchAtomicXchg32bits(Atomic *v, INT32 val) +{ + INT32 prevVal; + UINT32 intSave; + + intSave = LOS_IntLock(); + prevVal = *v; + *v = val; + LOS_IntRestore(intSave); + + return prevVal; +} + +STATIC INLINE BOOL ArchAtomicCmpXchg32bits(Atomic *v, INT32 val, INT32 oldVal) +{ + INT32 prevVal; + UINT32 intSave; + + intSave = LOS_IntLock(); + prevVal = *v; + if (prevVal == oldVal) { + *v = val; + } + LOS_IntRestore(intSave); + + return prevVal != oldVal; +} +#endif + +STATIC INLINE INT64 ArchAtomic64Read(const Atomic64 *v) +{ + INT64 val; + UINT32 intSave; + + intSave = LOS_IntLock(); + val = *v; + LOS_IntRestore(intSave); + + return val; +} + +STATIC INLINE VOID ArchAtomic64Set(Atomic64 *v, INT64 setVal) +{ + UINT32 intSave; + + intSave = LOS_IntLock(); + *v = setVal; + LOS_IntRestore(intSave); +} + +STATIC INLINE INT64 ArchAtomic64Add(Atomic64 *v, INT64 addVal) +{ + INT64 val; + UINT32 intSave; + + intSave = LOS_IntLock(); + *v += addVal; + val = *v; + LOS_IntRestore(intSave); + + return val; +} + +STATIC INLINE INT64 ArchAtomic64Sub(Atomic64 *v, INT64 subVal) +{ + INT64 val; + UINT32 intSave; + + intSave = LOS_IntLock(); + *v -= subVal; + val = *v; + LOS_IntRestore(intSave); + + return val; +} + +STATIC INLINE VOID ArchAtomic64Inc(Atomic64 *v) +{ + (VOID)ArchAtomic64Add(v, 1); +} + +STATIC INLINE INT64 ArchAtomic64IncRet(Atomic64 *v) +{ + return ArchAtomic64Add(v, 1); +} + +STATIC INLINE VOID ArchAtomic64Dec(Atomic64 *v) +{ + (VOID)ArchAtomic64Sub(v, 1); +} + +STATIC INLINE INT64 ArchAtomic64DecRet(Atomic64 *v) +{ + return ArchAtomic64Sub(v, 1); +} + +STATIC INLINE INT64 ArchAtomicXchg64bits(Atomic64 *v, INT64 val) +{ + INT64 prevVal; + UINT32 intSave; + + intSave = LOS_IntLock(); + prevVal = *v; + *v = val; + LOS_IntRestore(intSave); + + return prevVal; +} + +STATIC INLINE BOOL ArchAtomicCmpXchg64bits(Atomic64 *v, INT64 val, INT64 oldVal) +{ + INT64 prevVal; + UINT32 intSave; + + intSave = LOS_IntLock(); + prevVal = *v; + if (prevVal == oldVal) { + *v = val; + } + LOS_IntRestore(intSave); + + return prevVal != oldVal; +} + +#define LOS_AtomicRead ArchAtomicRead +#define LOS_AtomicSet ArchAtomicSet +#define LOS_AtomicAdd ArchAtomicAdd +#define LOS_AtomicSub ArchAtomicSub +#define LOS_AtomicInc ArchAtomicInc +#define LOS_AtomicIncRet ArchAtomicIncRet +#define LOS_AtomicDec ArchAtomicDec +#define LOS_AtomicDecRet ArchAtomicDecRet +#define LOS_Atomic64Read ArchAtomic64Read +#define LOS_Atomic64Set ArchAtomic64Set +#define LOS_Atomic64Add ArchAtomic64Add +#define LOS_Atomic64Sub ArchAtomic64Sub +#define LOS_Atomic64Inc ArchAtomic64Inc +#define LOS_Atomic64IncRet ArchAtomic64IncRet +#define LOS_Atomic64Dec ArchAtomic64Dec +#define LOS_Atomic64DecRet ArchAtomic64DecRet +#define LOS_AtomicXchg32bits ArchAtomicXchg32bits +#define LOS_AtomicXchg64bits ArchAtomicXchg64bits +#define LOS_AtomicCmpXchg32bits ArchAtomicCmpXchg32bits +#define LOS_AtomicCmpXchg64bits ArchAtomicCmpXchg64bits #ifdef __cplusplus #if __cplusplus } diff --git a/arch/include/los_context.h b/arch/include/los_context.h index 87d0f560..e9d7a9da 100755 --- a/arch/include/los_context.h +++ b/arch/include/los_context.h @@ -65,7 +65,7 @@ extern "C" { * * @see None. */ -extern VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack); +VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack); /** * @ingroup los_context @@ -84,7 +84,7 @@ extern VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack); * * @see None. */ -LITE_OS_SEC_TEXT_MINOR NORETURN VOID HalSysExit(VOID); +LITE_OS_SEC_TEXT_MINOR NORETURN VOID ArchSysExit(VOID); /** * @ingroup los_context @@ -103,10 +103,9 @@ LITE_OS_SEC_TEXT_MINOR NORETURN VOID HalSysExit(VOID); * * @see None. */ -extern VOID HalTaskSchedule(VOID); +VOID ArchTaskSchedule(VOID); -typedef VOID (*OS_TICK_HANDLER)(VOID); -UINT32 HalStartSchedule(VOID); +UINT32 ArchStartSchedule(VOID); #ifdef __cplusplus #if __cplusplus diff --git a/arch/include/los_interrupt.h b/arch/include/los_interrupt.h index e39c4461..06daa6ce 100644 --- a/arch/include/los_interrupt.h +++ b/arch/include/los_interrupt.h @@ -40,14 +40,6 @@ extern "C" { #endif /* __cplusplus */ #endif /* __cplusplus */ -/* * - * @ingroup los_interrupt - * Configuration item for interrupt with argument - */ -#ifndef OS_HWI_WITH_ARG -#define OS_HWI_WITH_ARG 0 -#endif - typedef UINT32 HWI_HANDLE_T; typedef UINT16 HWI_PRIOR_T; @@ -56,7 +48,7 @@ typedef UINT16 HWI_MODE_T; typedef UINT32 HWI_ARG_T; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef VOID (*HWI_PROC_FUNC)(VOID *parm); #else typedef VOID (*HWI_PROC_FUNC)(void); @@ -67,20 +59,20 @@ extern UINT32 __stack_chk_guard; extern VOID __stack_chk_fail(VOID); -UINT32 HalIsIntActive(VOID); -#define OS_INT_ACTIVE (HalIsIntActive()) +UINT32 ArchIsIntActive(VOID); +#define OS_INT_ACTIVE (ArchIsIntActive()) #define OS_INT_INACTIVE (!(OS_INT_ACTIVE)) -#define LOS_HwiCreate HalHwiCreate -#define LOS_HwiDelete HalHwiDelete +#define LOS_HwiCreate ArchHwiCreate +#define LOS_HwiDelete ArchHwiDelete -UINT32 HalIntLock(VOID); -#define LOS_IntLock HalIntLock +UINT32 ArchIntLock(VOID); +#define LOS_IntLock ArchIntLock -VOID HalIntRestore(UINT32 intSave); -#define LOS_IntRestore HalIntRestore +VOID ArchIntRestore(UINT32 intSave); +#define LOS_IntRestore ArchIntRestore -UINT32 HalIntUnLock(VOID); -#define LOS_IntUnLock HalIntUnLock +UINT32 ArchIntUnLock(VOID); +#define LOS_IntUnLock ArchIntUnLock /** * @ingroup los_interrupt @@ -105,7 +97,7 @@ UINT32 HalIntUnLock(VOID); * * @see None. */ -extern UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum); +UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum); /** * @ingroup los_interrupt @@ -137,11 +129,11 @@ extern UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum); * * @see None. */ -extern UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg); +UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg); #ifdef __cplusplus #if __cplusplus diff --git a/arch/include/los_mpu.h b/arch/include/los_mpu.h index 82a565f0..e71c4f49 100644 --- a/arch/include/los_mpu.h +++ b/arch/include/los_mpu.h @@ -79,11 +79,11 @@ typedef struct { MpuMemType memType; } MPU_CFG_PARA; -VOID HalMpuEnable(UINT32 defaultRegionEnable); -VOID HalMpuDisable(); -UINT32 HalMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para); -UINT32 HalMpuDisableRegion(UINT32 regionId); -INT32 HalMpuUnusedRegionGet(VOID); +VOID ArchMpuEnable(UINT32 defaultRegionEnable); +VOID ArchMpuDisable(); +UINT32 ArchMpuSetRegion(UINT32 regionId, MPU_CFG_PARA *para); +UINT32 ArchMpuDisableRegion(UINT32 regionId); +INT32 ArchMpuUnusedRegionGet(VOID); #ifdef __cplusplus #if __cplusplus diff --git a/arch/include/los_timer.h b/arch/include/los_timer.h index f9f3f5e0..1650cf83 100644 --- a/arch/include/los_timer.h +++ b/arch/include/los_timer.h @@ -52,11 +52,13 @@ extern "C" { #define RTC_CALIBRATE_SLEEP_TIME 8 #define MACHINE_CYCLE_DEALAY_TIMES (LOSCFG_BASE_CORE_TICK_PER_SECOND << 2) -VOID HalTickLock(VOID); +typedef VOID (*OS_TICK_HANDLER)(VOID); -VOID HalTickUnlock(VOID); +VOID ArchTickLock(VOID); -UINT32 HalEnterSleep(VOID); +VOID ArchTickUnlock(VOID); + +UINT32 ArchEnterSleep(VOID); /** * @ingroup los_timer @@ -78,7 +80,7 @@ UINT32 HalEnterSleep(VOID); * * @see */ -UINT64 HalGetTickCycle(UINT32 *period); +UINT64 ArchGetTickCycle(UINT32 *period); /** * @ingroup los_timer @@ -100,7 +102,7 @@ UINT64 HalGetTickCycle(UINT32 *period); * * @see None */ -extern VOID HalSysTickReload(UINT64 nextResponseTime); +VOID ArchSysTickReload(UINT64 nextResponseTime); #ifdef __cplusplus #if __cplusplus diff --git a/arch/risc-v/nuclei/gcc/los_arch_interrupt.h b/arch/risc-v/nuclei/gcc/los_arch_interrupt.h index ceb59353..4ac3837e 100644 --- a/arch/risc-v/nuclei/gcc/los_arch_interrupt.h +++ b/arch/risc-v/nuclei/gcc/los_arch_interrupt.h @@ -166,7 +166,7 @@ extern VOID HalHwiDefaultHandler(VOID); * * Value: 0x02000909 * - * * Solution:check the input params hwiMode and irqParam of HalHwiCreate or HalHwiDelete whether adapt the current + * * Solution:check the input params hwiMode and irqParam of ArchHwiCreate or ArchHwiDelete whether adapt the current * hwi. */ #define OS_ERRNO_HWI_SHARED_ERROR LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x09) diff --git a/arch/risc-v/nuclei/gcc/los_arch_timer.h b/arch/risc-v/nuclei/gcc/los_arch_timer.h index 7edc6940..66a9bbb9 100644 --- a/arch/risc-v/nuclei/gcc/los_arch_timer.h +++ b/arch/risc-v/nuclei/gcc/los_arch_timer.h @@ -35,7 +35,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/risc-v/nuclei/gcc/los_context.c b/arch/risc-v/nuclei/gcc/los_context.c index a7435b2a..4bc6d545 100644 --- a/arch/risc-v/nuclei/gcc/los_context.c +++ b/arch/risc-v/nuclei/gcc/los_context.c @@ -18,7 +18,6 @@ #include "los_arch_context.h" #include "los_arch_interrupt.h" -#include "los_arch_timer.h" #include "los_task.h" #include "los_memory.h" #include "los_timer.h" @@ -27,12 +26,10 @@ #include "los_debug.h" #include "nuclei_sdk_soc.h" -extern VOID HalHwiInit(VOID); - #define INITIAL_MSTATUS ( MSTATUS_MPP | MSTATUS_MPIE | MSTATUS_FS_INITIAL) #define ALIGN_DOWN(size, align) ((size) & ~((align) - 1)) -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -44,14 +41,14 @@ LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) } } -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { - HalIntLock(); + ArchIntLock(); while (1) { } } -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { UINT32 index; UINT8 *stk = 0; @@ -67,18 +64,17 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI for (index = 1; index < sizeof(TaskContext)/ sizeof(STACK_TYPE); index ++) { ((STACK_TYPE *)context)[index] = OS_TASK_STACK_INIT; } - context->ra = (STACK_TYPE)HalSysExit; + context->ra = (STACK_TYPE)ArchSysExit; context->a0 = (STACK_TYPE)taskID; context->epc = (STACK_TYPE)OsTaskEntry; context->mstatus = INITIAL_MSTATUS; - return (VOID *)context; } extern LosTask g_losTask; -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); @@ -86,7 +82,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) return LOS_OK; /* never return */ } -VOID HalTaskSchedule(VOID) +VOID ArchTaskSchedule(VOID) { SysTimer_SetSWIRQ(); } diff --git a/arch/risc-v/nuclei/gcc/los_dispatch.S b/arch/risc-v/nuclei/gcc/los_dispatch.S index 99123fa2..2af3c846 100644 --- a/arch/risc-v/nuclei/gcc/los_dispatch.S +++ b/arch/risc-v/nuclei/gcc/los_dispatch.S @@ -41,25 +41,25 @@ .section .text .align 4 - .type HalIntLock, %function - .global HalIntLock -HalIntLock: + .type ArchIntLock, %function + .global ArchIntLock +ArchIntLock: csrr a0, mstatus // return value li t0, MSTATUS_MIE // mie csrrc zero, mstatus, t0 ret - .type HalIntUnLock, %function - .global HalIntUnLock -HalIntUnLock: + .type ArchIntUnLock, %function + .global ArchIntUnLock +ArchIntUnLock: csrr a0, mstatus // return value li t0, MSTATUS_MIE // mie csrrs zero, mstatus, t0 ret - .type HalIntRestore, %function - .global HalIntRestore -HalIntRestore: + .type ArchIntRestore, %function + .global ArchIntRestore +ArchIntRestore: csrw mstatus, a0 ret diff --git a/arch/risc-v/nuclei/gcc/los_interrupt.c b/arch/risc-v/nuclei/gcc/los_interrupt.c index 5986a2d0..e5cddd62 100644 --- a/arch/risc-v/nuclei/gcc/los_interrupt.c +++ b/arch/risc-v/nuclei/gcc/los_interrupt.c @@ -46,7 +46,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) } /***************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -59,11 +59,11 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) Output : None Return : LOS_OK on success or error code on failure *****************************************************************************/ - UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) + UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { if (hwiNum > SOC_INT_MAX) { return OS_ERRNO_HWI_NUM_INVALID; @@ -98,12 +98,12 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) } /***************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Return : LOS_OK on success or error code on failure *****************************************************************************/ -LITE_OS_SEC_TEXT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { // change func to default func ECLIC_SetVector(hwiNum, (rv_csr_t)HalHwiDefaultHandler); @@ -177,7 +177,7 @@ __attribute__((always_inline)) inline VOID HalIntExit(VOID) g_intCount -= 1; } -__attribute__((always_inline)) inline UINT32 HalIsIntActive(VOID) +__attribute__((always_inline)) inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } diff --git a/arch/risc-v/nuclei/gcc/los_timer.c b/arch/risc-v/nuclei/gcc/los_timer.c index 6cb730b0..d121e965 100644 --- a/arch/risc-v/nuclei/gcc/los_timer.c +++ b/arch/risc-v/nuclei/gcc/los_timer.c @@ -78,12 +78,12 @@ void HalTickSysTickHandler( void ) } } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { SysTick_Reload(nextResponseTime); } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT64 ticks; UINT32 intSave = LOS_IntLock(); @@ -93,17 +93,17 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return ticks; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { SysTimer_Stop(); } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { SysTimer_Start(); } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { __WFI(); diff --git a/arch/risc-v/riscv32/gcc/los_arch_interrupt.h b/arch/risc-v/riscv32/gcc/los_arch_interrupt.h index 2ba7c92d..2bfbb1ef 100644 --- a/arch/risc-v/riscv32/gcc/los_arch_interrupt.h +++ b/arch/risc-v/riscv32/gcc/los_arch_interrupt.h @@ -243,7 +243,7 @@ extern UINT32 g_intCount; * * Value: 0x02000909 * - * * Solution:check the input params hwiMode and irqParam of HalHwiCreate or HalHwiDelete whether adapt the current + * * Solution:check the input params hwiMode and irqParam of ArchHwiCreate or ArchHwiDelete whether adapt the current * hwi. */ #define OS_ERRNO_HWI_SHARED_ERROR LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x09) diff --git a/arch/risc-v/riscv32/gcc/los_arch_timer.h b/arch/risc-v/riscv32/gcc/los_arch_timer.h index e82b309e..d7a7a9e9 100644 --- a/arch/risc-v/riscv32/gcc/los_arch_timer.h +++ b/arch/risc-v/riscv32/gcc/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/risc-v/riscv32/gcc/los_context.c b/arch/risc-v/riscv32/gcc/los_context.c index e9bb51a0..694f7fba 100644 --- a/arch/risc-v/riscv32/gcc/los_context.c +++ b/arch/risc-v/riscv32/gcc/los_context.c @@ -41,7 +41,7 @@ STATIC UINT32 g_sysNeedSched = FALSE; -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { UINT32 ret; HalHwiInit(); @@ -60,7 +60,7 @@ VOID HalIrqEndCheckNeedSched(VOID) } } -VOID HalTaskSchedule(VOID) +VOID ArchTaskSchedule(VOID) { UINT32 intSave; @@ -81,14 +81,14 @@ VOID HalTaskSchedule(VOID) return; } -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { - HalIntLock(); + ArchIntLock(); while (1) { } } -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { UINT32 index; TaskContext *context = NULL; @@ -132,11 +132,11 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->t2 = T2_INIT_VALUE; context->t1 = T1_INIT_VALUE; context->t0 = T0_INIT_VALUE; - context->ra = (UINT32)(UINTPTR)HalSysExit; + context->ra = (UINT32)(UINTPTR)ArchSysExit; return (VOID *)context; } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { (VOID)LOS_IntLock(); OsSchedStart(); diff --git a/arch/risc-v/riscv32/gcc/los_dispatch.S b/arch/risc-v/riscv32/gcc/los_dispatch.S index 4843fa90..da2dfe27 100644 --- a/arch/risc-v/riscv32/gcc/los_dispatch.S +++ b/arch/risc-v/riscv32/gcc/los_dispatch.S @@ -33,9 +33,9 @@ .global HalEnableIRQ .global HalDisableIRQ -.global HalIntLock -.global HalIntUnLock -.global HalIntRestore +.global ArchIntLock +.global ArchIntUnLock +.global ArchIntRestore .global HalStartToRun .global HalTaskContextSwitch .extern __irq_stack_top @@ -166,18 +166,18 @@ HalEnableIRQ: csrsi mstatus, RISCV_MSTATUS_MIE ret -HalIntLock: +ArchIntLock: csrr a0, mstatus // return value li t0, RISCV_MSTATUS_MIE // mie csrrc zero, mstatus, t0 ret -HalIntUnLock: +ArchIntUnLock: csrr a0, mstatus // return value li t0, RISCV_MSTATUS_MIE // mie csrrs zero, mstatus, t0 ret -HalIntRestore: +ArchIntRestore: csrw mstatus, a0 ret diff --git a/arch/risc-v/riscv32/gcc/los_interrupt.c b/arch/risc-v/riscv32/gcc/los_interrupt.c index a670e8a3..1ab8b882 100644 --- a/arch/risc-v/riscv32/gcc/los_interrupt.c +++ b/arch/risc-v/riscv32/gcc/los_interrupt.c @@ -145,13 +145,13 @@ LITE_OS_SEC_TEXT HWI_HANDLE_FORM_S *HalGetHwiForm(VOID) } -inline UINT32 HalIsIntActive(VOID) +inline UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } /***************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -161,7 +161,7 @@ inline UINT32 HalIsIntActive(VOID) Output : None Return : LOS_OK on success or error code on failure *****************************************************************************/ -LITE_OS_SEC_TEXT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, +LITE_OS_SEC_TEXT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, HWI_PRIOR_T hwiPrio, HWI_MODE_T hwiMode, HWI_PROC_FUNC hwiHandler, @@ -198,12 +198,12 @@ LITE_OS_SEC_TEXT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /***************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Return : LOS_OK on success or error code on failure *****************************************************************************/ -LITE_OS_SEC_TEXT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; diff --git a/arch/risc-v/riscv32/gcc/los_timer.c b/arch/risc-v/riscv32/gcc/los_timer.c index 0ac2dc6f..638d8569 100644 --- a/arch/risc-v/riscv32/gcc/los_timer.c +++ b/arch/risc-v/riscv32/gcc/los_timer.c @@ -50,7 +50,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; /* never return */ } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { UINT64 timeMax = (UINT64)LOSCFG_BASE_CORE_TICK_RESPONSE_MAX - 1; UINT64 timer; @@ -71,7 +71,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) HalIrqEnable(RISCV_MACH_TIMER_IRQ); } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { (VOID)period; UINT32 timerL, timerH; @@ -81,7 +81,7 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return OS_COMBINED_64(timerH, timerL); } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { wfi(); diff --git a/arch/xtensa/lx6/gcc/los_arch_atomic.h b/arch/xtensa/lx6/gcc/los_arch_atomic.h deleted file mode 100644 index 0a51c9e9..00000000 --- a/arch/xtensa/lx6/gcc/los_arch_atomic.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _LOS_ARCH_ATOMIC_H -#define _LOS_ARCH_ATOMIC_H - -#include "los_compiler.h" - -#ifdef __cplusplus -#if __cplusplus -extern "C" { -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -/** - * @ingroup los_arch_atomic - * @brief Atomic exchange for 32-bit variable. - * - * @par Description: - * This API is used to implement the atomic exchange for 32-bit variable. - * @attention - * - * - * @param v [IN] The variable pointer. - * @param val [IN] The exchange value. - * - * @retval #INT32 The previous value of the atomic variable - * @par Dependency: - * - * @see - */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) -{ - UINT32 intSave; - INT32 prevVal; - - intSave = LOS_IntLock(); - prevVal = *v; - *v = val; - LOS_IntRestore(intSave); - - return prevVal; -} - -/** - * @ingroup los_arch_atomic - * @brief Atomic auto-decrement. - * - * @par Description: - * This API is used to implement the atomic auto-decrement and return the result of auto-decrement. - * @attention - * - * - * @param v [IN] The addSelf variable pointer. - * - * @retval #INT32 The return value of variable auto-decrement. - * @par Dependency: - * - * @see - */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) -{ - UINT32 intSave; - - intSave = LOS_IntLock(); - *v -= 1; - LOS_IntRestore(intSave); - - return intSave; -} - -/** - * @ingroup los_arch_atomic - * @brief Atomic exchange for 32-bit variable with compare. - * - * @par Description: - * This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal. - * @attention - * - * - * @param v [IN] The variable pointer. - * @param val [IN] The new value. - * @param oldVal [IN] The old value. - * - * @retval TRUE The previous value of the atomic variable is not equal to oldVal. - * @retval FALSE The previous value of the atomic variable is equal to oldVal. - * @par Dependency: - * - * @see - */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) -{ - UINT32 intSave; - INT32 prevVal; - - intSave = LOS_IntLock(); - prevVal = *v; - if (prevVal == oldVal) { - *v = val; - } - LOS_IntRestore(intSave); - - return (prevVal != oldVal); -} - -#ifdef __cplusplus -#if __cplusplus -} -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -#endif /* _LOS_ARCH_ATOMIC_H */ diff --git a/arch/xtensa/lx6/gcc/los_arch_interrupt.h b/arch/xtensa/lx6/gcc/los_arch_interrupt.h index 9a2d79ed..71bf22db 100644 --- a/arch/xtensa/lx6/gcc/los_arch_interrupt.h +++ b/arch/xtensa/lx6/gcc/los_arch_interrupt.h @@ -199,7 +199,7 @@ extern UINT32 g_intCount; */ #define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) /* * * @ingroup los_arch_interrupt * Set interrupt vector table. diff --git a/arch/xtensa/lx6/gcc/los_arch_timer.h b/arch/xtensa/lx6/gcc/los_arch_timer.h index 2b63c8ce..a8c64a74 100644 --- a/arch/xtensa/lx6/gcc/los_arch_timer.h +++ b/arch/xtensa/lx6/gcc/los_arch_timer.h @@ -34,7 +34,7 @@ #include "los_config.h" #include "los_compiler.h" -#include "los_context.h" +#include "los_timer.h" #ifdef __cplusplus #if __cplusplus diff --git a/arch/xtensa/lx6/gcc/los_context.c b/arch/xtensa/lx6/gcc/los_context.c index a2b906b5..4d7fd914 100644 --- a/arch/xtensa/lx6/gcc/los_context.c +++ b/arch/xtensa/lx6/gcc/los_context.c @@ -96,19 +96,19 @@ UINT32 g_stackDefault[] = { 0x00000000, /* REG_OFF_SPILL_RESERVED */ }; -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) +LITE_OS_SEC_TEXT_INIT VOID ArchInit(VOID) { HalHwiInit(); } -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) +LITE_OS_SEC_TEXT_MINOR VOID ArchSysExit(VOID) { LOS_IntLock(); while (1) { } } -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) { TaskContext *context = NULL; errno_t result; @@ -141,7 +141,7 @@ VOID HalStartToRun(VOID) __asm__ volatile ("call0 OsStartToRun"); } -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) +LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) { UINT32 ret; @@ -157,7 +157,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) return LOS_OK; } -VOID HalTaskSchedule(VOID) +VOID ArchTaskSchedule(VOID) { UINT32 intSave; @@ -180,6 +180,6 @@ VOID HalTaskSchedule(VOID) VOID HalIrqEndCheckNeedSched(VOID) { if (g_sysNeedSched && g_taskScheduled && LOS_CHECK_SCHEDULE) { - HalTaskSchedule(); + ArchTaskSchedule(); } } diff --git a/arch/xtensa/lx6/gcc/los_interrupt.c b/arch/xtensa/lx6/gcc/los_interrupt.c index 81374ceb..6cd2879f 100644 --- a/arch/xtensa/lx6/gcc/los_interrupt.c +++ b/arch/xtensa/lx6/gcc/los_interrupt.c @@ -50,7 +50,7 @@ UINT32 g_intCount = 0; */ STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0}; -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) typedef struct { HWI_PROC_FUNC pfnHandler; @@ -105,7 +105,7 @@ UINT32 HwiNumValid(UINT32 num) * @ingroup los_hwi * Lock all interrupt. */ -UINT32 HalIntLock(VOID) +UINT32 ArchIntLock(VOID) { UINT32 ret; @@ -117,7 +117,7 @@ UINT32 HalIntLock(VOID) * @ingroup los_hwi * Restore interrupt status. */ -VOID HalIntRestore(UINT32 intSave) +VOID ArchIntRestore(UINT32 intSave) { __asm__ volatile("wsr.ps %0; rsync" : : "r"(intSave) : "memory"); } @@ -126,7 +126,7 @@ VOID HalIntRestore(UINT32 intSave) * @ingroup los_hwi * Unlock interrupt. */ -UINT32 HalIntUnLock(VOID) +UINT32 ArchIntUnLock(VOID) { UINT32 intSave; @@ -139,7 +139,7 @@ UINT32 HalIntUnLock(VOID) * @ingroup los_hwi * Determine if the interrupt is locked */ -STATIC INLINE UINT32 HalIntLocked(VOID) +STATIC INLINE UINT32 ArchIntLocked(VOID) { UINT32 intSave; __asm__ volatile("rsr %0, ps " : "=r"(intSave) : : "memory"); @@ -234,7 +234,7 @@ UINT32 HalIrqClear(HWI_HANDLE_T vector) return LOS_OK; } -INLINE UINT32 HalIsIntActive(VOID) +INLINE UINT32 ArchIsIntActive(VOID) { return (g_intCount > 0); } @@ -286,7 +286,7 @@ VOID HalInterrupt(VOID) HalPreInterruptHandler(hwiIndex); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); } @@ -307,7 +307,7 @@ VOID HalInterrupt(VOID) } /* **************************************************************************** - Function : HalHwiCreate + Function : ArchHwiCreate Description : create hardware interrupt Input : hwiNum --- hwi num to create hwiPrio --- priority of the hwi @@ -317,11 +317,11 @@ VOID HalInterrupt(VOID) Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) +UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T mode, + HWI_PROC_FUNC handler, + HWI_ARG_T arg) { UINT32 intSave; @@ -342,7 +342,7 @@ UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(hwiNum, handler, arg); #else OsSetVector(hwiNum, handler); @@ -355,13 +355,13 @@ UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, } /* **************************************************************************** - Function : HalHwiDelete + Function : ArchHwiDelete Description : Delete hardware interrupt Input : hwiNum --- hwi num to delete Output : None Return : LOS_OK on success or error code on failure **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) +LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum) { UINT32 intSave; @@ -522,7 +522,7 @@ VOID HalExcHandleEntry(UINTPTR faultAddr, EXC_CONTEXT_S *excBufAddr, UINT32 type OsDoExcHook(EXC_INTERRUPT); OsExcInfoDisplay(&g_excInfo); - HalSysExit(); + ArchSysExit(); } /* Stack protector */ diff --git a/arch/xtensa/lx6/gcc/los_timer.c b/arch/xtensa/lx6/gcc/los_timer.c index d7d6c642..e1433e2f 100644 --- a/arch/xtensa/lx6/gcc/los_timer.c +++ b/arch/xtensa/lx6/gcc/los_timer.c @@ -82,7 +82,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) } #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) +#if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1) OsSetVector(OS_TICK_INT_NUM, (HWI_PROC_FUNC)handler, NULL); #else OsSetVector(OS_TICK_INT_NUM, (HWI_PROC_FUNC)handler); @@ -102,7 +102,7 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) return LOS_OK; } -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) +WEAK VOID ArchSysTickReload(UINT64 nextResponseTime) { UINT32 timerL; timerL = GetCcount(); @@ -110,7 +110,7 @@ WEAK VOID HalSysTickReload(UINT64 nextResponseTime) SetCcompare(timerL); } -WEAK UINT64 HalGetTickCycle(UINT32 *period) +WEAK UINT64 ArchGetTickCycle(UINT32 *period) { UINT32 tickCycleH; UINT32 tickCycleL; @@ -132,12 +132,12 @@ WEAK UINT64 HalGetTickCycle(UINT32 *period) return tickCycle; } -WEAK VOID HalTickLock(VOID) +WEAK VOID ArchTickLock(VOID) { HalIrqMask(OS_TICK_INT_NUM); } -WEAK VOID HalTickUnlock(VOID) +WEAK VOID ArchTickUnlock(VOID) { HalIrqUnmask(OS_TICK_INT_NUM); } @@ -152,7 +152,7 @@ VOID Dsb(VOID) __asm__ volatile("dsync" : : : "memory"); } -UINT32 HalEnterSleep(VOID) +UINT32 ArchEnterSleep(VOID) { Dsb(); Wfi(); diff --git a/components/exchook/los_exc_info.c b/components/exchook/los_exc_info.c index e06a0dc7..a4ab3452 100644 --- a/components/exchook/los_exc_info.c +++ b/components/exchook/los_exc_info.c @@ -238,7 +238,7 @@ VOID OsExcRegister(ExcInfoType type, EXC_INFO_SAVE_CALLBACK func, VOID *arg) { ExcInfoArray *excInfo = NULL; if ((type >= OS_EXC_TYPE_MAX) || (func == NULL)) { - PRINT_ERR("HalExcRegister ERROR!\n"); + PRINT_ERR("OsExcRegister ERROR!\n"); return; } excInfo = &(g_excArray[type]); diff --git a/components/power/los_pm.c b/components/power/los_pm.c index 3f4f6d18..a765e28a 100644 --- a/components/power/los_pm.c +++ b/components/power/los_pm.c @@ -77,11 +77,11 @@ STATIC VOID OsPmSysctrlInit(VOID) /* Default handler functions, which are implemented by the product */ g_sysctrl.early = NULL; g_sysctrl.late = NULL; - g_sysctrl.normalSuspend = HalEnterSleep; + g_sysctrl.normalSuspend = ArchEnterSleep; g_sysctrl.normalResume = NULL; - g_sysctrl.lightSuspend = HalEnterSleep; + g_sysctrl.lightSuspend = ArchEnterSleep; g_sysctrl.lightResume = NULL; - g_sysctrl.deepSuspend = HalEnterSleep; + g_sysctrl.deepSuspend = ArchEnterSleep; g_sysctrl.deepResume = NULL; g_sysctrl.shutdownSuspend = NULL; g_sysctrl.shutdownResume = NULL; diff --git a/kernel/include/los_config.h b/kernel/include/los_config.h index e70ffabf..9f81f09a 100644 --- a/kernel/include/los_config.h +++ b/kernel/include/los_config.h @@ -623,6 +623,14 @@ extern UINT8 *m_aucSysMem0; #define LOSCFG_TASK_MEM_USED 0 #endif +/* * + * @ingroup los_interrupt + * Configuration item for interrupt with argument + */ +#ifndef LOSCFG_PLATFORM_HWI_WITH_ARG +#define LOSCFG_PLATFORM_HWI_WITH_ARG 0 +#endif + #ifdef __cplusplus #if __cplusplus } diff --git a/kernel/src/los_init.c b/kernel/src/los_init.c index 44cdb4bd..afd20702 100644 --- a/kernel/src/los_init.c +++ b/kernel/src/los_init.c @@ -84,7 +84,7 @@ LITE_OS_SEC_TEXT_INIT VOID LOS_Reboot(VOID) { OsDoExcHook(EXC_REBOOT); - HalSysExit(); + ArchSysExit(); } LITE_OS_SEC_TEXT_INIT VOID LOS_Panic(const CHAR *fmt, ...) @@ -96,7 +96,7 @@ LITE_OS_SEC_TEXT_INIT VOID LOS_Panic(const CHAR *fmt, ...) #if (LOSCFG_BACKTRACE_TYPE != 0) LOS_BackTrace(); #endif - HalSysExit(); + ArchSysExit(); } @@ -116,7 +116,7 @@ LITE_OS_SEC_TEXT_INIT static VOID OsRegister(VOID) LITE_OS_SEC_TEXT_INIT UINT32 LOS_Start(VOID) { - return HalStartSchedule(); + return ArchStartSchedule(); } /***************************************************************************** @@ -146,7 +146,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 LOS_KernelInit(VOID) return ret; } - HalArchInit(); + ArchInit(); ret = OsTaskInit(); if (ret != LOS_OK) { diff --git a/kernel/src/los_sched.c b/kernel/src/los_sched.c index e30998b0..39c38735 100644 --- a/kernel/src/los_sched.c +++ b/kernel/src/los_sched.c @@ -97,7 +97,7 @@ VOID OsSchedUpdateSchedTimeBase(VOID) { UINT32 period = 0; - (VOID)HalGetTickCycle(&period); + (VOID)ArchGetTickCycle(&period); g_schedTimerBase += period; } @@ -113,12 +113,12 @@ VOID OsSchedTimerBaseReset(UINT64 currTime) UINT64 OsGetCurrSysTimeCycle(VOID) { #if (LOSCFG_BASE_CORE_TICK_WTIMER == 1) - return HalGetTickCycle(NULL); + return ArchGetTickCycle(NULL); #else STATIC UINT64 oldSchedTime = 0; UINT32 period = 0; UINT32 intSave = LOS_IntLock(); - UINT64 time = HalGetTickCycle(&period); + UINT64 time = ArchGetTickCycle(&period); UINT64 schedTime = g_schedTimerBase + time; if (schedTime < oldSchedTime) { /* Turn the timer count */ @@ -184,7 +184,7 @@ STATIC INLINE VOID OsSchedTickReload(UINT64 nextResponseTime, UINT32 responseID, g_schedResponseID = OS_INVALID; } g_schedResponseTime = nextExpireTime; - HalSysTickReload(nextResponseTime); + ArchSysTickReload(nextResponseTime); } STATIC INLINE VOID OsSchedSetNextExpireTime(UINT64 startTime, UINT32 responseID, UINT64 taskEndTime, BOOL timeUpdate) @@ -663,7 +663,7 @@ VOID LOS_SchedTickHandler(VOID) g_schedResponseTime = OS_SCHED_MAX_RESPONSE_TIME; if (LOS_CHECK_SCHEDULE) { - HalTaskSchedule(); + ArchTaskSchedule(); } else { OsSchedUpdateExpireTime(g_losTask.runTask->startTime, TRUE); } @@ -674,7 +674,7 @@ VOID LOS_SchedTickHandler(VOID) VOID LOS_Schedule(VOID) { if (g_taskScheduled && LOS_CHECK_SCHEDULE) { - HalTaskSchedule(); + ArchTaskSchedule(); } } diff --git a/kernel/src/los_task.c b/kernel/src/los_task.c index e50a6e09..d5a5b925 100644 --- a/kernel/src/los_task.c +++ b/kernel/src/los_task.c @@ -187,7 +187,7 @@ LITE_OS_SEC_TEXT VOID OsIdleTask(VOID) if (PmEnter != NULL) { PmEnter(); } else { - (VOID)HalEnterSleep(); + (VOID)ArchEnterSleep(); } } } @@ -527,7 +527,7 @@ LITE_OS_SEC_TEXT STATIC VOID OsTaskStackProtect(VOID) STATIC INT32 id = -1; if (id == -1) { - id = HalMpuUnusedRegionGet(); + id = ArchMpuUnusedRegionGet(); if (id < 0) { PRINT_ERR("%s %d, get unused id failed!\n", __FUNCTION__, __LINE__); return; @@ -541,10 +541,10 @@ LITE_OS_SEC_TEXT STATIC VOID OsTaskStackProtect(VOID) mpuAttr.shareability = MPU_NO_SHARE; mpuAttr.permission = MPU_RO_BY_PRIVILEGED_ONLY; - HalMpuDisable(); - (VOID)HalMpuDisableRegion(id); - (VOID)HalMpuSetRegion(id, &mpuAttr); - HalMpuEnable(1); + ArchMpuDisable(); + (VOID)ArchMpuDisableRegion(id); + (VOID)ArchMpuSetRegion(id, &mpuAttr); + ArchMpuEnable(1); } #endif #endif @@ -683,7 +683,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 OsNewTaskInit(LosTaskCB *taskCB, TSK_INIT_PARAM_S * taskCB->eventMask = 0; taskCB->taskName = taskInitParam->pcName; taskCB->msg = NULL; - taskCB->stackPointer = HalTskStackInit(taskCB->taskID, taskInitParam->uwStackSize, topOfStack); + taskCB->stackPointer = ArchTskStackInit(taskCB->taskID, taskInitParam->uwStackSize, topOfStack); SET_SORTLIST_VALUE(&taskCB->sortList, OS_SORT_LINK_INVALID_TIME); LOS_EventInit(&(taskCB->event)); diff --git a/kernel/src/mm/los_membox.c b/kernel/src/mm/los_membox.c index c7c1517b..ba2c57c6 100644 --- a/kernel/src/mm/los_membox.c +++ b/kernel/src/mm/los_membox.c @@ -64,8 +64,8 @@ STATIC INLINE UINT32 OsMemBoxCheckMagic(LOS_MEMBOX_NODE *node) ((VOID *)((UINT8 *)(addr) + OS_MEMBOX_NODE_HEAD_SIZE)) #define OS_MEMBOX_NODE_ADDR(addr) \ ((LOS_MEMBOX_NODE *)(VOID *)((UINT8 *)(addr) - OS_MEMBOX_NODE_HEAD_SIZE)) -#define MEMBOX_LOCK(state) ((state) = HalIntLock()) -#define MEMBOX_UNLOCK(state) HalIntRestore(state) +#define MEMBOX_LOCK(state) ((state) = ArchIntLock()) +#define MEMBOX_UNLOCK(state) ArchIntRestore(state) STATIC INLINE UINT32 OsCheckBoxMem(const LOS_MEMBOX_INFO *boxInfo, const VOID *node) { diff --git a/targets/riscv_nuclei_gd32vf103_soc_gcc/Src/task_sample.c b/targets/riscv_nuclei_gd32vf103_soc_gcc/Src/task_sample.c index f2164010..4951992a 100644 --- a/targets/riscv_nuclei_gd32vf103_soc_gcc/Src/task_sample.c +++ b/targets/riscv_nuclei_gd32vf103_soc_gcc/Src/task_sample.c @@ -100,8 +100,8 @@ VOID TaskSample(VOID) printf("Task2 create failed\n"); } - HalHwiInit(); - HalHwiCreate(EXTI0_IRQn, 9, ECLIC_NON_VECTOR_INTERRUPT, EXTI0_IRQHandler, ECLIC_LEVEL_TRIGGER); + LOS_HwiInit(); + LOS_HwiCreate(EXTI0_IRQn, 9, ECLIC_NON_VECTOR_INTERRUPT, EXTI0_IRQHandler, ECLIC_LEVEL_TRIGGER); } VOID RunTaskSample(VOID) diff --git a/testsuites/include/osTest.h b/testsuites/include/osTest.h index dca1176c..5783002e 100644 --- a/testsuites/include/osTest.h +++ b/testsuites/include/osTest.h @@ -318,7 +318,7 @@ typedef struct tagHwiHandleForm { UINT32 uwPrioMask; } HWI_HANDLE_FORM_S; #endif -#define TEST_HwiCreate(ID, prio, mode, Func, arg) HalHwiCreate(ID, prio, mode, Func, arg) +#define TEST_HwiCreate(ID, prio, mode, Func, arg) LOS_HwiCreate(ID, prio, mode, Func, arg) #define uart_printf_func printf extern VOID ItSuiteLosTask(void); diff --git a/testsuites/sample/kernel/power/It_los_pm_002.c b/testsuites/sample/kernel/power/It_los_pm_002.c index dda9cc1f..69911f12 100644 --- a/testsuites/sample/kernel/power/It_los_pm_002.c +++ b/testsuites/sample/kernel/power/It_los_pm_002.c @@ -77,7 +77,7 @@ static UINT32 SysSuspend(VOID) UINT64 timeout = LOS_SchedTickTimeoutNsGet(); printf("pm timeout : %u ns -> %u ticks\n", (UINT32)timeout, (UINT32)(timeout / OS_NS_PER_TICK)); - return HalEnterSleep(); + return ArchEnterSleep(); } static UINT32 SystemPmEarly(UINT32 mode) @@ -112,7 +112,7 @@ static VOID SystemPmLate(UINT32 mode) static LosPmSysctrl g_sysctrl = { .early = SystemPmEarly, .late = SystemPmLate, - .normalSuspend = HalEnterSleep, + .normalSuspend = ArchEnterSleep, .normalResume = NULL, .lightSuspend = SysSuspend, .lightResume = SysResume, diff --git a/testsuites/sample/kernel/power/It_los_pm_003.c b/testsuites/sample/kernel/power/It_los_pm_003.c index 0517c35b..3304de66 100644 --- a/testsuites/sample/kernel/power/It_los_pm_003.c +++ b/testsuites/sample/kernel/power/It_los_pm_003.c @@ -77,7 +77,7 @@ static UINT32 SysSuspend(VOID) UINT64 timeout = LOS_SchedTickTimeoutNsGet(); printf("pm timeout : %u ns -> %u ticks\n", (UINT32)timeout, (UINT32)(timeout / OS_NS_PER_TICK)); - return HalEnterSleep(); + return ArchEnterSleep(); } static UINT32 SystemPmEarly(UINT32 mode) @@ -114,7 +114,7 @@ static VOID SystemPmLate(UINT32 mode) static LosPmSysctrl g_sysctrl = { .early = SystemPmEarly, .late = SystemPmLate, - .normalSuspend = HalEnterSleep, + .normalSuspend = ArchEnterSleep, .normalResume = NULL, .lightSuspend = SysSuspend, .lightResume = SysResume, diff --git a/testsuites/src/osTest.c b/testsuites/src/osTest.c index e9bac759..10afaf54 100644 --- a/testsuites/src/osTest.c +++ b/testsuites/src/osTest.c @@ -311,7 +311,7 @@ VOID TestHwiUnTrigger(UINT32 hwiNum) UINT32 TestHwiDelete(UINT32 hwiNum) { - UINT32 ret = HalHwiDelete(hwiNum); + UINT32 ret = LOS_HwiDelete(hwiNum); if (ret != LOS_OK) { return LOS_NOK; }