60 lines
3.6 KiB
Markdown
60 lines
3.6 KiB
Markdown
# aiit-arm64
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## 综述
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<div class ="tablebox_aiit-arm64">
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<div class="imgbox">
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<img src="" alt="aiit-arm64"/>
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</div>
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<p>AIIT-ARM64</p>
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<el-divider></el-divider>
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<span>XiUOS最新分支支持stm32f407-st-discovery开发板，该开发板作为一种标准的板子，支持各种上层组件和应用程序。</span>
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</div>
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## 硬件特点
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+ Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
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+ Memories
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<p style="text-indent:2em">1. Up to 1 Mbyte of Flash memory</p>
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<p style="text-indent:2em">2. Up to 192+4 Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory) data RAM </p>
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<p style="text-indent:2em">3. Up to 192+4 Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory) data RAM</p>
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<p style="text-indent:2em">4. 512 bytes of OTP memory</p>
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<p style="text-indent:2em">5. Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories</p>
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+ LCD parallel interface, 8080/6800 modes
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+ Clock, reset and supply management
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<p style="text-indent:2em">1. 1.8 V to 3.6 V application supply and I/Os</p>
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<p style="text-indent:2em">2. POR, PDR, PVD and BOR</p>
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<p style="text-indent:2em">3. 4-to-26 MHz crystal oscillator </p>
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<p style="text-indent:2em">4. Internal 16 MHz factory-trimmed RC (1% accuracy)</p>
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<p style="text-indent:2em">5. 32 kHz oscillator for RTC with calibration</p>
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<p style="text-indent:2em">6. Internal 32 kHz RC with calibration </p>
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+ Low-power operation
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<p style="text-indent:2em">1. Sleep, Stop and Standby modes </p>
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<p style="text-indent:2em">2. V<sub>BAT</sub> supply for RTC, 20×32 bit backup registers + optional 4 KB backup SRAM </p>
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+ 3×12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode
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+ 2×12-bit D/A converters
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+ General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
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+ Up to 17 timers: up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
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+ Debug mode
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<p style="text-indent:2em">1. Serial wire debug (SWD) & JTAG interfaces </p>
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<p style="text-indent:2em">2. Cortex-M4 Embedded Trace Macrocell™ </p>
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+ Up to 140 I/O ports with interrupt capability
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<p style="text-indent:2em">1. Up to 136 fast I/Os up to 84 MHz </p>
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<p style="text-indent:2em">2. Up to 138 5 V-tolerant I/Os </p>
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+ Up to 15 communication interfaces
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<p style="text-indent:2em">1. Up to 3 × I<sup>2</sup>C interfaces (SMBus/PMBus) </p>
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<p style="text-indent:2em">2. Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control) </p>
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<p style="text-indent:2em">3. Up to 3 SPIs (42 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock </p>
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<p style="text-indent:2em">4. 2 × CAN interfaces (2.0B Active) </p>
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<p style="text-indent:2em">5. SDIO interface </p>
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+ Advanced connectivity
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<p style="text-indent:2em">1. USB 2.0 full-speed device/host/OTG controller with on-chip PHY </p>
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<p style="text-indent:2em">2. USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI</p>
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<p style="text-indent:2em">3. 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII </p>
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+ 8- to 14-bit parallel camera interface up to 54 Mbytes/s
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+ True random number generator
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+ CRC calculation unit
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+ 96-bit unique ID
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+ RTC: subsecond accuracy, hardware calendar
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## 支持的功能
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