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Rajalakshmi Srinivasaraghavan 7d46e31de1 POWER10: Optimize dgemv_n 
Handling as 4x8 with vector pairs gives better performance than
existing code in POWER10.
2020-11-29 15:28:28 -06:00
..
alpha
Add implementations of ssum/dsum and csum/zsum
2019-03-30 22:05:11 +01:00
arm
fix sum optimize issues
2020-11-10 16:16:38 +08:00
arm64
Merge pull request #2867 from Qiyu8/usimd-floatdot
2020-10-10 12:10:25 +02:00
generic
Add the support for RISC-V Vector.
2020-10-15 16:09:02 +08:00
ia64
Add ia64 implementation of ?sum
2019-03-30 22:18:03 +01:00
mips
Delete KERNEL.1004K
2020-04-19 15:44:30 +02:00
mips64
Fix compilation problem on loongson platform
2020-04-09 19:28:15 +08:00
power
POWER10: Optimize dgemv_n
2020-11-29 15:28:28 -06:00
riscv64
Refs #2899
2020-11-10 09:38:04 +08:00
simd
fix the CI failure of lack the head
2020-11-12 17:35:17 +08:00
sparc
Add SPARC implementation of ?sum
2019-03-30 22:25:06 +01:00
x86
Enable COOPERLAKE build target
2020-08-13 06:18:00 +08:00
x86_64
Merge pull request #2988 from xiegengxin/smp-asum
2020-11-22 12:24:13 +01:00
zarch
s390x: fix cscal and zscal implementations
2020-09-21 13:10:05 +02:00
CMakeLists.txt
Change "HALF" and "sh" to "BFLOAT16" and "sb"
2020-10-12 00:00:55 +02:00
Makefile
modify system.cmake to enable fma flag
2020-11-13 10:20:24 +08:00
Makefile.L1
Fix build issues with bfloat16
2020-10-13 11:00:22 -05:00
Makefile.L2
Implementation of BF16 based gemv
2020-10-29 02:08:23 +08:00
Makefile.L3
Merge branch 'develop' into risc-v
2020-10-16 23:27:38 +08:00
Makefile.LA
Support NO_LAPACK=1 to build the lib without LAPACK functions.
2011-03-04 11:51:32 +08:00
setparam-ref.c
Implementation of BF16 based gemv
2020-10-29 02:08:23 +08:00