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7904 Commits

Author SHA1 Message Date
Martin Kroeker d02c61e82e
Update lowercase cpunames for RISC-V 2024-02-04 10:01:27 +01:00
Martin Kroeker 7228c708d7
Merge pull request #4461 from markdryan/cpuid_riscv64_crash 
Fix two issues with cpuid_riscv64.c
 2024-02-04 09:57:00 +01:00
Martin Kroeker 3848d4e9f4
Merge pull request #4477 from martin-frbg/c910caxpy 
Temporarily disable the CAXPY/ZAXPY kernels for C910V to workaround a CI hang
 2024-02-04 01:10:57 +01:00
Martin Kroeker 4d8dee508c
temporarily disable the CAXPY/ZAXPY kernels 2024-02-04 01:05:03 +01:00
Martin Kroeker 27816fa929
Merge pull request #4472 from sergei-lewis/dev/slewis/merge-from-riscv 
Merge risc-v branch to develop
 2024-02-03 20:56:11 +01:00
Sergei Lewis 3ffd6868d7 Merge branch 'develop' into dev/slewis/merge-from-riscv 2024-02-01 11:29:41 +00:00
Sergei Lewis a3b0ef6596 Restore riscv64 fixes from develop branch: dot product double precision accumulation, zscal NaN handling 2024-02-01 10:32:00 +00:00
Martin Kroeker ec74dcd213
Merge pull request #4470 from martin-frbg/issue4455 
Add CBLAS interfaces for BLAS extensions ?AMIN/?AMAX and C/ZAXPYC
 2024-01-31 23:51:01 +01:00
Martin Kroeker 47bd064763
Fix names in build rules 2024-01-31 20:49:43 +01:00
Martin Kroeker a7d004e820
Fix CBLAS prototype 2024-01-31 17:55:42 +01:00
Martin Kroeker b54cda8490
Unify creation of CBLAS interfaces for ?AMIN/?AMAX and C/ZAXPYC between gmake and cmake builds 2024-01-31 16:00:52 +01:00
Martin Kroeker 1a6fdb0353
Add prototypes for extensions ?AMIN/?AMAX and CAXPYC/ZAXPYC 2024-01-31 15:57:57 +01:00
Martin Kroeker d1343302bd
Merge pull request #4465 from XiWeiGu/utest-zscal 
utest: Add tests for zscal
 2024-01-31 14:19:19 +01:00
gxw 969601a1dc X86_64: Fixed bug in zscal 
Fixed handling of NAN and INF arguments when
inc is greater than 1.
 2024-01-31 11:23:59 +08:00
Martin Kroeker 98c9ff3194
Merge pull request #4464 from XiWeiGu/loongarch64-zscal 
LoongArch64: Handle NAN and INF
 2024-01-30 22:53:29 +01:00
Martin Kroeker 9f0630187a
Merge pull request #4463 from XiWeiGu/loongarch64-zamax-zamin 
Loongarch64: amax and amin
 2024-01-30 18:01:30 +01:00
gxw bb043a021f utest: Add tests for zscal 2024-01-30 17:42:37 +08:00
gxw 83ce97a4ca LoongArch64: Handle NAN and INF 2024-01-30 17:17:30 +08:00
gxw 3d4dfd0085 Benchmark: Rename the executable file names for {sc/dz}a{min/max} 
No interface named {c/z}a{min/max}, keeping it would
cause ambiguity
 2024-01-30 11:33:01 +08:00
gxw a79d117405 LoogArch64: Fixed bug for {s/d}amin 2024-01-30 11:32:57 +08:00
gxw 519ea6e87a utest: Add utest for the {sc/dz}amax and {s/d/sc/dz}amin 2024-01-30 11:32:36 +08:00
Sergei Lewis 1093def0d1 Merge branch 'risc-v' into develop 2024-01-29 11:11:39 +00:00
Martin Kroeker 8892121130
Merge pull request #4462 from martin-frbg/issue4449 
Use +sve in arch declarations of the fallback paths for SVE targets
 2024-01-26 22:41:16 +01:00
Martin Kroeker 48a4c4d454
Use +sve in arch declarations of the fallback paths for SVE targets 2024-01-26 16:30:52 +01:00
Mark Ryan e0b610d01f Harmonize riscv64 LIBNAME for forced and non-forced targets 
The forced values for LIBNAME were either riscv64_generic or c910v
while the non-forced value of LIBNAME was always riscv64.
 2024-01-26 15:18:18 +00:00
Mark Ryan ec2aa32eb0 Fix crash in cpuid_riscv64.c 
The crash is reproducible when building OpenBLAS without forcing a
target in a riscv64 container running on an X86_64 machine with an
older version of QEMU, e.g., 7.0.0, registered with binfmt_misc to
run riscv64 binaries.  With this setup, cat /proc/cpuinfo in the
container returns the cpu information for the host, which contains a
"model name" string, and we execute the buggy code.  The code in
question is searching in an uninitialised buffer for the ':' character
and doesn't check to see whether it was found or not.  This can result
in pmodel containing the pointer value 1 and a crash when pmodel is
defererenced.  The algorithm to detect the C910V CPU has not been
modified, merely fixed to prevent the crash.

A few additional checks for NULL pointers are added to improve the
robustness of the code and a whitespace error is corrected.
 2024-01-26 15:17:31 +00:00
Martin Kroeker 889c5d026a
Merge pull request #4456 from kseniyazaytseva/riscv-rvv10 
Fix BLAS and LAPACK tests for RVV 1.0 target, update to 0.12.0 intrincics
 2024-01-26 13:31:09 +01:00
Martin Kroeker 4e2a32ff51
Merge pull request #4454 from kseniyazaytseva/riscv-rvv07 
Fix BLAS and LAPACK tests for C910V and RISCV64_ZVL256B targets
 2024-01-26 11:40:46 +01:00
gxw 276e3ebf9e LoongArch64: Add dzamax and dzamin opt 2024-01-26 10:03:50 +08:00
Martin Kroeker a21b2fa5e4
Merge pull request #4452 from kseniyazaytseva/riscv-generic 
Fix BLAS, BLAS-like functions and Generic RISC-V kernels
 2024-01-24 17:52:25 +01:00
Andrey Sokolov 73530b03fa remove RISCV64_ZVL256B additional extentions 2024-01-24 11:38:14 +03:00
kseniyazaytseva 86943afa9c Fix x280 taget include riscv_vector.h 2024-01-24 10:53:13 +03:00
Andrey Sokolov 9c49a81d54 Resolve conflicts 2024-01-23 19:08:53 +03:00
kseniyazaytseva e1afb23811 Fix BLAS and LAPACK tests for C910V and RISCV64_ZVL256B targets 
* Fixed bugs in dgemm, [a]min\max, asum kernels
* Added zero checks for BLAS kernels
* Added dsdot implementation for RVV 0.7.1
* Fixed bugs in _vector files for C910V and RISCV64_ZVL256B targets
* Added additional definitions for RISCV64_ZVL256B target
 2024-01-23 19:01:31 +03:00
Martin Kroeker d6a5174e9c
Merge pull request #4447 from RevySR/update-thead-toolchains 
Update T-Head toolchains v2.8.0
 2024-01-22 08:10:02 +01:00
Han Gao/Revy/Rabenda 304a9b60af Update T-Head toolchains v2.8.0 
Signed-off-by: Han Gao/Revy/Rabenda <rabenda.cn@gmail.com>
 2024-01-21 14:32:52 +00:00
Martin Kroeker f5de4fad27
Merge pull request #4444 from Mousius/part-mapping 
Add dynamic support for Arm(R) Neoverse(TM) V2 processor
 2024-01-20 15:55:07 +01:00
Chris Sidebottom aaf65210cc Add dynamic support for Arm(R) Neoverse(TM) V2 processor 
Whilst I figure out how best to map the L2 parameters without
duplicating all of `ARMV8SVE`, lets just map this to `NEOVERSEV1`.
 2024-01-19 19:05:50 +00:00
Martin Kroeker 10c22f4a39
Merge pull request #4355 from imaginationtech/img-riscv64-zvl128b 
[RISC-V] Add RISC-V Vector 128-bit target
 2024-01-19 13:51:07 +01:00
Octavian Maghiar ccbc3f875b [RISC-V] Add RISCV64_ZVL128B target to common_riscv64.h 2024-01-19 12:40:00 +00:00
Octavian Maghiar deecfb1a39 Merge branch 'risc-v' into img-riscv64-zvl128b 2024-01-19 12:26:38 +00:00
kseniyazaytseva f89e0034a4 Fix LAPACK usage from BLAS 2024-01-18 23:22:26 +03:00
Martin Kroeker f7cf637d7a redo lost edit 2024-01-18 23:22:26 +03:00
Martin Kroeker 85548e66ca Fix build failures seen with the NO_LAPACK option - cspr/csymv/csyr belong on the LAPACK list 2024-01-18 23:22:26 +03:00
Martin Kroeker f129161453 restore C/Z SPMV, SPR, SYR,SYMV 2024-01-18 23:22:26 +03:00
kseniyazaytseva 5222b5fc18 Added axpby kernels for GENERIC RISC-V target 2024-01-18 23:22:26 +03:00
Martin Kroeker 1c04df20bd Re-enable overriding the LAPACK SYMV,SYR,SPMV and SPR implementations 2024-01-18 23:20:15 +03:00
Martin Kroeker 5b4df851d7 fix stray blank on continuation line 2024-01-18 23:20:15 +03:00
kseniyazaytseva ff41cf5c49 Fix BLAS, BLAS-like functions and Generic RISC-V kernels 
* Fixed gemmt, imatcopy, zimatcopy_cnc functions
* Fixed cblas_cscal testing in ctest
* Removed rotmg unreacheble code
* Added zero size checks
 2024-01-18 23:19:52 +03:00
Martin Kroeker 500442cf96
Merge pull request #4442 from pbo-linaro/fix-utest-compilation 
Fix utest compilation
 2024-01-18 20:59:13 +01:00