1a00ef3d27
Merge pull request #1725 from fenrus75/axpy
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Add a AVX512 enabled SAXPY/DAXPY functions
2018-08-11 11:01:20 +02:00
2e99873ff7
Add a AVX512 enabled SAXPY/DAXPY functions
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written in C intrinsics for best readability.
(the same C code works for Haswell as well)
For logistical reasons the code falls back to the existing
haswell AVX2 implementation if the GCC or LLVM compiler is not new enough
2018-08-10 02:58:32 +00:00
00abaa865b
Add an AVX512 enabled SDOT function
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written in C intrinsics for best readability.
(the same C code works for Haswell as well)
For logistical reasons the code falls back to the existing
haswell AVX2 implementation if the GCC or LLVM compiler is not new enough
2018-08-10 02:33:43 +00:00
7932ff3ea9
Add an AVX512 enabled DDOT function
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written in C intrinsics for best readability.
(the same C code works for Haswell as well)
For logistical reasons the code falls back to the existing
haswell AVX2 implementation if the GCC or LLVM compiler is not new enough
2018-08-09 03:55:52 +00:00
4e103c822c
typo fix
2018-07-16 12:56:39 +02:00
d2142760e0
Fix precision problem in DSDOT
2018-07-15 17:11:40 +02:00
2fbfc64da8
Use C kernels for default c/zAXPY, xROT, c/zSWAP
2018-07-15 17:09:55 +02:00
ba8388cee0
Merge pull request #1651 from martin-frbg/avx512-nodgemm
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Disable the 16x2 DTRMM kernel on SkylakeX as well
2018-06-30 17:48:03 +02:00
6e54b0a027
Disable the 16x2 DTRMM kernel on SkylakeX as well
2018-06-30 17:31:06 +02:00
40c8cbc3bf
Merge pull request #1650 from martin-frbg/avx512-nodgemm
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Disable the AVX512 DGEMM kernel for now
2018-06-30 13:05:46 +02:00
f0a8dc2eec
Disable the AVX512 DGEMM kernel for now
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due to #1643
2018-06-30 11:34:48 +02:00
b83e4c60c7
Remove premature exit for INC_X or INC_Y zero
2018-06-26 20:46:42 +02:00
e344db269b
Remove premature exit for INC_X or INC_Y zero
2018-06-26 20:45:57 +02:00
545b82efd3
Remove premature exit for INC_X or INC_Y zero
2018-06-26 20:45:00 +02:00
e322a951fe
Remove premature exit for INC_X or INC_Y zero
2018-06-26 20:44:13 +02:00
c628c6fa59
Merge pull request #1612 from oon3m0oo/cpus
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Fixed a few more unnecessary calls to num_cpu_avail.
2018-06-14 16:51:31 +02:00
6f71c0fce4
Return a somewhat sane default value for L2 cache size if cpuid retur… ( #1611 )
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* Return a somewhat sane default value for L2 cache size if cpuid returned something unexpected
Fixes #1610 , the KVM hypervisor on Google Chromebooks returning zero for CPUID 0x80000006, causing DYNAMIC_ARCH
builds of OpenBLAS to hang
2018-06-11 13:26:19 +02:00
c2545b0fd6
Fixed a few more unnecessary calls to num_cpu_avail.
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I don't have as many benchmarks for these as for gemm, but it should still
make a difference for small matrices.
2018-06-11 10:17:16 +01:00
89372e0993
Use AVX512 also for DGEMM
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this required switching to the generic gemm_beta code (which is faster anyway on SKX)
for both DGEMM and SGEMM
Performance for the not-retuned version is in the 30% range
2018-06-03 22:17:27 +00:00
0023515733
Typo fix (misplaced parenthesis)
2018-06-03 13:22:59 +02:00
99c7bba8e4
Initial support for SkylakeX / AVX512
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This patch adds the basic infrastructure for adding the SkylakeX (Intel Skylake server)
target. The SkylakeX target will use the AVX512 (AVX512VL level) instruction set,
which brings 2 basic things:
1) 512 bit wide SIMD (2x width of AVX2)
2) 32 SIMD registers (2x the number on AVX2)
This initial patch only contains a trivial transofrmation of the Haswell SGEMM kernel
to AVX512VL; more will follow later but this patch aims to get the infrastructure
in place for this "later".
Full performance tuning has not been done yet; with more registers and wider SIMD
it's in theory possible to retune the kernels but even without that there's an
interesting enough performance increase (30-40% range) with just this change.
2018-06-03 07:58:52 +00:00
8562d5787a
Merge pull request #1583 from martin-frbg/issue1575
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Handle INCX=0,INCY=0 case
2018-05-31 21:55:26 +02:00
7df8c4f76f
typo fix
2018-05-31 17:23:08 +02:00
2fc748bf72
Restore optimized swap kernel now that we have a proper fix
2018-05-31 13:41:12 +02:00
d1b7be14aa
Handle INCX=0,INCY=0 case
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Fixes #1575 (sswap/dswap failing the swap utest on x86) as suggested by atsampson.
2018-05-31 12:52:04 +02:00
961d25e9c7
Use the new zrot.c on POWER8 for crot as well
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fixes #1571 (the old zrot.S assembly does not handle incx=0 correctly)
2018-05-23 22:54:39 +02:00
f5959f2543
Merge pull request #1567 from martin-frbg/mipstrmm
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Revert " Switch mips32 target to USE_TRMM to fix complex TRMM"
2018-05-17 20:50:23 +02:00
82012b960b
Revert " Switch mips32 target to USE_TRMM to fix complex TRMM"
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... as it was just a silly workaround for the issue seen in #1563 , caused by #1419
2018-05-17 20:30:03 +02:00
8dd3515fa2
Merge pull request #1565 from martin-frbg/mipstypo
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Remove extraneous brace from previous commit of mips dsdot fix
2018-05-17 20:22:58 +02:00
95f7f0229c
Remove extraneous brace from previous commit
2018-05-17 18:43:59 +02:00
5082fe4306
Merge pull request #1564 from martin-frbg/issue1563
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Revert changes from PR#1419
2018-05-17 14:04:13 +02:00
7a7619af6d
Revert changes from PR#1419
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at least one of these changes apparently is an oversimplification, leading to TRMM breakage on some platforms as observed in #1563
2018-05-17 11:40:08 +02:00
893b535540
Use correct data type for initializers of v2f64, v4f32
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Fixes #1561
2018-05-15 14:42:12 +02:00
018f2dad27
Switch mips32 target to USE_TRMM to fix complex TRMM
2018-05-02 20:25:32 +02:00
9d5098dbc9
Add MIPS 1004K target (Mediatek MT7621 SOC)
2018-05-02 20:20:44 +02:00
954f1832de
Merge pull request #1540 from martin-frbg/mips32-zasum
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Fix typo in MIPS P5600 complex ASUM code selection
2018-04-25 23:23:00 +02:00
941ad280a8
Fix typo in MIPS P5600 complex ASUM code selection
2018-04-25 22:50:10 +02:00
1da365312a
Merge pull request #1538 from martin-frbg/arm7utest
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Fix handling of zero INCX, INCY in ArmV7 AXPY and ROT
2018-04-25 08:38:58 +02:00
2d0929fa7c
Move the test for zero incx,incy in ARMV7 ROT
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to pass the related utest (see #1469 )
2018-04-24 22:43:00 +02:00
125343cc88
Drop test for zero incx,incy in armv7 AXPY
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...to pass the related utest (see #1469 )
2018-04-24 22:39:50 +02:00
8a3b6fa108
Use generic zrot.c on ppc64/POWER6 to work around utest failure from … ( #1535 )
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* Use generic C implementation of zrot on ppc64/POWER6 to work around utest failure from #1469
2018-04-23 19:05:49 +02:00
9c5518319a
Revert "Fix 32bit HASWELL builds"
2018-04-22 20:20:04 +02:00
2ca0faf495
Merge pull request #1515 from martin-frbg/mipsdot
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Correct precision of mips dsdot
2018-04-11 08:21:25 +02:00
0fe434598b
Fix precision of mips dsdot
2018-04-10 23:30:59 +02:00
c7b55b6082
Merge pull request #1499 from quickwritereader/develop
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Implemented missing vsx simd kernels for power8 blas1/2 double. z13 modifications
2018-03-27 21:43:23 +02:00
840e01061f
Merge pull request #1491 from martin-frbg/ddot_mt
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Add multithreading support for Haswell DDOT
2018-03-27 21:43:05 +02:00
28ca97015d
power8:Added initial zgemv_(t|n) ,i(d|z)amax,i(d|z)amin,dgemv_t(transposed),zrot
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z13: improved zgemv_(t|n)_4,zscal,zaxpy
2018-03-27 14:54:41 +00:00
6a6ffaff1e
Merge pull request #1494 from martin-frbg/x86_dsdot
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Use generic/dot.c instead of the inferior arm/dot.c for x86 DSDOT
2018-03-17 15:26:47 +01:00
28ac9ea5a6
Use generic/dot.c instead of the inferior arm/dot.c for x86 DSDOT
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to resolve dsdot utest failure seen in #1492
2018-03-17 13:49:15 +01:00
a55694dd5b
Declare dot_compute static to avoid conflicts in multiarch builds
2018-03-16 22:23:36 +01:00
85a41e9cdb
Add multithreading support for Haswell DDOT
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copied from ashwinyes' implementation in dot_thunderx2t99.c
2018-03-16 16:58:47 +01:00
81215711a2
Re-enable DAXPY microkernels for x86_64
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as the inaccuracies seen in the original testcase for #1332 appear to be due to an artefact that amplifies the very small rounding differences between FMA and discrete multiply+add
2018-03-04 19:37:03 +01:00
22167170b3
Merge pull request #1477 from quickwritereader/develop
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Power8 blas3 copy-pack routines
2018-02-28 18:46:54 +01:00
fa9ca65c0e
ARM64: Fix utest dsdot errors
2018-02-27 10:47:55 +00:00
719b68f077
Merge pull request #1473 from martin-frbg/p2align
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Replace .align with .p2aligns in dscal.c and the Nehalem microkernels as well
2018-02-27 08:28:20 +01:00
fe9f15f2d8
Merge pull request #1472 from martin-frbg/utest-fixes
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Fix limited DSDOT precision on arm,aarch64 and zarch
2018-02-26 22:48:07 +01:00
497f0c3d8a
Replace .align with .p2align in the Nehalem microkernels
2018-02-26 20:58:33 +01:00
ea37db828e
Convert .align to .p2align for OSX compatibility
2018-02-26 20:48:03 +01:00
6e70287776
Use generic/dot.c for DSDOT on ARMV5 and above
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The default arm/dot.c is less precise when used for DSDOT, as shown by utest
2018-02-25 19:57:23 +01:00
58f236ad73
Use generic/dot.c for DSDOT on zarch
2018-02-25 19:52:14 +01:00
e207107150
Use generic/dot.c for DSDOT on z13
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The implementation in arm/dot.c has lower precision, as shown by the utest for dsdot.
2018-02-25 19:51:25 +01:00
c9d408064a
Use dot.S also for DSDOT on CORTEXA57
2018-02-25 19:48:09 +01:00
288d1a3f6e
Use dot.S also for DSDOT on ARMV8
2018-02-25 19:45:16 +01:00
7c1925acec
Use .p2align instead of .align for compatibility on Sandybridge as well
2018-02-24 19:43:15 +01:00
2359c7c1a9
Use .p2align instead of .align for portability
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The OSX assembler apparently mishandles the argument to decimal .align, leading to a significant loss of performance
as observed in #730 , #901 and most recently #1470
2018-02-24 17:50:13 +01:00
e7366a4161
Restore the remaining utests ( #1462 )
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* Restore the remaining utests
* Try fork test on Cygwin and Linux only, it hangs on at least ARMv8/Android as well
* Use generic sswap/dswap kernels for NEHALEM 32bit to fix fault found by the restored swap utest
* Disable zdotu test for MS cl to work around runtime error -1073741819 on AppVeyor for now
(probably coding error in the initialization of the complex numbers or wrong choice of zdotu API)
2018-02-20 10:07:17 +01:00
2c0a008281
dgemm_ncopy_4_ save/restore
2018-02-18 01:30:17 +00:00
c5425daa6b
power8 ?gemm_tcopy save/restore
2018-02-16 23:36:46 +00:00
b47e6822aa
Enable most assembly kernels in the generic ARMV8 target
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ref #1439
2018-02-06 11:42:58 +01:00
60596a1abc
Merge branch 'develop' into develop
2018-01-31 16:17:04 -08:00
afd514c25d
small fix inside ifdef z13mvc . (z13mvc code is not used in production)
2018-01-31 18:30:59 -05:00
f45776ec1f
Merge pull request #1440 from quickwritereader/develop
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small corrections
2018-01-31 23:48:47 +01:00
e388459a27
Merge pull request #1419 from brada4/develop
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Initialize unitialized values for repeated calls
2018-01-31 23:48:34 +01:00
f653e7a18d
small fix
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small fix inside ifdef z13mvc . (z13mvc code is not used in production)
2018-01-31 07:49:38 -08:00
f946a89432
zscal (case: real alpha=0 ) mikrokernel shift&mem fix , da_i as input reg. small typo fixes
2018-01-26 19:25:27 -08:00
485df77612
Make USE_TRMM depend on TARGET_CORE not TARGET
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Fixes #1432 (and possibly other DTRMM-related failures on Haswell and related architectures when built with cmake)
2018-01-26 23:20:00 +01:00
e4c71a799a
Merge pull request #1426 from quickwritereader/develop
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(Z13 ) Blas1 mikrokernels can be inlined by gcc. Refactoring,fixes,tunings
2018-01-20 17:34:54 +01:00
2619ad7ea5
Blas1 mikrokernels can be inlined by gcc. Refactoring ( symbolic operan
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names). Some fixes and tunings
2018-01-19 19:24:35 -08:00
e5cc3d72c0
core.IdenticalExpr clang501 checker
2018-01-19 23:17:43 +01:00
4938faa822
core.IdenticalExpr clang501 checker
2018-01-19 23:15:58 +01:00
9fa986337d
add missing brackets to silence indentation warnings gcc721
2018-01-19 23:11:12 +01:00
3eed97f6b9
Initialize values to silence cppcheck
2018-01-12 22:35:00 +01:00
13e137fbc9
Initialize uninitialized variables (cppcheck)
2018-01-12 22:33:41 +01:00
3d23f45107
Merge pull request #1415 from quickwritereader/develop
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(Z systems Z13) small fixes, some (i(dz)amin,i(dz)amax,(dz)dot,(dz)asum) mikrokernels…
2018-01-11 08:35:02 +01:00
87669d1c0a
small fixes, some (i(dz)amin,i(dz)amax,(dz)dot,(dz)asum) mikrokernels can be inlined
2018-01-10 20:36:53 -05:00
42285d8e70
Merge pull request #1410 from brada4/develop
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Address warnings #1357
2018-01-06 20:02:46 +01:00
d602b99386
LAPACK helpers in C that need care too
2018-01-02 14:38:50 +01:00
4d0b005e5b
Eliminate remaining unused results in kernels (clang5 analyzer)
2018-01-01 20:54:39 +01:00
b81656936f
Merge pull request #1409 from martin-frbg/issue1292-2
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Tag %1 and %2 as both input and output operands
2017-12-31 20:18:48 +01:00
b973990df2
Tag %1 and %2 as both input and output operands
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fix from #1292 extended to the other gemv microkernels
2017-12-31 18:03:36 +01:00
1e31124eb0
Merge pull request #1406 from martin-frbg/issue1292
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Tag %1 and %2 as both input and output
2017-12-30 14:52:03 +01:00
cc9500db41
Merge pull request #1403 from brada4/develop
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Address few more warnings
2017-12-30 14:51:34 +01:00
723f396a20
Tag %1 and %2 as both input and output
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The inline assembly modifies its input operands, so mark them as output to avoid surprises with optimization. Fixes #1292
2017-12-29 23:56:41 +01:00
03e5ff0687
initialize potentially unitialized variables (clang5)
2017-12-26 09:24:24 +01:00
47deec2c1a
fix couple of dead assignment warnings
2017-12-22 00:56:35 +01:00
43c0622e7b
Retire Piledriver/Steamroller/Excavator daxpy microkernels as well
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related to issue #1332
2017-12-13 18:40:39 +01:00
0623636c98
Use Sandybridge daxpy kernel on Haswell and Zen for now
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The testcase from #1332 exposes a problem in daxpy_microk_haswell-2.c that is not seen with
any of the other Intel x86_64 microkernels.
2017-12-10 19:24:31 +01:00
281a2b952f
warning cleanup ( #1380 )
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* dead increments in driver/level2
* dead increments in kernel/generic
* part dead increments in kernel/x86_64
2017-12-05 19:54:10 +01:00
8213385ab8
Work around compiler warnings for unused variables in the generic zgemm3m_Xcopy kernels
2017-12-02 22:51:58 +01:00
db00a51e6b
Merge pull request #1371 from martin-frbg/develop
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Add trivially optimized DSDOT for POWER8
2017-11-29 19:55:21 +01:00
Martin Kroeker
Arjan van de Ven
Craig Donner
QWR QWR
Ashwin Sekhar T K
Andrew