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Commit Graph

117 Commits

Author SHA1 Message Date
Martin Kroeker
48e421934f CortexX1 is only ArmV8 2022-03-28 17:31:26 +02:00
Martin Kroeker
09b8545fc5 Add initial support for M1 on Linux, Phytium FT2xxx series, ARM Cortex 510/710/X1/X2 2022-03-27 15:24:40 +02:00
Martin Kroeker
93a81856ae Revert AVX512 capability check from PR #1980 (moved to build) 2022-03-23 15:22:13 +01:00
Martin Kroeker
bc93f468ef Add Elbrus E2000 architecture as generic x86_64 compatible 2022-01-22 18:53:38 +01:00
Sunita Nadampalli
19c8f615dc OpenBLAS: aarch64: Add neoverse-v1/n2 architecture specifics 2022-01-07 00:28:17 +00:00
Martin Kroeker
454edd741c Merge pull request #3425 from binebrank/arm_sve_dgemm 
Add dgemm kernel for arm64 SVE
 2021-11-26 16:14:55 +01:00
Bine Brank
9388f05a3c configure SVE Makefile 2021-11-21 18:33:43 +01:00
Martin Kroeker
a569fa1540 MIPS P5600 and 24KC,1004K cpus do not support MSA 2021-11-13 23:26:48 +01:00
Bine Brank
7093372e32 add ARMV8SVE target 2021-11-01 22:53:21 +01:00
Martin Kroeker
22bf5c27ba Add basic support for the Fujitsu A64FX (#3415) 
* Add initial support for Fujitsu A64FX as generic ARMV8
 2021-10-18 15:00:19 +02:00
Wangyang Guo
4280dff103 Add NO_AVX=1 fallbacks to Sapphire Rapids build 2021-10-12 01:39:09 -07:00
Wangyang Guo
3dc6052c7e initial support for Sapphire Rapids platform 2021-10-12 01:30:40 -07:00
Martin Kroeker
32fee86033 Correct misplaced ifdef lines 2021-09-06 23:44:20 +02:00
Martin Kroeker
72f3ce5f08 Add NO_AVX=1 fallbacks to newer generation x86_64 for completeness (#3360) 
* Add NO_AVX=1 fallbacks to newer generation x86_64 for completeness

* Update .travis.yml
 2021-09-05 20:35:48 +02:00
gxw
af0a69f355 Add support for LOONGARCH64 2021-07-27 15:29:12 +08:00
User User-User
b7da75e4fd WiP CORTEX A55 support 2021-06-19 21:37:51 +02:00
Aurelien Jarno
0a535e58d8 getarch.c: define OPENBLAS_SUPPORTED for riscv64 2020-12-29 12:06:39 +00:00
gxw
be24c66a7c Keep LOONGSON3A and LOONGSON3B for loongson 2020-12-10 10:53:13 +08:00
gxw
4b548857d6 Add msa support for loongson 
1. Using core loongson3r3 and loongson3r4 for loongson
2. Add DYNAMIC_ARCH for loongson

Change-Id: I1c6b54dbeca3a0cc31d1222af36a7e9bd6ab54c1
 2020-12-09 10:28:46 +08:00
Martin Kroeker
2e99e2699b Add workaround for gcc 4.6 miscompiling assembly kernels with -mavx 2020-11-29 15:32:17 +01:00
Martin Kroeker
11ebe5fa25 Avoid redefinition warning 2020-11-22 21:16:07 +01:00
Xianyi Zhang
fc35b72ae1 Refs #2899 
Merge branch 'openblas-open-910' of git://github.com/damonyu1989/OpenBLAS into damonyu1989-openblas-open-910
 2020-11-10 09:38:04 +08:00
Xianyi Zhang
913cc9a4ca Merge branch 'develop' into risc-v 2020-11-10 09:18:25 +08:00
Martin Kroeker
ec088bf33a Fix missing AVX2 and FMA3 capabilities in FORCE_target mode 2020-11-08 13:15:40 +01:00
Martin Kroeker
e8cbf0fc50 Output predefined HAVE_ entries to Makefile.conf for ARM with specified TARGET 2020-10-27 23:01:19 +01:00
Martin Kroeker
1a0c185122 Support cross-compiling for Apple Vortex 2020-10-18 18:54:54 +02:00
Zhang Xianyi
d7ba7679b6 Merge branch 'develop' into risc-v 2020-10-16 23:27:38 +08:00
damonyu
ef8e7d0279 Add the support for RISC-V Vector. 
Change-Id: Iae7800a32f5af3903c330882cdf6f292d885f266
 2020-10-15 16:09:02 +08:00
Qiyu8
881c15179f remove default support for FMA4 on zen architect 2020-09-27 09:35:50 +08:00
Chen, Guobing
e740c4873d Enable COOPERLAKE build target 
Enable new build target platform -- COOPERLAKE. This target platform
supports all the SKYLAKEX supported ISAs + avx512bf16. So all the
SKYLAKEX specific kernels/drivers and related code are now extended
to be also active on COOPERLAKE. Besides, new BF16 related kernels
are active under this target.
 2020-08-13 06:18:00 +08:00
Ashwin Sekhar T K
4e1be0e481 ARM64: Add THUNDERX3T110 Target 2020-07-26 23:32:24 -07:00
Martin Kroeker
8751a69271 Obtain actual cpu count on AIX and suppress spurious NO_AVX512 on non-x86 2020-07-07 15:46:32 +02:00
Rajalakshmi Srinivasaraghavan
9fe930f205 powerpc: Add support for future processor 
This is the initial patch to support build infrastructure
for POWER10 architecture.
 2020-06-11 15:47:20 -05:00
Martin Kroeker
6275b43918 Avoid duplicate printout of byte order and report ELF_VERSION 2020-04-22 14:12:27 +02:00
Martin Kroeker
5afb66812f Update getarch.c 2020-04-19 14:55:31 +02:00
Martin Kroeker
0d18f231fc Update getarch.c 2020-04-19 13:52:58 +02:00
Martin Kroeker
2f4a8e5bc4 Rename the FORCE entries for 24K and 1004K to include the MIPS prefix 2020-04-19 13:22:19 +02:00
Martin Kroeker
61bbae3ac1 Handle MIPS24K like P5600 
and allow enforcing TARGET=1004K as well (omission from earlier 1004K merge and later introduction of TARGET check)
 2020-04-18 21:09:32 +02:00
Andreas Schwab
71cf2acdef Fix ARCHCONFIG for Neoverse-N1 
../config_kernel.h:24:9: warning: missing whitespace after the macro name
   24 | #define ARMV8-march armv8.2-a
      |         ^~~~~
 2020-03-21 17:35:42 +01:00
Ali Saidi
c623a965f9 Add Neoverse-N1 core 
The implementation is a hybird of the ARMV8 one with some of the
improved TX2 rountines along with specifying -march=v8.2-a
 2020-02-29 03:22:04 +00:00
Xianyi Zhang
265ab484c8 Change default RISC-V 64-bit corename to RISCV64_GENERIC 
e.g. make CC=riscv64-unknown-linux-gnu-gcc FC=riscv64-unknown-linux-gnu-gfortran TARGET=RISCV64_GENERIC HOSTCC=gcc
 2020-02-27 14:46:15 +08:00
Xianyi Zhang
4aa2d89217 Merge branch 'develop' into risc-v 2020-02-27 13:53:49 +08:00
Martin Kroeker
ddcbed6690 Merge pull request #2437 from martin-frbg/issue2434 
[WIP] Add support for Ampere EMAG8180 ARMV8 cpu
 2020-02-25 18:42:52 +01:00
Martin Kroeker
f8ec538c82 Add Ampere EMAG8180 2020-02-25 14:30:00 +01:00
Martin Kroeker
76b2cec6ce Get endianness into Makefile variable 2020-02-19 18:08:20 +01:00
Martin Kroeker
e3e8b5cdca Add NetBSD 2019-10-25 12:51:06 +02:00
Martin Kroeker
7c51cc8527 Merge branch 'develop' into develop 2019-03-29 19:36:29 +01:00
AbdelRauf
853a18bc17 power9 makefile. dgemm based on power8 kernel with following changes : 32x unrolled 16x4 kernel and 8x4 kernel using (lxv stxv butterfly rank1 update). improvement from 17 to 22-23gflops. dtrmm cases were added into dgemm itself 2019-03-29 15:49:40 +00:00
maomao194313
760842dda1 add TARGET support for HiSilicon tsv110 CPUs 2019-03-04 16:45:22 +08:00
Martin Kroeker
72d3e7c9b4 Add FORCE Z14 
from patch provided by aarnez in #991
 2019-01-31 21:15:50 +01:00