added max- und min-kernels for all precisions
This commit is contained in:
wernsaar
parent
f750103336
commit
6f4a0ebe38
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@ -1,34 +1,34 @@
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SAMAXKERNEL = ../arm/amax.c
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DAMAXKERNEL = ../arm/amax.c
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CAMAXKERNEL = ../arm/zamax.c
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ZAMAXKERNEL = ../arm/zamax.c
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SAMAXKERNEL = iamax_vfpv3.S
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DAMAXKERNEL = iamax_vfpv3.S
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CAMAXKERNEL = iamax_vfpv3.S
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ZAMAXKERNEL = iamax_vfpv3.S
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SAMINKERNEL = ../arm/amin.c
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DAMINKERNEL = ../arm/amin.c
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CAMINKERNEL = ../arm/zamin.c
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ZAMINKERNEL = ../arm/zamin.c
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SAMINKERNEL = iamax_vfpv3.S
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DAMINKERNEL = iamax_vfpv3.S
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CAMINKERNEL = iamax_vfpv3.S
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ZAMINKERNEL = iamax_vfpv3.S
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SMAXKERNEL = ../arm/max.c
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DMAXKERNEL = ../arm/max.c
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SMAXKERNEL = iamax_vfpv3.S
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DMAXKERNEL = iamax_vfpv3.S
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SMINKERNEL = ../arm/min.c
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DMINKERNEL = ../arm/min.c
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SMINKERNEL = iamax_vfpv3.S
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DMINKERNEL = iamax_vfpv3.S
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ISAMAXKERNEL = ../arm/iamax.c
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IDAMAXKERNEL = ../arm/iamax.c
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ICAMAXKERNEL = ../arm/izamax.c
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IZAMAXKERNEL = ../arm/izamax.c
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ISAMAXKERNEL = iamax_vfpv3.S
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IDAMAXKERNEL = iamax_vfpv3.S
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ICAMAXKERNEL = iamax_vfpv3.S
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IZAMAXKERNEL = iamax_vfpv3.S
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ISAMINKERNEL = ../arm/iamin.c
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IDAMINKERNEL = ../arm/iamin.c
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ICAMINKERNEL = ../arm/izamin.c
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IZAMINKERNEL = ../arm/izamin.c
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ISAMINKERNEL = iamax_vfpv3.S
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IDAMINKERNEL = iamax_vfpv3.S
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ICAMINKERNEL = iamax_vfpv3.S
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IZAMINKERNEL = iamax_vfpv3.S
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ISMAXKERNEL = ../arm/imax.c
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IDMAXKERNEL = ../arm/imax.c
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ISMAXKERNEL = iamax_vfpv3.S
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IDMAXKERNEL = iamax_vfpv3.S
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ISMINKERNEL = ../arm/imin.c
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IDMINKERNEL = ../arm/imin.c
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ISMINKERNEL = iamax_vfpv3.S
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IDMINKERNEL = iamax_vfpv3.S
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SSWAPKERNEL = ../arm/swap.c
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DSWAPKERNEL = ../arm/swap.c
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@ -0,0 +1,478 @@
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/***************************************************************************
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Copyright (c) 2013, The OpenBLAS Project
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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1. Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in
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the documentation and/or other materials provided with the
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distribution.
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3. Neither the name of the OpenBLAS project nor the names of
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its contributors may be used to endorse or promote products
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derived from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE OPENBLAS PROJECT OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*****************************************************************************/
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/**************************************************************************************
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* 2013/11/14 Saar
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* BLASTEST : OK
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* CTEST : OK
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* TEST : OK
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*
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**************************************************************************************/
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#define ASSEMBLER
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#include "common.h"
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#define STACKSIZE 256
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#define N r0
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#define X r1
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#define INC_X r2
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#define INDEX r3
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#define Z r4
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#define I r12
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#define X_PRE 512
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/**************************************************************************************
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* Macro definitions
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**************************************************************************************/
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#if defined(USE_ABS)
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#if defined(DOUBLE)
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#define VABS(x0,x1) vabs.f64 x0, x1
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#else
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#define VABS(x0,x1) vabs.f32 x0, x1
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#endif
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#else
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#define VABS(x0,x1) nop
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#endif
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/*****************************************************************************************/
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#if defined(USE_MIN)
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#define MOVCOND movlt
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#if defined(DOUBLE)
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#define VMOVCOND vmovlt.f64
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#else
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#define VMOVCOND vmovlt.f32
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#endif
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#else
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#define MOVCOND movgt
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#if defined(DOUBLE)
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#define VMOVCOND vmovgt.f64
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#else
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#define VMOVCOND vmovgt.f32
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#endif
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#endif
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/*****************************************************************************************/
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#if !defined(COMPLEX)
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#if defined(DOUBLE)
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.macro INIT_F
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fldmiad X!, { d0 }
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VABS( d0, d0 )
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mov Z, #1
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mov INDEX, Z
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.endm
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.macro KERNEL_F1
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fldmiad X!, { d4 }
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add Z, Z, #1
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VABS( d4, d4 )
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vcmpe.f64 d4, d0
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vmrs APSR_nzcv, fpscr
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VMOVCOND d0, d4
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MOVCOND INDEX, Z
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.endm
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.macro INIT_S
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fldmiad X, { d0 }
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VABS( d0, d0 )
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mov Z, #1
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mov INDEX, Z
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add X, X, INC_X
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.endm
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.macro KERNEL_S1
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fldmiad X, { d4 }
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add Z, Z, #1
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VABS( d4, d4 )
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vcmpe.f64 d4, d0
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vmrs APSR_nzcv, fpscr
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VMOVCOND d0, d4
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MOVCOND INDEX, Z
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add X, X, INC_X
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.endm
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#else
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.macro INIT_F
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fldmias X!, { s0 }
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VABS( s0, s0 )
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mov Z, #1
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mov INDEX, Z
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.endm
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.macro KERNEL_F1
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fldmias X!, { s4 }
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add Z, Z, #1
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VABS( s4, s4 )
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vcmpe.f32 s4, s0
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vmrs APSR_nzcv, fpscr
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VMOVCOND s0, s4
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MOVCOND INDEX, Z
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.endm
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.macro INIT_S
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fldmias X, { s0 }
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VABS( s0, s0 )
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mov Z, #1
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mov INDEX, Z
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add X, X, INC_X
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.endm
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.macro KERNEL_S1
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fldmias X, { s4 }
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add Z, Z, #1
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VABS( s4, s4 )
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vcmpe.f32 s4, s0
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vmrs APSR_nzcv, fpscr
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VMOVCOND s0, s4
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MOVCOND INDEX, Z
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add X, X, INC_X
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.endm
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#endif
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#else
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#if defined(DOUBLE)
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.macro INIT_F
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fldmiad X!, { d0 -d1 }
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vabs.f64 d0, d0
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vabs.f64 d1, d1
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vadd.f64 d0 , d0, d1
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mov Z, #1
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mov INDEX, Z
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.endm
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.macro KERNEL_F1
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fldmiad X!, { d4 - d5 }
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add Z, Z, #1
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vabs.f64 d4, d4
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vabs.f64 d5, d5
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vadd.f64 d4 , d4, d5
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vcmpe.f64 d4, d0
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vmrs APSR_nzcv, fpscr
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VMOVCOND d0, d4
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MOVCOND INDEX, Z
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.endm
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.macro INIT_S
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fldmiad X, { d0 -d1 }
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vabs.f64 d0, d0
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vabs.f64 d1, d1
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vadd.f64 d0 , d0, d1
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mov Z, #1
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mov INDEX, Z
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add X, X, INC_X
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.endm
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.macro KERNEL_S1
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fldmiad X, { d4 - d5 }
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add Z, Z, #1
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vabs.f64 d4, d4
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vabs.f64 d5, d5
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vadd.f64 d4 , d4, d5
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vcmpe.f64 d4, d0
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vmrs APSR_nzcv, fpscr
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VMOVCOND d0, d4
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MOVCOND INDEX, Z
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add X, X, INC_X
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.endm
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#else
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.macro INIT_F
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fldmias X!, { s0 -s1 }
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vabs.f32 s0, s0
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vabs.f32 s1, s1
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vadd.f32 s0 , s0, s1
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mov Z, #1
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mov INDEX, Z
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.endm
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.macro KERNEL_F1
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fldmias X!, { s4 - s5 }
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add Z, Z, #1
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vabs.f32 s4, s4
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vabs.f32 s5, s5
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vadd.f32 s4 , s4, s5
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vcmpe.f32 s4, s0
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vmrs APSR_nzcv, fpscr
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VMOVCOND s0, s4
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MOVCOND INDEX, Z
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.endm
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.macro INIT_S
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fldmias X, { s0 -s1 }
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vabs.f32 s0, s0
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vabs.f32 s1, s1
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vadd.f32 s0 , s0, s1
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mov Z, #1
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mov INDEX, Z
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add X, X, INC_X
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.endm
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.macro KERNEL_S1
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fldmias X, { s4 - s5 }
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add Z, Z, #1
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vabs.f32 s4, s4
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vabs.f32 s5, s5
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vadd.f32 s4 , s4, s5
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vcmpe.f32 s4, s0
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vmrs APSR_nzcv, fpscr
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VMOVCOND s0, s4
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MOVCOND INDEX, Z
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add X, X, INC_X
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.endm
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#endif
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#endif
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/**************************************************************************************
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* End of macro definitions
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**************************************************************************************/
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PROLOGUE
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.align 5
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push {r4}
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#if defined(DOUBLE)
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vsub.f64 d0 , d0 , d0
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#else
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vsub.f32 s0 , s0 , s0
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#endif
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mov INDEX, #0
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cmp N, #0
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ble iamax_kernel_L999
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cmp INC_X, #0
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beq iamax_kernel_L999
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cmp INC_X, #1
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bne iamax_kernel_S_BEGIN
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iamax_kernel_F_BEGIN:
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INIT_F
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subs N, N , #1
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ble iamax_kernel_L999
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asrs I, N, #2 // I = N / 4
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ble iamax_kernel_F1
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.align 5
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iamax_kernel_F4:
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pld [ X, #X_PRE ]
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KERNEL_F1
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KERNEL_F1
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#if defined(COMPLEX) && defined(DOUBLE)
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pld [ X, #X_PRE ]
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#endif
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KERNEL_F1
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KERNEL_F1
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subs I, I, #1
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ble iamax_kernel_F1
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#if defined(COMPLEX) || defined(DOUBLE)
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pld [ X, #X_PRE ]
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#endif
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KERNEL_F1
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KERNEL_F1
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#if defined(COMPLEX) && defined(DOUBLE)
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pld [ X, #X_PRE ]
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#endif
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KERNEL_F1
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KERNEL_F1
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subs I, I, #1
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bne iamax_kernel_F4
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iamax_kernel_F1:
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ands I, N, #3
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ble iamax_kernel_L999
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iamax_kernel_F10:
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KERNEL_F1
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subs I, I, #1
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bne iamax_kernel_F10
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b iamax_kernel_L999
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iamax_kernel_S_BEGIN:
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#if defined(COMPLEX)
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#if defined(DOUBLE)
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lsl INC_X, INC_X, #4 // INC_X * SIZE * 2
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#else
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lsl INC_X, INC_X, #3 // INC_X * SIZE * 2
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#endif
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#else
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#if defined(DOUBLE)
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lsl INC_X, INC_X, #3 // INC_X * SIZE
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#else
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lsl INC_X, INC_X, #2 // INC_X * SIZE
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#endif
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#endif
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INIT_S
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subs N, N , #1
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ble iamax_kernel_L999
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asrs I, N, #2 // I = N / 4
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ble iamax_kernel_S1
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.align 5
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iamax_kernel_S4:
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KERNEL_S1
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KERNEL_S1
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KERNEL_S1
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KERNEL_S1
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subs I, I, #1
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bne iamax_kernel_S4
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iamax_kernel_S1:
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ands I, N, #3
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ble iamax_kernel_L999
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iamax_kernel_S10:
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KERNEL_S1
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subs I, I, #1
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bne iamax_kernel_S10
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iamax_kernel_L999:
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mov r0, INDEX // set return value
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pop {r4}
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bx lr
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EPILOGUE
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