try to maintain cache line alignment for odd BLAS L1 work splits
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@ -65,7 +65,7 @@ int blas_level1_thread(int mode, BLASLONG m, BLASLONG n, BLASLONG k, void *alpha
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/* Adjust Parameters */
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width = blas_quickdivide(i + nthreads - num_cpu - 1,
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nthreads - num_cpu);
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width = MAX(width,((width-1)&~15)+16);
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i -= width;
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if (i < 0) width = width + i;
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@ -136,7 +136,7 @@ int blas_level1_thread_with_return_value(int mode, BLASLONG m, BLASLONG n, BLASL
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/* Adjust Parameters */
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width = blas_quickdivide(i + nthreads - num_cpu - 1,
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nthreads - num_cpu);
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width = MAX(width,((width-1)&~15)+16);
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i -= width;
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if (i < 0) width = width + i;
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