From 5f99b61aa7905c3b93d5d4552a28785e3f3e8a1a Mon Sep 17 00:00:00 2001 From: Andrew <16061801+brada4@users.noreply.github.com> Date: Fri, 7 Dec 2018 00:15:27 +0100 Subject: [PATCH] try to maintain cache line alignment for odd BLAS L1 work splits --- driver/others/blas_l1_thread.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/driver/others/blas_l1_thread.c b/driver/others/blas_l1_thread.c index e405c7465..dfd392445 100644 --- a/driver/others/blas_l1_thread.c +++ b/driver/others/blas_l1_thread.c @@ -65,7 +65,7 @@ int blas_level1_thread(int mode, BLASLONG m, BLASLONG n, BLASLONG k, void *alpha /* Adjust Parameters */ width = blas_quickdivide(i + nthreads - num_cpu - 1, nthreads - num_cpu); - + width = MAX(width,((width-1)&~15)+16); i -= width; if (i < 0) width = width + i; @@ -136,7 +136,7 @@ int blas_level1_thread_with_return_value(int mode, BLASLONG m, BLASLONG n, BLASL /* Adjust Parameters */ width = blas_quickdivide(i + nthreads - num_cpu - 1, nthreads - num_cpu); - + width = MAX(width,((width-1)&~15)+16); i -= width; if (i < 0) width = width + i;