Modify DWC3 reg size

This commit is contained in:
songyanguang
2024-09-13 15:05:40 +08:00
parent 014283451a
commit b9c3e22f5f

View File

@@ -60,7 +60,7 @@ extern "C" {
#define USB3_0_BASE_ADDR 0xFCC00000
#define USB3_1_BASE_ADDR 0xFD000000
#define USB3_ADDR_OFFSET_UPPER_BOUND 0x08000
#define USB3_DWC3_ADDR_GAP 0x0B00
#define USB3_DWC3_ADDR_GAP 0x0C00
#define USB3_VIRADDR_BASE 0x0000002000000000ULL
#define USB3_0_VIRADDR_BASE USB3_VIRADDR_BASE