forked from xuos/xiuos
Ubiquitous/RT_Thread/:update K210 bsp base on https://github.com/kendryte/K210-Micropython-OpenMV
Fixed an issue where LCD and RW007 could not be used at the same time
This commit is contained in:
chunyexixiaoyu
parent
0eee31179c
commit
a184611226
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@ -20,12 +20,13 @@ CONFIG_RT_ALIGN_SIZE=8
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CONFIG_RT_THREAD_PRIORITY_32=y
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# CONFIG_RT_THREAD_PRIORITY_256 is not set
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CONFIG_RT_THREAD_PRIORITY_MAX=32
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CONFIG_RT_TICK_PER_SECOND=1000
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CONFIG_RT_TICK_PER_SECOND=100
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CONFIG_RT_USING_OVERFLOW_CHECK=y
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CONFIG_RT_USING_HOOK=y
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CONFIG_RT_USING_IDLE_HOOK=y
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CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
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CONFIG_IDLE_THREAD_STACK_SIZE=4096
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CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
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# CONFIG_RT_USING_TIMER_SOFT is not set
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#
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@ -33,6 +34,7 @@ CONFIG_IDLE_THREAD_STACK_SIZE=4096
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#
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# CONFIG_RT_KSERVICE_USING_STDLIB is not set
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# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
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# CONFIG_RT_USING_ASM_MEMCPY is not set
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CONFIG_RT_DEBUG=y
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CONFIG_RT_DEBUG_COLOR=y
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CONFIG_RT_DEBUG_INIT_CONFIG=y
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@ -79,6 +81,7 @@ CONFIG_RT_USING_DEVICE=y
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CONFIG_RT_USING_CONSOLE=y
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CONFIG_RT_CONSOLEBUF_SIZE=128
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CONFIG_RT_CONSOLE_DEVICE_NAME="uarths"
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# CONFIG_RT_PRINTF_LONGLONG is not set
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CONFIG_RT_VER_NUM=0x40004
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CONFIG_ARCH_CPU_64BIT=y
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# CONFIG_RT_USING_CPU_FFS is not set
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@ -105,19 +108,19 @@ CONFIG_RT_MAIN_THREAD_PRIORITY=10
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# Command shell
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#
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CONFIG_RT_USING_FINSH=y
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CONFIG_RT_USING_MSH=y
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CONFIG_FINSH_USING_MSH=y
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CONFIG_FINSH_THREAD_NAME="tshell"
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CONFIG_FINSH_THREAD_PRIORITY=20
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CONFIG_FINSH_THREAD_STACK_SIZE=16384
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CONFIG_FINSH_USING_HISTORY=y
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CONFIG_FINSH_HISTORY_LINES=5
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CONFIG_FINSH_USING_SYMTAB=y
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CONFIG_FINSH_CMD_SIZE=80
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CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
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CONFIG_FINSH_USING_DESCRIPTION=y
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# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
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CONFIG_FINSH_THREAD_PRIORITY=20
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CONFIG_FINSH_THREAD_STACK_SIZE=16384
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CONFIG_FINSH_CMD_SIZE=80
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# CONFIG_FINSH_USING_AUTH is not set
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CONFIG_FINSH_USING_MSH=y
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CONFIG_FINSH_USING_MSH_DEFAULT=y
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CONFIG_FINSH_USING_MSH_ONLY=y
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CONFIG_FINSH_ARG_MAX=10
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#
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@ -151,6 +154,7 @@ CONFIG_RT_DFS_ELM_DRIVES=2
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CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=4096
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# CONFIG_RT_DFS_ELM_USE_ERASE is not set
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CONFIG_RT_DFS_ELM_REENTRANT=y
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CONFIG_RT_DFS_ELM_MUTEX_TIMEOUT=3000
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CONFIG_RT_USING_DFS_DEVFS=y
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# CONFIG_RT_USING_DFS_ROMFS is not set
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# CONFIG_RT_USING_DFS_RAMFS is not set
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@ -165,6 +169,8 @@ CONFIG_RT_USING_SYSTEM_WORKQUEUE=y
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CONFIG_RT_SYSTEM_WORKQUEUE_STACKSIZE=2048
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CONFIG_RT_SYSTEM_WORKQUEUE_PRIORITY=23
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CONFIG_RT_USING_SERIAL=y
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CONFIG_RT_USING_SERIAL_V1=y
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# CONFIG_RT_USING_SERIAL_V2 is not set
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CONFIG_RT_SERIAL_USING_DMA=y
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CONFIG_RT_SERIAL_RB_BUFSZ=64
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# CONFIG_RT_USING_CAN is not set
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@ -244,8 +250,9 @@ CONFIG_RT_USING_POSIX=y
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# CONFIG_RT_USING_POSIX_TERMIOS is not set
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# CONFIG_RT_USING_POSIX_GETLINE is not set
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# CONFIG_RT_USING_POSIX_AIO is not set
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CONFIG_RT_LIBC_USING_TIME=y
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# CONFIG_RT_USING_MODULE is not set
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CONFIG_RT_LIBC_FIXED_TIMEZONE=8
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CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
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#
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# Network
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@ -283,6 +290,7 @@ CONFIG_NETDEV_IPV6=0
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CONFIG_RT_USING_LWIP=y
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# CONFIG_RT_USING_LWIP141 is not set
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CONFIG_RT_USING_LWIP202=y
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# CONFIG_RT_USING_LWIP203 is not set
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# CONFIG_RT_USING_LWIP212 is not set
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# CONFIG_RT_USING_LWIP_IPV6 is not set
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CONFIG_RT_LWIP_MEM_ALIGNMENT=8
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@ -352,6 +360,7 @@ CONFIG_RT_LWIP_USING_PING=y
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# CONFIG_RT_USING_RYM is not set
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# CONFIG_RT_USING_ULOG is not set
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# CONFIG_RT_USING_UTEST is not set
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# CONFIG_RT_USING_VAR_EXPORT is not set
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# CONFIG_RT_USING_RT_LINK is not set
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#
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@ -363,9 +372,15 @@ CONFIG_RT_LWIP_USING_PING=y
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# Board Drivers Config
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#
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CONFIG_BSP_USING_UART_HS=y
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#
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# General Purpose UARTs
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#
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CONFIG_BSP_USING_UART1=y
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CONFIG_BSP_UART1_TXD_PIN=20
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CONFIG_BSP_UART1_RXD_PIN=21
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CONFIG_BSP_UART1_RTS_PIN=-1
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CONFIG_BSP_UART1_CTS_PIN=-1
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# CONFIG_BSP_USING_UART2 is not set
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# CONFIG_BSP_USING_UART3 is not set
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# CONFIG_BSP_USING_I2C1 is not set
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@ -385,6 +400,13 @@ CONFIG_BSP_LCD_CS_PIN=36
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CONFIG_BSP_LCD_WR_PIN=39
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CONFIG_BSP_LCD_DC_PIN=38
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CONFIG_BSP_LCD_RST_PIN=37
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CONFIG_BSP_LCD_BACKLIGHT_PIN=-1
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CONFIG_BSP_LCD_BACKLIGHT_ACTIVE_LOW=y
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# CONFIG_BSP_LCD_BACKLIGHT_ACTIVE_HIGH is not set
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CONFIG_BSP_LCD_CLK_FREQ=20000000
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# CONFIG_BSP_BOARD_KD233 is not set
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# CONFIG_BSP_BOARD_K210_OPENMV_TEST is not set
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CONFIG_BSP_BOARD_USER=y
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CONFIG_BSP_LCD_X_MAX=240
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CONFIG_BSP_LCD_Y_MAX=320
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CONFIG_BSP_USING_SDCARD=y
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@ -401,6 +423,9 @@ CONFIG_BSP_DVP_CMOS_PWDN_PIN=44
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CONFIG_BSP_DVP_CMOS_XCLK_PIN=46
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CONFIG_BSP_DVP_CMOS_PCLK_PIN=47
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CONFIG_BSP_DVP_CMOS_HREF_PIN=45
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CONFIG_RW007_SPIDEV_NAME="spi11"
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CONFIG_RW007_INT_BUSY_PIN=7
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CONFIG_RW007_RST_PIN=6
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#
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# Kendryte SDK Config
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@ -410,7 +435,10 @@ CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
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#
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# More Drivers
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#
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# CONFIG_PKG_USING_RW007 is not set
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CONFIG_PKG_USING_RW007=y
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CONFIG_RW007_NOT_USE_EXAMPLE_DRIVERS=y
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# CONFIG_RW007_USING_STM32_DRIVERS is not set
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CONFIG_RW007_SPI_MAX_HZ=20000000
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CONFIG_DRV_USING_OV2640=y
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#
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@ -443,12 +471,22 @@ CONFIG_MAIN_KTASK_STACK_SIZE=1024
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#
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# knowing app
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#
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CONFIG_APPLICATION_KNOWING=y
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CONFIG_FACE_DETECT=y
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# CONFIG_INSTRUSION_DETECT is not set
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# CONFIG_HELMET_DETECT is not set
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# CONFIG_IRIS_ML_DEMO is not set
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#
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# sensor app
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#
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# CONFIG_APPLICATION_SENSOR is not set
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CONFIG_APPLICATION_SENSOR=y
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# CONFIG_APPLICATION_SENSOR_CO2 is not set
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# CONFIG_APPLICATION_SENSOR_PM1_0 is not set
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CONFIG_APPLICATION_SENSOR_VOICE=y
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CONFIG_APPLICATION_SENSOR_VOICE_D124=y
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# CONFIG_APPLICATION_SENSOR_HUMIDITY is not set
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# CONFIG_APPLICATION_SENSOR_TEMPERATURE is not set
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#
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# Framework
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@ -460,7 +498,12 @@ CONFIG_ADD_XIUOS_FETURES=y
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CONFIG_SUPPORT_SENSOR_FRAMEWORK=y
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# CONFIG_SENSOR_CO2 is not set
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# CONFIG_SENSOR_PM is not set
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# CONFIG_SENSOR_VOICE is not set
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CONFIG_SENSOR_VOICE=y
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CONFIG_SENSOR_D124=y
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CONFIG_SENSOR_DEVICE_D124="d124_1"
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CONFIG_SENSOR_QUANTITY_D124_VOICE="voice_1"
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# CONFIG_SENSOR_D124_DRIVER_EXTUART is not set
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CONFIG_SENSOR_DEVICE_D124_DEV="/dev/uar2"
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# CONFIG_SENSOR_TEMPERATURE is not set
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# CONFIG_SENSOR_HUMIDITY is not set
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# CONFIG_SUPPORT_CONNECTION_FRAMEWORK is not set
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@ -468,11 +511,20 @@ CONFIG_SUPPORT_KNOWING_FRAMEWORK=y
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# CONFIG_USING_TENSORFLOWLITEMICRO is not set
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CONFIG_USING_KPU_POSTPROCESSING=y
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CONFIG_USING_YOLOV2=y
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# CONFIG_USING_KNOWING_FILTER is not set
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# CONFIG_USING_OTA_MODEL is not set
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# CONFIG_SUPPORT_CONTROL_FRAMEWORK is not set
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#
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# app lib
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# Security
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#
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# CONFIG_CRYPTO is not set
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#
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# lib
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#
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CONFIG_APP_SELECT_NEWLIB=y
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# CONFIG_APP_SELECT_OTHER_LIB is not set
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CONFIG_LIB_USING_CJSON=y
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# CONFIG_LIB_USING_QUEUE is not set
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CONFIG___STACKSIZE__=4096
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@ -5,6 +5,7 @@ config BSP_USING_UART_HS
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default y
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menu "General Purpose UARTs"
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menuconfig BSP_USING_UART1
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bool "Enable UART1"
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default n
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@ -15,6 +16,12 @@ menuconfig BSP_USING_UART1
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config BSP_UART1_RXD_PIN
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int "uart1 RXD pin number"
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default 21
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config BSP_UART1_RTS_PIN
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int "uart1 RTS pin number (-1 for not used)"
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default -1
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config BSP_UART1_CTS_PIN
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int "uart1 CTS pin number (-1 for not used)"
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default -1
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endif
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menuconfig BSP_USING_UART2
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@ -27,6 +34,12 @@ menuconfig BSP_USING_UART2
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config BSP_UART2_RXD_PIN
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int "uart2 RXD pin number"
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default 27
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config BSP_UART2_RTS_PIN
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int "uart2 RTS pin number (-1 for not used)"
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default -1
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config BSP_UART2_CTS_PIN
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int "uart2 CTS pin number (-1 for not used)"
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default -1
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endif
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menuconfig BSP_USING_UART3
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@ -39,7 +52,14 @@ menuconfig BSP_USING_UART3
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config BSP_UART3_RXD_PIN
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int "uart3 RXD pin number"
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default 23
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config BSP_UART3_RTS_PIN
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int "uart3 RTS pin number (-1 for not used)"
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default -1
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config BSP_UART3_CTS_PIN
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int "uart3 CTS pin number (-1 for not used)"
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default -1
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endif
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endmenu
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config BSP_USING_I2C1
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bool "Enable I2C1 (GPIO0/1)"
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@ -119,9 +139,40 @@ if BSP_USING_LCD
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config BSP_LCD_DC_PIN
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int "DC pin number of 8080 interface"
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default 38
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config BSP_LCD_RST_PIN
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int "RST pin number of 8080 interface"
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config BSP_LCD_RST_PIN
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int "RESET pin number of 8080 interface (-1 for not used)"
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default 37
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config BSP_LCD_BACKLIGHT_PIN
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int "Backlight control pin number (-1 for not used)"
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default -1
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choice
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prompt "backlight active polarity"
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default BSP_LCD_BACKLIGHT_ACTIVE_LOW
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config BSP_LCD_BACKLIGHT_ACTIVE_LOW
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bool "lcd backlight on low level"
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config BSP_LCD_BACKLIGHT_ACTIVE_HIGH
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bool "lcd_backlight on high level"
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endchoice
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config BSP_LCD_CLK_FREQ
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int "Lcd max clk frequency"
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default 15000000
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choice
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prompt "lcd scan direction"
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default BSP_BOARD_KD233
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config BSP_BOARD_KD233
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bool "board_kd233 lcd scan: DIR_YX_RLUD"
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config BSP_BOARD_K210_OPENMV_TEST
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bool "board_k210_openmv lcd scan: DIR_YX_LRUD"
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config BSP_BOARD_USER
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bool "board_user: user defined."
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endchoice
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config BSP_LCD_X_MAX
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int "LCD Height"
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default 240
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@ -5,28 +5,26 @@ from building import *
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cwd = GetCurrentDir()
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drv_path = cwd+"/../../../rt-thread/bsp/k210/driver/"
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src = [
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drv_path + 'board.c',
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drv_path + 'heap.c',
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'board.c',
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'heap.c',
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drv_path + 'drv_uart.c',
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drv_path + 'drv_interrupt.c',
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'drv_io_config.c'
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'drv_interrupt.c',
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'drv_io_config.c',
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'dmalock.c'
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]
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CPPPATH = [cwd,drv_path]
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if GetDepend('RT_USING_PIN'):
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src += [drv_path + 'drv_gpio.c']
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src += ['drv_gpio.c']
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if GetDepend('RT_USING_HWTIMER'):
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src += [drv_path + 'drv_hw_timer.c']
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if GetDepend('RT_USING_CPUTIME'):
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src += [drv_path + 'drv_cputime.c']
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if GetDepend('RT_USING_I2C'):
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src += [drv_path + 'drv_i2c.c']
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if GetDepend('RT_USING_SPI'):
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src += [drv_path + 'drv_spi.c']
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src += ['drv_spi.c']
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if GetDepend('RT_USING_PWM'):
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src += [drv_path + 'drv_pwm.c']
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@ -42,6 +40,7 @@ if GetDepend('BSP_USING_DVP'):
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if GetDepend('BSP_USING_LCD'):
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src += ['drv_lcd.c']
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src += ['drv_mpylcd.c']
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if GetDepend('PKG_USING_RW007'):
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src += ['rw007_port.c']
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@ -0,0 +1,144 @@
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/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include "board.h"
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#include "tick.h"
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#include "drv_uart.h"
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#include "encoding.h"
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#include "fpioa.h"
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#include "dmac.h"
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#include "dmalock.h"
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void init_bss(void)
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{
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unsigned int *dst;
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dst = &__bss_start;
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while (dst < &__bss_end)
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{
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*dst++ = 0;
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}
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}
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void primary_cpu_entry(void)
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{
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extern void entry(void);
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/* disable global interrupt */
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init_bss();
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rt_hw_interrupt_disable();
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entry();
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}
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#include <clint.h>
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#include <sysctl.h>
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int freq(void)
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{
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rt_uint64_t value = 0;
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value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL0);
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rt_kprintf("PLL0: %d\n", value);
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value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL1);
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rt_kprintf("PLL1: %d\n", value);
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value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL2);
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rt_kprintf("PLL2: %d\n", value);
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value = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU);
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rt_kprintf("CPU : %d\n", value);
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value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB0);
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rt_kprintf("APB0: %d\n", value);
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value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB1);
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rt_kprintf("APB1: %d\n", value);
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value = sysctl_clock_get_freq(SYSCTL_CLOCK_APB2);
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rt_kprintf("APB2: %d\n", value);
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value = sysctl_clock_get_freq(SYSCTL_CLOCK_HCLK);
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rt_kprintf("HCLK: %d\n", value);
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value = clint_get_time();
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rt_kprintf("mtime: %d\n", value);
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return 0;
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}
|
||||
MSH_CMD_EXPORT(freq, show freq info);
|
||||
|
||||
#ifdef RT_USING_SMP
|
||||
extern int rt_hw_clint_ipi_enable(void);
|
||||
#endif
|
||||
|
||||
extern int io_config_init(void);
|
||||
|
||||
void rt_hw_board_init(void)
|
||||
{
|
||||
sysctl_pll_set_freq(SYSCTL_PLL0, 800000000UL);
|
||||
sysctl_pll_set_freq(SYSCTL_PLL1, 400000000UL);
|
||||
sysctl_pll_set_freq(SYSCTL_PLL2, 45158400UL);
|
||||
sysctl_clock_set_threshold(SYSCTL_THRESHOLD_APB1, 2);
|
||||
/* Init FPIOA */
|
||||
fpioa_init();
|
||||
|
||||
io_config_init();
|
||||
|
||||
/* Dmac init */
|
||||
dmac_init();
|
||||
dmalock_init();
|
||||
|
||||
/* initalize interrupt */
|
||||
rt_hw_interrupt_init();
|
||||
/* initialize hardware interrupt */
|
||||
rt_hw_uart_init();
|
||||
|
||||
rt_hw_tick_init();
|
||||
|
||||
#ifdef RT_USING_SMP
|
||||
rt_hw_clint_ipi_enable();
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_CONSOLE
|
||||
/* set console device */
|
||||
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
|
||||
#endif /* RT_USING_CONSOLE */
|
||||
|
||||
#ifdef RT_USING_HEAP
|
||||
rt_kprintf("heap: [0x%08x - 0x%08x]\n", (rt_ubase_t) RT_HW_HEAP_BEGIN, (rt_ubase_t) RT_HW_HEAP_END);
|
||||
/* initialize memory system */
|
||||
rt_system_heap_init(RT_HW_HEAP_BEGIN, RT_HW_HEAP_END);
|
||||
#endif
|
||||
|
||||
#ifdef RT_USING_COMPONENTS_INIT
|
||||
rt_components_board_init();
|
||||
#endif
|
||||
}
|
||||
void rt_hw_cpu_reset(void)
|
||||
{
|
||||
sysctl->soft_reset.soft_reset = 1;
|
||||
while(1);
|
||||
}
|
||||
|
||||
MSH_CMD_EXPORT_ALIAS(rt_hw_cpu_reset, reboot, reset machine);
|
||||
|
||||
/**
|
||||
* This function will delay for some us.
|
||||
*
|
||||
* @param us the delay time of us
|
||||
*/
|
||||
void rt_hw_us_delay(rt_uint32_t usec)
|
||||
{
|
||||
rt_uint32_t cycle = read_cycle();
|
||||
rt_uint32_t nop_all = usec * sysctl_clock_get_freq(SYSCTL_CLOCK_CPU) / 1000000UL;
|
||||
while (1)
|
||||
{
|
||||
if(read_cycle() - cycle >= nop_all)
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2017-5-30 Bernard the first version
|
||||
*/
|
||||
|
||||
#ifndef BOARD_H__
|
||||
#define BOARD_H__
|
||||
|
||||
#include "fpioa.h"
|
||||
#include "platform.h"
|
||||
#include <rtconfig.h>
|
||||
|
||||
extern unsigned int __bss_start;
|
||||
extern unsigned int __bss_end;
|
||||
|
||||
#define RT_HW_HEAP_BEGIN (void*)&__bss_end
|
||||
#define RT_HW_HEAP_END (void*)(0x80000000 + 6 * 1024 * 1024)
|
||||
|
||||
void rt_hw_board_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
|
||||
/* Copyright Canaan Inc.
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include "dmalock.h"
|
||||
|
||||
struct dmac_host
|
||||
{
|
||||
struct rt_semaphore sem;
|
||||
struct rt_mutex mutex;
|
||||
uint8_t channel_used[DMAC_CHANNEL_COUNT];
|
||||
char *channel_name[DMAC_CHANNEL_COUNT];
|
||||
};
|
||||
|
||||
static struct dmac_host _dmac_host;
|
||||
|
||||
void dmalock_init(void)
|
||||
{
|
||||
rt_sem_init(&_dmac_host.sem, "dma_sem", DMAC_CHANNEL_COUNT, RT_IPC_FLAG_FIFO);
|
||||
rt_mutex_init(&_dmac_host.mutex, "dma_mutex", RT_IPC_FLAG_FIFO);
|
||||
for (int i = 0; i < DMAC_CHANNEL_COUNT; i++)
|
||||
{
|
||||
_dmac_host.channel_used[i] = 0;
|
||||
_dmac_host.channel_name[i] = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
int _dmalock_sync_take(dmac_channel_number_t *chn, int timeout_ms, const char *name)
|
||||
{
|
||||
rt_err_t result;
|
||||
|
||||
*chn = DMAC_CHANNEL_MAX;
|
||||
result = rt_sem_take(&_dmac_host.sem, timeout_ms);
|
||||
if (result == RT_EOK)
|
||||
{
|
||||
rt_mutex_take(&_dmac_host.mutex, RT_WAITING_FOREVER);
|
||||
for (int i = 0; i < DMAC_CHANNEL_COUNT; i++)
|
||||
{
|
||||
if (_dmac_host.channel_used[i] == 0)
|
||||
{
|
||||
_dmac_host.channel_used[i] = 1;
|
||||
_dmac_host.channel_name[i] = name;
|
||||
*chn = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
rt_mutex_release(&_dmac_host.mutex);
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
void dmalock_release(dmac_channel_number_t chn)
|
||||
{
|
||||
if (chn >= DMAC_CHANNEL_MAX)
|
||||
return;
|
||||
_dmac_host.channel_name[chn] = NULL;
|
||||
_dmac_host.channel_used[chn] = 0;
|
||||
rt_sem_release(&_dmac_host.sem);
|
||||
}
|
||||
|
||||
static void dma_ch_info(int argc, char **argv)
|
||||
{
|
||||
uint32_t cnt = 0;
|
||||
|
||||
for (int i = 0; i < DMAC_CHANNEL_COUNT; i++)
|
||||
{
|
||||
if (_dmac_host.channel_used[i] != 0)
|
||||
{
|
||||
rt_kprintf("dma_ch%d is using by func [%s]\n", i, _dmac_host.channel_name[i]);
|
||||
cnt++;
|
||||
}
|
||||
}
|
||||
|
||||
if(cnt == 0)
|
||||
rt_kprintf(" no dma_ch is using.\n");
|
||||
}
|
||||
MSH_CMD_EXPORT(dma_ch_info, list dma channel informationn.);
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
#ifndef __DMALOCK_H
|
||||
#define __DMALOCK_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <rtdef.h>
|
||||
#include <dmac.h>
|
||||
|
||||
#define dmalock_sync_take(x,y) _dmalock_sync_take(x, y, __func__)
|
||||
|
||||
void dmalock_init(void);
|
||||
int _dmalock_sync_take(dmac_channel_number_t *chn, int timeout_ms, const char *name);
|
||||
void dmalock_release(dmac_channel_number_t chn);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,267 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 ZYH first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
#include <fpioa.h>
|
||||
#include <gpiohs.h>
|
||||
#include "drv_gpio.h"
|
||||
#include "drv_io_config.h"
|
||||
#include <plic.h>
|
||||
#include <rthw.h>
|
||||
#include <utils.h>
|
||||
#include <string.h>
|
||||
|
||||
#define DBG_ENABLE
|
||||
#define DBG_TAG "PIN"
|
||||
#define DBG_LVL DBG_WARNING
|
||||
#define DBG_COLOR
|
||||
#include <rtdbg.h>
|
||||
|
||||
#define FUNC_GPIOHS(n) (FUNC_GPIOHS0 + n)
|
||||
|
||||
static short pin_alloc_table[FPIOA_NUM_IO];
|
||||
static uint32_t free_pin = 0;
|
||||
|
||||
static int alloc_pin_channel(rt_base_t pin_index)
|
||||
{
|
||||
if(free_pin == 32)
|
||||
{
|
||||
LOG_E("no free gpiohs channel to alloc");
|
||||
return -1;
|
||||
}
|
||||
|
||||
if(pin_alloc_table[pin_index] != -1)
|
||||
{
|
||||
LOG_W("already alloc gpiohs channel for pin %d", pin_index);
|
||||
return pin_alloc_table[pin_index];
|
||||
}
|
||||
|
||||
pin_alloc_table[pin_index] = free_pin;
|
||||
free_pin++;
|
||||
|
||||
fpioa_set_function(pin_index, FUNC_GPIOHS(pin_alloc_table[pin_index]));
|
||||
return pin_alloc_table[pin_index];
|
||||
}
|
||||
|
||||
int get_pin_channel(rt_base_t pin_index)
|
||||
{
|
||||
return pin_alloc_table[pin_index];
|
||||
}
|
||||
|
||||
static void free_pin_channel(rt_base_t pin_index)
|
||||
{
|
||||
if(pin_alloc_table[pin_index] == -1)
|
||||
{
|
||||
LOG_W("free error:not alloc gpiohs channel for pin %d", pin_index);
|
||||
return;
|
||||
}
|
||||
pin_alloc_table[pin_index] = -1;
|
||||
free_pin--;
|
||||
}
|
||||
|
||||
|
||||
static void drv_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode)
|
||||
{
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
pin_channel = alloc_pin_channel(pin);
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
switch (mode)
|
||||
{
|
||||
case PIN_MODE_OUTPUT:
|
||||
gpiohs_set_drive_mode(pin_channel, GPIO_DM_OUTPUT);
|
||||
break;
|
||||
case PIN_MODE_INPUT:
|
||||
gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT);
|
||||
break;
|
||||
case PIN_MODE_INPUT_PULLUP:
|
||||
gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT_PULL_UP);
|
||||
break;
|
||||
case PIN_MODE_INPUT_PULLDOWN:
|
||||
gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT_PULL_DOWN);
|
||||
break;
|
||||
default:
|
||||
LOG_E("Not support mode %d", mode);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void drv_pin_write(struct rt_device *device, rt_base_t pin, rt_base_t value)
|
||||
{
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
LOG_E("pin %d not set mode", pin);
|
||||
return;
|
||||
}
|
||||
gpiohs_set_pin(pin_channel, value == PIN_HIGH ? GPIO_PV_HIGH : GPIO_PV_LOW);
|
||||
}
|
||||
|
||||
static int drv_pin_read(struct rt_device *device, rt_base_t pin)
|
||||
{
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
LOG_E("pin %d not set mode", pin);
|
||||
return -1;
|
||||
}
|
||||
return gpiohs_get_pin(pin_channel) == GPIO_PV_HIGH ? PIN_HIGH : PIN_LOW;
|
||||
}
|
||||
|
||||
static struct
|
||||
{
|
||||
void (*hdr)(void *args);
|
||||
void* args;
|
||||
gpio_pin_edge_t edge;
|
||||
} irq_table[32];
|
||||
|
||||
static void pin_irq(int vector, void *param)
|
||||
{
|
||||
int pin_channel = vector - IRQN_GPIOHS0_INTERRUPT;
|
||||
if(irq_table[pin_channel].edge & GPIO_PE_FALLING)
|
||||
{
|
||||
set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 0);
|
||||
set_gpio_bit(gpiohs->fall_ip.u32, pin_channel, 1);
|
||||
set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 1);
|
||||
}
|
||||
|
||||
if(irq_table[pin_channel].edge & GPIO_PE_RISING)
|
||||
{
|
||||
set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 0);
|
||||
set_gpio_bit(gpiohs->rise_ip.u32, pin_channel, 1);
|
||||
set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 1);
|
||||
}
|
||||
|
||||
if(irq_table[pin_channel].edge & GPIO_PE_LOW)
|
||||
{
|
||||
set_gpio_bit(gpiohs->low_ie.u32, pin_channel, 0);
|
||||
set_gpio_bit(gpiohs->low_ip.u32, pin_channel, 1);
|
||||
set_gpio_bit(gpiohs->low_ie.u32, pin_channel, 1);
|
||||
}
|
||||
|
||||
if(irq_table[pin_channel].edge & GPIO_PE_HIGH)
|
||||
{
|
||||
set_gpio_bit(gpiohs->high_ie.u32, pin_channel, 0);
|
||||
set_gpio_bit(gpiohs->high_ip.u32, pin_channel, 1);
|
||||
set_gpio_bit(gpiohs->high_ie.u32, pin_channel, 1);
|
||||
}
|
||||
if(irq_table[pin_channel].hdr)
|
||||
{
|
||||
irq_table[pin_channel].hdr(irq_table[pin_channel].args);
|
||||
}
|
||||
}
|
||||
|
||||
static rt_err_t drv_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
|
||||
rt_uint32_t mode, void (*hdr)(void *args), void *args)
|
||||
{
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
char irq_name[10];
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
LOG_E("pin %d not set mode", pin);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
irq_table[pin_channel].hdr = hdr;
|
||||
irq_table[pin_channel].args = args;
|
||||
switch (mode)
|
||||
{
|
||||
case PIN_IRQ_MODE_RISING:
|
||||
irq_table[pin_channel].edge = GPIO_PE_RISING;
|
||||
break;
|
||||
case PIN_IRQ_MODE_FALLING:
|
||||
irq_table[pin_channel].edge = GPIO_PE_FALLING;
|
||||
break;
|
||||
case PIN_IRQ_MODE_RISING_FALLING:
|
||||
irq_table[pin_channel].edge = GPIO_PE_BOTH;
|
||||
break;
|
||||
case PIN_IRQ_MODE_HIGH_LEVEL:
|
||||
irq_table[pin_channel].edge = GPIO_PE_LOW;
|
||||
break;
|
||||
case PIN_IRQ_MODE_LOW_LEVEL:
|
||||
irq_table[pin_channel].edge = GPIO_PE_HIGH;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
gpiohs_set_pin_edge(pin_channel, irq_table[pin_channel].edge);
|
||||
rt_snprintf(irq_name, sizeof irq_name, "pin%d", pin);
|
||||
rt_hw_interrupt_install(IRQN_GPIOHS0_INTERRUPT + pin_channel, pin_irq, RT_NULL, irq_name);
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_err_t drv_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
LOG_E("pin %d not set mode", pin);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
irq_table[pin_channel].hdr = RT_NULL;
|
||||
irq_table[pin_channel].args = RT_NULL;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static rt_err_t drv_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
|
||||
{
|
||||
int pin_channel = get_pin_channel(pin);
|
||||
|
||||
if(pin_channel == -1)
|
||||
{
|
||||
LOG_E("pin %d not set mode", pin);
|
||||
return -RT_ERROR;
|
||||
}
|
||||
|
||||
if(enabled)
|
||||
{
|
||||
rt_hw_interrupt_umask(IRQN_GPIOHS0_INTERRUPT + pin_channel);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_hw_interrupt_mask(IRQN_GPIOHS0_INTERRUPT + pin_channel);
|
||||
}
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
const static struct rt_pin_ops drv_pin_ops =
|
||||
{
|
||||
drv_pin_mode,
|
||||
drv_pin_write,
|
||||
drv_pin_read,
|
||||
|
||||
drv_pin_attach_irq,
|
||||
drv_pin_detach_irq,
|
||||
drv_pin_irq_enable
|
||||
};
|
||||
|
||||
int rt_hw_pin_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
memset(pin_alloc_table, 0xff, sizeof pin_alloc_table);
|
||||
free_pin = GPIO_ALLOC_START;
|
||||
ret = rt_device_pin_register("pin", &drv_pin_ops, RT_NULL);
|
||||
|
||||
return ret;
|
||||
}
|
||||
INIT_BOARD_EXPORT(rt_hw_pin_init);
|
||||
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 ZYH first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_GPIO_H__
|
||||
#define DRV_GPIO_H__
|
||||
|
||||
int rt_hw_pin_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,27 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 ZYH first version
|
||||
*/
|
||||
|
||||
#include <plic.h>
|
||||
|
||||
void plic_irq_handle(plic_irq_t irq)
|
||||
{
|
||||
plic_instance_t (*plic_instance)[IRQN_MAX] = plic_get_instance();
|
||||
if (plic_instance[0][irq].callback)
|
||||
{
|
||||
plic_instance[0][irq].callback(
|
||||
plic_instance[0][irq].ctx);
|
||||
}
|
||||
else if (plic_instance[1][irq].callback)
|
||||
{
|
||||
plic_instance[1][irq].callback(
|
||||
plic_instance[1][irq].ctx);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -6,7 +6,6 @@
|
|||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-19 ZYH first version
|
||||
* 2021-01-28 tianchunyu Modify macro definitions
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
|
|
@ -24,7 +23,18 @@ static struct io_config
|
|||
fpioa_function_t func;
|
||||
const char * func_name;
|
||||
} io_config[] =
|
||||
{
|
||||
{
|
||||
#ifdef BSP_USING_LCD
|
||||
IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS0), /* LCD CS PIN */
|
||||
IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK), /* LCD WR PIN */
|
||||
IOCONFIG(BSP_LCD_DC_PIN, HS_GPIO(LCD_DC_PIN)), /* LCD DC PIN */
|
||||
#if BSP_LCD_RST_PIN >= 0
|
||||
IOCONFIG(BSP_LCD_RST_PIN, HS_GPIO(LCD_RST_PIN)), /* LCD RESET PIN */
|
||||
#endif
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
IOCONFIG(BSP_LCD_BACKLIGHT_PIN, HS_GPIO(LCD_BACKLIGHT_PIN)), /* LCD BACKLIGHT PIN */
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_DVP
|
||||
IOCONFIG(BSP_DVP_SCCB_SDA_PIN, FUNC_SCCB_SDA),
|
||||
|
|
@ -37,13 +47,6 @@ static struct io_config
|
|||
IOCONFIG(BSP_DVP_CMOS_HREF_PIN, FUNC_CMOS_HREF),
|
||||
#endif
|
||||
|
||||
#if 0 //here is a drv lcd bug now don't know why
|
||||
IOCONFIG(BSP_LCD_CS_PIN, FUNC_SPI0_SS3), /* LCD CS PIN */
|
||||
IOCONFIG(BSP_LCD_WR_PIN, FUNC_SPI0_SCLK), /* LCD WR PIN */
|
||||
IOCONFIG(BSP_LCD_DC_PIN, FUNC_GPIOHS2), /* LCD DC PIN */
|
||||
IOCONFIG(BSP_LCD_RST_PIN,FUNC_GPIOHS3), /* LCD DC PIN */
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_SPI1
|
||||
IOCONFIG(BSP_SPI1_CLK_PIN, FUNC_SPI1_SCLK),
|
||||
IOCONFIG(BSP_SPI1_D0_PIN, FUNC_SPI1_D0),
|
||||
|
|
@ -69,14 +72,72 @@ static struct io_config
|
|||
#ifdef BSP_USING_UART1
|
||||
IOCONFIG(BSP_UART1_TXD_PIN, FUNC_UART1_TX),
|
||||
IOCONFIG(BSP_UART1_RXD_PIN, FUNC_UART1_RX),
|
||||
#if BSP_UART1_RTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART1_RTS_PIN, FUNC_UART1_RTS),
|
||||
#endif
|
||||
#if BSP_UART1_CTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART1_CTS_PIN, FUNC_UART1_CTS),
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BSP_USING_UART2
|
||||
IOCONFIG(BSP_UART2_TXD_PIN, FUNC_UART2_TX),
|
||||
IOCONFIG(BSP_UART2_RXD_PIN, FUNC_UART2_RX),
|
||||
#if BSP_UART2_RTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART2_RTS_PIN, FUNC_UART2_RTS),
|
||||
#endif
|
||||
#if BSP_UART2_CTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART2_CTS_PIN, FUNC_UART2_CTS),
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BSP_USING_UART3
|
||||
IOCONFIG(BSP_UART3_TXD_PIN, FUNC_UART3_TX),
|
||||
IOCONFIG(BSP_UART3_RXD_PIN, FUNC_UART3_RX),
|
||||
#if BSP_UART3_RTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART3_RTS_PIN, FUNC_UART3_RTS),
|
||||
#endif
|
||||
#if BSP_UART3_CTS_PIN >= 0
|
||||
IOCONFIG(BSP_UART3_CTS_PIN, FUNC_UART3_CTS),
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C0
|
||||
IOCONFIG(BSP_I2C0_SCL_PIN, FUNC_I2C0_SCLK),
|
||||
IOCONFIG(BSP_I2C0_SDA_PIN, FUNC_I2C0_SDA),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C1
|
||||
IOCONFIG(BSP_I2C1_SCL_PIN, FUNC_I2C1_SCLK),
|
||||
IOCONFIG(BSP_I2C1_SDA_PIN, FUNC_I2C1_SDA),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2C2
|
||||
IOCONFIG(BSP_I2C2_SCL_PIN, FUNC_I2C2_SCLK),
|
||||
IOCONFIG(BSP_I2C2_SDA_PIN, FUNC_I2C2_SDA),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2S0
|
||||
IOCONFIG(BSP_I2S0_OUT_D1_PIN, FUNC_I2S0_OUT_D1),
|
||||
IOCONFIG(BSP_I2S0_WS_PIN, FUNC_I2S0_WS),
|
||||
IOCONFIG(BSP_I2S0_SCLK_PIN, FUNC_I2S0_SCLK),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2S1
|
||||
IOCONFIG(BSP_I2S1_IN_D0_PIN, FUNC_I2S1_IN_D0),
|
||||
IOCONFIG(BSP_I2S1_WS_PIN, FUNC_I2S1_WS),
|
||||
IOCONFIG(BSP_I2S1_SCLK_PIN, FUNC_I2S1_SCLK),
|
||||
#endif
|
||||
#ifdef BSP_USING_I2S2
|
||||
IOCONFIG(BSP_I2S2_OUT_D1_PIN, FUNC_I2S2_OUT_D1),
|
||||
IOCONFIG(BSP_I2S2_WS_PIN, FUNC_I2S2_WS),
|
||||
IOCONFIG(BSP_I2S2_SCLK_PIN, FUNC_I2S2_SCLK),
|
||||
#endif
|
||||
|
||||
#ifdef BSP_PWM_CHN0_ENABLE
|
||||
IOCONFIG(BSP_PWM_CHN0_PIN, FUNC_TIMER2_TOGGLE1),
|
||||
#endif
|
||||
#ifdef BSP_PWM_CHN1_ENABLE
|
||||
IOCONFIG(BSP_PWM_CHN1_PIN, FUNC_TIMER2_TOGGLE2),
|
||||
#endif
|
||||
#ifdef BSP_PWM_CHN2_ENABLE
|
||||
IOCONFIG(BSP_PWM_CHN2_PIN, FUNC_TIMER2_TOGGLE3),
|
||||
#endif
|
||||
#ifdef BSP_PWM_CHN3_ENABLE
|
||||
IOCONFIG(BSP_PWM_CHN3_PIN, FUNC_TIMER2_TOGGLE4),
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
@ -101,16 +162,35 @@ int io_config_init(void)
|
|||
int count = sizeof(io_config) / sizeof(io_config[0]);
|
||||
int i;
|
||||
|
||||
/* IO GroupA Power Supply Setting */
|
||||
#if defined(BSP_GROUPA_POWER_SUPPLY_3V3)
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V33);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V33);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V33);
|
||||
#else
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK0, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK1, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK2, SYSCTL_POWER_V18);
|
||||
#ifdef BSP_USING_UART2
|
||||
// for IO-27/28
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33);
|
||||
#endif
|
||||
#if defined(BSP_USING_UART1) || defined(BSP_USING_UART3)
|
||||
// for IO-20~23
|
||||
|
||||
/* IO GroupB Power Supply Setting */
|
||||
#if defined(BSP_GROUPB_POWER_SUPPLY_3V3)
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V33);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V33);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK5, SYSCTL_POWER_V33);
|
||||
#else
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK3, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK4, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK5, SYSCTL_POWER_V18);
|
||||
#endif
|
||||
|
||||
/* IO GroupC Power Supply Setting */
|
||||
#if defined(BSP_GROUPC_POWER_SUPPLY_3V3)
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V33);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V33);
|
||||
#else
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V18);
|
||||
#endif
|
||||
|
||||
for(i = 0; i < count; i++)
|
||||
|
|
@ -120,12 +200,20 @@ int io_config_init(void)
|
|||
|
||||
#if defined(BSP_USING_DVP) || defined(BSP_USING_LCD)
|
||||
sysctl_set_spi0_dvp_data(1);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK6, SYSCTL_POWER_V18);
|
||||
sysctl_set_power_mode(SYSCTL_POWER_BANK7, SYSCTL_POWER_V18);
|
||||
#endif
|
||||
#ifdef FACE_DETECT
|
||||
sysctl_clock_enable(SYSCTL_CLOCK_AI);
|
||||
#endif
|
||||
}
|
||||
INIT_BOARD_EXPORT(io_config_init);
|
||||
|
||||
int io_config_used(int io_num)
|
||||
{
|
||||
int count = sizeof(io_config) / sizeof(io_config[0]);
|
||||
int i;
|
||||
|
||||
for(i = 0; i < count; i++)
|
||||
{
|
||||
if (io_config[i].io_num == io_num)
|
||||
break;
|
||||
}
|
||||
|
||||
return (i < count);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -11,10 +11,18 @@
|
|||
#ifndef __DRV_IO_CONFIG_H__
|
||||
#define __DRV_IO_CONFIG_H__
|
||||
|
||||
#include <rtconfig.h>
|
||||
|
||||
enum HS_GPIO_CONFIG
|
||||
{
|
||||
#ifdef BSP_USING_LCD
|
||||
LCD_DC_PIN = 0, /* LCD DC PIN */
|
||||
#if BSP_LCD_RST_PIN >= 0
|
||||
LCD_RST_PIN,
|
||||
#endif
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
LCD_BACKLIGHT_PIN,
|
||||
#endif
|
||||
#endif
|
||||
#ifdef BSP_SPI1_USING_SS0
|
||||
SPI1_CS0_PIN,
|
||||
|
|
@ -28,6 +36,11 @@ enum HS_GPIO_CONFIG
|
|||
#ifdef BSP_SPI1_USING_SS3
|
||||
SPI1_CS3_PIN,
|
||||
#endif
|
||||
|
||||
#ifdef BSP_USING_BRIDGE
|
||||
SPI2_INT_PIN,
|
||||
SPI2_READY_PIN,
|
||||
#endif
|
||||
GPIO_ALLOC_START /* index of gpio driver start */
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,16 +1,11 @@
|
|||
/* Copyright 2018 Canaan Inc.
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-12 ZYH first version
|
||||
*/
|
||||
|
||||
|
||||
|
|
@ -18,314 +13,538 @@
|
|||
|
||||
#ifdef BSP_USING_LCD
|
||||
#include <drv_lcd.h>
|
||||
#include <gpiohs.h>
|
||||
#include <spi.h>
|
||||
#include <unistd.h>
|
||||
#include <string.h>
|
||||
#include <fpioa.h>
|
||||
#define DBG_TAG "LCD"
|
||||
#define DBG_LVL DBG_LOG
|
||||
#define DBG_LVL DBG_WARNING
|
||||
#include <rtdbg.h>
|
||||
|
||||
#define NO_OPERATION 0x00
|
||||
#define SOFTWARE_RESET 0x01
|
||||
#define READ_ID 0x04
|
||||
#define READ_STATUS 0x09
|
||||
#define READ_POWER_MODE 0x0A
|
||||
#define READ_MADCTL 0x0B
|
||||
#define READ_PIXEL_FORMAT 0x0C
|
||||
#define READ_IMAGE_FORMAT 0x0D
|
||||
#define READ_SIGNAL_MODE 0x0E
|
||||
#define READ_SELT_DIAG_RESULT 0x0F
|
||||
#define SLEEP_ON 0x10
|
||||
#define SLEEP_OFF 0x11
|
||||
#define PARTIAL_DISPALY_ON 0x12
|
||||
#define NORMAL_DISPALY_ON 0x13
|
||||
#define INVERSION_DISPALY_OFF 0x20
|
||||
#define INVERSION_DISPALY_ON 0x21
|
||||
#define GAMMA_SET 0x26
|
||||
#define DISPALY_OFF 0x28
|
||||
#define DISPALY_ON 0x29
|
||||
#define HORIZONTAL_ADDRESS_SET 0x2A
|
||||
#define VERTICAL_ADDRESS_SET 0x2B
|
||||
#define MEMORY_WRITE 0x2C
|
||||
#define COLOR_SET 0x2D
|
||||
#define MEMORY_READ 0x2E
|
||||
#define PARTIAL_AREA 0x30
|
||||
#define VERTICAL_SCROL_DEFINE 0x33
|
||||
#define TEAR_EFFECT_LINE_OFF 0x34
|
||||
#define TEAR_EFFECT_LINE_ON 0x35
|
||||
#define MEMORY_ACCESS_CTL 0x36
|
||||
#define VERTICAL_SCROL_S_ADD 0x37
|
||||
#define IDLE_MODE_OFF 0x38
|
||||
#define IDLE_MODE_ON 0x39
|
||||
#define PIXEL_FORMAT_SET 0x3A
|
||||
#define WRITE_MEMORY_CONTINUE 0x3C
|
||||
#define READ_MEMORY_CONTINUE 0x3E
|
||||
#define SET_TEAR_SCANLINE 0x44
|
||||
#define GET_SCANLINE 0x45
|
||||
#define WRITE_BRIGHTNESS 0x51
|
||||
#define READ_BRIGHTNESS 0x52
|
||||
#define WRITE_CTRL_DISPALY 0x53
|
||||
#define READ_CTRL_DISPALY 0x54
|
||||
#define WRITE_BRIGHTNESS_CTL 0x55
|
||||
#define READ_BRIGHTNESS_CTL 0x56
|
||||
#define WRITE_MIN_BRIGHTNESS 0x5E
|
||||
#define READ_MIN_BRIGHTNESS 0x5F
|
||||
#define READ_ID1 0xDA
|
||||
#define READ_ID2 0xDB
|
||||
#define READ_ID3 0xDC
|
||||
#define RGB_IF_SIGNAL_CTL 0xB0
|
||||
#define NORMAL_FRAME_CTL 0xB1
|
||||
#define IDLE_FRAME_CTL 0xB2
|
||||
#define PARTIAL_FRAME_CTL 0xB3
|
||||
#define INVERSION_CTL 0xB4
|
||||
#define BLANK_PORCH_CTL 0xB5
|
||||
#define DISPALY_FUNCTION_CTL 0xB6
|
||||
#define ENTRY_MODE_SET 0xB7
|
||||
#define BACKLIGHT_CTL1 0xB8
|
||||
#define BACKLIGHT_CTL2 0xB9
|
||||
#define BACKLIGHT_CTL3 0xBA
|
||||
#define BACKLIGHT_CTL4 0xBB
|
||||
#define BACKLIGHT_CTL5 0xBC
|
||||
#define BACKLIGHT_CTL7 0xBE
|
||||
#define BACKLIGHT_CTL8 0xBF
|
||||
#define POWER_CTL1 0xC0
|
||||
#define POWER_CTL2 0xC1
|
||||
#define VCOM_CTL1 0xC5
|
||||
#define VCOM_CTL2 0xC7
|
||||
#define NV_MEMORY_WRITE 0xD0
|
||||
#define NV_MEMORY_PROTECT_KEY 0xD1
|
||||
#define NV_MEMORY_STATUS_READ 0xD2
|
||||
#define READ_ID4 0xD3
|
||||
#define POSITIVE_GAMMA_CORRECT 0xE0
|
||||
#define NEGATIVE_GAMMA_CORRECT 0xE1
|
||||
#define DIGITAL_GAMMA_CTL1 0xE2
|
||||
#define DIGITAL_GAMMA_CTL2 0xE3
|
||||
#define INTERFACE_CTL 0xF6
|
||||
|
||||
#define LCD_SPI_CHANNEL SPI_DEVICE_0
|
||||
#define LCD_SPI_CHIP_SELECT SPI_CHIP_SELECT_0
|
||||
|
||||
#if defined(BSP_BOARD_K210_OPENMV_TEST)
|
||||
#define LCD_SCAN_DIR DIR_YX_LRUD
|
||||
#elif defined(BSP_BOARD_KD233)
|
||||
#define LCD_SCAN_DIR (DIR_YX_RLUD | 0x08)
|
||||
#elif defined(BSP_BOARD_USER)
|
||||
/*user define.*/
|
||||
#define LCD_SCAN_DIR DIR_YX_RLDU
|
||||
#endif
|
||||
|
||||
|
||||
static lcd_ctl_t lcd_ctl;
|
||||
|
||||
static void init_dcx(void)
|
||||
static struct lcd_8080_device _lcddev;
|
||||
|
||||
static void drv_lcd_cmd(lcd_8080_device_t lcd, rt_uint8_t cmd)
|
||||
{
|
||||
gpiohs_set_drive_mode(DCX_GPIONUM, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_HIGH);
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_LOW);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
spi_init_non_standard(lcd->spi_channel, 8 /*instrction length*/, 0 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, &cmd, 1, SPI_TRANS_CHAR);
|
||||
}
|
||||
|
||||
static void set_dcx_control(void)
|
||||
static void drv_lcd_data_byte(lcd_8080_device_t lcd, rt_uint8_t *data_buf, rt_uint32_t length)
|
||||
{
|
||||
gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_LOW);
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
spi_init_non_standard(lcd->spi_channel, 8 /*instrction length*/, 0 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_CHAR);
|
||||
}
|
||||
|
||||
static void set_dcx_data(void)
|
||||
void drv_lcd_data_half_word(lcd_8080_device_t lcd, rt_uint16_t *data_buf, rt_uint32_t length)
|
||||
{
|
||||
gpiohs_set_pin(DCX_GPIONUM, GPIO_PV_HIGH);
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 16, 0);
|
||||
spi_init_non_standard(lcd->spi_channel, 16 /*instrction length*/, 0 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_SHORT);
|
||||
}
|
||||
|
||||
|
||||
static void init_rst(void)
|
||||
void drv_lcd_data_word(lcd_8080_device_t lcd, rt_uint32_t *data_buf, rt_uint32_t length)
|
||||
{
|
||||
gpiohs_set_drive_mode(RST_GPIONUM, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(RST_GPIONUM, GPIO_PV_LOW);
|
||||
rt_thread_mdelay(10);
|
||||
gpiohs_set_pin(RST_GPIONUM, GPIO_PV_HIGH);
|
||||
rt_thread_mdelay(10);
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
|
||||
spi_init_non_standard(lcd->spi_channel, 0 /*instrction length*/, 32 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, data_buf, length, SPI_TRANS_INT);
|
||||
}
|
||||
|
||||
|
||||
void tft_hard_init(void)
|
||||
static void drv_lcd_hw_init(lcd_8080_device_t lcd)
|
||||
{
|
||||
init_dcx();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
init_rst();
|
||||
spi_set_clk_rate(SPI_CHANNEL, 20000000);
|
||||
#if BSP_LCD_RST_PIN >= 0
|
||||
{
|
||||
gpiohs_set_drive_mode(lcd->rst_pin, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(lcd->rst_pin, GPIO_PV_LOW);
|
||||
rt_thread_mdelay(20);
|
||||
gpiohs_set_pin(lcd->rst_pin, GPIO_PV_HIGH);
|
||||
rt_thread_mdelay(20);
|
||||
}
|
||||
#endif
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
{
|
||||
gpiohs_set_drive_mode(lcd->backlight_pin, GPIO_DM_OUTPUT);
|
||||
#if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
|
||||
#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
|
||||
#else
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
gpiohs_set_drive_mode(lcd->dc_pin, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
spi_set_clk_rate(lcd->spi_channel, BSP_LCD_CLK_FREQ);
|
||||
}
|
||||
|
||||
void tft_write_command(uint8_t cmd)
|
||||
static void drv_lcd_set_direction(lcd_8080_device_t lcd, lcd_dir_t dir)
|
||||
{
|
||||
set_dcx_control();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
spi_init_non_standard(SPI_CHANNEL, 8/*instrction length*/, 0/*address length*/, 0/*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, (uint8_t *)(&cmd), 1,SPI_TRANS_CHAR);
|
||||
}
|
||||
|
||||
void tft_write_byte(uint8_t *data_buf, uint32_t length)
|
||||
{
|
||||
set_dcx_data();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 8, 0);
|
||||
spi_init_non_standard(SPI_CHANNEL, 8/*instrction length*/, 0/*address length*/, 0/*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT, data_buf, length, SPI_TRANS_CHAR);
|
||||
}
|
||||
|
||||
void tft_write_half(uint16_t *data_buf, uint32_t length)
|
||||
{
|
||||
set_dcx_data();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 16, 0);
|
||||
spi_init_non_standard(SPI_CHANNEL, 16/*instrction length*/, 0/*address length*/, 0/*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length, SPI_TRANS_SHORT);
|
||||
}
|
||||
|
||||
void tft_write_word(uint32_t *data_buf, uint32_t length, uint32_t flag)
|
||||
{
|
||||
set_dcx_data();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
|
||||
|
||||
spi_init_non_standard(SPI_CHANNEL, 0/*instrction length*/, 32/*address length*/, 0/*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
|
||||
spi_send_data_normal_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length, SPI_TRANS_INT);
|
||||
}
|
||||
|
||||
void tft_fill_data(uint32_t *data_buf, uint32_t length)
|
||||
{
|
||||
set_dcx_data();
|
||||
spi_init(SPI_CHANNEL, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
|
||||
spi_init_non_standard(SPI_CHANNEL, 0/*instrction length*/, 32/*address length*/, 0/*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT/*spi address trans mode*/);
|
||||
spi_fill_data_dma(DMAC_CHANNEL0, SPI_CHANNEL, SPI_SLAVE_SELECT,data_buf, length);
|
||||
}
|
||||
|
||||
void lcd_polling_enable(void)
|
||||
{
|
||||
lcd_ctl.mode = 0;
|
||||
}
|
||||
|
||||
void lcd_interrupt_enable(void)
|
||||
{
|
||||
lcd_ctl.mode = 1;
|
||||
}
|
||||
|
||||
void lcd_pre()
|
||||
{
|
||||
fpioa_set_function(37, FUNC_GPIOHS0 + RST_GPIONUM);
|
||||
fpioa_set_function(38, FUNC_GPIOHS0 + DCX_GPIONUM);
|
||||
fpioa_set_function(36, FUNC_SPI0_SS0 + LCD_SPI_SLAVE_SELECT);
|
||||
fpioa_set_function(39, FUNC_SPI0_SCLK);
|
||||
}
|
||||
|
||||
int lcd_init(void)
|
||||
{
|
||||
|
||||
uint8_t data = 0;
|
||||
lcd_pre();
|
||||
tft_hard_init();
|
||||
/*soft reset*/
|
||||
tft_write_command(SOFTWARE_RESET);
|
||||
rt_thread_mdelay(10);
|
||||
/*exit sleep*/
|
||||
tft_write_command(SLEEP_OFF);
|
||||
rt_thread_mdelay(10);
|
||||
/*pixel format*/
|
||||
tft_write_command(PIXEL_FORMAT_SET);
|
||||
data = 0x55;
|
||||
tft_write_byte(&data, 1);
|
||||
/*display on*/
|
||||
tft_write_command(DISPALY_ON);
|
||||
lcd_polling_enable();
|
||||
lcd_clear(PINK);
|
||||
lcd_set_direction(DIR_YX_RLDU);
|
||||
LOG_I("LCD initialization successfully");
|
||||
}
|
||||
INIT_APP_EXPORT(lcd_init);
|
||||
|
||||
|
||||
|
||||
void lcd_set_direction(lcd_dir_t dir)
|
||||
{
|
||||
lcd_ctl.dir = dir;
|
||||
if (dir & DIR_XY_MASK)
|
||||
{
|
||||
lcd_ctl.width = LCD_Y_MAX - 1;
|
||||
lcd_ctl.height = LCD_X_MAX - 1;
|
||||
lcd->lcd_info.width = BSP_LCD_Y_MAX;
|
||||
lcd->lcd_info.height = BSP_LCD_X_MAX;
|
||||
}
|
||||
else
|
||||
{
|
||||
lcd_ctl.width = LCD_X_MAX - 1;
|
||||
lcd_ctl.height = LCD_Y_MAX - 1;
|
||||
lcd->lcd_info.width = BSP_LCD_X_MAX;
|
||||
lcd->lcd_info.height = BSP_LCD_Y_MAX;
|
||||
}
|
||||
|
||||
tft_write_command(MEMORY_ACCESS_CTL);
|
||||
tft_write_byte((uint8_t *)&dir, 1);
|
||||
rt_kprintf("lcd witdth %d,height %d \n",lcd->lcd_info.width,lcd->lcd_info.height);
|
||||
drv_lcd_cmd(lcd, MEMORY_ACCESS_CTL);
|
||||
drv_lcd_data_byte(lcd, (rt_uint8_t *)&dir, 1);
|
||||
}
|
||||
|
||||
void lcd_set_area(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2)
|
||||
void drv_lcd_set_area(lcd_8080_device_t lcd, rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2)
|
||||
{
|
||||
uint8_t data[4] = {0};
|
||||
rt_uint8_t data[4] = {0};
|
||||
|
||||
data[0] = (uint8_t)(x1 >> 8);
|
||||
data[1] = (uint8_t)(x1);
|
||||
data[2] = (uint8_t)(x2 >> 8);
|
||||
data[3] = (uint8_t)(x2);
|
||||
tft_write_command(HORIZONTAL_ADDRESS_SET);
|
||||
tft_write_byte(data, 4);
|
||||
data[0] = (rt_uint8_t)(x1 >> 8);
|
||||
data[1] = (rt_uint8_t)(x1);
|
||||
data[2] = (rt_uint8_t)(x2 >> 8);
|
||||
data[3] = (rt_uint8_t)(x2);
|
||||
drv_lcd_cmd(lcd, HORIZONTAL_ADDRESS_SET);
|
||||
drv_lcd_data_byte(lcd, data, 4);
|
||||
|
||||
data[0] = (uint8_t)(y1 >> 8);
|
||||
data[1] = (uint8_t)(y1);
|
||||
data[2] = (uint8_t)(y2 >> 8);
|
||||
data[3] = (uint8_t)(y2);
|
||||
tft_write_command(VERTICAL_ADDRESS_SET);
|
||||
tft_write_byte(data, 4);
|
||||
data[0] = (rt_uint8_t)(y1 >> 8);
|
||||
data[1] = (rt_uint8_t)(y1);
|
||||
data[2] = (rt_uint8_t)(y2 >> 8);
|
||||
data[3] = (rt_uint8_t)(y2);
|
||||
drv_lcd_cmd(lcd, VERTICAL_ADDRESS_SET);
|
||||
drv_lcd_data_byte(lcd, data, 4);
|
||||
|
||||
tft_write_command(MEMORY_WRITE);
|
||||
drv_lcd_cmd(lcd, MEMORY_WRITE);
|
||||
}
|
||||
|
||||
void lcd_draw_point(uint16_t x, uint16_t y, uint16_t color)
|
||||
static void drv_lcd_set_pixel(lcd_8080_device_t lcd, uint16_t x, uint16_t y, uint16_t color)
|
||||
{
|
||||
lcd_set_area(x, y, x, y);
|
||||
tft_write_half(&color, 1);
|
||||
drv_lcd_set_area(lcd, x, y, x, y);
|
||||
drv_lcd_data_half_word(lcd, &color, 1);
|
||||
}
|
||||
|
||||
void lcd_draw_char(uint16_t x, uint16_t y, char c, uint16_t color)
|
||||
{
|
||||
uint8_t i = 0;
|
||||
uint8_t j = 0;
|
||||
uint8_t data = 0;
|
||||
|
||||
for (i = 0; i < 16; i++)
|
||||
{
|
||||
data = ascii0816[c * 16 + i];
|
||||
for (j = 0; j < 8; j++)
|
||||
{
|
||||
if (data & 0x80)
|
||||
lcd_draw_point(x + j, y, color);
|
||||
data <<= 1;
|
||||
}
|
||||
y++;
|
||||
}
|
||||
}
|
||||
|
||||
void lcd_draw_string(uint16_t x, uint16_t y, char *str, uint16_t color)
|
||||
{
|
||||
while (*str)
|
||||
{
|
||||
lcd_draw_char(x, y, *str, color);
|
||||
str++;
|
||||
x += 8;
|
||||
}
|
||||
}
|
||||
|
||||
void lcd_ram_draw_string(char *str, uint32_t *ptr, uint16_t font_color, uint16_t bg_color)
|
||||
{
|
||||
uint8_t i = 0;
|
||||
uint8_t j = 0;
|
||||
uint8_t data = 0;
|
||||
uint8_t *pdata = NULL;
|
||||
uint16_t width = 0;
|
||||
uint32_t *pixel = NULL;
|
||||
|
||||
width = 4 * strlen(str);
|
||||
while (*str)
|
||||
{
|
||||
pdata = (uint8_t *)&ascii0816[(*str) * 16];
|
||||
for (i = 0; i < 16; i++)
|
||||
{
|
||||
data = *pdata++;
|
||||
pixel = ptr + i * width;
|
||||
for (j = 0; j < 4; j++)
|
||||
{
|
||||
switch (data >> 6)
|
||||
{
|
||||
case 0:
|
||||
*pixel = ((uint32_t)bg_color << 16) | bg_color;
|
||||
break;
|
||||
case 1:
|
||||
*pixel = ((uint32_t)bg_color << 16) | font_color;
|
||||
break;
|
||||
case 2:
|
||||
*pixel = ((uint32_t)font_color << 16) | bg_color;
|
||||
break;
|
||||
case 3:
|
||||
*pixel = ((uint32_t)font_color << 16) | font_color;
|
||||
break;
|
||||
default:
|
||||
*pixel = 0;
|
||||
break;
|
||||
}
|
||||
data <<= 2;
|
||||
pixel++;
|
||||
}
|
||||
}
|
||||
str++;
|
||||
ptr += 4;
|
||||
}
|
||||
}
|
||||
|
||||
void lcd_clear(uint16_t color)
|
||||
static void drv_lcd_clear(lcd_8080_device_t lcd, uint16_t color)
|
||||
{
|
||||
uint32_t data = ((uint32_t)color << 16) | (uint32_t)color;
|
||||
|
||||
lcd_set_area(0, 0, lcd_ctl.width, lcd_ctl.height);
|
||||
tft_fill_data(&data, LCD_X_MAX * LCD_Y_MAX / 2);
|
||||
drv_lcd_set_area(lcd, 0, 0, lcd->lcd_info.width - 1, lcd->lcd_info.height - 1);
|
||||
gpiohs_set_pin(lcd->dc_pin, GPIO_PV_HIGH);
|
||||
spi_init(lcd->spi_channel, SPI_WORK_MODE_0, SPI_FF_OCTAL, 32, 0);
|
||||
spi_init_non_standard(lcd->spi_channel, 0 /*instrction length*/, 32 /*address length*/, 0 /*wait cycles*/,
|
||||
SPI_AITM_AS_FRAME_FORMAT /*spi address trans mode*/);
|
||||
spi_fill_data_dma(lcd->dma_channel, lcd->spi_channel, lcd->cs, (const uint32_t *)&data, lcd->lcd_info.width * lcd->lcd_info.height / 2);
|
||||
}
|
||||
|
||||
void lcd_draw_rectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t width, uint16_t color)
|
||||
static void rt_bitblt(rt_uint16_t * dest, int dest_segment, int dest_common, int dest_x, int dest_y, int width, int height,
|
||||
rt_uint16_t *src, int src_segment, int src_common, int src_x, int src_y)
|
||||
{
|
||||
uint32_t data_buf[640] = {0};
|
||||
uint32_t *p = data_buf;
|
||||
uint32_t data = color;
|
||||
uint32_t index = 0;
|
||||
int sx0, sx1, sy0, sy1;
|
||||
int dx0, dx1, dy0, dy1;
|
||||
rt_uint16_t *buff_src;
|
||||
rt_uint16_t *buff_dest;
|
||||
int x, y;
|
||||
|
||||
data = (data << 16) | data;
|
||||
for (index = 0; index < 160 * width; index++)
|
||||
*p++ = data;
|
||||
if (width <= 0) {
|
||||
return;
|
||||
}
|
||||
if (height <= 0) {
|
||||
return;
|
||||
}
|
||||
|
||||
lcd_set_area(x1, y1, x2, y1 + width - 1);
|
||||
tft_write_word(data_buf, ((x2 - x1 + 1) * width + 1) / 2, 0);
|
||||
lcd_set_area(x1, y2 - width + 1, x2, y2);
|
||||
tft_write_word(data_buf, ((x2 - x1 + 1) * width + 1) / 2, 0);
|
||||
lcd_set_area(x1, y1, x1 + width - 1, y2);
|
||||
tft_write_word(data_buf, ((y2 - y1 + 1) * width + 1) / 2, 0);
|
||||
lcd_set_area(x2 - width + 1, y1, x2, y2);
|
||||
tft_write_word(data_buf, ((y2 - y1 + 1) * width + 1) / 2, 0);
|
||||
sx0 = src_x;
|
||||
sy0 = src_y;
|
||||
sx1 = sx0 + width - 1;
|
||||
sy1 = sy0 + height - 1;
|
||||
dx0 = dest_x;
|
||||
dy0 = dest_y;
|
||||
dx1 = dx0 + width - 1;
|
||||
dy1 = dy0 + height - 1;
|
||||
|
||||
if (sx0 < 0) {
|
||||
dx0 -= sx0;
|
||||
sx0 = 0;
|
||||
}
|
||||
if (sy0 < 0) {
|
||||
dy0 -= sy0;
|
||||
sy0 = 0;
|
||||
}
|
||||
if (sx1 >= src_segment) {
|
||||
dx1 -= (sx1 - src_segment + 1);
|
||||
sx1 = src_segment - 1;
|
||||
}
|
||||
if (sy1 >= src_common) {
|
||||
dy1 -= (sy1 - src_common + 1);
|
||||
sy1 = src_common - 1;
|
||||
}
|
||||
|
||||
if (dx0 < 0) {
|
||||
sx0 -= dx0;
|
||||
dx0 = 0;
|
||||
}
|
||||
if (dy0 < 0) {
|
||||
sy0 -= dy0;
|
||||
dy0 = 0;
|
||||
}
|
||||
if (dx1 >= dest_segment) {
|
||||
sx1 -= (dx1 - dest_segment + 1);
|
||||
dx1 = dest_segment - 1;
|
||||
}
|
||||
if (dy1 >= dest_common) {
|
||||
sy1 -= (dy1 - dest_common + 1);
|
||||
dy1 = dest_common - 1;
|
||||
}
|
||||
|
||||
if (sx1 < 0 || sx0 >= src_segment) {
|
||||
return;
|
||||
}
|
||||
if (sy1 < 0 || sy0 >= src_common) {
|
||||
return;
|
||||
}
|
||||
if (dx1 < 0 || dx0 >= dest_segment) {
|
||||
return;
|
||||
}
|
||||
if (dy1 < 0 || dy0 >= dest_common) {
|
||||
return;
|
||||
}
|
||||
|
||||
if ((rt_ubase_t)dest < (rt_ubase_t)src) {
|
||||
buff_src = src + (sy0 * src_segment) + sx0;
|
||||
buff_dest = dest + (dy0 * dest_segment) + dx0;
|
||||
for (y = sy0; y <= sy1; y++) {
|
||||
src = buff_src;
|
||||
dest = buff_dest;
|
||||
for (x = sx0; x <= sx1; x++) {
|
||||
*dest++ = *src++;
|
||||
}
|
||||
buff_src += src_segment;
|
||||
buff_dest += dest_segment;
|
||||
}
|
||||
} else {
|
||||
buff_src = src + (sy1 * src_segment) + sx1;
|
||||
buff_dest = dest + (dy1 * dest_segment) + dx1;
|
||||
for (y = sy1; y >= sy0; y--) {
|
||||
src = buff_src;
|
||||
dest = buff_dest;
|
||||
for (x = sx1; x >= sx0; x--) {
|
||||
*dest-- = *src--;
|
||||
}
|
||||
buff_src -= src_segment;
|
||||
buff_dest -= dest_segment;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr)
|
||||
static void drv_lcd_rect_update(lcd_8080_device_t lcd, uint16_t x1, uint16_t y1, uint16_t width, uint16_t height)
|
||||
{
|
||||
lcd_set_area(x1, y1, x1 + width - 1, y1 + height - 1);
|
||||
tft_write_word(ptr, width * height / 2, lcd_ctl.mode ? 2 : 0);
|
||||
static rt_uint16_t * rect_buffer = RT_NULL;
|
||||
if(!rect_buffer)
|
||||
{
|
||||
rect_buffer = rt_malloc_align(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8), 64);
|
||||
if(!rect_buffer)
|
||||
{
|
||||
return;
|
||||
}
|
||||
}
|
||||
if(x1 == 0 && y1 == 0 && width == lcd->lcd_info.width && height == lcd->lcd_info.height)
|
||||
{
|
||||
drv_lcd_set_area(lcd, x1, y1, x1 + width - 1, y1 + height - 1);
|
||||
drv_lcd_data_half_word(lcd, (rt_uint32_t *)lcd->lcd_info.framebuffer, width * height);
|
||||
}
|
||||
else
|
||||
{
|
||||
rt_bitblt(rect_buffer, width, height, 0, 0, width, height,(rt_uint16_t *)lcd->lcd_info.framebuffer, lcd->lcd_info.width, lcd->lcd_info.height, x1, y1);
|
||||
drv_lcd_set_area(lcd, x1, y1, x1 + width - 1, y1 + height - 1);
|
||||
drv_lcd_data_half_word(lcd, (rt_uint16_t *)rect_buffer, width * height);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void lcd_test0()
|
||||
static rt_err_t drv_lcd_init(rt_device_t dev)
|
||||
{
|
||||
char test[]={"xuos-intelligence framwork"};
|
||||
lcd_draw_string(0,0,test,BLUE);
|
||||
rt_err_t ret = RT_EOK;
|
||||
lcd_8080_device_t lcd = (lcd_8080_device_t)dev;
|
||||
rt_uint8_t data = 0;
|
||||
|
||||
if(!lcd)
|
||||
{
|
||||
return RT_ERROR;
|
||||
}
|
||||
drv_lcd_hw_init(lcd);
|
||||
/* reset LCD */
|
||||
drv_lcd_cmd(lcd, SOFTWARE_RESET);
|
||||
rt_thread_mdelay(100);
|
||||
|
||||
/* Enter normal status */
|
||||
drv_lcd_cmd(lcd, SLEEP_OFF);
|
||||
rt_thread_mdelay(100);
|
||||
|
||||
/* pixel format rgb565 */
|
||||
drv_lcd_cmd(lcd, PIXEL_FORMAT_SET);
|
||||
data = 0x55;
|
||||
drv_lcd_data_byte(lcd, &data, 1);
|
||||
|
||||
/* set direction */
|
||||
drv_lcd_set_direction(lcd, LCD_SCAN_DIR);
|
||||
|
||||
lcd->lcd_info.framebuffer = rt_malloc_align(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8), 64);
|
||||
RT_ASSERT(lcd->lcd_info.framebuffer);
|
||||
|
||||
uint16_t *framebuffer = (uint16_t *)(lcd->lcd_info.framebuffer);
|
||||
for(uint32_t i=0; i<(lcd->lcd_info.height * lcd->lcd_info.width * (lcd->lcd_info.bits_per_pixel / 8))/2; i++) {
|
||||
framebuffer[i] = BLACK;
|
||||
}
|
||||
/*display on*/
|
||||
drv_lcd_cmd(lcd, DISPALY_ON);
|
||||
|
||||
/* set to black */
|
||||
drv_lcd_clear(lcd, BLACK);
|
||||
return ret;
|
||||
}
|
||||
MSH_CMD_EXPORT(lcd_test0,lcd show string);
|
||||
|
||||
void lcd_test1()
|
||||
static rt_err_t drv_lcd_open(rt_device_t dev, rt_uint16_t oflag)
|
||||
{
|
||||
lcd_clear(YELLOW);
|
||||
|
||||
/* Not need */
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
MSH_CMD_EXPORT(lcd_test1,lcd show string);
|
||||
|
||||
static rt_err_t drv_lcd_close(rt_device_t dev)
|
||||
{
|
||||
|
||||
/* Not need */
|
||||
|
||||
return RT_EOK;
|
||||
}
|
||||
|
||||
static rt_size_t drv_lcd_read(rt_device_t dev, rt_off_t pos, void *buffer, rt_size_t size)
|
||||
{
|
||||
|
||||
/* Not need */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rt_size_t drv_lcd_write(rt_device_t dev, rt_off_t pos, const void *buffer, rt_size_t size)
|
||||
{
|
||||
|
||||
/* Not need */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static rt_err_t drv_lcd_control(rt_device_t dev, int cmd, void *args)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
lcd_8080_device_t lcd = (lcd_8080_device_t)dev;
|
||||
rt_base_t level;
|
||||
struct rt_device_rect_info* rect_info = (struct rt_device_rect_info*)args;
|
||||
|
||||
RT_ASSERT(dev != RT_NULL);
|
||||
|
||||
switch (cmd)
|
||||
{
|
||||
case RTGRAPHIC_CTRL_RECT_UPDATE:
|
||||
if(!rect_info)
|
||||
{
|
||||
LOG_E("RTGRAPHIC_CTRL_RECT_UPDATE error args");
|
||||
return -RT_ERROR;
|
||||
}
|
||||
drv_lcd_rect_update(lcd, rect_info->x, rect_info->y, rect_info->width, rect_info->height);
|
||||
break;
|
||||
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
case RTGRAPHIC_CTRL_POWERON:
|
||||
#if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
|
||||
#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
|
||||
#else
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
|
||||
#endif
|
||||
break;
|
||||
|
||||
case RTGRAPHIC_CTRL_POWEROFF:
|
||||
#if defined(BSP_LCD_BACKLIGHT_ACTIVE_LOW)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
|
||||
#elif defined(BSP_LCD_BACKLIGHT_ACTIVE_HIGH)
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_LOW);
|
||||
#else
|
||||
gpiohs_set_pin(lcd->backlight_pin, GPIO_PV_HIGH);
|
||||
#endif
|
||||
break;
|
||||
#endif /* BSP_LCD_BACKLIGHT_PIN >= 0 */
|
||||
|
||||
case RTGRAPHIC_CTRL_GET_INFO:
|
||||
*(struct rt_device_graphic_info *)args = lcd->lcd_info;
|
||||
break;
|
||||
|
||||
case RTGRAPHIC_CTRL_SET_MODE:
|
||||
ret = -RT_ENOSYS;
|
||||
break;
|
||||
case RTGRAPHIC_CTRL_GET_EXT:
|
||||
ret = -RT_ENOSYS;
|
||||
break;
|
||||
default:
|
||||
LOG_E("drv_lcd_control cmd: %d", cmd);
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
const static struct rt_device_ops drv_lcd_ops =
|
||||
{
|
||||
drv_lcd_init,
|
||||
drv_lcd_open,
|
||||
drv_lcd_close,
|
||||
drv_lcd_read,
|
||||
drv_lcd_write,
|
||||
drv_lcd_control
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
int rt_hw_lcd_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
lcd_8080_device_t lcd_dev = &_lcddev;
|
||||
|
||||
lcd_dev->cs = SPI_CHIP_SELECT_0;
|
||||
lcd_dev->dc_pin = LCD_DC_PIN;
|
||||
#if BSP_LCD_RST_PIN >= 0
|
||||
lcd_dev->rst_pin = LCD_RST_PIN;
|
||||
#endif
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
lcd_dev->backlight_pin = LCD_BACKLIGHT_PIN;
|
||||
#endif
|
||||
dmalock_sync_take(&lcd_dev->dma_channel, RT_WAITING_FOREVER);
|
||||
lcd_dev->spi_channel = SPI_DEVICE_0;
|
||||
lcd_dev->lcd_info.bits_per_pixel = 16;
|
||||
lcd_dev->lcd_info.pixel_format = RTGRAPHIC_PIXEL_FORMAT_RGB565;
|
||||
|
||||
lcd_dev->parent.type = RT_Device_Class_Graphic;
|
||||
lcd_dev->parent.rx_indicate = RT_NULL;
|
||||
lcd_dev->parent.tx_complete = RT_NULL;
|
||||
|
||||
#ifdef RT_USING_DEVICE_OPS
|
||||
lcd_dev->parent.ops = &drv_lcd_ops;
|
||||
#else
|
||||
lcd_dev->parent.init = drv_lcd_init;
|
||||
lcd_dev->parent.open = drv_lcd_open;
|
||||
lcd_dev->parent.close = drv_lcd_close;
|
||||
lcd_dev->parent.read = drv_lcd_read;
|
||||
lcd_dev->parent.write = drv_lcd_write;
|
||||
lcd_dev->parent.control = drv_lcd_control;
|
||||
#endif
|
||||
|
||||
lcd_dev->parent.user_data = RT_NULL;
|
||||
|
||||
ret = rt_device_register(&lcd_dev->parent, "lcd", RT_DEVICE_FLAG_RDWR);
|
||||
|
||||
return ret;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_lcd_init);
|
||||
|
||||
void lcd_set_direction(lcd_dir_t dir)
|
||||
{
|
||||
drv_lcd_set_direction(&_lcddev, dir);
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,480 +1,43 @@
|
|||
/* Copyright 2018 Canaan Inc.
|
||||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License");
|
||||
* you may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-07 ZYH first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_LCD_H__
|
||||
#define DRV_LCD_H__
|
||||
#include <rtdevice.h>
|
||||
#include <board.h>
|
||||
#include <gpiohs.h>
|
||||
#include <spi.h>
|
||||
#include <drv_io_config.h>
|
||||
#include <rthw.h>
|
||||
#include "dmalock.h"
|
||||
|
||||
#ifndef _DRV_LCD_H__
|
||||
#define _DRV_LCD_H__
|
||||
|
||||
#include <stdint.h>
|
||||
/* clang-format off */
|
||||
#define NO_OPERATION 0x00
|
||||
#define SOFTWARE_RESET 0x01
|
||||
#define READ_ID 0x04
|
||||
#define READ_STATUS 0x09
|
||||
#define READ_POWER_MODE 0x0A
|
||||
#define READ_MADCTL 0x0B
|
||||
#define READ_PIXEL_FORMAT 0x0C
|
||||
#define READ_IMAGE_FORMAT 0x0D
|
||||
#define READ_SIGNAL_MODE 0x0E
|
||||
#define READ_SELT_DIAG_RESULT 0x0F
|
||||
#define SLEEP_ON 0x10
|
||||
#define SLEEP_OFF 0x11
|
||||
#define PARTIAL_DISPALY_ON 0x12
|
||||
#define NORMAL_DISPALY_ON 0x13
|
||||
#define INVERSION_DISPALY_OFF 0x20
|
||||
#define INVERSION_DISPALY_ON 0x21
|
||||
#define GAMMA_SET 0x26
|
||||
#define DISPALY_OFF 0x28
|
||||
#define DISPALY_ON 0x29
|
||||
#define HORIZONTAL_ADDRESS_SET 0x2A
|
||||
#define VERTICAL_ADDRESS_SET 0x2B
|
||||
#define MEMORY_WRITE 0x2C
|
||||
#define COLOR_SET 0x2D
|
||||
#define MEMORY_READ 0x2E
|
||||
#define PARTIAL_AREA 0x30
|
||||
#define VERTICAL_SCROL_DEFINE 0x33
|
||||
#define TEAR_EFFECT_LINE_OFF 0x34
|
||||
#define TEAR_EFFECT_LINE_ON 0x35
|
||||
#define MEMORY_ACCESS_CTL 0x36
|
||||
#define VERTICAL_SCROL_S_ADD 0x37
|
||||
#define IDLE_MODE_OFF 0x38
|
||||
#define IDLE_MODE_ON 0x39
|
||||
#define PIXEL_FORMAT_SET 0x3A
|
||||
#define WRITE_MEMORY_CONTINUE 0x3C
|
||||
#define READ_MEMORY_CONTINUE 0x3E
|
||||
#define SET_TEAR_SCANLINE 0x44
|
||||
#define GET_SCANLINE 0x45
|
||||
#define WRITE_BRIGHTNESS 0x51
|
||||
#define READ_BRIGHTNESS 0x52
|
||||
#define WRITE_CTRL_DISPALY 0x53
|
||||
#define READ_CTRL_DISPALY 0x54
|
||||
#define WRITE_BRIGHTNESS_CTL 0x55
|
||||
#define READ_BRIGHTNESS_CTL 0x56
|
||||
#define WRITE_MIN_BRIGHTNESS 0x5E
|
||||
#define READ_MIN_BRIGHTNESS 0x5F
|
||||
#define READ_ID1 0xDA
|
||||
#define READ_ID2 0xDB
|
||||
#define READ_ID3 0xDC
|
||||
#define RGB_IF_SIGNAL_CTL 0xB0
|
||||
#define NORMAL_FRAME_CTL 0xB1
|
||||
#define IDLE_FRAME_CTL 0xB2
|
||||
#define PARTIAL_FRAME_CTL 0xB3
|
||||
#define INVERSION_CTL 0xB4
|
||||
#define BLANK_PORCH_CTL 0xB5
|
||||
#define DISPALY_FUNCTION_CTL 0xB6
|
||||
#define ENTRY_MODE_SET 0xB7
|
||||
#define BACKLIGHT_CTL1 0xB8
|
||||
#define BACKLIGHT_CTL2 0xB9
|
||||
#define BACKLIGHT_CTL3 0xBA
|
||||
#define BACKLIGHT_CTL4 0xBB
|
||||
#define BACKLIGHT_CTL5 0xBC
|
||||
#define BACKLIGHT_CTL7 0xBE
|
||||
#define BACKLIGHT_CTL8 0xBF
|
||||
#define POWER_CTL1 0xC0
|
||||
#define POWER_CTL2 0xC1
|
||||
#define VCOM_CTL1 0xC5
|
||||
#define VCOM_CTL2 0xC7
|
||||
#define NV_MEMORY_WRITE 0xD0
|
||||
#define NV_MEMORY_PROTECT_KEY 0xD1
|
||||
#define NV_MEMORY_STATUS_READ 0xD2
|
||||
#define READ_ID4 0xD3
|
||||
#define POSITIVE_GAMMA_CORRECT 0xE0
|
||||
#define NEGATIVE_GAMMA_CORRECT 0xE1
|
||||
#define DIGITAL_GAMMA_CTL1 0xE2
|
||||
#define DIGITAL_GAMMA_CTL2 0xE3
|
||||
#define INTERFACE_CTL 0xF6
|
||||
|
||||
#define DCX_GPIONUM (5)
|
||||
#define RST_GPIONUM (4)
|
||||
#define LCD_SPI_SLAVE_SELECT 3
|
||||
|
||||
#define SPI_CHANNEL 0
|
||||
#define SPI_SLAVE_SELECT 3
|
||||
|
||||
/* clang-format off */
|
||||
#define LCD_X_MAX (240)
|
||||
#define LCD_Y_MAX (320)
|
||||
|
||||
#define BLACK 0x0000
|
||||
#define NAVY 0x000F
|
||||
#define DARKGREEN 0x03E0
|
||||
#define DARKCYAN 0x03EF
|
||||
#define MAROON 0x7800
|
||||
#define PURPLE 0x780F
|
||||
#define OLIVE 0x7BE0
|
||||
#define LIGHTGREY 0xC618
|
||||
#define DARKGREY 0x7BEF
|
||||
#define BLUE 0x001F
|
||||
#define GREEN 0x07E0
|
||||
#define CYAN 0x07FF
|
||||
#define RED 0xF800
|
||||
#define MAGENTA 0xF81F
|
||||
#define YELLOW 0xFFE0
|
||||
#define WHITE 0xFFFF
|
||||
#define ORANGE 0xFD20
|
||||
#define GREENYELLOW 0xAFE5
|
||||
#define PINK 0xF81F
|
||||
#define USER_COLOR 0xAA55
|
||||
/* clang-format on */
|
||||
|
||||
uint8_t const ascii0816[] =
|
||||
{
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x81, 0xA5, 0x81, 0x81, 0xBD,
|
||||
0x99, 0x81, 0x81, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0xFF,
|
||||
0xDB, 0xFF, 0xFF, 0xC3, 0xE7, 0xFF, 0xFF, 0x7E, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x6C, 0xFE, 0xFE, 0xFE, 0xFE, 0x7C, 0x38, 0x10,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x7C, 0xFE,
|
||||
0x7C, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18,
|
||||
0x3C, 0x3C, 0xE7, 0xE7, 0xE7, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x18, 0x3C, 0x7E, 0xFF, 0xFF, 0x7E, 0x18, 0x18, 0x3C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3C,
|
||||
0x3C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
0xFF, 0xFF, 0xE7, 0xC3, 0xC3, 0xE7, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66, 0x42, 0x42, 0x66, 0x3C, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xC3, 0x99, 0xBD,
|
||||
0xBD, 0x99, 0xC3, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x1E, 0x0E,
|
||||
0x1A, 0x32, 0x78, 0xCC, 0xCC, 0xCC, 0xCC, 0x78, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x3C, 0x66, 0x66, 0x66, 0x66, 0x3C, 0x18, 0x7E, 0x18, 0x18,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x33, 0x3F, 0x30, 0x30, 0x30,
|
||||
0x30, 0x70, 0xF0, 0xE0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0x63,
|
||||
0x7F, 0x63, 0x63, 0x63, 0x63, 0x67, 0xE7, 0xE6, 0xC0, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x18, 0x18, 0xDB, 0x3C, 0xE7, 0x3C, 0xDB, 0x18, 0x18,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xC0, 0xE0, 0xF0, 0xF8, 0xFE, 0xF8,
|
||||
0xF0, 0xE0, 0xC0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x0E,
|
||||
0x1E, 0x3E, 0xFE, 0x3E, 0x1E, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x18, 0x3C, 0x7E, 0x18, 0x18, 0x18, 0x7E, 0x3C, 0x18, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66,
|
||||
0x66, 0x00, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7F, 0xDB,
|
||||
0xDB, 0xDB, 0x7B, 0x1B, 0x1B, 0x1B, 0x1B, 0x1B, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x7C, 0xC6, 0x60, 0x38, 0x6C, 0xC6, 0xC6, 0x6C, 0x38, 0x0C, 0xC6,
|
||||
0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xFE, 0xFE, 0xFE, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3C,
|
||||
0x7E, 0x18, 0x18, 0x18, 0x7E, 0x3C, 0x18, 0x7E, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x18, 0x3C, 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x7E, 0x3C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x18, 0x0C, 0xFE, 0x0C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x60, 0xFE, 0x60, 0x30, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0xC0,
|
||||
0xC0, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x28, 0x6C, 0xFE, 0x6C, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x38, 0x7C, 0x7C, 0xFE, 0xFE, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xFE, 0x7C, 0x7C,
|
||||
0x38, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x18, 0x3C, 0x3C, 0x3C, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66, 0x24, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6C,
|
||||
0x6C, 0xFE, 0x6C, 0x6C, 0x6C, 0xFE, 0x6C, 0x6C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x18, 0x18, 0x7C, 0xC6, 0xC2, 0xC0, 0x7C, 0x06, 0x06, 0x86, 0xC6, 0x7C,
|
||||
0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC2, 0xC6, 0x0C, 0x18,
|
||||
0x30, 0x60, 0xC6, 0x86, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C,
|
||||
0x6C, 0x38, 0x76, 0xDC, 0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x30, 0x30, 0x30, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x18, 0x30, 0x30, 0x30, 0x30,
|
||||
0x30, 0x30, 0x18, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x18,
|
||||
0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x3C, 0xFF, 0x3C, 0x66, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7E,
|
||||
0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x30, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x02, 0x06, 0x0C, 0x18, 0x30, 0x60, 0xC0, 0x80, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x38, 0x6C, 0xC6, 0xC6, 0xD6, 0xD6, 0xC6, 0xC6, 0x6C, 0x38,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x38, 0x78, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6,
|
||||
0x06, 0x0C, 0x18, 0x30, 0x60, 0xC0, 0xC6, 0xFE, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x7C, 0xC6, 0x06, 0x06, 0x3C, 0x06, 0x06, 0x06, 0xC6, 0x7C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x1C, 0x3C, 0x6C, 0xCC, 0xFE,
|
||||
0x0C, 0x0C, 0x0C, 0x1E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xC0,
|
||||
0xC0, 0xC0, 0xFC, 0x06, 0x06, 0x06, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x38, 0x60, 0xC0, 0xC0, 0xFC, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xC6, 0x06, 0x06, 0x0C, 0x18,
|
||||
0x30, 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6,
|
||||
0xC6, 0xC6, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0x7E, 0x06, 0x06, 0x06, 0x0C, 0x78,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
|
||||
0x00, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x18, 0x18, 0x00, 0x00, 0x00, 0x18, 0x18, 0x30, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0C, 0x06,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x00, 0x00,
|
||||
0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60,
|
||||
0x30, 0x18, 0x0C, 0x06, 0x0C, 0x18, 0x30, 0x60, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x7C, 0xC6, 0xC6, 0x0C, 0x18, 0x18, 0x18, 0x00, 0x18, 0x18,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6, 0xC6, 0xDE, 0xDE,
|
||||
0xDE, 0xDC, 0xC0, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38,
|
||||
0x6C, 0xC6, 0xC6, 0xFE, 0xC6, 0xC6, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0xFC, 0x66, 0x66, 0x66, 0x7C, 0x66, 0x66, 0x66, 0x66, 0xFC,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66, 0xC2, 0xC0, 0xC0, 0xC0,
|
||||
0xC0, 0xC2, 0x66, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x6C,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x6C, 0xF8, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0xFE, 0x66, 0x62, 0x68, 0x78, 0x68, 0x60, 0x62, 0x66, 0xFE,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0x66, 0x62, 0x68, 0x78, 0x68,
|
||||
0x60, 0x60, 0x60, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66,
|
||||
0xC2, 0xC0, 0xC0, 0xDE, 0xC6, 0xC6, 0x66, 0x3A, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0xC6, 0xC6, 0xC6, 0xC6, 0xFE, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x0C,
|
||||
0x0C, 0x0C, 0x0C, 0x0C, 0xCC, 0xCC, 0xCC, 0x78, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0xE6, 0x66, 0x66, 0x6C, 0x78, 0x78, 0x6C, 0x66, 0x66, 0xE6,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x60, 0x60, 0x60, 0x60, 0x60,
|
||||
0x60, 0x62, 0x66, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0xEE,
|
||||
0xFE, 0xFE, 0xD6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0xC6, 0xE6, 0xF6, 0xFE, 0xDE, 0xCE, 0xC6, 0xC6, 0xC6, 0xC6,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6,
|
||||
0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFC, 0x66,
|
||||
0x66, 0x66, 0x7C, 0x60, 0x60, 0x60, 0x60, 0xF0, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xD6, 0xDE, 0x7C,
|
||||
0x0C, 0x0E, 0x00, 0x00, 0x00, 0x00, 0xFC, 0x66, 0x66, 0x66, 0x7C, 0x6C,
|
||||
0x66, 0x66, 0x66, 0xE6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6,
|
||||
0xC6, 0x60, 0x38, 0x0C, 0x06, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x7E, 0x7E, 0x5A, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6,
|
||||
0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0xC6,
|
||||
0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x6C, 0x38, 0x10, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0xC6, 0xC6, 0xC6, 0xC6, 0xD6, 0xD6, 0xD6, 0xFE, 0xEE, 0x6C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0xC6, 0x6C, 0x7C, 0x38, 0x38,
|
||||
0x7C, 0x6C, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66,
|
||||
0x66, 0x66, 0x3C, 0x18, 0x18, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0xFE, 0xC6, 0x86, 0x0C, 0x18, 0x30, 0x60, 0xC2, 0xC6, 0xFE,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x30, 0x30, 0x30, 0x30, 0x30,
|
||||
0x30, 0x30, 0x30, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
|
||||
0xC0, 0xE0, 0x70, 0x38, 0x1C, 0x0E, 0x06, 0x02, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x3C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x0C, 0x3C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x6C, 0xC6, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00,
|
||||
0x30, 0x30, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, 0x0C, 0x7C,
|
||||
0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x60,
|
||||
0x60, 0x78, 0x6C, 0x66, 0x66, 0x66, 0x66, 0x7C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6, 0xC0, 0xC0, 0xC0, 0xC6, 0x7C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x0C, 0x0C, 0x3C, 0x6C, 0xCC,
|
||||
0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x7C, 0xC6, 0xFE, 0xC0, 0xC0, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x38, 0x6C, 0x64, 0x60, 0xF0, 0x60, 0x60, 0x60, 0x60, 0xF0,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xCC, 0xCC,
|
||||
0xCC, 0xCC, 0xCC, 0x7C, 0x0C, 0xCC, 0x78, 0x00, 0x00, 0x00, 0xE0, 0x60,
|
||||
0x60, 0x6C, 0x76, 0x66, 0x66, 0x66, 0x66, 0xE6, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x18, 0x18, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x06, 0x00, 0x0E, 0x06, 0x06,
|
||||
0x06, 0x06, 0x06, 0x06, 0x66, 0x66, 0x3C, 0x00, 0x00, 0x00, 0xE0, 0x60,
|
||||
0x60, 0x66, 0x6C, 0x78, 0x78, 0x6C, 0x66, 0xE6, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xEC, 0xFE, 0xD6,
|
||||
0xD6, 0xD6, 0xD6, 0xC6, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0xDC, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xDC, 0x66, 0x66,
|
||||
0x66, 0x66, 0x66, 0x7C, 0x60, 0x60, 0xF0, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x76, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0x7C, 0x0C, 0x0C, 0x1E, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0xDC, 0x76, 0x66, 0x60, 0x60, 0x60, 0xF0,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C, 0xC6, 0x60,
|
||||
0x38, 0x0C, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x30,
|
||||
0x30, 0xFC, 0x30, 0x30, 0x30, 0x30, 0x36, 0x1C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0x76,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x66,
|
||||
0x66, 0x66, 0x3C, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0xC6, 0xC6, 0xD6, 0xD6, 0xD6, 0xFE, 0x6C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x6C, 0x38, 0x38, 0x38, 0x6C, 0xC6,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0xC6, 0xC6,
|
||||
0xC6, 0xC6, 0xC6, 0x7E, 0x06, 0x0C, 0xF8, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0xFE, 0xCC, 0x18, 0x30, 0x60, 0xC6, 0xFE, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x0E, 0x18, 0x18, 0x18, 0x70, 0x18, 0x18, 0x18, 0x18, 0x0E,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x00, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x18,
|
||||
0x18, 0x18, 0x0E, 0x18, 0x18, 0x18, 0x18, 0x70, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x76, 0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x6C, 0xC6,
|
||||
0xC6, 0xC6, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x66,
|
||||
0xC2, 0xC0, 0xC0, 0xC0, 0xC2, 0x66, 0x3C, 0x0C, 0x06, 0x7C, 0x00, 0x00,
|
||||
0x00, 0x00, 0xCC, 0x00, 0x00, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0x76,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x18, 0x30, 0x00, 0x7C, 0xC6, 0xFE,
|
||||
0xC0, 0xC0, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x6C,
|
||||
0x00, 0x78, 0x0C, 0x7C, 0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0xCC, 0x00, 0x00, 0x78, 0x0C, 0x7C, 0xCC, 0xCC, 0xCC, 0x76,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x30, 0x18, 0x00, 0x78, 0x0C, 0x7C,
|
||||
0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C, 0x38,
|
||||
0x00, 0x78, 0x0C, 0x7C, 0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x3C, 0x66, 0x60, 0x60, 0x66, 0x3C, 0x0C, 0x06,
|
||||
0x3C, 0x00, 0x00, 0x00, 0x00, 0x10, 0x38, 0x6C, 0x00, 0x7C, 0xC6, 0xFE,
|
||||
0xC0, 0xC0, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00,
|
||||
0x00, 0x7C, 0xC6, 0xFE, 0xC0, 0xC0, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x60, 0x30, 0x18, 0x00, 0x7C, 0xC6, 0xFE, 0xC0, 0xC0, 0xC6, 0x7C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x00, 0x00, 0x38, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x3C, 0x66,
|
||||
0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x60, 0x30, 0x18, 0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x10, 0x38, 0x6C, 0xC6, 0xC6,
|
||||
0xFE, 0xC6, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C, 0x38, 0x00,
|
||||
0x38, 0x6C, 0xC6, 0xC6, 0xFE, 0xC6, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00,
|
||||
0x18, 0x30, 0x60, 0x00, 0xFE, 0x66, 0x60, 0x7C, 0x60, 0x60, 0x66, 0xFE,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xCC, 0x76, 0x36,
|
||||
0x7E, 0xD8, 0xD8, 0x6E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3E, 0x6C,
|
||||
0xCC, 0xCC, 0xFE, 0xCC, 0xCC, 0xCC, 0xCC, 0xCE, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x10, 0x38, 0x6C, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0x00, 0x7C, 0xC6, 0xC6,
|
||||
0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x30, 0x18,
|
||||
0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x30, 0x78, 0xCC, 0x00, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0x76,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x60, 0x30, 0x18, 0x00, 0xCC, 0xCC, 0xCC,
|
||||
0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00,
|
||||
0x00, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x7E, 0x06, 0x0C, 0x78, 0x00,
|
||||
0x00, 0xC6, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0xC6, 0x00, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6,
|
||||
0xC6, 0xC6, 0xC6, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x3C,
|
||||
0x66, 0x60, 0x60, 0x60, 0x66, 0x3C, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x38, 0x6C, 0x64, 0x60, 0xF0, 0x60, 0x60, 0x60, 0x60, 0xE6, 0xFC,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x66, 0x66, 0x3C, 0x18, 0x7E, 0x18,
|
||||
0x7E, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0xCC, 0xCC,
|
||||
0xF8, 0xC4, 0xCC, 0xDE, 0xCC, 0xCC, 0xCC, 0xC6, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x0E, 0x1B, 0x18, 0x18, 0x18, 0x7E, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0xD8, 0x70, 0x00, 0x00, 0x00, 0x18, 0x30, 0x60, 0x00, 0x78, 0x0C, 0x7C,
|
||||
0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x18, 0x30,
|
||||
0x00, 0x38, 0x18, 0x18, 0x18, 0x18, 0x18, 0x3C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x18, 0x30, 0x60, 0x00, 0x7C, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x7C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x30, 0x60, 0x00, 0xCC, 0xCC, 0xCC,
|
||||
0xCC, 0xCC, 0xCC, 0x76, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xDC,
|
||||
0x00, 0xDC, 0x66, 0x66, 0x66, 0x66, 0x66, 0x66, 0x00, 0x00, 0x00, 0x00,
|
||||
0x76, 0xDC, 0x00, 0xC6, 0xE6, 0xF6, 0xFE, 0xDE, 0xCE, 0xC6, 0xC6, 0xC6,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x3C, 0x6C, 0x6C, 0x3E, 0x00, 0x7E, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C, 0x6C,
|
||||
0x38, 0x00, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x30, 0x30, 0x00, 0x30, 0x30, 0x60, 0xC0, 0xC6, 0xC6, 0x7C,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xC0,
|
||||
0xC0, 0xC0, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0xFE, 0x06, 0x06, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0xC0, 0xC0, 0xC2, 0xC6, 0xCC, 0x18, 0x30, 0x60, 0xDC, 0x86, 0x0C,
|
||||
0x18, 0x3E, 0x00, 0x00, 0x00, 0xC0, 0xC0, 0xC2, 0xC6, 0xCC, 0x18, 0x30,
|
||||
0x66, 0xCE, 0x9E, 0x3E, 0x06, 0x06, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18,
|
||||
0x00, 0x18, 0x18, 0x18, 0x3C, 0x3C, 0x3C, 0x18, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x6C, 0xD8, 0x6C, 0x36, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD8, 0x6C, 0x36,
|
||||
0x6C, 0xD8, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x11, 0x44, 0x11, 0x44,
|
||||
0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44, 0x11, 0x44,
|
||||
0x55, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xAA, 0x55, 0xAA,
|
||||
0x55, 0xAA, 0x55, 0xAA, 0xDD, 0x77, 0xDD, 0x77, 0xDD, 0x77, 0xDD, 0x77,
|
||||
0xDD, 0x77, 0xDD, 0x77, 0xDD, 0x77, 0xDD, 0x77, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xF8, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xF8, 0x18, 0xF8,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0x36, 0x36, 0xF6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x18, 0xF8,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0xF6, 0x06, 0xF6, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0x06, 0xF6,
|
||||
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0xF6, 0x06, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xFE, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0xF8, 0x18, 0xF8,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0xF8, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1F, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xFF,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0xFF, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x1F, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0xFF, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0x1F, 0x18, 0x1F, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x37,
|
||||
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0x37, 0x30, 0x3F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xF7, 0x00, 0xFF,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0xFF, 0x00, 0xF7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0x36, 0x36, 0x36, 0x36, 0x37, 0x30, 0x37, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0x36, 0x36, 0x36, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x00, 0xFF,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0xF7, 0x00, 0xF7, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0xFF, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0xFF,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0xFF, 0x00, 0xFF, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x3F,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x1F, 0x18, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x1F, 0x18, 0x1F, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F,
|
||||
0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
|
||||
0x36, 0x36, 0x36, 0xFF, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36, 0x36,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0xFF, 0x18, 0xFF, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0xF8,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x1F, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF,
|
||||
0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xF0, 0xF0, 0xF0, 0xF0,
|
||||
0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0, 0xF0,
|
||||
0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F,
|
||||
0x0F, 0x0F, 0x0F, 0x0F, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x76, 0xDC, 0xD8, 0xD8, 0xD8, 0xDC, 0x76, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x78, 0xCC, 0xCC, 0xCC, 0xD8, 0xCC, 0xC6, 0xC6, 0xC6, 0xCC,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFE, 0xC6, 0xC6, 0xC0, 0xC0, 0xC0,
|
||||
0xC0, 0xC0, 0xC0, 0xC0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0xFE, 0x6C, 0x6C, 0x6C, 0x6C, 0x6C, 0x6C, 0x6C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0xFE, 0xC6, 0x60, 0x30, 0x18, 0x30, 0x60, 0xC6, 0xFE,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0xD8, 0xD8,
|
||||
0xD8, 0xD8, 0xD8, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x66, 0x66, 0x66, 0x66, 0x66, 0x7C, 0x60, 0x60, 0xC0, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x76, 0xDC, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7E, 0x18, 0x3C, 0x66, 0x66,
|
||||
0x66, 0x3C, 0x18, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38,
|
||||
0x6C, 0xC6, 0xC6, 0xFE, 0xC6, 0xC6, 0x6C, 0x38, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x38, 0x6C, 0xC6, 0xC6, 0xC6, 0x6C, 0x6C, 0x6C, 0x6C, 0xEE,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1E, 0x30, 0x18, 0x0C, 0x3E, 0x66,
|
||||
0x66, 0x66, 0x66, 0x3C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x7E, 0xDB, 0xDB, 0xDB, 0x7E, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x03, 0x06, 0x7E, 0xDB, 0xDB, 0xF3, 0x7E, 0x60, 0xC0,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1C, 0x30, 0x60, 0x60, 0x7C, 0x60,
|
||||
0x60, 0x60, 0x30, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7C,
|
||||
0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0xC6, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0xFE, 0x00, 0x00, 0xFE, 0x00, 0x00, 0xFE, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x7E, 0x18,
|
||||
0x18, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30,
|
||||
0x18, 0x0C, 0x06, 0x0C, 0x18, 0x30, 0x00, 0x7E, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x0C, 0x18, 0x30, 0x60, 0x30, 0x18, 0x0C, 0x00, 0x7E,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0E, 0x1B, 0x1B, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
|
||||
0x18, 0x18, 0x18, 0x18, 0xD8, 0xD8, 0xD8, 0x70, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x7E, 0x00, 0x18, 0x18, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, 0xDC, 0x00,
|
||||
0x76, 0xDC, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x38, 0x6C, 0x6C,
|
||||
0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0F, 0x0C, 0x0C,
|
||||
0x0C, 0x0C, 0x0C, 0xEC, 0x6C, 0x6C, 0x3C, 0x1C, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0xD8, 0x6C, 0x6C, 0x6C, 0x6C, 0x6C, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0xD8, 0x30, 0x60, 0xC8, 0xF8, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x7C, 0x7C, 0x7C, 0x7C, 0x7C, 0x7C, 0x7C, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
//POINT_COLOR
|
||||
#define WHITE 0xFFFF
|
||||
#define BLACK 0x0000
|
||||
#define BLUE 0x001F
|
||||
#define BRED 0XF81F
|
||||
#define GRED 0XFFE0
|
||||
#define GBLUE 0X07FF
|
||||
#define RED 0xF800
|
||||
#define MAGENTA 0xF81F
|
||||
#define GREEN 0x07E0
|
||||
#define CYAN 0x7FFF
|
||||
#define YELLOW 0xFFE0
|
||||
#define BROWN 0XBC40
|
||||
#define BRRED 0XFC07
|
||||
#define GRAY 0X8430
|
||||
#define GRAY175 0XAD75
|
||||
#define GRAY151 0X94B2
|
||||
#define GRAY187 0XBDD7
|
||||
#define GRAY240 0XF79E
|
||||
|
||||
typedef enum _lcd_dir
|
||||
{
|
||||
|
|
@ -490,31 +53,38 @@ typedef enum _lcd_dir
|
|||
DIR_MASK = 0xE0,
|
||||
} lcd_dir_t;
|
||||
|
||||
typedef struct _lcd_ctl
|
||||
typedef struct lcd_8080_device
|
||||
{
|
||||
uint8_t mode;
|
||||
uint8_t dir;
|
||||
uint16_t width;
|
||||
uint16_t height;
|
||||
} lcd_ctl_t;
|
||||
struct rt_device parent;
|
||||
struct rt_device_graphic_info lcd_info;
|
||||
int spi_channel;
|
||||
int cs;
|
||||
int dc_pin;
|
||||
#if BSP_LCD_RST_PIN >= 0
|
||||
int rst_pin;
|
||||
#endif
|
||||
#if BSP_LCD_BACKLIGHT_PIN >= 0
|
||||
int backlight_pin;
|
||||
#endif
|
||||
int dma_channel;
|
||||
} * lcd_8080_device_t;
|
||||
|
||||
void tft_hard_init(void);
|
||||
void tft_write_command(uint8_t cmd);
|
||||
void tft_write_byte(uint8_t *data_buf, uint32_t length);
|
||||
void tft_write_half(uint16_t *data_buf, uint32_t length);
|
||||
void tft_write_word(uint32_t *data_buf, uint32_t length, uint32_t flag);
|
||||
void tft_fill_data(uint32_t *data_buf, uint32_t length);
|
||||
int rt_hw_lcd_init(void);
|
||||
void drv_lcd_set_area(lcd_8080_device_t lcd, rt_uint16_t x1, rt_uint16_t y1, rt_uint16_t x2, rt_uint16_t y2);
|
||||
void drv_lcd_data_word(lcd_8080_device_t lcd, rt_uint32_t *data_buf, rt_uint32_t length);
|
||||
void drv_lcd_data_half_word(lcd_8080_device_t lcd, rt_uint16_t *data_buf, rt_uint32_t length);
|
||||
|
||||
void lcd_polling_enable(void);
|
||||
void lcd_interrupt_enable(void);
|
||||
int lcd_init(void);
|
||||
void lcd_clear(uint16_t color);
|
||||
/* for mpy machine.lcd */
|
||||
void lcd_display_on(void);
|
||||
void lcd_display_off(void);
|
||||
void lcd_clear(int color);
|
||||
void lcd_draw_point_color(int x, int y, int color);
|
||||
void lcd_show_string(int x, int y, int size, const char *data);
|
||||
void lcd_draw_line(int x1, int y1, int x2, int y2);
|
||||
void lcd_draw_rectangle(int x1, int y1, int x2, int y2);
|
||||
void lcd_draw_circle(int x1, int y1, int r);
|
||||
void lcd_set_color(int back, int fore);
|
||||
void lcd_show_image(int x, int y, int length, int wide, const unsigned char *buf);
|
||||
void lcd_set_direction(lcd_dir_t dir);
|
||||
void lcd_set_area(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2);
|
||||
void lcd_draw_point(uint16_t x, uint16_t y, uint16_t color);
|
||||
void lcd_draw_string(uint16_t x, uint16_t y, char *str, uint16_t color);
|
||||
void lcd_draw_picture(uint16_t x1, uint16_t y1, uint16_t width, uint16_t height, uint32_t *ptr);
|
||||
void lcd_draw_rectangle(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2, uint16_t width, uint16_t color);
|
||||
void lcd_ram_draw_string(char *str, uint32_t *ptr, uint16_t font_color, uint16_t bg_color);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,27 @@
|
|||
#include <sysctl.h>
|
||||
|
||||
int mp_port_get_freq(int clkid, int *freq)
|
||||
{
|
||||
int ret = 0;
|
||||
uint32_t value;
|
||||
|
||||
switch (clkid)
|
||||
{
|
||||
case 0:
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_CPU);
|
||||
break;
|
||||
case 1:
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL1);
|
||||
break;
|
||||
case 2:
|
||||
value = sysctl_clock_get_freq(SYSCTL_CLOCK_PLL2);
|
||||
break;
|
||||
default:
|
||||
ret = -1;
|
||||
break;
|
||||
}
|
||||
|
||||
*freq = (int)value;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -0,0 +1,301 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-18 ZYH first version
|
||||
*/
|
||||
|
||||
#include <rtthread.h>
|
||||
#include <rtdevice.h>
|
||||
|
||||
#ifdef RT_USING_SPI
|
||||
#include "drv_spi.h"
|
||||
#include <drv_io_config.h>
|
||||
#include <spi.h>
|
||||
#include "dmalock.h"
|
||||
#include <sysctl.h>
|
||||
#include <gpiohs.h>
|
||||
#include <string.h>
|
||||
#include "utils.h"
|
||||
|
||||
#define DRV_SPI_DEVICE(spi_bus) (struct drv_spi_bus *)(spi_bus)
|
||||
|
||||
#define MAX_CLOCK (40000000UL)
|
||||
|
||||
struct drv_spi_bus
|
||||
{
|
||||
struct rt_spi_bus parent;
|
||||
spi_device_num_t spi_instance;
|
||||
dmac_channel_number_t dma_send_channel;
|
||||
dmac_channel_number_t dma_recv_channel;
|
||||
struct rt_completion dma_completion;
|
||||
};
|
||||
|
||||
struct drv_cs
|
||||
{
|
||||
int cs_index;
|
||||
int cs_pin;
|
||||
};
|
||||
|
||||
static volatile spi_t *const spi_instance[4] =
|
||||
{
|
||||
(volatile spi_t *)SPI0_BASE_ADDR,
|
||||
(volatile spi_t *)SPI1_BASE_ADDR,
|
||||
(volatile spi_t *)SPI_SLAVE_BASE_ADDR,
|
||||
(volatile spi_t *)SPI3_BASE_ADDR
|
||||
};
|
||||
|
||||
static rt_err_t drv_spi_configure(struct rt_spi_device *device,
|
||||
struct rt_spi_configuration *configuration)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
int freq = 0;
|
||||
struct drv_spi_bus *bus = DRV_SPI_DEVICE(device->bus);
|
||||
struct drv_cs * cs = (struct drv_cs *)device->parent.user_data;
|
||||
RT_ASSERT(bus != RT_NULL);
|
||||
|
||||
gpiohs_set_drive_mode(cs->cs_pin, GPIO_DM_OUTPUT);
|
||||
gpiohs_set_pin(cs->cs_pin, GPIO_PV_HIGH);
|
||||
|
||||
#ifdef BSP_USING_SPI1_AS_QSPI
|
||||
/* Todo:QSPI*/
|
||||
#else
|
||||
spi_init(bus->spi_instance, configuration->mode & RT_SPI_MODE_3, SPI_FF_STANDARD, configuration->data_width, 0);
|
||||
#endif
|
||||
freq = spi_set_clk_rate(bus->spi_instance, configuration->max_hz > MAX_CLOCK ? MAX_CLOCK : configuration->max_hz);
|
||||
rt_kprintf("set spi freq %d\n", freq);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
void __spi_set_tmod(uint8_t spi_num, uint32_t tmod)
|
||||
{
|
||||
RT_ASSERT(spi_num < SPI_DEVICE_MAX);
|
||||
volatile spi_t *spi_handle = spi[spi_num];
|
||||
uint8_t tmod_offset = 0;
|
||||
switch(spi_num)
|
||||
{
|
||||
case 0:
|
||||
case 1:
|
||||
case 2:
|
||||
tmod_offset = 8;
|
||||
break;
|
||||
case 3:
|
||||
default:
|
||||
tmod_offset = 10;
|
||||
break;
|
||||
}
|
||||
set_bit(&spi_handle->ctrlr0, 3 << tmod_offset, tmod << tmod_offset);
|
||||
}
|
||||
int dma_irq_callback(void *ctx)
|
||||
{
|
||||
struct rt_completion * cmp = ctx;
|
||||
if(cmp)
|
||||
{
|
||||
rt_completion_done(cmp);
|
||||
}
|
||||
}
|
||||
|
||||
static rt_uint32_t drv_spi_xfer(struct rt_spi_device *device, struct rt_spi_message *message)
|
||||
{
|
||||
struct drv_spi_bus *bus = DRV_SPI_DEVICE(device->bus);
|
||||
struct drv_cs * cs = (struct drv_cs *)device->parent.user_data;
|
||||
struct rt_spi_configuration *cfg = &device->config;
|
||||
uint32_t * tx_buff = RT_NULL;
|
||||
uint32_t * rx_buff = RT_NULL;
|
||||
int i;
|
||||
rt_ubase_t dummy = 0xFFFFFFFFU;
|
||||
if(cfg->data_width != 8)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
RT_ASSERT(bus != RT_NULL);
|
||||
|
||||
if(message->cs_take)
|
||||
{
|
||||
gpiohs_set_pin(cs->cs_pin, GPIO_PV_LOW);
|
||||
}
|
||||
if(message->length)
|
||||
{
|
||||
bus->dma_send_channel = DMAC_CHANNEL_MAX;
|
||||
bus->dma_recv_channel = DMAC_CHANNEL_MAX;
|
||||
|
||||
rt_completion_init(&bus->dma_completion);
|
||||
if(message->recv_buf)
|
||||
{
|
||||
dmalock_sync_take(&bus->dma_recv_channel, RT_WAITING_FOREVER);
|
||||
sysctl_dma_select(bus->dma_recv_channel, SYSCTL_DMA_SELECT_SSI0_RX_REQ + bus->spi_instance * 2);
|
||||
rx_buff = rt_calloc(message->length * 4, 1);
|
||||
if(!rx_buff)
|
||||
{
|
||||
goto transfer_done;
|
||||
}
|
||||
}
|
||||
|
||||
if(message->send_buf)
|
||||
{
|
||||
dmalock_sync_take(&bus->dma_send_channel, RT_WAITING_FOREVER);
|
||||
sysctl_dma_select(bus->dma_send_channel, SYSCTL_DMA_SELECT_SSI0_TX_REQ + bus->spi_instance * 2);
|
||||
tx_buff = rt_malloc(message->length * 4);
|
||||
if(!tx_buff)
|
||||
{
|
||||
goto transfer_done;
|
||||
}
|
||||
for(i = 0; i < message->length; i++)
|
||||
{
|
||||
tx_buff[i] = ((uint8_t *)message->send_buf)[i];
|
||||
}
|
||||
}
|
||||
|
||||
if(message->send_buf && message->recv_buf)
|
||||
{
|
||||
dmac_irq_register(bus->dma_recv_channel, dma_irq_callback, &bus->dma_completion, 1);
|
||||
__spi_set_tmod(bus->spi_instance, SPI_TMOD_TRANS_RECV);
|
||||
spi_instance[bus->spi_instance]->dmacr = 0x3;
|
||||
spi_instance[bus->spi_instance]->ssienr = 0x01;
|
||||
dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
|
||||
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length);
|
||||
dmac_set_single_mode(bus->dma_send_channel, tx_buff, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length);
|
||||
}
|
||||
else if(message->send_buf)
|
||||
{
|
||||
dmac_irq_register(bus->dma_send_channel, dma_irq_callback, &bus->dma_completion, 1);
|
||||
__spi_set_tmod(bus->spi_instance, SPI_TMOD_TRANS);
|
||||
spi_instance[bus->spi_instance]->dmacr = 0x2;
|
||||
spi_instance[bus->spi_instance]->ssienr = 0x01;
|
||||
dmac_set_single_mode(bus->dma_send_channel, tx_buff, (void *)(&spi_instance[bus->spi_instance]->dr[0]), DMAC_ADDR_INCREMENT, DMAC_ADDR_NOCHANGE,
|
||||
DMAC_MSIZE_4, DMAC_TRANS_WIDTH_32, message->length);
|
||||
}
|
||||
else if(message->recv_buf)
|
||||
{
|
||||
dmac_irq_register(bus->dma_recv_channel, dma_irq_callback, &bus->dma_completion, 1);
|
||||
__spi_set_tmod(bus->spi_instance, SPI_TMOD_RECV);
|
||||
spi_instance[bus->spi_instance]->ctrlr1 = message->length - 1;
|
||||
spi_instance[bus->spi_instance]->dmacr = 0x1;
|
||||
spi_instance[bus->spi_instance]->ssienr = 0x01;
|
||||
spi_instance[bus->spi_instance]->dr[0] = 0xFF;
|
||||
dmac_set_single_mode(bus->dma_recv_channel, (void *)(&spi_instance[bus->spi_instance]->dr[0]), rx_buff, DMAC_ADDR_NOCHANGE, DMAC_ADDR_INCREMENT,
|
||||
DMAC_MSIZE_1, DMAC_TRANS_WIDTH_32, message->length);
|
||||
}
|
||||
else
|
||||
{
|
||||
goto transfer_done;
|
||||
}
|
||||
spi_instance[bus->spi_instance]->ser = 1U << cs->cs_index;
|
||||
|
||||
rt_completion_wait(&bus->dma_completion, RT_WAITING_FOREVER);
|
||||
if(message->recv_buf)
|
||||
dmac_irq_unregister(bus->dma_recv_channel);
|
||||
else
|
||||
dmac_irq_unregister(bus->dma_send_channel);
|
||||
|
||||
// wait until all data has been transmitted
|
||||
while ((spi_instance[bus->spi_instance]->sr & 0x05) != 0x04)
|
||||
;
|
||||
spi_instance[bus->spi_instance]->ser = 0x00;
|
||||
spi_instance[bus->spi_instance]->ssienr = 0x00;
|
||||
|
||||
if(message->recv_buf)
|
||||
{
|
||||
for(i = 0; i < message->length; i++)
|
||||
{
|
||||
((uint8_t *)message->recv_buf)[i] = (uint8_t)rx_buff[i];
|
||||
}
|
||||
}
|
||||
|
||||
transfer_done:
|
||||
dmalock_release(bus->dma_send_channel);
|
||||
dmalock_release(bus->dma_recv_channel);
|
||||
if(tx_buff)
|
||||
{
|
||||
rt_free(tx_buff);
|
||||
}
|
||||
if(rx_buff)
|
||||
{
|
||||
rt_free(rx_buff);
|
||||
}
|
||||
}
|
||||
|
||||
if(message->cs_release)
|
||||
{
|
||||
gpiohs_set_pin(cs->cs_pin, GPIO_PV_HIGH);
|
||||
}
|
||||
|
||||
return message->length;
|
||||
}
|
||||
|
||||
const static struct rt_spi_ops drv_spi_ops =
|
||||
{
|
||||
drv_spi_configure,
|
||||
drv_spi_xfer
|
||||
};
|
||||
|
||||
int rt_hw_spi_init(void)
|
||||
{
|
||||
rt_err_t ret = RT_EOK;
|
||||
|
||||
#ifdef BSP_USING_SPI1
|
||||
{
|
||||
static struct drv_spi_bus spi_bus1;
|
||||
spi_bus1.spi_instance = SPI_DEVICE_1;
|
||||
ret = rt_spi_bus_register(&spi_bus1.parent, "spi1", &drv_spi_ops);
|
||||
|
||||
#ifdef BSP_SPI1_USING_SS0
|
||||
{
|
||||
static struct rt_spi_device spi_device10;
|
||||
static struct drv_cs cs10 =
|
||||
{
|
||||
.cs_index = SPI_CHIP_SELECT_0,
|
||||
.cs_pin = SPI1_CS0_PIN
|
||||
};
|
||||
|
||||
rt_spi_bus_attach_device(&spi_device10, "spi10", "spi1", (void *)&cs10);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_SPI1_USING_SS1
|
||||
{
|
||||
static struct rt_spi_device spi_device11;
|
||||
static struct drv_cs cs11 =
|
||||
{
|
||||
.cs_index = SPI_CHIP_SELECT_1,
|
||||
.cs_pin = SPI1_CS1_PIN
|
||||
};
|
||||
rt_spi_bus_attach_device(&spi_device11, "spi11", "spi1", (void *)&cs11);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_SPI1_USING_SS2
|
||||
{
|
||||
static struct rt_spi_device spi_device12;
|
||||
static struct drv_cs cs12 =
|
||||
{
|
||||
.cs_index = SPI_CHIP_SELECT_2,
|
||||
.cs_pin = SPI1_CS2_PIN
|
||||
};
|
||||
rt_spi_bus_attach_device(&spi_device12, "spi12", "spi1", (void *)&cs12);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef BSP_SPI1_USING_SS3
|
||||
{
|
||||
static struct rt_spi_device spi_device13;
|
||||
static struct drv_cs cs13 =
|
||||
{
|
||||
.cs_index = SPI_CHIP_SELECT_2,
|
||||
.cs_pin = SPI1_CS2_PIN
|
||||
};
|
||||
rt_spi_bus_attach_device(&spi_device13, "spi13", "spi1", (void *)&cs13);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
INIT_DEVICE_EXPORT(rt_hw_spi_init);
|
||||
#endif
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
/*
|
||||
* Copyright (c) 2006-2018, RT-Thread Development Team
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*
|
||||
* Change Logs:
|
||||
* Date Author Notes
|
||||
* 2019-03-18 ZYH first version
|
||||
*/
|
||||
|
||||
#ifndef DRV_SPI_H__
|
||||
#define DRV_SPI_H__
|
||||
|
||||
int rt_hw_spi_init(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,11 @@
|
|||
#include <rtthread.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
size_t get_free_heap_size(void)
|
||||
{
|
||||
rt_uint32_t total, used, max;
|
||||
|
||||
rt_memory_info(&total, &used, &max);
|
||||
|
||||
return total - used;
|
||||
}
|
||||
|
|
@ -18,12 +18,13 @@
|
|||
#define RT_ALIGN_SIZE 8
|
||||
#define RT_THREAD_PRIORITY_32
|
||||
#define RT_THREAD_PRIORITY_MAX 32
|
||||
#define RT_TICK_PER_SECOND 1000
|
||||
#define RT_TICK_PER_SECOND 80
|
||||
#define RT_USING_OVERFLOW_CHECK
|
||||
#define RT_USING_HOOK
|
||||
#define RT_USING_IDLE_HOOK
|
||||
#define RT_IDLE_HOOK_LIST_SIZE 4
|
||||
#define IDLE_THREAD_STACK_SIZE 4096
|
||||
#define SYSTEM_THREAD_STACK_SIZE 4096
|
||||
|
||||
/* kservice optimization */
|
||||
|
||||
|
|
@ -74,17 +75,17 @@
|
|||
/* Command shell */
|
||||
|
||||
#define RT_USING_FINSH
|
||||
#define RT_USING_MSH
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_THREAD_NAME "tshell"
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 16384
|
||||
#define FINSH_USING_HISTORY
|
||||
#define FINSH_HISTORY_LINES 5
|
||||
#define FINSH_USING_SYMTAB
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_THREAD_PRIORITY 20
|
||||
#define FINSH_THREAD_STACK_SIZE 16384
|
||||
#define FINSH_CMD_SIZE 80
|
||||
#define FINSH_USING_MSH
|
||||
#define FINSH_USING_MSH_DEFAULT
|
||||
#define FINSH_USING_MSH_ONLY
|
||||
#define MSH_USING_BUILT_IN_COMMANDS
|
||||
#define FINSH_USING_DESCRIPTION
|
||||
#define FINSH_ARG_MAX 10
|
||||
|
||||
/* Device virtual file system */
|
||||
|
|
@ -108,6 +109,7 @@
|
|||
#define RT_DFS_ELM_DRIVES 2
|
||||
#define RT_DFS_ELM_MAX_SECTOR_SIZE 4096
|
||||
#define RT_DFS_ELM_REENTRANT
|
||||
#define RT_DFS_ELM_MUTEX_TIMEOUT 3000
|
||||
#define RT_USING_DFS_DEVFS
|
||||
|
||||
/* Device Drivers */
|
||||
|
|
@ -118,6 +120,7 @@
|
|||
#define RT_SYSTEM_WORKQUEUE_STACKSIZE 2048
|
||||
#define RT_SYSTEM_WORKQUEUE_PRIORITY 23
|
||||
#define RT_USING_SERIAL
|
||||
#define RT_USING_SERIAL_V1
|
||||
#define RT_SERIAL_USING_DMA
|
||||
#define RT_SERIAL_RB_BUFSZ 64
|
||||
#define RT_USING_PIN
|
||||
|
|
@ -163,7 +166,8 @@
|
|||
#define RT_USING_PTHREADS
|
||||
#define PTHREAD_NUM_MAX 8
|
||||
#define RT_USING_POSIX
|
||||
#define RT_LIBC_FIXED_TIMEZONE 8
|
||||
#define RT_LIBC_USING_TIME
|
||||
#define RT_LIBC_DEFAULT_TIMEZONE 8
|
||||
|
||||
/* Network */
|
||||
|
||||
|
|
@ -245,9 +249,14 @@
|
|||
/* Board Drivers Config */
|
||||
|
||||
#define BSP_USING_UART_HS
|
||||
|
||||
/* General Purpose UARTs */
|
||||
|
||||
#define BSP_USING_UART1
|
||||
#define BSP_UART1_TXD_PIN 20
|
||||
#define BSP_UART1_RXD_PIN 21
|
||||
#define BSP_UART1_RTS_PIN -1
|
||||
#define BSP_UART1_CTS_PIN -1
|
||||
#define BSP_USING_SPI1
|
||||
#define BSP_SPI1_CLK_PIN 27
|
||||
#define BSP_SPI1_D0_PIN 28
|
||||
|
|
@ -261,6 +270,10 @@
|
|||
#define BSP_LCD_WR_PIN 39
|
||||
#define BSP_LCD_DC_PIN 38
|
||||
#define BSP_LCD_RST_PIN 37
|
||||
#define BSP_LCD_BACKLIGHT_PIN -1
|
||||
#define BSP_LCD_BACKLIGHT_ACTIVE_LOW
|
||||
#define BSP_LCD_CLK_FREQ 20000000
|
||||
#define BSP_BOARD_USER
|
||||
#define BSP_LCD_X_MAX 240
|
||||
#define BSP_LCD_Y_MAX 320
|
||||
#define BSP_USING_SDCARD
|
||||
|
|
@ -276,6 +289,9 @@
|
|||
#define BSP_DVP_CMOS_XCLK_PIN 46
|
||||
#define BSP_DVP_CMOS_PCLK_PIN 47
|
||||
#define BSP_DVP_CMOS_HREF_PIN 45
|
||||
#define RW007_SPIDEV_NAME "spi11"
|
||||
#define RW007_INT_BUSY_PIN 7
|
||||
#define RW007_RST_PIN 6
|
||||
|
||||
/* Kendryte SDK Config */
|
||||
|
||||
|
|
@ -283,6 +299,9 @@
|
|||
|
||||
/* More Drivers */
|
||||
|
||||
#define PKG_USING_RW007
|
||||
#define RW007_NOT_USE_EXAMPLE_DRIVERS
|
||||
#define RW007_SPI_MAX_HZ 20000000
|
||||
#define DRV_USING_OV2640
|
||||
|
||||
/* APP_Framework */
|
||||
|
|
@ -303,23 +322,36 @@
|
|||
|
||||
/* knowing app */
|
||||
|
||||
#define APPLICATION_KNOWING
|
||||
#define FACE_DETECT
|
||||
|
||||
/* sensor app */
|
||||
|
||||
#define APPLICATION_SENSOR
|
||||
#define APPLICATION_SENSOR_VOICE
|
||||
#define APPLICATION_SENSOR_VOICE_D124
|
||||
|
||||
/* Framework */
|
||||
|
||||
#define TRANSFORM_LAYER_ATTRIUBUTE
|
||||
#define ADD_XIUOS_FETURES
|
||||
#define SUPPORT_SENSOR_FRAMEWORK
|
||||
#define SENSOR_VOICE
|
||||
#define SENSOR_D124
|
||||
#define SENSOR_DEVICE_D124 "d124_1"
|
||||
#define SENSOR_QUANTITY_D124_VOICE "voice_1"
|
||||
#define SENSOR_DEVICE_D124_DEV "/dev/uar2"
|
||||
#define SUPPORT_KNOWING_FRAMEWORK
|
||||
#define USING_KPU_POSTPROCESSING
|
||||
#define USING_YOLOV2
|
||||
|
||||
/* app lib */
|
||||
/* Security */
|
||||
|
||||
|
||||
/* lib */
|
||||
|
||||
#define APP_SELECT_NEWLIB
|
||||
#define LIB_USING_CJSON
|
||||
#define __STACKSIZE__ 4096
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue