lr
40 lines
761 B
C
40 lines
761 B
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*/
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#ifndef __SYSTEM_RK3568_H_
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#define __SYSTEM_RK3568_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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/**
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\brief Setup the system.
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Initialize the System and update the SystemCoreClock variable.
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*/
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extern void SystemInit (void);
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/**
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\brief Update SystemCoreClock variable.
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Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
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*/
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extern void SystemCoreClockUpdate (void);
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extern void DataInit (void);
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#if defined(HAL_AP_CORE)
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extern void MMU_CreateTranslationTable(void);
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /*__SYSTEM_RK3568_H_ */
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