modify XiUOS DIR : (1.add plc_demo in APP_Framework/control_app; 2.add industrial_network、industrial_fieldbus and industrial_wlan; 3.add XiZi_AIoT and modify XiZi as XiZi_IIoT.)
This commit is contained in:
Liu_Weichao
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/******************************************************************************
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* Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by XHSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*/
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/*****************************************************************************/
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/* File HC32F4A0xI.ld */
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/* Abstract Linker script for HC32F4A0 Device with */
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/* 2MByte FLASH, 516KByte RAM */
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/* Version V1.0 */
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/* Date 2022-04-28 */
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/*****************************************************************************/
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/**
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* @file link.lds
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* @brief hc32f4a0 Linker script
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* @version 2.0
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* @author AIIT XUOS Lab
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* @date 2022-09-08
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*/
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/*************************************************
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File name: link.lds
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Description: hc32f4a0 Linker script
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Others: take HC32F4A0xI.ld for references
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History:
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1. Date: 2022-09-08
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Author: AIIT XUOS Lab
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Modification:
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1. add shell cmd table and g_service_table
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*************************************************/
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/* Custom defines, according to section 7.7 of the user manual.
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Take OTP sector 16 for example. */
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__OTP_DATA_START = 0x03000000;
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__OTP_DATA_SIZE = 2048;
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__OTP_LOCK_START = 0x03001840;
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__OTP_LOCK_SIZE = 4;
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/* Use contiguous memory regions for simple. */
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MEMORY
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{
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FLASH (rx): ORIGIN = 0x00000000, LENGTH = 2M
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OTP_DATA (rx): ORIGIN = __OTP_DATA_START, LENGTH = __OTP_DATA_SIZE
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OTP_LOCK (rx): ORIGIN = __OTP_LOCK_START, LENGTH = __OTP_LOCK_SIZE
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RAM (rwx): ORIGIN = 0x1FFE0000, LENGTH = 512K
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RAMB (rwx): ORIGIN = 0x200F0000, LENGTH = 4K
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}
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ENTRY(Reset_Handler)
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SECTIONS
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{
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.interrupts :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector))
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. = ALIGN(4);
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} >FLASH
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.icg_sec 0x00000400 :
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{
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KEEP(*(.icg_sec))
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} >FLASH
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.text :
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{
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. = ALIGN(4);
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_stext = .;
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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*(.text) /* remaining code */
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*(.text.*) /* remaining code */
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*(.rodata) /* read-only data (constants) */
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*(.rodata*)
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*(.glue_7)
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*(.glue_7t)
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/* section information for shell */
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. = ALIGN(4);
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_shell_command_start = .;
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KEEP (*(shellCommand))
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_shell_command_end = .;
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. = ALIGN(4);
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__isrtbl_idx_start = .;
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KEEP(*(.isrtbl.idx))
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__isrtbl_start = .;
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KEEP(*(.isrtbl))
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__isrtbl_end = .;
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. = ALIGN(4);
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PROVIDE(g_service_table_start = ABSOLUTE(.));
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KEEP(*(.g_service_table))
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PROVIDE(g_service_table_end = ABSOLUTE(.));
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. = ALIGN(4);
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_etext = .;
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} >FLASH
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata)
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*(.rodata*)
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. = ALIGN(4);
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} >FLASH
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} >FLASH
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__exidx_end = .;
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.preinit_array :
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{
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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} >FLASH
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.init_array :
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{
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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} >FLASH
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.fini_array :
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{
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP(*(SORT(.fini_array.*)))
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KEEP(*(.fini_array))
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PROVIDE_HIDDEN (__fini_array_end = .);
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. = ALIGN(4);
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} >FLASH
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__etext = ALIGN(4);
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.otp_data_sec :
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{
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KEEP(*(.otp_data_sec))
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} >OTP_DATA
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.otp_lock_sec :
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{
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KEEP(*(.otp_lock_sec))
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} >OTP_LOCK
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.data : AT (__etext)
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{
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. = ALIGN(4);
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__data_start__ = .;
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*(.data)
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*(.data*)
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. = ALIGN(4);
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*(.ramfunc)
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*(.ramfunc*)
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. = ALIGN(4);
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__data_end__ = .;
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} >RAM
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__etext_ramb = __etext + ALIGN (SIZEOF(.data), 4);
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.ramb_data : AT (__etext_ramb)
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{
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. = ALIGN(4);
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__data_start_ramb__ = .;
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*(.ramb_data)
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*(.ramb_data*)
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. = ALIGN(4);
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__data_end_ramb__ = .;
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} >RAMB
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__bss_start = .;
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.bss :
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{
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. = ALIGN(4);
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_sbss = .;
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .;
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__bss_end__ = _ebss;
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} >RAM
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__bss_end = .;
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.ramb_bss :
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{
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. = ALIGN(4);
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__bss_start_ramb__ = .;
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*(.ramb_bss)
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*(.ramb_bss*)
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. = ALIGN(4);
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__bss_end_ramb__ = .;
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} >RAMB
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.heap_stack (COPY) :
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{
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. = ALIGN(8);
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__end__ = .;
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PROVIDE(end = .);
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PROVIDE(_end = .);
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*(.heap*)
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. = ALIGN(8);
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__HeapLimit = .;
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__StackLimit = .;
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*(.stack*)
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. = ALIGN(8);
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__StackTop = .;
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} >RAM
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.ARM.attributes 0 : { *(.ARM.attributes) }
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PROVIDE(_stack = __StackTop);
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PROVIDE(_Min_Heap_Size = __HeapLimit - __HeapBase);
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PROVIDE(_Min_Stack_Size = __StackTop - __StackLimit);
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__RamEnd = ORIGIN(RAM) + LENGTH(RAM);
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ASSERT(__StackTop <= __RamEnd, "region RAM overflowed with stack")
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}
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