ArmV8 support arch mmu intr clock

This commit is contained in:
TXuian
2024-05-24 16:06:09 +08:00
parent c1e99c449a
commit 80f80b64f0
9 changed files with 99 additions and 162 deletions
@@ -57,20 +57,20 @@ Modification:
.global _spinlock_lock
.func _spinlock_lock
_spinlock_lock:
mov w2, #1
sevl
wfe
// wait for an event signal
ldaxrb w1, [x0] // check if the spinlock is currently unlocked
cmp x1, #UNLOCKED
wfe
// wfe // wait for an event signal
ldaxrb w1, [x0] // check if the spinlock is currently unlocked
cmp w1, #UNLOCKED
bne _spinlock_lock
mrs x1, mpidr_el1 // get our CPU ID
and x1, x1, #3
stxrb w2, w1, [x0]
cbnz x2, _spinlock_lock // check if the write was successful, if the write failed, start over
cmp x2, #0
bne _spinlock_lock // check if the write was successful, if the write failed, start over
dmb ish // Ensure that accesses to shared resource have completed
@@ -88,21 +88,21 @@ _spinlock_unlock:
mrs x1, mpidr_el1 // get our CPU ID
and x1, x1, #3
ldr x2, [x0]
cmp x1, x2
ldr w2, [x0]
cmp w1, w2
bne 1f //doesn't match,jump to 1
dmb ish
mov x1, #UNLOCKED
str x1, [x0]
mov w1, #UNLOCKED
str w1, [x0]
dsb ish //Ensure that no instructions following the barrier execute until
// all memory accesses prior to the barrier have completed.
sev // send event to wake up other cores waiting on spinlock
sevl // send event to wake up other cores waiting on spinlock
mov x0, #0 // return success
ret
@@ -73,7 +73,7 @@ void syscall_arch_handler(struct trapframe* tf)
xizi_enter_kernel();
assert(cur_cpu()->task == NULL);
sys_exit(cur_cpu()->task);
context_switch(&cur_cpu()->task->main_thread.context, cur_cpu()->scheduler);
context_switch(&cur_cpu()->task->thread_context.context, cur_cpu()->scheduler);
panic("dabort end should never be reashed.\n");
}
}