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temporarily adapt kpu for XiZi

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This commit is contained in:
wuzheng
2022-12-12 16:24:54 +08:00
parent 04dc796f95
commit 6a89a12c49
12 changed files with 268 additions and 134 deletions
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Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/dma/dmac.c
+12 -6
View File
@@ -31,6 +31,7 @@
#include "utils.h"
#include "plic.h"
#include "stdlib.h"
#include <device.h>
volatile dmac_t *const dmac = (dmac_t *)DMAC_BASE_ADDR;
@@ -172,6 +173,7 @@ void dmac_channel_disable(dmac_channel_number_t channel_num)
}
writeq(chen.data, &dmac->chen);
}
int32_t dmac_check_channel_busy(dmac_channel_number_t channel_num)
@@ -766,26 +768,30 @@ void dmac_set_src_dest_length(dmac_channel_number_t channel_num, const void *src
dmac_channel_enable(channel_num);
}
static int dmac_irq_callback(void *ctx)
static int dmac_irq_callback(int vector,void *ctx)
{
dmac_context_t *v_dmac_context = (dmac_context_t *)(ctx);
dmac_channel_number_t v_dmac_channel = v_dmac_context->dmac_channel;
dmac_chanel_interrupt_clear(v_dmac_channel);
if(v_dmac_context->callback != NULL)
if(v_dmac_context->callback != NULL){
v_dmac_context->callback(v_dmac_context->ctx);
}
return 0;
}
void dmac_irq_register(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority)
{
dmac_context[channel_num].dmac_channel = channel_num;
dmac_context[channel_num].callback = dmac_callback;
dmac_context[channel_num].ctx = ctx;
dmac_enable_channel_interrupt(channel_num);
plic_set_priority(IRQN_DMA0_INTERRUPT + channel_num, priority);
plic_irq_enable(IRQN_DMA0_INTERRUPT + channel_num);
plic_irq_register(IRQN_DMA0_INTERRUPT + channel_num, dmac_irq_callback, &dmac_context[channel_num]);
// plic_set_priority(IRQN_DMA0_INTERRUPT + channel_num, priority);
// plic_irq_enable(IRQN_DMA0_INTERRUPT + channel_num);
// plic_irq_register(IRQN_DMA0_INTERRUPT + channel_num, dmac_irq_callback, &dmac_context[channel_num]);
isrManager.done->enableIrq(IRQN_DMA0_INTERRUPT + channel_num);
isrManager.done->registerIrq(IRQN_DMA0_INTERRUPT + channel_num, (IsrHandlerType)dmac_irq_callback, &dmac_context[channel_num]);
}
void __attribute__((weak, alias("dmac_irq_register"))) dmac_set_irq(dmac_channel_number_t channel_num , plic_irq_callback_t dmac_callback, void *ctx, uint32_t priority);
Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/dvp/connect_dvp.c
+34 -9
View File
@@ -6,9 +6,11 @@
#include "plic.h"
#include <ov2640.h>
#define REG_SCCB_READ 0x12U
#define REG_SCCB_WRITE 0x13U
#define SCCB_REG_LENGTH 0x08U
#define CONTINOUS_SHOOTS 1
#define ONLY_ONE_SHOOT 2
#define STOP_SHOOT 0
static int shoot_flag = 0; // shoot will close when shoot_flag == 0
// irq interrupt function
static int on_irq_dvp(int irq, void *arg)
@@ -17,11 +19,16 @@ static int on_irq_dvp(int irq, void *arg)
{
dvp_clear_interrupt(DVP_STS_FRAME_FINISH);
}
else
{
dvp_start_convert();
else{
if(shoot_flag>0){
dvp_start_convert();
if(ONLY_ONE_SHOOT==shoot_flag){
shoot_flag=STOP_SHOOT;
}
}
dvp_clear_interrupt(DVP_STS_FRAME_START);
}
return 0;
}
@@ -64,14 +71,14 @@ static uint32 DvpDrvInit(void)
#endif
#ifdef DVP_AI_OUTPUT
dvp_set_output_enable(DVP_OUTPUT_AI, 1);
dvp_set_ai_addr((uint32_t)DVP_AI_RED_ADRESS, (uint32_t)DVP_AI_GREEN_ADRESS, (uint32_t)DVP_AI_BLUE_ADRESS);
// dvp_set_ai_addr((uint32_t)DVP_AI_RED_ADRESS, (uint32_t)DVP_AI_GREEN_ADRESS, (uint32_t)DVP_AI_BLUE_ADRESS);
#endif
#ifdef DVP_INTERRUPT_ENABLE
dvp_config_interrupt(DVP_CFG_START_INT_ENABLE | DVP_CFG_FINISH_INT_ENABLE, 0);
isrManager.done->registerIrq(IRQN_DVP_INTERRUPT, (IsrHandlerType)on_irq_dvp, NULL);
isrManager.done->enableIrq(IRQN_DVP_INTERRUPT);
dvp_clear_interrupt(DVP_STS_FRAME_START | DVP_STS_FRAME_FINISH);
dvp_config_interrupt(DVP_CFG_START_INT_ENABLE | DVP_CFG_FINISH_INT_ENABLE, 1);
dvp_config_interrupt(DVP_CFG_START_INT_ENABLE | DVP_CFG_FINISH_INT_ENABLE, 0);
KPrintf("camera interrupt has open!\n");
#endif
return ret;
@@ -125,15 +132,33 @@ static uint32 DvpDrvConfigure(void *drv, struct BusConfigureInfo *args)
int cmd_type = args->configure_cmd;
struct CameraCfg* tmp_cfg;
RgbAddress* kpu_rgb_address;
_ioctl_shoot_para* pixel_cfg;
switch (cmd_type)
{
case OPE_INT:
break;
case OPE_CFG:
tmp_cfg = (struct CameraCfg *)args->private_data;
SensorConfigure(tmp_cfg);
memcpy(&sensor_config,tmp_cfg,sizeof(struct CameraCfg));
SensorConfigure(&sensor_config);
dvp_set_image_size(tmp_cfg->output_w, tmp_cfg->output_h);
break;
case IOCTRL_CAMERA_START_SHOT:
pixel_cfg = (_ioctl_shoot_para*)args->private_data;
dvp_set_display_addr(pixel_cfg->pdata);
dvp_set_output_enable(DVP_OUTPUT_DISPLAY, 1);
dvp_config_interrupt(DVP_CFG_START_INT_ENABLE | DVP_CFG_FINISH_INT_ENABLE, 1);
shoot_flag=ONLY_ONE_SHOOT;
break;
case SET_AI_ADDR:
kpu_rgb_address = (RgbAddress*)args->private_data;
dvp_set_output_enable(DVP_OUTPUT_AI, 1);
dvp_set_ai_addr(kpu_rgb_address->r_addr,kpu_rgb_address->g_addr,kpu_rgb_address->b_addr);
break;
case IOCTRL_CAMERA_OUT_SIZE_RESO:
dvp_set_image_size(((uint32_t*)args->private_data)[0], ((uint32_t*)args->private_data)[1]);
break;
case REG_SCCB_READ:
ReadDvpReg(drv, (struct DvpRegConfigureInfo *)args->private_data);
break;
Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/include/connect_dvp.h
+28
View File
@@ -25,6 +25,34 @@
extern "C" {
#endif
#define REG_SCCB_READ 0x12U
#define REG_SCCB_WRITE 0x13U
#define SCCB_REG_LENGTH 0x08U
#define IOCTRL_CAMERA_START_SHOT (20)
#define SET_DISPLAY_ADDR (21)
#define SET_AI_ADDR (22)
#define IOCTRL_CAMERA_OUT_SIZE_RESO (23)
typedef struct
{
uintptr_t r_addr;
uintptr_t g_addr;
uintptr_t b_addr;
}RgbAddress;
typedef struct
{
uintptr_t pdata;
uint32_t length;
}_ioctl_shoot_para;
typedef struct
{
uint32_t width; // width The width of image
uint32_t height; // height The height of image
}_ioctl_set_reso;
int HwDvpInit(void);
#ifdef __cplusplus
Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/kpu/kpu.c
+19 -13
View File
@@ -10,6 +10,8 @@
#include "bsp.h"
#include <assert.h>
#include <float.h>
#include "plic.h"
#include <device.h>
#define LAYER_BURST_SIZE 12
@@ -765,7 +767,6 @@ static void kpu_kmodel_input_with_padding(const kpu_layer_argument_t *layer, con
size_t width = layer->image_size.data.i_row_wid + 1;
size_t height = layer->image_size.data.i_col_high + 1;
size_t channels = layer->image_channel_num.data.i_ch_num + 1;
kpu_upload_core(width, height, channels, src, layer->image_addr.data.image_src_addr);
}
@@ -1349,7 +1350,7 @@ int kpu_load_kmodel(kpu_model_context_t *ctx, const uint8_t *buffer)
{
uintptr_t base_addr = (uintptr_t)buffer;
const kpu_kmodel_header_t *header = (const kpu_kmodel_header_t *)buffer;
printf("\nheader->version:%d,header->arch:%d\n",header->version,header->arch);
if (header->version == 3 && header->arch == 0)
{
ctx->model_buffer = buffer;
@@ -1500,7 +1501,6 @@ static int ai_step(void *userdata)
last_layer_type = cnt_layer_header->type;
last_time = sysctl_get_time_us();
#endif
switch (cnt_layer_header->type)
{
case KL_ADD:
@@ -1564,9 +1564,10 @@ static int ai_step(void *userdata)
default:
assert(!"Layer is not supported.");
}
if (cnt_layer_id != (ctx->layers_length - 1))
ai_step(userdata);
if (cnt_layer_id != (ctx->layers_length - 1)){
ai_step(userdata);
}
else
kpu_kmodel_done(ctx);
return 0;
@@ -1579,6 +1580,11 @@ static void ai_step_not_isr(void *userdata)
sysctl_enable_irq();
}
static void ai_my_step(int vector,void *userdata)
{
ai_step(userdata);
}
int kpu_run_kmodel(kpu_model_context_t *ctx, const uint8_t *src, dmac_channel_number_t dma_ch, kpu_done_callback_t done_callback, void *userdata)
{
ctx->dma_ch = dma_ch;
@@ -1608,10 +1614,12 @@ int kpu_run_kmodel(kpu_model_context_t *ctx, const uint8_t *src, dmac_channel_nu
.layer_cfg_almost_empty_int = 0,
.layer_cfg_almost_full_int = 1
};
plic_irq_enable(IRQN_AI_INTERRUPT);
plic_set_priority(IRQN_AI_INTERRUPT, 1);
plic_irq_register(IRQN_AI_INTERRUPT, ai_step, ctx);
isrManager.done->enableIrq(IRQN_AI_INTERRUPT);
isrManager.done->registerIrq(IRQN_AI_INTERRUPT, (IsrHandlerType)ai_my_step, ctx);
// plic_irq_enable(IRQN_AI_INTERRUPT);
// plic_set_priority(IRQN_AI_INTERRUPT, 1);
// plic_irq_register(IRQN_AI_INTERRUPT, ai_step, ctx);
const kpu_model_layer_header_t *first_layer_header = ctx->layer_headers;
if (first_layer_header->type != KL_K210_CONV)
@@ -1624,11 +1632,9 @@ int kpu_run_kmodel(kpu_model_context_t *ctx, const uint8_t *src, dmac_channel_nu
kpu_kmodel_input_with_padding(&layer_arg, src);
ai_step_not_isr(ctx);
}
else
{
else{
kpu_input_dma(&layer_arg, src, ctx->dma_ch, ai_step, ctx);
}
return 0;
}