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support watchdog for ru-d01-m200

This commit is contained in:
MIN 2024-09-18 13:36:35 +08:00
parent ecc68cd331
commit 4c0501d029
8 changed files with 565 additions and 87 deletions
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7
Ubiquitous/XiZi_IIoT/board/ru-d01-m200/third_party_driver/Kconfig
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@ -22,3 +22,10 @@ menuconfig BSP_USING_RTC
source "$BSP_DIR/third_party_driver/rtc/Kconfig"
endif
menuconfig BSP_USING_WDT
bool "Using WATCHDOG device"
default y
select RESOURCES_WDT
if BSP_USING_WDT
source "$BSP_DIR/third_party_driver/watchdog/Kconfig"
endif

38
Ubiquitous/XiZi_IIoT/board/ru-d01-m200/third_party_driver/include/connect_wdt.h Normal file
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@ -0,0 +1,38 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_usart.h
* @brief define ru-d01-m200-board usart function and struct
* @version 1.0
* @author AIIT XUOS Lab
* @date 2024-09-13
*/
#ifndef CONNECT_WDT_H
#define CONNECT_WDT_H
#include <device.h>
#ifdef __cplusplus
extern "C" {
#endif
#define CYCLES_PER_SECOND 256
int HwWdtInit(void);
#ifdef __cplusplus
}
#endif
#endif

338
Ubiquitous/XiZi_IIoT/board/ru-d01-m200/third_party_driver/include/stm32l4xx_ll_iwdg.h Normal file
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@ -0,0 +1,338 @@
/**
******************************************************************************
* @file stm32l4xx_ll_iwdg.h
* @author MCD Application Team
* @brief Header file of IWDG LL module.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef STM32L4xx_LL_IWDG_H
#define STM32L4xx_LL_IWDG_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx.h"
/** @addtogroup STM32L4xx_LL_Driver
* @{
*/
#if defined(IWDG)
/** @defgroup IWDG_LL IWDG
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
* @{
*/
#define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
#define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
#define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
#define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
* @{
*/
/** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
* @brief Flags defines which can be used with LL_IWDG_ReadReg function
* @{
*/
#define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
#define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
#define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */
/**
* @}
*/
/** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
* @{
*/
#define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */
#define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
#define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
#define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
#define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
#define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
#define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
/**
* @}
*/
/**
* @}
*/
/* Exported macro ------------------------------------------------------------*/
/** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
* @{
*/
/** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
* @{
*/
/**
* @brief Write a value in IWDG register
* @param __INSTANCE__ IWDG Instance
* @param __REG__ Register to be written
* @param __VALUE__ Value to be written in the register
* @retval None
*/
#define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
/**
* @brief Read a value in IWDG register
* @param __INSTANCE__ IWDG Instance
* @param __REG__ Register to be read
* @retval Register value
*/
#define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
/**
* @}
*/
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
* @{
*/
/** @defgroup IWDG_LL_EF_Configuration Configuration
* @{
*/
/**
* @brief Start the Independent Watchdog
* @note Except if the hardware watchdog option is selected
* @rmtoll KR KEY LL_IWDG_Enable
* @param IWDGx IWDG Instance
* @retval None
*/
__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
{
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_ENABLE);
}
/**
* @brief Reloads IWDG counter with value defined in the reload register
* @rmtoll KR KEY LL_IWDG_ReloadCounter
* @param IWDGx IWDG Instance
* @retval None
*/
__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
{
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_RELOAD);
}
/**
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
* @rmtoll KR KEY LL_IWDG_EnableWriteAccess
* @param IWDGx IWDG Instance
* @retval None
*/
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
{
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
}
/**
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
* @rmtoll KR KEY LL_IWDG_DisableWriteAccess
* @param IWDGx IWDG Instance
* @retval None
*/
__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
{
WRITE_REG(IWDGx->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
}
/**
* @brief Select the prescaler of the IWDG
* @rmtoll PR PR LL_IWDG_SetPrescaler
* @param IWDGx IWDG Instance
* @param Prescaler This parameter can be one of the following values:
* @arg @ref LL_IWDG_PRESCALER_4
* @arg @ref LL_IWDG_PRESCALER_8
* @arg @ref LL_IWDG_PRESCALER_16
* @arg @ref LL_IWDG_PRESCALER_32
* @arg @ref LL_IWDG_PRESCALER_64
* @arg @ref LL_IWDG_PRESCALER_128
* @arg @ref LL_IWDG_PRESCALER_256
* @retval None
*/
__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
{
WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
}
/**
* @brief Get the selected prescaler of the IWDG
* @rmtoll PR PR LL_IWDG_GetPrescaler
* @param IWDGx IWDG Instance
* @retval Returned value can be one of the following values:
* @arg @ref LL_IWDG_PRESCALER_4
* @arg @ref LL_IWDG_PRESCALER_8
* @arg @ref LL_IWDG_PRESCALER_16
* @arg @ref LL_IWDG_PRESCALER_32
* @arg @ref LL_IWDG_PRESCALER_64
* @arg @ref LL_IWDG_PRESCALER_128
* @arg @ref LL_IWDG_PRESCALER_256
*/
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(const IWDG_TypeDef *IWDGx)
{
return (READ_REG(IWDGx->PR));
}
/**
* @brief Specify the IWDG down-counter reload value
* @rmtoll RLR RL LL_IWDG_SetReloadCounter
* @param IWDGx IWDG Instance
* @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
* @retval None
*/
__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
{
WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
}
/**
* @brief Get the specified IWDG down-counter reload value
* @rmtoll RLR RL LL_IWDG_GetReloadCounter
* @param IWDGx IWDG Instance
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
*/
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(const IWDG_TypeDef *IWDGx)
{
return (READ_REG(IWDGx->RLR));
}
/**
* @brief Specify high limit of the window value to be compared to the down-counter.
* @rmtoll WINR WIN LL_IWDG_SetWindow
* @param IWDGx IWDG Instance
* @param Window Value between Min_Data=0 and Max_Data=0x0FFF
* @retval None
*/
__STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
{
WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window);
}
/**
* @brief Get the high limit of the window value specified.
* @rmtoll WINR WIN LL_IWDG_GetWindow
* @param IWDGx IWDG Instance
* @retval Value between Min_Data=0 and Max_Data=0x0FFF
*/
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(const IWDG_TypeDef *IWDGx)
{
return (READ_REG(IWDGx->WINR));
}
/**
* @}
*/
/** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
* @{
*/
/**
* @brief Check if flag Prescaler Value Update is set or not
* @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
* @param IWDGx IWDG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)) ? 1UL : 0UL);
}
/**
* @brief Check if flag Reload Value Update is set or not
* @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
* @param IWDGx IWDG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)) ? 1UL : 0UL);
}
/**
* @brief Check if flag Window Value Update is set or not
* @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU
* @param IWDGx IWDG Instance
* @retval State of bit (1 or 0).
*/
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)) ? 1UL : 0UL);
}
/**
* @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not
* @rmtoll SR PVU LL_IWDG_IsReady\n
* SR RVU LL_IWDG_IsReady\n
* SR WVU LL_IWDG_IsReady
* @param IWDGx IWDG Instance
* @retval State of bits (1 or 0).
*/
__STATIC_INLINE uint32_t LL_IWDG_IsReady(const IWDG_TypeDef *IWDGx)
{
return ((READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U) ? 1UL : 0UL);
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* IWDG */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* STM32L4xx_LL_IWDG_H */

62
Ubiquitous/XiZi_IIoT/board/ru-d01-m200/third_party_driver/uart/Kconfig
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@ -11,68 +11,6 @@ menuconfig BSP_USING_USART1
config SERIAL_1_DEVICE_NAME_0
string "serial bus 1 device 0 name"
default "usart1_dev1"
menuconfig USART1_ENABLE_DETAILED_CONFIG
bool "Enable detailed configuration for USART1"
default n
help
Enable this option if you want to configure USART1 parameters like BaudRate, Parity, DataWidth, and StopBits.
if USART1_ENABLE_DETAILED_CONFIG
config USART1_BAUDRATE
int "USART1 BaudRate"
default 115200
help
Configure the baud rate for USART1. Options:
- 2400
- 4800
- 9600
- 19200
- 38400
- 57600
- 115200
- 230400
- 460800
- 921600
- 2000000
- 3000000
choice
prompt "USART1 Parity Mode"
default USART1_PARITY_NONE
help
Select the parity mode for USART1.
config USART1_PARITY_NONE
bool "None"
config USART1_PARITY_ODD
bool "Odd"
config USART1_PARITY_EVEN
bool "Even"
endchoice
choice
prompt "USART1 Data Width"
default USART1_DATA_BITS_8
help
Select the data width for USART1.
config USART1_DATA_BITS_7
bool "7 bits"
config USART1_DATA_BITS_8
bool "8 bits"
config USART1_DATA_BITS_9
bool "9 bits"
endchoice
choice
prompt "USART1 Stop Bits"
default USART1_STOP_BITS_1
help
Select the stop bits for USART1.
config USART1_STOP_BITS_1
bool "1 stop bit"
config USART1_STOP_BITS_2
bool "2 stop bits"
endchoice
endif
endif
menuconfig BSP_USING_USART2

25
Ubiquitous/XiZi_IIoT/board/ru-d01-m200/third_party_driver/uart/connect_usart.c
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@ -549,31 +549,6 @@ int HwUsartInit(void)
serial_device_1.hwdev_done = &hwdev_done;
serial_cfg_1.data_cfg = data_cfg_init;
#ifdef USART1_ENABLE_DETAILED_CONFIG
serial_cfg_1.data_cfg.serial_baud_rate = USART1_BAUDRATE;
#if defined USART1_PARITY_ODD
serial_cfg_1.data_cfg.serial_parity_mode = PARITY_ODD;
#elif defined USART1_PARITY_EVEN
serial_cfg_1.data_cfg.serial_parity_mode = PARITY_EVEN;
#else
serial_cfg_1.data_cfg.serial_parity_mode = PARITY_NONE;
#endif
#if defined USART1_DATA_BITS_7
serial_cfg_1.data_cfg.serial_data_bits = DATA_BITS_7;
#elif defined USART1_DATA_BITS_9
serial_cfg_1.data_cfg.serial_data_bits = DATA_BITS_9;
#else
serial_cfg_1.data_cfg.serial_data_bits = DATA_BITS_8;
#endif
#if defined USART1_STOP_BITS_2
serial_cfg_1.data_cfg.serial_stop_bits = STOP_BITS_2;
#else
serial_cfg_1.data_cfg.serial_stop_bits = STOP_BITS_1;
#endif
#endif
//default irq configure
serial_hw_cfg_1.uart_device = USART1;

13
Ubiquitous/XiZi_IIoT/board/ru-d01-m200/third_party_driver/watchdog/Kconfig Normal file
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@ -0,0 +1,13 @@
if BSP_USING_WDT
config WDT_BUS_NAME
string "watchdog bus name"
default "wdt0"
config WDT_DRIVER_NAME
string "watchdog driver name"
default "wdt0_drv"
config WDT_DEVICE_NAME
string "watchdog device name"
default "wdt0_dev0"
endif

3
Ubiquitous/XiZi_IIoT/board/ru-d01-m200/third_party_driver/watchdog/Makefile Normal file
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@ -0,0 +1,3 @@
SRC_FILES := connect_wdt.c
include $(KERNEL_ROOT)/compiler.mk

166
Ubiquitous/XiZi_IIoT/board/ru-d01-m200/third_party_driver/watchdog/connect_wdt.c Normal file
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@ -0,0 +1,166 @@
/*
* Copyright (c) 2020 AIIT XUOS Lab
* XiUOS is licensed under Mulan PSL v2.
* You can use this software according to the terms and conditions of the Mulan PSL v2.
* You may obtain a copy of Mulan PSL v2 at:
* http://license.coscl.org.cn/MulanPSL2
* THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
* EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
* MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
* See the Mulan PSL v2 for more details.
*/
/**
* @file connect_wdt.c
* @brief support aiit-arm32-board watchdog function and register to bus framework
* @version 1.0
* @author AIIT XUOS Lab
* @date 2024-09-13
*/
#include <board.h>
#include <connect_wdt.h>
#include "stm32l4xx_ll_iwdg.h"
/**
* This function Watchdog configuration function
*
* @param arg Watchdog timeout value in milliseconds.
* This specifies the period after which the
* system will reset if the watchdog is not
* reloaded.
*
* @return EOK
*/
static int WdtSet(uint32_t arg)
{
uint32_t circle = arg * CYCLES_PER_SECOND / 1000;
if (circle > 0xfff) {
KPrintf("Watchdog timeout should be less than 16000\n");
return ERROR;
}
LL_IWDG_Enable(IWDG);
LL_IWDG_EnableWriteAccess(IWDG);
LL_IWDG_SetPrescaler(IWDG, LL_IWDG_PRESCALER_128); // 32k / 128 = 256
LL_IWDG_SetReloadCounter(IWDG, circle);
while (LL_IWDG_IsReady(IWDG) != 1);
LL_IWDG_ReloadCounter(IWDG);
return 0;
}
/**
* This function Watchdog initialization
*
* @param dev Watchdog driver structure handle
*
* @return EOK
*/
static uint32 WdtOpen(void *dev)
{
WdtSet(4195);
return EOK;
}
/**
* This function Watchdog close function
*
* @param dev Watchdog device structure handle
*
* @return EOK on success, or ERROR on failure
*/
static uint32 WdtClose(void *dev)
{
}
/**
* This function Watchdog control function
*
* @param drv Watchdog driver structure handle
*
* @param args Watchdog driver Parameters
*
* @return EOK
*/
static uint32 WdtConfigure(void *drv, struct BusConfigureInfo *args)
{
switch (args->configure_cmd)
{
case OPER_WDT_SET_TIMEOUT:
if (WdtSet((uint32_t)*(int *)args->private_data) != 0) {
return ERROR;
}
break;
case OPER_WDT_KEEPALIVE:
LL_IWDG_ReloadCounter(IWDG);
break;
default:
return ERROR;
}
return EOK;
}
static const struct WdtDevDone dev_done =
{
WdtOpen,
WdtClose,
NONE,
NONE,
};
/**
* @description: Watchdog function
* @return success: EOK, failure: other
*/
int StartWatchdog(void)
{
//add feed watchdog task function
return EOK;
}
/**
* This function Watchdog initialization
*
* @return EOK
*/
int HwWdtInit(void)
{
x_err_t ret = EOK;
static struct WdtBus wdt;
static struct WdtDriver drv;
static struct WdtHardwareDevice dev;
ret = WdtBusInit(&wdt, WDT_BUS_NAME);
if (ret != EOK) {
KPrintf("Watchdog bus init error %d\n", ret);
return ERROR;
}
drv.configure = WdtConfigure;
ret = WdtDriverInit(&drv, WDT_DRIVER_NAME);
if (ret != EOK) {
KPrintf("Watchdog driver init error %d\n", ret);
return ERROR;
}
ret = WdtDriverAttachToBus(WDT_DRIVER_NAME, WDT_BUS_NAME);
if (ret != EOK) {
KPrintf("Watchdog driver attach error %d\n", ret);
return ERROR;
}
dev.dev_done = &dev_done;
ret = WdtDeviceRegister(&dev, WDT_DEVICE_NAME);
if (ret != EOK) {
KPrintf("Watchdog device register error %d\n", ret);
return ERROR;
}
ret = WdtDeviceAttachToBus(WDT_DEVICE_NAME, WDT_BUS_NAME);
if (ret != EOK) {
KPrintf("Watchdog device register error %d\n", ret);
return ERROR;
}
}