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Unify kernel entrance.

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This commit is contained in:
TXuian
2024-04-25 13:51:18 +08:00
parent 52b549c14c
commit 10cc7cc270
8 changed files with 79 additions and 132 deletions
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Ubiquitous/XiZi_AIoT/hardkernel/intr/arm/armv7-a/cortex-a9/error_debug.c
+19 -14
View File
@@ -46,6 +46,7 @@ Modification:
#include "multicores.h"
#include "spinlock.h"
#include "syscall.h"
#include "trap_common.h"
__attribute__((always_inline)) static inline void _abort_reason(uint32_t fault_status)
{
@@ -88,18 +89,30 @@ void dump_tf(struct trapframe* tf)
void handle_undefined_instruction(struct trapframe* tf)
{
// unimplemented trap handler
KPrintf("undefined instruction at %x\n", tf->pc);
xizi_enter_kernel();
ERROR("undefined instruction at %x\n", tf->pc);
panic("");
}
void handle_reserved(void)
{
// unimplemented trap handler
xizi_enter_kernel();
panic("Unimplemented Reserved\n");
}
void handle_fiq(void)
{
xizi_enter_kernel();
panic("Unimplemented FIQ\n");
}
extern void context_switch(struct context**, struct context*);
void dabort_handler(struct trapframe* r)
{
if (!is_spinlock_locked(&whole_kernel_lock) || whole_kernel_lock.owner_cpu != cur_cpuid()) {
spinlock_lock(&whole_kernel_lock);
}
uint32_t dfs, dfa;
xizi_enter_kernel();
uint32_t dfs, dfa;
__asm__ __volatile__("mrc p15, 0, %0, c5, c0, 0" : "=r"(dfs)::);
__asm__ __volatile__("mrc p15, 0, %0, c6, c0, 0" : "=r"(dfa)::);
@@ -116,18 +129,13 @@ void dabort_handler(struct trapframe* r)
LOG("data abort at 0x%x, status 0x%x\n", dfa, dfs);
_abort_reason(dfs);
dump_tf(r);
if (is_spinlock_locked(&whole_kernel_lock) && whole_kernel_lock.owner_cpu == cur_cpuid()) {
spinlock_unlock(&whole_kernel_lock);
}
panic("data abort exception\n");
}
}
void iabort_handler(struct trapframe* r)
{
if (!is_spinlock_locked(&whole_kernel_lock) || whole_kernel_lock.owner_cpu != cur_cpuid()) {
spinlock_lock(&whole_kernel_lock);
}
xizi_enter_kernel();
uint32_t ifs, ifa;
__asm__ __volatile__("mrc p15, 0, %0, c5, c0, 1" : "=r"(ifs)::);
@@ -146,9 +154,6 @@ void iabort_handler(struct trapframe* r)
LOG("prefetch abort at 0x%x, status 0x%x\n", ifa, ifs);
_abort_reason(ifs);
dump_tf(r);
if (is_spinlock_locked(&whole_kernel_lock) && whole_kernel_lock.owner_cpu == cur_cpuid()) {
spinlock_unlock(&whole_kernel_lock);
}
panic("prefetch abort exception\n");
}
}
Ubiquitous/XiZi_AIoT/hardkernel/intr/arm/armv7-a/cortex-a9/imx6q-sabrelite/trap_common.c
+2 -18
View File
@@ -42,15 +42,13 @@ extern void trap_iabort(void);
extern void trap_dabort(void);
extern void trap_irq_enter(void);
extern void trap_undefined_instruction(void);
extern void handle_reserved(void);
extern void handle_fiq(void);
static struct XiziTrapDriver xizi_trap_driver;
void panic(char* s)
{
// xizi_trap_driver.cpu_irq_disable();
if (is_spinlock_locked(&whole_kernel_lock) && whole_kernel_lock.owner_cpu == cur_cpuid()) {
spinlock_unlock(&whole_kernel_lock);
}
KPrintf("panic: %s\n", s);
for (;;)
;
@@ -58,7 +56,6 @@ void panic(char* s)
/* stack for different mode*/
static char mode_stack_pages[NR_CPU][NR_MODE_STACKS][MODE_STACK_SIZE];
extern uint32_t _vector_jumper;
extern uint32_t _vector_start;
extern uint32_t _vector_end;
@@ -73,19 +70,6 @@ void init_cpu_mode_stacks(int cpu_id)
}
}
void handle_reserved(void)
{
// unimplemented trap handler
LOG("Unimplemented Reserved\n");
panic("");
}
void handle_fiq(void)
{
LOG("Unimplemented FIQ\n");
panic("");
}
static void _sys_irq_init(int cpu_id)
{
/* load exception vectors */
Ubiquitous/XiZi_AIoT/hardkernel/intr/arm/armv7-a/cortex-a9/trampoline.S
+35 -87
View File
@@ -95,106 +95,54 @@ trap_irq_enter:
b trap_return
trap_reset_enter:
mov r14, #0
sub r13, r13, #56
str r14, [r13, #52]
str r12, [r13, #48]
str r11, [r13, #44]
str r10, [r13, #40]
str r9, [r13, #36]
str r8, [r13, #32]
str r7, [r13, #28]
str r6, [r13, #24]
str r5, [r13, #20]
str r4, [r13, #16]
str r3, [r13, #12]
str r2, [r13, #8]
str r1, [r13, #4]
str r0, [r13]
mrs r2, spsr
stmfd r13!, {r2}
stmfd r13!, {r14}
stmfd r13, {sp, lr}^
mov r14, #0 // lr: not defined on reset
stmfd r13!, {r0-r12, r14}
mrs r2, spsr // copy spsr to r2
stmfd r13!, {r2} // save r2(spsr) to the stack
stmfd r13!, {r14} // save r14 again (it is not really correct)
stmfd r13, {sp, lr}^ // save user mode sp and lr
sub r13, r13, #8
mov r0, r13
# call traps (trapframe *fp)
mov r0, r13 // copy r13_svc to r0
bl _vector_jumper
trap_dabort:
sub r14, r14, #8
sub r13, r13, #56
str r14, [r13, #52]
str r12, [r13, #48]
str r11, [r13, #44]
str r10, [r13, #40]
str r9, [r13, #36]
str r8, [r13, #32]
str r7, [r13, #28]
str r6, [r13, #24]
str r5, [r13, #20]
str r4, [r13, #16]
str r3, [r13, #12]
str r2, [r13, #8]
str r1, [r13, #4]
str r0, [r13]
mrs r2, spsr
stmfd r13!, {r2}
stmfd r13!, {r14}
stmfd r13, {sp, lr}^
sub r14, r14, #8 // lr: instruction causing the abort
stmfd r13!, {r0-r12, r14}
mrs r2, spsr // copy spsr to r2
stmfd r13!, {r2} // save r2(spsr) to the stack
stmfd r13!, {r14} // save r14 again (it is not really correct)
stmfd r13, {sp, lr}^ // save user mode sp and lr
sub r13, r13, #8
mov r0, r13
# call traps (trapframe *fp)
mov r0, r13 // save trapframe as the first parameter
bl dabort_handler
trap_iabort:
sub r14, r14, #4
sub r13, r13, #56
str r14, [r13, #52]
str r12, [r13, #48]
str r11, [r13, #44]
str r10, [r13, #40]
str r9, [r13, #36]
str r8, [r13, #32]
str r7, [r13, #28]
str r6, [r13, #24]
str r5, [r13, #20]
str r4, [r13, #16]
str r3, [r13, #12]
str r2, [r13, #8]
str r1, [r13, #4]
str r0, [r13]
mrs r2, spsr
stmfd r13!, {r2}
stmfd r13!, {r14}
stmfd r13, {sp, lr}^
sub r14, r14, #4 // lr: instruction causing the abort
stmfd r13!, {r0-r12, r14}
mrs r2, spsr // copy spsr to r2
stmfd r13!, {r2} // save r2(spsr) to the stack
stmfd r13!, {r14} // save r14 again (it is not really correct)
stmfd r13, {sp, lr}^ // save user mode sp and lr
sub r13, r13, #8
mov r0, r13
# call traps (trapframe *fp)
mov r0, r13 // save trapframe as the first parameter
bl iabort_handler
trap_undefined_instruction:
sub r13, r13, #56
str r14, [r13, #52]
str r12, [r13, #48]
str r11, [r13, #44]
str r10, [r13, #40]
str r9, [r13, #36]
str r8, [r13, #32]
str r7, [r13, #28]
str r6, [r13, #24]
str r5, [r13, #20]
str r4, [r13, #16]
str r3, [r13, #12]
str r2, [r13, #8]
str r1, [r13, #4]
str r0, [r13]
mrs r2, spsr
stmfd r13!, {r2}
stmfd r13!, {r14}
stmfd r13, {sp, lr}^
stmfd r13!, {r0-r12, r14}
mrs r2, spsr // copy spsr to r2
stmfd r13!, {r2} // save r2(spsr) to the stack
stmfd r13!, {r14} // save r14 again (it is not really correct)
stmfd r13, {sp, lr}^ // save user mode sp and lr
sub r13, r13, #8
mov r0, r13
# call traps (trapframe *fp)
mov r0, r13 // save trapframe as the first parameter
bl handle_undefined_instruction