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Merge remote-tracking branch 'upstream/prepare_for_master' into prepare_for_master

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This commit is contained in:
TXuian
2022-11-22 08:03:14 -08:00
parent 0d93a91829 164614a75a
commit 1061ce4dff
588 changed files with 231095 additions and 12153 deletions
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Ubiquitous/XiZi_IIoT/board/edu-riscv64/third_party_driver/include/drv_io_config.h
+66 -11
View File
@@ -30,28 +30,28 @@ Modification: add edu-riscv64-board io configure define
#ifndef __DRV_IO_CONFIG_H__
#define __DRV_IO_CONFIG_H__
enum HS_GPIO_CONFIG {
<<<<<<< HEAD enum HS_GPIO_CONFIG {
#ifdef BSP_USING_LCD
LCD_DC_PIN = 0, /* LCD DC PIN */
LCD_DC_PIN = 0, /* LCD DC PIN */
#endif
#ifdef BSP_SPI1_USING_SS0
SPI1_CS0_PIN,
SPI1_CS0_PIN,
#endif
#ifdef BSP_SPI1_USING_SS1
SPI1_CS1_PIN,
SPI1_CS1_PIN,
#endif
#ifdef BSP_SPI1_USING_SS2
SPI1_CS2_PIN,
SPI1_CS2_PIN,
#endif
#ifdef BSP_SPI1_USING_SS3
SPI1_CS3_PIN,
SPI1_CS3_PIN,
#endif
#ifdef BSP_USING_W5500
WIZ_RST_PIN,
WIZ_INT_PIN,
WIZ_RST_PIN, WIZ_INT_PIN,
#endif
GPIO_ALLOC_START /* index of gpio driver start */
};
GPIO_ALLOC_START /* index of gpio driver start */
}
;
#ifdef BSP_USING_CH438
#define FPIOA_CH438_ALE 12
@@ -86,6 +86,60 @@ enum HS_GPIO_CONFIG {
#define FPIOA_SOFT_SPI_MIOS 25
#define FPIOA_SOFT_SPI_MSOI 27
#define FPIOA_SOFT_SPI_NCS 28
======= enum HS_GPIO_CONFIG {
#ifdef BSP_USING_LCD
LCD_DC_PIN = 0, /* LCD DC PIN */
#endif
#ifdef BSP_SPI1_USING_SS0
SPI1_CS0_PIN,
#endif
#ifdef BSP_SPI1_USING_SS1
SPI1_CS1_PIN,
#endif
#ifdef BSP_SPI1_USING_SS2
SPI1_CS2_PIN,
#endif
#ifdef BSP_SPI1_USING_SS3
SPI1_CS3_PIN,
#endif
GPIO_ALLOC_START /* index of gpio driver start */
}
;
#ifdef BSP_USING_CH438
#define FPIOA_CH438_ALE 12
#define FPIOA_CH438_NWR 13
#define FPIOA_CH438_NRD 14
#define FPIOA_CH438_D0 15
#define FPIOA_CH438_D1 16
#define FPIOA_CH438_D2 17
#define FPIOA_CH438_D3 18
#define FPIOA_CH438_D4 19
#define FPIOA_CH438_D5 20
#define FPIOA_CH438_D6 21
#define FPIOA_CH438_D7 22
#define FPIOA_CH438_INT 23
#define BSP_CH438_ALE_PIN 24
#define BSP_CH438_NWR_PIN 25
#define BSP_CH438_NRD_PIN 26
#define BSP_CH438_D0_PIN 27
#define BSP_CH438_D1_PIN 28
#define BSP_CH438_D2_PIN 29
#define BSP_CH438_D3_PIN 30
#define BSP_CH438_D4_PIN 31
#define BSP_CH438_D5_PIN 32
#define BSP_CH438_D6_PIN 33
#define BSP_CH438_D7_PIN 34
#define BSP_CH438_INT_PIN 35
#endif
#ifdef BSP_USING_SOFT_SPI
#define FPIOA_SOFT_SPI_SCK 26
#define FPIOA_SOFT_SPI_MIOS 25
#define FPIOA_SOFT_SPI_MSOI 27
#define FPIOA_SOFT_SPI_NCS 28
>>>>>>> upstream/prepare_for_master
#define BSP_SOFT_SPI_SCK_PIN 26
#define BSP_SOFT_SPI_MIOS_PIN 25
@@ -111,6 +165,7 @@ enum HS_GPIO_CONFIG {
#define BSP_485_DIR_PIN 24
#endif
extern int IoConfigInit(void);
extern int
IoConfigInit(void);
#endif