Start multi cores in imx6q

This commit is contained in:
TXuian
2024-03-13 17:56:49 +08:00
parent 63de0f983c
commit 01f4d45e0c
20 changed files with 2136 additions and 63 deletions
@@ -82,22 +82,22 @@ void handle_fiq(void)
panic("");
}
static void _sys_irq_init()
static void _sys_irq_init(int cpu_id)
{
/* load exception vectors */
volatile uint32_t* vector_base = &_vector_start;
// Set Interrupt handler start address
vector_base[1] = (uint32_t)trap_undefined_instruction; // Undefined Instruction
vector_base[2] = (uint32_t)user_trap_swi_enter; // Software Interrupt
vector_base[3] = (uint32_t)trap_iabort; // Prefetch Abort
vector_base[4] = (uint32_t)trap_dabort; // Data Abort
vector_base[5] = (uint32_t)handle_reserved; // Reserved
vector_base[6] = (uint32_t)trap_irq_enter; // IRQ
vector_base[7] = (uint32_t)handle_fiq; // FIQ
init_cpu_mode_stacks(0);
init_cpu_mode_stacks(cpu_id);
if (cpu_id == 0) {
volatile uint32_t* vector_base = &_vector_start;
// Set Interrupt handler start address
vector_base[1] = (uint32_t)trap_undefined_instruction; // Undefined Instruction
vector_base[2] = (uint32_t)user_trap_swi_enter; // Software Interrupt
vector_base[3] = (uint32_t)trap_iabort; // Prefetch Abort
vector_base[4] = (uint32_t)trap_dabort; // Data Abort
vector_base[5] = (uint32_t)handle_reserved; // Reserved
vector_base[6] = (uint32_t)trap_irq_enter; // IRQ
vector_base[7] = (uint32_t)handle_fiq; // FIQ
}
/* active hardware irq responser */
gic_init();
xizi_trap_driver.switch_hw_irqtbl((uint32_t*)&_vector_jumper);
@@ -240,7 +240,7 @@ static struct XiziTrapDriver xizi_trap_driver = {
struct XiziTrapDriver* hardkernel_intr_init(struct TraceTag* hardkernel_tag)
{
xizi_trap_driver.sys_irq_init();
xizi_trap_driver.sys_irq_init(0);
xizi_trap_driver.cpu_irq_disable();
return &xizi_trap_driver;
}
@@ -21,6 +21,7 @@
#include "assert.h"
#include "spinlock.h"
#include "trap_common.h"
bool module_spinlock_use_intr_init(void)
{
@@ -43,11 +44,11 @@ void spinlock_init(struct spinlock* lock, char* name)
extern int _spinlock_lock(struct spinlock* lock, uint32_t timeout);
void spinlock_lock(struct spinlock* lock)
{
if (lock->owner_cpu != SPINLOCK_STATE_UNLOCK) {
if (lock->owner_cpu != SPINLOCK_STATE_UNLOCK && lock->owner_cpu == cur_cpuid()) {
ERROR("spinlock %s lock double locked by core %d\n", lock->name, lock->owner_cpu);
panic("");
}
assert(_spinlock_lock(lock, SPINLOCK_LOCK_WAITFOREVER) == 0);
_spinlock_lock(lock, SPINLOCK_LOCK_WAITFOREVER);
}
void _spinlock_unlock(struct spinlock* lock);
@@ -85,21 +85,23 @@ void handle_fiq(void)
panic("");
}
static void _sys_irq_init()
static void _sys_irq_init(int cpu_id)
{
/* load exception vectors */
volatile uint32_t* vector_base = &_vector_start;
if (cpu_id == 0) {
/* load exception vectors */
volatile uint32_t* vector_base = &_vector_start;
// Set Interrupt handler start address
vector_base[1] = (uint32_t)trap_undefined_instruction; // Undefined Instruction
vector_base[2] = (uint32_t)user_trap_swi_enter; // Software Interrupt
vector_base[3] = (uint32_t)trap_iabort; // Prefetch Abort
vector_base[4] = (uint32_t)trap_dabort; // Data Abort
vector_base[5] = (uint32_t)handle_reserved; // Reserved
vector_base[6] = (uint32_t)trap_irq_enter; // IRQ
vector_base[7] = (uint32_t)handle_fiq; // FIQ
// Set Interrupt handler start address
vector_base[1] = (uint32_t)trap_undefined_instruction; // Undefined Instruction
vector_base[2] = (uint32_t)user_trap_swi_enter; // Software Interrupt
vector_base[3] = (uint32_t)trap_iabort; // Prefetch Abort
vector_base[4] = (uint32_t)trap_dabort; // Data Abort
vector_base[5] = (uint32_t)handle_reserved; // Reserved
vector_base[6] = (uint32_t)trap_irq_enter; // IRQ
vector_base[7] = (uint32_t)handle_fiq; // FIQ
}
init_cpu_mode_stacks(0);
init_cpu_mode_stacks(cpu_id);
/* active hardware irq responser */
XScuGic_Config* gic_config = XScuGic_LookupConfig(XPAR_PS7_SCUGIC_0_DEVICE_ID);
@@ -59,7 +59,7 @@ struct XiziTrapDriver {
/* current irq number happening in cpu*/
uint32_t curr_int[NR_CPU];
void (*sys_irq_init)();
void (*sys_irq_init)(int);
int (*cur_cpu_id)();
void (*cpu_irq_enable)();