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This commit is contained in:
Liphen 2023-11-23 16:41:27 +08:00
parent fa9c7afce3
commit 54f477b966
1 changed files with 0 additions and 1 deletions
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1
chisel/playground/src/pipeline/writeback/WriteBackUnit.scala
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@ -64,5 +64,4 @@ class WriteBackUnit(implicit val config: CpuConfig) extends Module {
io.regfile(1).wdata io.regfile(1).wdata
) )
} }
io.debug.wb_rf_wen := io.ctrl.allow_to_go
} }