135 lines
4.1 KiB
C
135 lines
4.1 KiB
C
/*
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* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
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* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "los_timer.h"
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#include "los_config.h"
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#include "los_tick.h"
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#include "los_arch_interrupt.h"
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#include "los_context.h"
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#include "los_sched.h"
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#include "los_debug.h"
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typedef struct {
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UINT32 CTRL;
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UINT32 LOAD;
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UINT32 VAL;
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UINT32 CALIB;
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} CORE_TIM_TYPE;
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#define OS_CYCLE_PER_TICK (OS_SYS_CLOCK / LOSCFG_BASE_CORE_TICK_PER_SECOND)
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#define CORE_TIM_BASE (0xE000E010UL)
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#define SysTick ((CORE_TIM_TYPE *)CORE_TIM_BASE)
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#define CORETIM_ENABLE (1UL << 0)
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#define CORETIM_INTMASK (1UL << 1)
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#define CORETIM_SOURCE (1UL << 2)
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#define CORETIM_MODE (1UL << 16)
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#define TIM_INT_NUM 1
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/* ****************************************************************************
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Function : HalTickStart
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Description : Configure Tick Interrupt Start
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Input : none
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output : none
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return : LOS_OK - Success , or LOS_ERRNO_TICK_CFG_INVALID - failed
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**************************************************************************** */
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WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
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{
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if ((OS_SYS_CLOCK == 0) || (LOSCFG_BASE_CORE_TICK_PER_SECOND == 0) ||
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(LOSCFG_BASE_CORE_TICK_PER_SECOND > OS_SYS_CLOCK)) {
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return LOS_ERRNO_TICK_CFG_INVALID;
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}
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g_sysClock = OS_SYS_CLOCK;
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g_cyclesPerTick = OS_CYCLE_PER_TICK;
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SysTick->LOAD = (OS_CYCLE_PER_TICK - 1);
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SysTick->VAL = 0;
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SysTick->CTRL |= (CORETIM_SOURCE | CORETIM_ENABLE | CORETIM_INTMASK);
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VIC_REG->IWER[0] = 0x1 << TIM_INT_NUM;
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#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
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#if (OS_HWI_WITH_ARG == 1)
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OsSetVector(TIM_INT_NUM, (HWI_PROC_FUNC)handler, NULL);
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#else
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OsSetVector(TIM_INT_NUM, (HWI_PROC_FUNC)handler);
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#endif
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#endif
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return LOS_OK;
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}
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WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
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{
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SysTick->CTRL &= ~CORETIM_ENABLE;
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SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */
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SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
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SysTick->CTRL |= CORETIM_ENABLE;
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}
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WEAK UINT64 HalGetTickCycle(UINT32 *period)
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{
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UINT32 hwCycle;
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UINT32 intSave = LOS_IntLock();
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*period = SysTick->LOAD;
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hwCycle = *period - SysTick->VAL;
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LOS_IntRestore(intSave);
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return (UINT64)hwCycle;
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}
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WEAK VOID HalTickLock(VOID)
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{
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SysTick->CTRL &= ~CORETIM_ENABLE;
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}
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WEAK VOID HalTickUnlock(VOID)
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{
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SysTick->CTRL |= CORETIM_ENABLE;
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}
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VOID Wfi(VOID)
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{
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__asm__ volatile("wait");
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}
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VOID Dsb(VOID)
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{
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__asm__ volatile("sync" : : : "memory");
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}
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UINT32 HalEnterSleep(VOID)
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{
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Dsb();
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Wfi();
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return LOS_OK;
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}
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