230 lines
7.1 KiB
ArmAsm
230 lines
7.1 KiB
ArmAsm
/*
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* Copyright (c) 2021 Nuclei Limited. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice, this list of
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* conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice, this list
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* of conditions and the following disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
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* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "riscv_encoding.h"
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#ifndef __riscv_32e
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#define portRegNum 30
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#else
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#define portRegNum 14
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#endif
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#define portCONTEXT_SIZE ( portRegNum * REGBYTES )
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.section .text
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.align 4
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.type HalIntLock, %function
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.global HalIntLock
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HalIntLock:
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csrr a0, mstatus // return value
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li t0, MSTATUS_MIE // mie
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csrrc zero, mstatus, t0
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ret
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.type HalIntUnLock, %function
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.global HalIntUnLock
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HalIntUnLock:
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csrr a0, mstatus // return value
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li t0, MSTATUS_MIE // mie
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csrrs zero, mstatus, t0
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ret
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.type HalIntRestore, %function
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.global HalIntRestore
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HalIntRestore:
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csrw mstatus, a0
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ret
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/* Start the first task. This also clears the bit that indicates the FPU is
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in use in case the FPU was used before the scheduler was started - which
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would otherwise result in the unnecessary leaving of space in the stack
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for lazy saving of FPU registers. */
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.type HalStartToRun, %function
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.global HalStartToRun
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.align 3
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HalStartToRun:
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/* Setup Interrupt Stack using
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The stack that was used by main()
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before the scheduler is started is
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no longer required after the scheduler is started.
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Interrupt stack pointer is stored in CSR_MSCRATCH */
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la t0, _sp
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csrw CSR_MSCRATCH, t0
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/* get stack pointer */
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la t0, g_losTask
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LOAD t1, 0x0(t0)
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LOAD sp, 0(t1)
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//LOAD sp, 0x0(sp) /* Read sp from first TCB member */
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/* Pop PC from stack and set MEPC */
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LOAD t0, 0 * REGBYTES(sp)
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csrw CSR_MEPC, t0
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/* Pop mstatus from stack and set it */
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LOAD t0, (portRegNum - 1) * REGBYTES(sp)
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csrw CSR_MSTATUS, t0
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/* Interrupt still disable here */
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/* Restore Registers from Stack */
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LOAD x1, 1 * REGBYTES(sp) /* RA */
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LOAD x5, 2 * REGBYTES(sp)
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LOAD x6, 3 * REGBYTES(sp)
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LOAD x7, 4 * REGBYTES(sp)
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LOAD x8, 5 * REGBYTES(sp)
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LOAD x9, 6 * REGBYTES(sp)
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LOAD x10, 7 * REGBYTES(sp)
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LOAD x11, 8 * REGBYTES(sp)
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LOAD x12, 9 * REGBYTES(sp)
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LOAD x13, 10 * REGBYTES(sp)
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LOAD x14, 11 * REGBYTES(sp)
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LOAD x15, 12 * REGBYTES(sp)
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#ifndef __riscv_32e
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LOAD x16, 13 * REGBYTES(sp)
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LOAD x17, 14 * REGBYTES(sp)
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LOAD x18, 15 * REGBYTES(sp)
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LOAD x19, 16 * REGBYTES(sp)
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LOAD x20, 17 * REGBYTES(sp)
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LOAD x21, 18 * REGBYTES(sp)
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LOAD x22, 19 * REGBYTES(sp)
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LOAD x23, 20 * REGBYTES(sp)
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LOAD x24, 21 * REGBYTES(sp)
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LOAD x25, 22 * REGBYTES(sp)
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LOAD x26, 23 * REGBYTES(sp)
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LOAD x27, 24 * REGBYTES(sp)
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LOAD x28, 25 * REGBYTES(sp)
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LOAD x29, 26 * REGBYTES(sp)
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LOAD x30, 27 * REGBYTES(sp)
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LOAD x31, 28 * REGBYTES(sp)
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#endif
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addi sp, sp, portCONTEXT_SIZE
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mret
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.extern HalTaskSwitch
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.align 2
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.global eclic_msip_handler
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eclic_msip_handler:
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addi sp, sp, -portCONTEXT_SIZE
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STORE x1, 1 * REGBYTES(sp) /* RA */
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STORE x5, 2 * REGBYTES(sp)
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STORE x6, 3 * REGBYTES(sp)
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STORE x7, 4 * REGBYTES(sp)
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STORE x8, 5 * REGBYTES(sp)
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STORE x9, 6 * REGBYTES(sp)
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STORE x10, 7 * REGBYTES(sp)
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STORE x11, 8 * REGBYTES(sp)
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STORE x12, 9 * REGBYTES(sp)
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STORE x13, 10 * REGBYTES(sp)
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STORE x14, 11 * REGBYTES(sp)
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STORE x15, 12 * REGBYTES(sp)
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#ifndef __riscv_32e
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STORE x16, 13 * REGBYTES(sp)
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STORE x17, 14 * REGBYTES(sp)
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STORE x18, 15 * REGBYTES(sp)
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STORE x19, 16 * REGBYTES(sp)
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STORE x20, 17 * REGBYTES(sp)
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STORE x21, 18 * REGBYTES(sp)
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STORE x22, 19 * REGBYTES(sp)
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STORE x23, 20 * REGBYTES(sp)
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STORE x24, 21 * REGBYTES(sp)
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STORE x25, 22 * REGBYTES(sp)
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STORE x26, 23 * REGBYTES(sp)
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STORE x27, 24 * REGBYTES(sp)
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STORE x28, 25 * REGBYTES(sp)
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STORE x29, 26 * REGBYTES(sp)
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STORE x30, 27 * REGBYTES(sp)
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STORE x31, 28 * REGBYTES(sp)
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#endif
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/* Push mstatus to stack */
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csrr t0, CSR_MSTATUS
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STORE t0, (portRegNum - 1) * REGBYTES(sp)
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/* Push additional registers */
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/* Store sp to task stack */
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la t0, g_losTask
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LOAD t0, 0(t0)
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STORE sp, 0(t0)
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csrr t0, CSR_MEPC
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STORE t0, 0(sp)
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/* Switch task context */
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jal HalTaskSwitch
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/* Load new task */
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la t0, g_losTask
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LOAD t0, 0(t0)
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LOAD sp, 0x0(t0) /* Read sp from first TCB member */
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/* Pop PC from stack and set MEPC */
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LOAD t0, 0 * REGBYTES(sp)
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csrw CSR_MEPC, t0
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/* Pop additional registers */
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/* Pop mstatus from stack and set it */
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LOAD t0, (portRegNum - 1) * REGBYTES(sp)
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csrw CSR_MSTATUS, t0
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/* Interrupt still disable here */
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/* Restore Registers from Stack */
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LOAD x1, 1 * REGBYTES(sp) /* RA */
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LOAD x5, 2 * REGBYTES(sp)
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LOAD x6, 3 * REGBYTES(sp)
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LOAD x7, 4 * REGBYTES(sp)
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LOAD x8, 5 * REGBYTES(sp)
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LOAD x9, 6 * REGBYTES(sp)
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LOAD x10, 7 * REGBYTES(sp)
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LOAD x11, 8 * REGBYTES(sp)
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LOAD x12, 9 * REGBYTES(sp)
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LOAD x13, 10 * REGBYTES(sp)
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LOAD x14, 11 * REGBYTES(sp)
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LOAD x15, 12 * REGBYTES(sp)
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#ifndef __riscv_32e
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LOAD x16, 13 * REGBYTES(sp)
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LOAD x17, 14 * REGBYTES(sp)
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LOAD x18, 15 * REGBYTES(sp)
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LOAD x19, 16 * REGBYTES(sp)
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LOAD x20, 17 * REGBYTES(sp)
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LOAD x21, 18 * REGBYTES(sp)
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LOAD x22, 19 * REGBYTES(sp)
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LOAD x23, 20 * REGBYTES(sp)
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LOAD x24, 21 * REGBYTES(sp)
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LOAD x25, 22 * REGBYTES(sp)
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LOAD x26, 23 * REGBYTES(sp)
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LOAD x27, 24 * REGBYTES(sp)
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LOAD x28, 25 * REGBYTES(sp)
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LOAD x29, 26 * REGBYTES(sp)
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LOAD x30, 27 * REGBYTES(sp)
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LOAD x31, 28 * REGBYTES(sp)
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#endif
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addi sp, sp, portCONTEXT_SIZE
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mret
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