Commit Graph

31 Commits

Author SHA1 Message Date
wanghao-free
4e1dd7d7b4 wanghao453@huawei.com
Signed-off-by: wanghao-free <wanghao453@huawei.com>
2021-09-01 18:53:04 -07:00
Guangyao Ma
31efd1ec5d fix: delete unused code
Close #I3VOGX

Change-Id: I9e83ddcd304a04d86dabbb6f2a2b7b27c93212bd
Signed-off-by: Guangyao Ma <guangyao.ma@outlook.com>
2021-06-15 20:52:54 +08:00
Caoruihong
94d906094c feat: optimize Hal<Set/Get>Rtc<Time/Timezone> APIs
【背景】release分支的时间功能相关api未实现
【修改方案】实现通用的时间api接口
【影响】无

Change-Id: I2ba4b2d05c59f6c7532526fff0f2587b5b6719f0
Signed-off-by: zhangguang <jean.zhangguang@huawei.com>
2021-06-15 17:14:17 +08:00
Guangyao Ma
b91d6a3704 style: align with first param line
Change-Id: Ifc14322a05a624d5c24ef4dca25c1ad7299aeed1
2021-04-23 17:23:45 +08:00
金永生
bc31d46e42 fix:pendsv trigger for cortex-m SOC:some cpu will not enter pendsv when set the flag,and we need dsb and isb to fix this 2021-03-24 15:47:54 +08:00
YOUR_NAME
70ebb57f28 Fix CodingStyle.
Change-Id: Ib76b61c7f22b8a978a4f36e398198f2e8ec0507b
2021-03-23 16:02:05 +08:00
YOUR_NAME
34c82ccd64 Add exc dump.
Change-Id: Ie3b925f89a01ade5f4a4fae6ff2eff94d97176da
2021-03-22 16:33:38 +08:00
mamingshuai
778c8b9930 update openharmony 1.0.1 2021-03-11 20:30:40 +08:00
openharmony_ci
c343c46b91 !21 添加cortex-m4的gcc 编译支持
Merge pull request !21 from 候鹏飞/master
2021-02-05 14:16:14 +08:00
huangjieliang
25b432927c Description: Sync liteos_m to OpenHarmony.
Reviewed-by: likailong
2021-01-30 18:05:13 +08:00
c00546070
0df84c9ff1 Description: add cortex-m33 for rtl8720
Reviewed-by: shenwei
2021-01-29 17:28:45 +08:00
候鹏飞
867e7fb566 add cortex-m4 gcc 2021-01-28 16:10:21 +08:00
Caoruihong
c3a34f1b79 Description: add posix api for liteos_m
Reviewed-by: likailong

Change-Id: I4f83c38d201ce6efe214509958c346aa9e542155
2021-01-21 23:47:21 +08:00
zhushengle
e12055cfcc 修复CPUP编译失败问题 2021-01-20 11:07:55 +08:00
zhushengle
282f64c9eb Description:support for RISCV unaligned access to exception handling extensions.
Reviewed-by:likailong
2021-01-15 12:15:34 +08:00
openharmony_ci
0c14e12d34 !15 通过寄存器CPACR判断FPU是否使能
Merge pull request !15 from likailong/master
2021-01-11 22:06:35 +08:00
likailong
a13512eefe Description: 2021-01-11 20:53:14 +08:00
openharmony_ci
a4c14e1614 !13 支持使用默认中断矢量寄存器地址
Merge pull request !13 from likailong/master
2021-01-11 18:43:34 +08:00
likailong
c766d49a4d Description: support original vector base address
Reviewed-by: shenwei
2021-01-11 11:04:40 +08:00
zhushengle
6252cad79b update kernel/arch/risc-v/asm/soc_common.h. 2021-01-09 16:08:14 +08:00
likailong
5cee04fb0c Description: support original vector base address
Reviewed-by: shenwei
2021-01-08 19:04:35 +08:00
likailong
992410db46 Description: fix float-abi=soft bug
Reviewed-by: shenwei
2021-01-08 08:50:29 +08:00
lixilun
f4d93476d6 Description: Port NUCLEO-F767ZI as an example.
Reviewed-by: likailong

Change-Id: I13482a4d1933de607c4782f71cf285c6602ee1db
2021-01-07 14:59:06 +08:00
zhushengle
df9dc72e45 Description:The interrupt handling interface supports multiple architectures.
Reviewed-by:likailong

Change-Id: I9d6e40f6889ff6a8e3de2054b979b8dece3584a5
2020-12-31 16:24:40 +08:00
lixilun@huawei.com
87dc04812d Description: Port Cortex-M7
Reviewed-by: Likailong

Change-Id: I10bd6fc60111c3059fcc5b4d0d36d13790e5b73d
2020-12-23 02:36:06 +00:00
Caoruihong
1405111aa9 Description: refactor
Reviewed-by: likailong
2020-12-16 17:30:08 +08:00
zhushengle
64c784bb46 move riscv32 qemu form liteos_m to /device/qemu 2020-12-10 17:48:32 +08:00
likailong
72c4acf01e Description: liteos-m refactoring
Reviewed-by: wangmihu, zhushengle
2020-12-02 19:40:34 +08:00
zhushengle
82082fc0e6 Description:Liteos_m Support risc-v
Reviewed-by:likailong, zhangfanfan
2020-11-27 15:20:02 +08:00
l00278955
07d25a8ae8 Description: liteos-m refactoring
Reviewed-by: liulei, shenwei

Change-Id: I7baba352c02b78aefc81fc5eca000d840d3b2fe3
2020-11-13 09:55:39 +08:00
wenjun
dc16ffa8cb add OpenHarmony 1.0 baseline 2020-09-08 16:46:24 +08:00