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feature:M核安全隔离

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新增用户态，上层业务进行box隔离，共享C库

Signed-off-by: arvinzzz <zhaotianyu9@huawei.com>
Change-Id: Ib6ecc3fcb230a7539f9e0f3663290900198d2ba9
This commit is contained in:
arvinzzz
2022-02-25 15:24:30 +08:00
parent 36887d467d
commit fb76350771
22 changed files with 1038 additions and 41 deletions
Download Patch File Download Diff File Expand all files Collapse all files

25
arch/arm/cortex-m4/gcc/los_arch_context.h
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@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
* Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -121,6 +121,29 @@ typedef struct TagTskContext {
*/
extern VOID HalStartToRun(VOID);
#if (LOSCFG_SECURE == 1)
/**
* @ingroup los_config
* @brief: User Task Stack Initialize.
*
* @par Description:
* This API is used to init a user task stack.
*
* @attention:
* <ul><li>None.</li></ul>
*
* @param: context [IN] Task context.
* @param: taskEntry [IN] Task entry function address.
* @param: stack [IN] Task stack address.
*
* @retval None.
*
* @par Dependency: <ul><li>los_config.h: the header file that contains the API declaration.</li></ul>
* @see None.
*/
extern VOID HalUserTaskStackInit(TaskContext *context, UINTPTR taskEntry, UINTPTR stack);
#endif
#ifdef __cplusplus
#if __cplusplus
}

9
arch/arm/cortex-m4/gcc/los_context.c
View File

@@ -148,6 +148,15 @@ VOID *ArchSignalContextInit(VOID *stackPointer, VOID *stackTop, UINTPTR sigHandl
return (VOID *)context;
}
#if (LOSCFG_SECURE == 1)
VOID HalUserTaskStackInit(TaskContext *context, UINTPTR taskEntry, UINTPTR stack)
{
context->uwR0 = stack;
context->uwPC = (UINT32)taskEntry;
context->uwxPSR = 0x01000000L; /* Thumb flag, always set 1 */
}
#endif
LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID)
{
(VOID)LOS_IntLock();

20
arch/arm/cortex-m4/gcc/los_dispatch.S
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
* Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -40,6 +40,12 @@
.equ OS_NVIC_PENDSV_PRI, 0xF0F00000
.equ OS_NVIC_PENDSVSET, 0x10000000
.equ OS_TASK_STATUS_RUNNING, 0x0010
.equ OS_CONTROL_FPCA_ENABLE, 0x4
.equ OS_CONTROL_KERNEL_MODE, 0x2
#if (LOSCFG_SECURE == 1)
.equ OS_CONTROL_USER_MODE, 0x3
.equ OS_TASK_FLAG_USER_TASK, 0x0200
#endif
.section .text
.thumb
@@ -63,7 +69,7 @@ HalStartToRun:
ldr r5, =OS_NVIC_PENDSV_PRI
str r5, [r4]
mov r0, #2
mov r0, #OS_CONTROL_KERNEL_MODE
msr CONTROL, r0
ldr r1, =g_losTask
@@ -141,7 +147,7 @@ ArchTaskSchedule:
bx lr
dsb
isb
.fnend
.fnend
.type HalPendSV, %function
.global HalPendSV
@@ -194,6 +200,14 @@ SignalContextRestore:
vldmia r1!, {d8-d15}
__DisabledFPU2:
#if (LOSCFG_SECURE == 1)
ldrh r7, [r0, #4]
tst r7, #OS_TASK_FLAG_USER_TASK
ite eq
moveq r3, #OS_CONTROL_KERNEL_MODE
movne r3, #OS_CONTROL_USER_MODE
msr CONTROL, r3
#endif
ldmfd r1!, {r4-r12}
msr psp, r1

51
arch/arm/cortex-m4/gcc/los_exc.S
View File

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
* Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
* Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
@@ -57,15 +57,15 @@
.equ FLAG_ADDR_VALID, 0x10000
.equ FLAG_HWI_ACTIVE, 0x20000
.equ FLAG_NO_FLOAT, 0x10000000
.equ FLAG_NO_FLOAT, 0x10000000
.equ OS_NVIC_FSR , 0xE000ED28 //include BusFault/MemFault/UsageFault State Register
.equ OS_NVIC_HFSR , 0xE000ED2C //HardFault State Register
.equ OS_NVIC_BFAR , 0xE000ED38
.equ OS_NVIC_MMAR , 0xE000ED34
.equ OS_NVIC_ACT_BASE , 0xE000E300
.equ OS_NVIC_SHCSRS , 0xE000ED24
.equ OS_NVIC_SHCSR_MASK , 0xC00
.equ OS_NVIC_FSR, 0xE000ED28 //include BusFault/MemFault/UsageFault State Register
.equ OS_NVIC_HFSR, 0xE000ED2C //HardFault State Register
.equ OS_NVIC_BFAR, 0xE000ED38
.equ OS_NVIC_MMAR, 0xE000ED34
.equ OS_NVIC_ACT_BASE, 0xE000E300
.equ OS_NVIC_SHCSRS, 0xE000ED24
.equ OS_NVIC_SHCSR_MASK, 0xC00
.type HalExcNMI, %function
.global HalExcNMI
@@ -155,10 +155,25 @@ HalExcSvcCall:
.cantunwind
TST LR, #0x4
ITE EQ
MRSEQ R0, MSP
MRSNE R0, PSP
LDR R1, [R0,#24]
LDRB R0, [R1,#-2]
MRSEQ R1, MSP
BNE _svcCallFromPsp
B _svcCall
_svcCallFromPsp:
#ifdef LOSCFG_SECURE
PUSH {R0-R12, LR}
MOV R0, SP
CPSIE I
BL OsSyscallHandle
CPSID I
MRS R12, PSP
STM R12, {R0-R1}
POP {R0-R12, LR}
BX LR
#endif
MRS R1, PSP
_svcCall:
LDR R0, [R1,#24]
LDRB R0, [R0,#-2]
MOV R1, #0
B osExcDispatch
.fnend
@@ -284,7 +299,7 @@ _ExcInMSP:
PUSH {R4-R12} // store message-->exc: {R4-R12}
VPUSH {D8-D15} // FPU
B _handleEntry
.fnend
.fnend
.type _NoFloatInMsp, %function
.global _NoFloatInMsp
@@ -298,7 +313,7 @@ _NoFloatInMsp:
PUSH {R4-R12} // store message-->exc: {R4-R12}
ORR R0, R0, #FLAG_NO_FLOAT
B _handleEntry
.fnend
.fnend
.type _hwiActiveCheckNext, %function
.global _hwiActiveCheckNext
@@ -347,7 +362,7 @@ _hwiActiveCheckNext:
VSTMDB R2!, {D8-D15} // FPU
STMFD R2!, {R4-R11}
B _handleEntry
.fnend
.fnend
.type _NoFloatInPsp, %function
.global _NoFloatInPsp
@@ -367,7 +382,7 @@ _NoFloatInPsp:
LDMFD R3, {R4-R11} // R4-R11 store PSP reg(auto push when exc in task)
STMFD R2!, {R4-R11}
ORR R0, R0, #FLAG_NO_FLOAT
.fnend
.fnend
.type _handleEntry, %function
.global _handleEntry
@@ -380,4 +395,4 @@ _handleEntry:
B HalExcHandleEntry
NOP
.fnend
.fnend

4
arch/arm/cortex-m7/gcc/los_dispatch.S
View File

@@ -137,7 +137,7 @@ ArchTaskSchedule:
dsb
isb
bx lr
.fnend
.fnend
.type HalPendSV, %function
.global HalPendSV
@@ -178,7 +178,7 @@ TaskContextSwitch:
str r0, [r5]
ldr r1, [r0]
SignalContextRestore:
SignalContextRestore:
#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined(__FPU_USED) && (__FPU_USED == 1U)))
vldmia r1!, {d8-d15}

16
arch/arm/cortex-m7/gcc/los_exc.S
View File

@@ -29,9 +29,9 @@
* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
.syntax unified
.arch armv7e-m
.thumb
.syntax unified
.arch armv7e-m
.thumb
.fpu fpv5-d16
.section .text
@@ -284,7 +284,7 @@ _ExcInMSP:
PUSH {R4-R12} // store message-->exc: {R4-R12}
VPUSH {D8-D15}
B _handleEntry
.fnend
.fnend
.type _NoFloatInMsp, %function
.global _NoFloatInMsp
@@ -298,7 +298,7 @@ _NoFloatInMsp:
PUSH {R4-R12} // store message-->exc: {R4-R12}
ORR R0, R0, #FLAG_NO_FLOAT
B _handleEntry
.fnend
.fnend
.type _hwiActiveCheckNext, %function
.global _hwiActiveCheckNext
@@ -347,7 +347,7 @@ _hwiActiveCheckNext:
VSTMDB R2!, {D8-D15}
STMFD R2!, {R4-R11}
B _handleEntry
.fnend
.fnend
.type _NoFloatInPsp, %function
.global _NoFloatInPsp
@@ -367,7 +367,7 @@ _NoFloatInPsp:
LDMFD R3, {R4-R11} // R4-R11 store PSP reg(auto push when exc in task)
STMFD R2!, {R4-R11}
ORR R0, R0, #FLAG_NO_FLOAT
.fnend
.fnend
.type _handleEntry, %function
.global _handleEntry
@@ -380,5 +380,5 @@ _handleEntry:
B HalExcHandleEntry
NOP
.fnend
.fnend