diff --git a/kernel/arch/risc-v/include/los_exc.h b/kernel/arch/risc-v/include/los_exc.h new file mode 100644 index 00000000..05c6932e --- /dev/null +++ b/kernel/arch/risc-v/include/los_exc.h @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _LOS_EXC_H +#define _LOS_EXC_H + +#include "los_hw.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif /* __cplusplus */ + +extern VOID LOS_Panic(const CHAR *fmt, ...); +extern VOID OsBackTrace(VOID); +extern VOID OsTaskBackTrace(UINT32 taskID); + +STATIC INLINE UINTPTR GetFp(VOID) +{ + UINTPTR fpSave = 0; + __asm__ __volatile__("mv %0, s0" : "=r"(fpSave)); + return fpSave; +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif diff --git a/kernel/arch/risc-v/include/los_hw.h b/kernel/arch/risc-v/include/los_hw.h new file mode 100644 index 00000000..68864d52 --- /dev/null +++ b/kernel/arch/risc-v/include/los_hw.h @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _LOS_HW_H +#define _LOS_HW_H + +#include "los_typedef.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +/** + * @ingroup los_hw + * The initialization value of stack space. + */ +#define EMPTY_STACK 0xCACA + +/** + * @ingroup los_hw + * Check task schedule. + */ +#define LOS_CHECK_SCHEDULE ((!g_losTaskLock) && (!OS_INT_ACTIVE)) + +/** + * @ingroup los_hw + * @brief Wait for interrupt. + * + * @par Description: + * + * @attention None. + * + * @param None. + * + * @retval: None. + * + * @par Dependency: + * los_hw.h: the header file that contains the API declaration. + * @see None. + * @since Huawei LiteOS V200R002C00 + */ +extern VOID wfi(VOID); + +/** + * @ingroup los_hw + * @brief: mem fence function. + * + * @par Description: + * This API is used to fence for memory. + * + * @attention: + * + * + * @param: None. + * + * @retval:None. + * @par Dependency: + * + * @see None. + * @since Huawei LiteOS V200R002C00 + */ +extern VOID mb(VOID); + +/** + * @ingroup los_hw + * @brief: mem fence function. + * + * @par Description: + * This API is same as mb, it just for adaptation. + * + * @attention: + * + * + * @param: None. + * + * @retval:None. + * @par Dependency: + * + * @see None. + * @since Huawei LiteOS V200R002C00 + */ +extern VOID dsb(VOID); + +extern VOID LOS_GetCpuCycle(UINT32 *cntHi, UINT32 *cntLo); +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _LOS_HW_H */ diff --git a/kernel/arch/risc-v/include/los_hwi.h b/kernel/arch/risc-v/include/los_hwi.h new file mode 100644 index 00000000..824b4cfd --- /dev/null +++ b/kernel/arch/risc-v/include/los_hwi.h @@ -0,0 +1,386 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _LOS_HWI_H +#define _LOS_HWI_H + +#include "securec.h" +#include "los_printf.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +/** + * @ingroup los_hwi + * Define the type of a hardware interrupt number. + */ +typedef UINT32 HWI_HANDLE_T; + +/** + * @ingroup los_hwi + * Define the type of a hardware interrupt priority. + */ +typedef UINT16 HWI_PRIOR_T; + +/** + * @ingroup los_hwi + * Define the type of hardware interrupt mode configurations. + */ +typedef UINT16 HWI_MODE_T; + +/** + * @ingroup los_hwi + * Define the type of the parameter used for the hardware interrupt creation function. + * The function of this parameter varies among platforms. + */ +typedef UINT32 HWI_ARG_T; + +/** + * @ingroup los_hwi + * Define the type of a hardware interrupt handling function. + */ +typedef VOID (*HWI_PROC_FUNC)(UINTPTR); + +/** + * @ingroup los_hwi + * Define the type of a hardware interrupt vector table function. + */ +typedef VOID (**HWI_VECTOR_FUNC)(VOID); + +/* + * These flags used only by the kernel as part of the + * irq handling routines. + * + * IRQF_SHARED - allow sharing the irq among several devices + */ +#define IRQF_SHARED 0x8000 + +/** + * @ingroup los_hwi + * Define the type of a hardware interrupt vector table function. + */ +typedef struct tagHwiHandleForm { + HWI_PROC_FUNC pfnHook; + HWI_ARG_T uwParam; + UINTPTR uwreserved; +} HWI_HANDLE_FORM_S; + +typedef UINTPTR HWI_IRQ_PARAM_S; + +extern UINT32 g_intCount; + +/** + * @ingroup los_hwi + * An interrupt is active. + */ +#define OS_INT_ACTIVE (g_intCount > 0) + +/** + * @ingroup los_hwi + * An interrupt is inactive. + */ +#define OS_INT_INACTIVE (!(OS_INT_ACTIVE)) + +/** + * @ingroup los_hwi + * Hardware interrupt error code: Invalid interrupt number. + * + * Value: 0x02000900 + * + * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable + * for a risc-v platform is [0, OS_RISCV_VECTOR_CNT]. + */ +#define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) + +/** + * @ingroup los_hwi + * Hardware interrupt error code: Null hardware interrupt handling function. + * + * Value: 0x02000901 + * + * Solution: Pass in a valid non-null hardware interrupt handling function. + */ +#define OS_ERRNO_HWI_PROC_FUNC_NULL LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x01) + +/** + * @ingroup los_hwi + * Hardware interrupt error code: Insufficient interrupt resources for hardware interrupt creation. + * + * Value: 0x02000902 + * + * Solution: Increase the configured maximum number of supported hardware interrupts. + */ +#define OS_ERRNO_HWI_CB_UNAVAILABLE LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x02) + +/** + * @ingroup los_hwi + * Hardware interrupt error code: Insufficient memory for hardware interrupt initialization. + * + * Value: 0x02000903 + * + * Solution: Expand the configured memory. + */ +#define OS_ERRNO_HWI_NO_MEMORY LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x03) + +/** + * @ingroup los_hwi + * Hardware interrupt error code: The interrupt has already been created. + * + * Value: 0x02000904 + * + * Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created. + */ +#define OS_ERRNO_HWI_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x04) + +/** + * @ingroup los_hwi + * Hardware interrupt error code: Invalid interrupt priority. + * + * Value: 0x02000905 + * + * Solution: Ensure that the interrupt priority is valid. + */ +#define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) + +/** + * @ingroup los_hwi + * Hardware interrupt error code: Incorrect interrupt creation mode. + * + * Value: 0x02000906 + * + * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the + * value can be 0 or 1. + */ +#define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) + +/** + * @ingroup los_hwi + * Hardware interrupt error code: The interrupt has already been created as a fast interrupt. + * + * Value: 0x02000907 + * + * Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created. + */ +#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07) + +/** + * @ingroup los_hwi + * Hardware interrupt error code: The API is called during an interrupt, which is forbidden. + * + * Value: 0x02000908 + * + * * Solution: Do not call the API during an interrupt. + */ +#define OS_ERRNO_HWI_INTERR LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x08) + +/** + * @ingroup los_hwi + * Hardware interrupt error code:the hwi support SHARED error. + * + * Value: 0x02000909 + * + * * Solution:check the input params hwiMode and irqParam of LOS_HwiCreate or LOS_HwiDelete whether adapt the current + * hwi. + */ +#define OS_ERRNO_HWI_SHARED_ERROR LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x09) + +/** + * @ingroup los_hwi + * Hardware interrupt error code:Invalid interrupt Arg when interrupt mode is IRQF_SHARED. + * + * Value: 0x0200090a + * + * * Solution:check the interrupt Arg, Arg should not be NULL and pDevId should not be NULL. + */ +#define OS_ERRNO_HWI_ARG_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x0a) + +/** + * @ingroup los_hwi + * Hardware interrupt error code:The interrupt corresponded to the hwi number or devid has not been created. + * + * Value: 0x0200090b + * + * * Solution:check the hwi number or devid, make sure the hwi number or devid need to delete. + */ +#define OS_ERRNO_HWI_HWINUM_UNCREATE LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x0b) + +/** + * @ingroup los_hwi + * @brief Create a hardware interrupt. + * + * @par Description: + * This API is used to configure a hardware interrupt and register a hardware interrupt handling function. + * + * @attention + * + * + * @param hwiNum [IN] Type#HWI_HANDLE_T: hardware interrupt number. The value range applicable for a riscv + * platform is [0, OS_HWI_MAX_NUM]. + * @param hwiPrio [IN] Type#HWI_PRIOR_T: hardware interrupt priority. Ignore this parameter temporarily. + * @param hwiMode [IN] Type#HWI_MODE_T: hardware interrupt mode. Ignore this parameter temporarily. + * @param hwiHandler [IN] Type#HWI_PROC_FUNC: interrupt handler used when a hardware interrupt is triggered. + * @param irqParam [IN] Type#HWI_IRQ_PARAM_S: input parameter of the interrupt handler used when a hardware + * interrupt is triggered. + * + * @retval #OS_ERRNO_HWI_PROC_FUNC_NULL 0x02000901: Null hardware interrupt handling function. + * @retval #OS_ERRNO_HWI_NUM_INVALID 0x02000900: Invalid interrupt number. + * @retval #OS_ERRNO_HWI_NO_MEMORY 0x02000903: Insufficient memory for hardware interrupt creation. + * @retval #OS_ERRNO_HWI_ALREADY_CREATED 0x02000904: The interrupt handler being created has already been + * created. + * @retval #LOS_OK 0 : The interrupt is successfully created. + * @par Dependency: + * + * @see None. + * @since Huawei LiteOS V200R003C00 + */ +extern UINT32 LOS_HwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T hwiMode, + HWI_PROC_FUNC hwiHandler, + HWI_IRQ_PARAM_S irqParam); + +/** + * @ingroup los_hwi + * @brief Enable all interrupts. + * + * @par Description: + * + * @attention + * + * + * @param None. + * + * @retval CPSR value obtained after all interrupts are enabled. + * @par Dependency: + * + * @see LOS_IntRestore + * @since Huawei LiteOS V200R003C00 + */ +extern UINT32 LOS_IntUnLock(VOID); + +/** + * @ingroup los_hwi + * @brief Disable all interrupts. + * + * @par Description: + * + * @attention + * + * + * @param None. + * + * @retval CPSR value obtained before all interrupts are disabled. + * @par Dependency: + * + * @see LOS_IntRestore + * @since Huawei LiteOS V200R003C00 + */ +extern UINT32 LOS_IntLock(VOID); + +/** + * @ingroup los_hwi + * @brief Restore interrupts. + * + * @par Description: + * + * @attention + * + * + * @param intSave [IN] CPSR value obtained before all interrupts are disabled. + * + * @retval None. + * @par Dependency: + * + * @see LOS_IntLock + * @since Huawei LiteOS V200R003C00 + */ +extern VOID LOS_IntRestore(UINT32 intSave); + +/** + * @ingroup los_hwi + * @brief Delete hardware interrupt. + * + * @par Description: + * This API is used to delete hardware interrupt. + * + * @attention + * + * + * @param hwiNum [IN] Type#HWI_HANDLE_T: hardware interrupt number. The value range applicable for a riscv + * platform is [0, OS_HWI_MAX_NUM]. + * @param irqParam [IN] Type#HWI_IRQ_PARAM_S: id of hardware interrupt which will base on when delete the hardware + * interrupt. + * + * @retval #OS_ERRNO_HWI_NUM_INVALID 0x02000900: Invalid interrupt number. + * @retval #LOS_OK 0: The interrupt is successfully delete. + * @par Dependency: + * + * @see None. + * @since Huawei LiteOS V200R003C00 + */ +extern UINT32 LOS_HwiDelete(HWI_HANDLE_T hwiNum, HWI_IRQ_PARAM_S irqParam); + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _LOS_HWI_H */ diff --git a/kernel/arch/risc-v/rvm32/include/asm/soc_common.h b/kernel/arch/risc-v/rvm32/include/asm/soc_common.h new file mode 100644 index 00000000..2ee43029 --- /dev/null +++ b/kernel/arch/risc-v/rvm32/include/asm/soc_common.h @@ -0,0 +1,112 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _SOC_COMMON_H +#define _SOC_COMMON_H + +#define LREG lw +#define SREG sw +#define REGBYTES 4 + +#define EXC_SIZE_ON_STACK (36 * REGBYTES) +#define INT_SIZE_ON_STACK (32 * REGBYTES) + +/* task TCB offset */ +#define TASK_CB_KERNEL_SP 0x0 +#define TASK_CB_STATUS 0x4 + +#define UINT32_CUT_MASK 0xFFFFFFFF +#define UINT8_CUT_MASK 0xFF +#define OS_MV_32_BIT 32 + +/************************ mstatus ************************/ +#define RISCV_MSTATUS_UIE 0x00000001 +#define RISCV_MSTATUS_MIE 0x00000004 +#define RISCV_MSTATUS_UPIE 0x00000010 +#define RISCV_MSTATUS_MPIE 0x00000080 +#define RISCV_MSTATUS_MPP 0x00001800 + +/************************ mie ***************************/ +#define RISCV_MIE_USIE 0x000000001 +#define RISCV_MIE_MSIE 0x000000004 +#define RISCV_MIE_UTIE 0x000000010 +#define RISCV_MIE_MTIE 0x000000080 +#define RISCV_MIE_UEIE 0x000000100 +#define RISCV_MIE_MEIE 0x000000800 + +/************************** mcause ***********************/ +#define RISCV_MCAUSE_ECALL_U 8 + +#define RISCV_USER_SOFT_IRQ 0 +#define RISCV_MACH_SOFT_IRQ 3 +#define RISCV_USER_TIMER_IRQ 4 +#define RISCV_MACH_TIMER_IRQ 7 +#define RISCV_USER_EXT_IRQ 8 +#define RISCV_MACH_EXT_IRQ 11 + + +#define READ_CSR(reg) ({ \ + UINT32 _tmp; \ + __asm__ volatile("csrr %0, " #reg : "=r"(_tmp) : : "memory"); \ + _tmp; \ +}) + +#define WRITE_CSR(reg, val) ({ \ + __asm__ volatile("csrw " #reg ", %0" : : "r"(val) : "memory"); \ +}) + +#define SET_CSR(reg, val) ({ \ + __asm__ volatile("csrs " #reg ", %0" : : "r"(val) : "memory"); \ +}) + +#define CLEAR_CSR(reg, val) ({ \ + __asm__ volatile("csrc " #reg ", %0" : : "r"(val) : "memory"); \ +}) + +#define READ_CUSTOM_CSR(reg) ({ \ + UINT32 _tmp; \ + __asm__ volatile("csrr %0, %1" : "=r"(_tmp) : "i"(reg) : "memory"); \ + _tmp; \ +}) + +#define WRITE_CUSTOM_CSR(reg, val) ({ \ + __asm__ volatile("csrw %0, %1" : : "i"(reg), "r"(val) : "memory"); \ +}) + +#define SET_CUSTOM_CSR(reg, val) ({ \ + __asm__ volatile("csrs " #reg ", %0" : : "r"(val) : "memory"); \ +}) + +#define CLEAR_CUSTOM_CSR(reg, val) ({ \ + __asm__ volatile("csrc " #reg ", %0" : : "r"(val) : "memory"); \ +}) + +#endif diff --git a/kernel/arch/risc-v/rvm32/include/los_exc_pri.h b/kernel/arch/risc-v/rvm32/include/los_exc_pri.h new file mode 100644 index 00000000..190cae2a --- /dev/null +++ b/kernel/arch/risc-v/rvm32/include/los_exc_pri.h @@ -0,0 +1,67 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _LOS_EXC_PRI_H +#define _LOS_EXC_PRI_H + +#include "los_typedef.h" +#include "los_hw_pri.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +extern VOID BackTraceSub(UINT32 fp); + +typedef struct { + UINT32 mcause; + UINT32 mtval; + UINT32 medeleg; + UINT32 gp; + TaskContext taskContext; +} LosExcContext; + +typedef struct { + UINT16 nestCnt; + UINT16 type; + UINT32 thrID; + LosExcContext *context; +} LosExcInfo; + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _LOS_EXC_PRI_H */ diff --git a/kernel/arch/risc-v/rvm32/include/los_hw_pri.h b/kernel/arch/risc-v/rvm32/include/los_hw_pri.h new file mode 100644 index 00000000..a4b75c5f --- /dev/null +++ b/kernel/arch/risc-v/rvm32/include/los_hw_pri.h @@ -0,0 +1,129 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _LOS_HW_PRI_H +#define _LOS_HW_PRI_H + +#include "los_hw.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define TP_INIT_VALUE 0x02020202L +#define SP_INIT_VALUE 0x03030303L +#define S11_INIT_VALUE 0x04040404L +#define S10_INIT_VALUE 0x05050505L +#define S9_INIT_VALUE 0x06060606L +#define S8_INIT_VALUE 0x07070707L +#define S7_INIT_VALUE 0x08080808L +#define S6_INIT_VALUE 0x09090909L +#define S5_INIT_VALUE 0x10101010L +#define S4_INIT_VALUE 0x11111111L +#define S3_INIT_VALUE 0x12121212L +#define S2_INIT_VALUE 0x13131313L +#define S1_INIT_VALUE 0x14141414L +#define FP_INIT_VALUE 0x15151515L +#define T6_INIT_VALUE 0x16161616L +#define T5_INIT_VALUE 0x17171717L +#define T4_INIT_VALUE 0x18181818L +#define T3_INIT_VALUE 0x19191919L +#define A7_INIT_VALUE 0x20202020L +#define A6_INIT_VALUE 0x21212121L +#define A5_INIT_VALUE 0x22222222L +#define A4_INIT_VALUE 0x23232323L +#define A3_INIT_VALUE 0x24242424L +#define A2_INIT_VALUE 0x25252525L +#define A1_INIT_VALUE 0x26262626L +#define T2_INIT_VALUE 0x28282828L +#define T1_INIT_VALUE 0x29292929L +#define T0_INIT_VALUE 0x30303030L + +/** + * @ingroup los_hw + * Define the type of a task context control block. + */ +typedef struct { + UINT32 sp; + UINT32 tp; + UINT32 t6; + UINT32 t5; + UINT32 t4; + UINT32 t3; + UINT32 t2; + UINT32 t1; + UINT32 t0; + UINT32 s11; + UINT32 s10; + UINT32 s9; + UINT32 s8; + UINT32 s7; + UINT32 s6; + UINT32 s5; + UINT32 mstatus; + UINT32 mepc; + UINT32 a7; + UINT32 a6; + UINT32 a5; + UINT32 a4; + UINT32 a3; + UINT32 a2; + UINT32 a1; + UINT32 a0; + UINT32 s4; + UINT32 s3; + UINT32 s2; + UINT32 s1; + UINT32 s0; + UINT32 ra; +} TaskContext; + +STATIC INLINE UINTPTR GetSP(VOID) +{ + UINTPTR spSave; + __asm__ __volatile__("mv %0, sp" : "=r"(spSave)); + return spSave; +} + +extern VOID *OsTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack); +extern VOID OsTaskScheduleCheck(VOID); +extern VOID OsDisableIRQ(VOID); +extern VOID OsEnableIRQ(VOID); + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _LOS_HW_PRI_H */ diff --git a/kernel/arch/risc-v/rvm32/include/los_hw_tick_pri.h b/kernel/arch/risc-v/rvm32/include/los_hw_tick_pri.h new file mode 100644 index 00000000..a0f4f89c --- /dev/null +++ b/kernel/arch/risc-v/rvm32/include/los_hw_tick_pri.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _LOS_HW_TICK_PRI_H +#define _LOS_HW_TICK_PRI_H + +#include "los_typedef.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define TICK_INTERRUPT_PRI 0x1 + +extern UINT32 g_cyclesPerTick; + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _LOS_HW_TICK_PRI_H */ diff --git a/kernel/arch/risc-v/rvm32/include/los_hwi_pri.h b/kernel/arch/risc-v/rvm32/include/los_hwi_pri.h new file mode 100644 index 00000000..e6209ad3 --- /dev/null +++ b/kernel/arch/risc-v/rvm32/include/los_hwi_pri.h @@ -0,0 +1,135 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _LOS_HWI_PRI_H +#define _LOS_HWI_PRI_H + +#include "soc.h" +#include "los_hwi.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +/** + * @ingroup los_hwi + * The hwi form does not contain exceptions for cortex-A + */ +#define OS_HWI_FORM_EXC_NUM 0 +#if OS_HWI_FORM_EXC_NUM != 0 +#error "OS_HWI_FORM_EXC_NUM must be zero" +#endif + +/** + * @ingroup los_hwi + * Highest priority of a hardware interrupt. + */ +#define OS_HWI_PRIO_HIGHEST 7 + +/** + * @ingroup los_hwi + * Lowest priority of a hardware interrupt. + */ +#define OS_HWI_PRIO_LOWEST 1 + +/** + * @ingroup los_hwi + * Count of HimiDeer system interrupt vector. + */ +#define OS_RISCV_SYS_VECTOR_CNT (RISCV_SYS_MAX_IRQ + 1) + +/** + * @ingroup los_hwi + * Count of HimiDeer local interrupt vector 0 - 5, enabled by CSR mie 26 -31 bit. + */ +#define OS_RISCV_MIE_IRQ_VECTOR_CNT 6 + +/** + * @ingroup los_hwi + * Count of HimiDeer local interrupt vector 6 - 31, enabled by custom CSR locie0 0 - 25 bit. + */ +#define OS_RISCV_CUSTOM_IRQ_VECTOR_CNT RISCV_PLIC_VECTOR_CNT + +/** + * @ingroup los_hwi + * Count of HimiDeer local IRQ interrupt vector. + */ +#define OS_RISCV_LOCAL_IRQ_VECTOR_CNT (OS_RISCV_MIE_IRQ_VECTOR_CNT + OS_RISCV_SYS_VECTOR_CNT) + +/** + * @ingroup los_hwi + * Count of himideer interrupt vector. + */ +#define OS_RISCV_VECTOR_CNT (OS_RISCV_SYS_VECTOR_CNT + OS_RISCV_CUSTOM_IRQ_VECTOR_CNT) + +/** + * Maximum number of supported hardware devices that generate hardware interrupts. + * The maximum number of hardware devices that generate hardware interrupts supported by hi3518ev200 is 32. + */ +#define OS_HWI_MAX_NUM OS_RISCV_VECTOR_CNT + +/** + * Maximum interrupt number. + */ +#define OS_HWI_MAX ((OS_HWI_MAX_NUM) - 1) + +/** + * Minimum interrupt number. + */ +#define OS_HWI_MIN 0 + +/** + * Maximum usable interrupt number. + */ +#define OS_USER_HWI_MAX OS_HWI_MAX + +/** + * Minimum usable interrupt number. + */ +#define OS_USER_HWI_MIN OS_HWI_MIN + +extern HWI_HANDLE_FORM_S g_hwiForm[OS_HWI_MAX_NUM]; + +extern VOID OsHwiInit(VOID); +extern UINT32 OsGetHwiFormCnt(HWI_HANDLE_T hwiNum); +extern HWI_HANDLE_FORM_S *OsGetHwiForm(VOID); +extern VOID OsHwiInterruptDone(HWI_HANDLE_T hwiNum); +extern VOID OsHwiDefaultHandler(UINTPTR arg); + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _LOS_HWI_PRI_H */ diff --git a/kernel/arch/risc-v/rvm32/src/los_dispatch.S b/kernel/arch/risc-v/rvm32/src/los_dispatch.S new file mode 100644 index 00000000..e7895738 --- /dev/null +++ b/kernel/arch/risc-v/rvm32/src/los_dispatch.S @@ -0,0 +1,253 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "soc.h" + +.global LOS_IntLock +.global LOS_IntUnLock +.global LOS_IntRestore +.global LOS_StartToRun +.global osTaskSchedule +.global OsDisableIRQ +.global TaskSwitch +.extern __irq_stack_top +.extern OsTaskScheduleCheck +.extern printk +.equ OS_TASK_STATUS_RUNNING, 0x0010 +.equ OS_TASK_STATUS_NOT_RUNNING, 0xFFEF +.section .interrupt.text + +.macro PUSH_CALLER_REG + addi sp, sp, -(32 * REGBYTES) + SREG t6, 2 * REGBYTES(sp) + SREG t5, 3 * REGBYTES(sp) + SREG t4, 4 * REGBYTES(sp) + SREG t3, 5 * REGBYTES(sp) + SREG t2, 6 * REGBYTES(sp) + SREG t1, 7 * REGBYTES(sp) + SREG t0, 8 * REGBYTES(sp) + SREG a7, 18 * REGBYTES(sp) + SREG a6, 19 * REGBYTES(sp) + SREG a5, 20 * REGBYTES(sp) + SREG a4, 21 * REGBYTES(sp) + SREG a3, 22 * REGBYTES(sp) + SREG a2, 23 * REGBYTES(sp) + SREG a1, 24 * REGBYTES(sp) + SREG a0, 25 * REGBYTES(sp) + SREG ra, 31 * REGBYTES(sp) +.endm + +.macro POP_CALLER_REG + LREG t6, 2 * REGBYTES(sp) + LREG t5, 3 * REGBYTES(sp) + LREG t4, 4 * REGBYTES(sp) + LREG t3, 5 * REGBYTES(sp) + LREG t2, 6 * REGBYTES(sp) + LREG t1, 7 * REGBYTES(sp) + LREG t0, 8 * REGBYTES(sp) + LREG a7, 18 * REGBYTES(sp) + LREG a6, 19 * REGBYTES(sp) + LREG a5, 20 * REGBYTES(sp) + LREG a4, 21 * REGBYTES(sp) + LREG a3, 22 * REGBYTES(sp) + LREG a2, 23 * REGBYTES(sp) + LREG a1, 24 * REGBYTES(sp) + LREG a0, 25 * REGBYTES(sp) + LREG ra, 31 * REGBYTES(sp) + addi sp, sp, 32 * REGBYTES +.endm + +.macro PUSH_CALLEE_REG + SREG s11, 9 * REGBYTES(sp) + SREG s10, 10 * REGBYTES(sp) + SREG s9, 11 * REGBYTES(sp) + SREG s8, 12 * REGBYTES(sp) + SREG s7, 13 * REGBYTES(sp) + SREG s6, 14 * REGBYTES(sp) + SREG s5, 15 * REGBYTES(sp) + SREG s4, 26 * REGBYTES(sp) + SREG s3, 27 * REGBYTES(sp) + SREG s2, 28 * REGBYTES(sp) + SREG s1, 29 * REGBYTES(sp) + SREG s0, 30 * REGBYTES(sp) +.endm + +.macro POP_ALL_REG + LREG t6, 2 * REGBYTES(sp) + LREG t5, 3 * REGBYTES(sp) + LREG t4, 4 * REGBYTES(sp) + LREG t3, 5 * REGBYTES(sp) + LREG t2, 6 * REGBYTES(sp) + LREG t1, 7 * REGBYTES(sp) + LREG t0, 8 * REGBYTES(sp) + LREG s11, 9 * REGBYTES(sp) + LREG s10, 10 * REGBYTES(sp) + LREG s9, 11 * REGBYTES(sp) + LREG s8, 12 * REGBYTES(sp) + LREG s7, 13 * REGBYTES(sp) + LREG s6, 14 * REGBYTES(sp) + LREG s5, 15 * REGBYTES(sp) + LREG a7, 18 * REGBYTES(sp) + LREG a6, 19 * REGBYTES(sp) + LREG a5, 20 * REGBYTES(sp) + LREG a4, 21 * REGBYTES(sp) + LREG a3, 22 * REGBYTES(sp) + LREG a2, 23 * REGBYTES(sp) + LREG a1, 24 * REGBYTES(sp) + LREG a0, 25 * REGBYTES(sp) + LREG s4, 26 * REGBYTES(sp) + LREG s3, 27 * REGBYTES(sp) + LREG s2, 28 * REGBYTES(sp) + LREG s1, 29 * REGBYTES(sp) + LREG s0, 30 * REGBYTES(sp) + LREG ra, 31 * REGBYTES(sp) + addi sp, sp, 32 * REGBYTES +.endm + +LOS_StartToRun: +// disable interrupts + csrci mstatus, RISCV_MSTATUS_MIE + +// indicate that sheduler is ON by setting g_taskScheduled=1 + la t0, g_taskScheduled + li t1, 0x1 + sw t1, 0x0(t0) + + j SwitchNewTask + +osTaskSchedule: + li t0, RISCV_MSTATUS_MIE | RISCV_MSTATUS_MPIE + csrrc a1, mstatus, t0 + + la t0, g_losTask + lw t1, 0(t0) + lw t2, 4(t0) + bne t1, t2, 1f + + csrw mstatus, a1 + ret +1: + addi sp, sp, -(32 * REGBYTES) + andi a1, a1, RISCV_MSTATUS_MIE + ori a1, a1, 0x180 + slli a1, a1, 0x4 + csrs mstatus, a1 + csrw mepc, ra + + j SaveContextAndSwitchTask + +TaskSwitch: + la t0, g_losTaskLock + lw t1, 0(t0) + bgtz t1, NotSwitch + + la t0, g_losTask + lw t1, 0(t0) + lw t2, 4(t0) + beq t1, t2, NotSwitch + +// stack pointer was passed by entry.s in register a2. store it in runTask structure + csrr sp, mscratch + +SaveContextAndSwitchTask: + csrr t0, mstatus + SREG t0, 16 * REGBYTES(sp) + csrr t0, mepc + SREG t0, 17 * REGBYTES(sp) + PUSH_CALLEE_REG + +// Clear the task running bit of runTask. + lh t2, TASK_CB_STATUS(t1) + li t0, OS_TASK_STATUS_NOT_RUNNING + and t2, t2, t0 + sh t2, TASK_CB_STATUS(t1) + sw sp, TASK_CB_KERNEL_SP(t1) + + call OsTaskScheduleCheck + +SwitchNewTask: +// copy newTask into runTask + la t0, g_losTask + lw t1, 0x4(t0) + sw t1, 0x0(t0) + +// set the task running bit=1 + lh t2, TASK_CB_STATUS(t1) + ori t2, t2, OS_TASK_STATUS_RUNNING + sh t2, TASK_CB_STATUS(t1) + +// retireve stack pointer + lw sp, TASK_CB_KERNEL_SP(t1) + +// enable global interrupts + lw t0, 16 * REGBYTES(sp) + csrw mstatus, t0 + +// retrieve the address at which exception happened + lw t0, 17 * REGBYTES(sp) + csrw mepc, t0 + +// retrieve the registers + POP_ALL_REG + + mret + +NotSwitch: + csrr sp, mscratch +// retrieve the registers + POP_CALLER_REG + mret + +.section .text +OsDisableIRQ: + li t0, (RISCV_MSTATUS_MPIE | RISCV_MSTATUS_MIE) // mpie | mie + csrrc zero, mstatus, t0 + ret + +OsEnableIRQ: + csrsi mstatus, RISCV_MSTATUS_MIE + ret + +LOS_IntLock: + csrr a0, mstatus // return value + li t0, RISCV_MSTATUS_MIE // mie + csrrc zero, mstatus, t0 + ret + +LOS_IntUnLock: + csrr a0, mstatus // return value + li t0, RISCV_MSTATUS_MIE // mie + csrrs zero, mstatus, t0 + ret + +LOS_IntRestore: + csrw mstatus, a0 + ret diff --git a/kernel/arch/risc-v/rvm32/src/los_exc.c b/kernel/arch/risc-v/rvm32/src/los_exc.c new file mode 100644 index 00000000..769c65eb --- /dev/null +++ b/kernel/arch/risc-v/rvm32/src/los_exc.c @@ -0,0 +1,276 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "los_exc.h" +#include "los_exc_pri.h" +#include "los_task_pri.h" +#include "los_printf_pri.h" +#include "riscv_hal.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +LosExcInfo g_excInfo; + +#define RISCV_EXC_TYPE_NUM 16 +const CHAR g_excInformation[RISCV_EXC_TYPE_NUM][50] = { + { "Instruction address misaligned!" }, + { "Instruction access fault!" }, + { "Illegal instruction" }, + { "Breakpoint!" }, + { "Load address misaligned!" }, + { "Load access fault!" }, + { "Store/AMO address misaligned!" }, + { "Store/AMO access fault!" }, + { "Environment call form U-mode!" }, + { "Environment call form S-mode!" }, + { "Reserved!" }, + { "Environment call form M-mode!" }, + { "Instruction page fault!" }, + { "Load page fault!" }, + { "Reserved!" }, + { "Store/AMO page fault!" }, +}; + +#define RA_OFFSET 4 +#define FP_OFFSET 8 +#define OS_MAX_BACKTRACE 15 +#define FP_ALIGN(value) (((UINT32)(value) & (UINT32)(LOSCFG_STACK_POINT_ALIGN_SIZE - 1)) == 0) +#define FP_CHECK(value) (OsBackTraceFpCheck(value) && ((UINT32)(value) != FP_INIT_VALUE) && FP_ALIGN(value)) + +LITE_OS_SEC_TEXT VOID BackTraceSub(UINT32 fp) +{ + UINT32 backFp = fp; + UINT32 tmpFp; + UINT32 backRa; + UINT32 count = 0; + + while (FP_CHECK(backFp)) { + tmpFp = backFp; + backRa = *((UINT32 *)(UINTPTR)(tmpFp - RA_OFFSET)); + backFp = *((UINT32 *)(UINTPTR)(tmpFp - FP_OFFSET)); + PRINTK("traceback %u -- ra = 0x%x fp = 0x%x\n", count, backRa, backFp); + + count++; + + if ((count == OS_MAX_BACKTRACE) || (backFp == tmpFp) || \ + (!OsBackTraceRaCheck(backRa))) { + break; + } + } + PRINTK("*******backtrace end*******\n"); +} + +LITE_OS_SEC_TEXT VOID BackTrace(UINT32 fp) +{ + PRINTK("*******backtrace begin*******\n"); + + BackTraceSub(fp); +} + +LITE_OS_SEC_TEXT static VOID OsExcBackTrace(UINT32 fp, UINT32 ra) +{ + UINT32 backFp; + if (FP_CHECK(fp)) { + backFp = *((UINT32 *)(UINTPTR)(fp - RA_OFFSET)); + if ((backFp != ra) && FP_CHECK(backFp)) { + fp = backFp; + } + BackTrace(fp); + } else { + PRINTK("fp error, back trace failed!\n"); + } +} + +LITE_OS_SEC_TEXT VOID OsTaskBackTrace(UINT32 taskID) +{ + LosTaskCB *taskCB = NULL; + + if (taskID >= g_taskMaxNum) { + PRINT_ERR("\r\nTask PID is invalid!\n"); + return; + } + + taskCB = OS_TCB_FROM_TID(taskID); + if ((taskCB->taskStatus & OS_TASK_STATUS_UNUSED) || (taskCB->taskEntry == NULL) || + (taskCB->taskName == NULL)) { + PRINT_ERR("\r\nThe task is not created!\n"); + return; + } + + if (taskCB->taskStatus & OS_TASK_STATUS_RUNNING) { + OsBackTrace(); + return; + } + + PRINTK("taskName = %s\n", taskCB->taskName); + PRINTK("taskID = 0x%x\n", taskCB->taskID); + PRINTK("curr ra = 0x%08x\n", ((TaskContext *)(taskCB->stackPointer))->ra); + OsExcBackTrace(((TaskContext *)(taskCB->stackPointer))->s0, ((TaskContext *)(taskCB->stackPointer))->ra); +} + +LITE_OS_SEC_TEXT VOID OsBackTrace(VOID) +{ + UINT32 fp = GetFp(); + PRINTK("taskName = %s\n", g_losTask.runTask->taskName); + PRINTK("taskID = %u\n", g_losTask.runTask->taskID); + PRINTK("curr fp = 0x%08x \n", fp); + BackTrace(fp); +} + +LITE_OS_SEC_TEXT VOID LOS_Panic(const CHAR *fmt, ...) +{ + va_list ap; + va_start(ap, fmt); + PRINTK(fmt, ap); + va_end(ap); + OsDisableIRQ(); + while (1) { + } +} + +STATIC VOID OsDisplayTaskInfo(VOID) +{ + TSK_INFO_S taskInfo; + UINT32 index; + UINT32 ret; + + PRINTK("ID Pri Status name \n\r"); + PRINTK("-- --- --------- ----\n\r"); + + for (index = 0; index < LOSCFG_BASE_CORE_TSK_LIMIT; index++) { + ret = LOS_TaskInfoGet(index, &taskInfo); + if (ret != LOS_OK) { + continue; + } + PRINTK("%d %d %s %s \n\r", + taskInfo.uwTaskID, taskInfo.usTaskPrio, OsConvertTskStatus(taskInfo.usTaskStatus), taskInfo.acName); + } + return; +} + +LITE_OS_SEC_TEXT STATIC VOID OsExcInfoDisplayContext(const LosExcInfo *exc) +{ + const TaskContext *taskContext = &(exc->context->taskContext); + + PRINTK("mepc = 0x%x\n", taskContext->mepc); + PRINTK("mstatus = 0x%x\n", taskContext->mstatus); + PRINTK("mtval = 0x%x\n", exc->context->mtval); + PRINTK("mcause = 0x%x\n", exc->context->mcause); + PRINTK("ra = 0x%x\n", taskContext->ra); + PRINTK("sp = 0x%x\n", taskContext->sp); + PRINTK("gp = 0x%x\n", exc->context->gp); + PRINTK("tp = 0x%x\n", taskContext->tp); + PRINTK("t0 = 0x%x\n", taskContext->t0); + PRINTK("t1 = 0x%x\n", taskContext->t1); + PRINTK("t2 = 0x%x\n", taskContext->t2); + PRINTK("s0 = 0x%x\n", taskContext->s0); + PRINTK("s1 = 0x%x\n", taskContext->s1); + PRINTK("a0 = 0x%x\n", taskContext->a0); + PRINTK("a1 = 0x%x\n", taskContext->a1); + PRINTK("a2 = 0x%x\n", taskContext->a2); + PRINTK("a3 = 0x%x\n", taskContext->a3); + PRINTK("a4 = 0x%x\n", taskContext->a4); + PRINTK("a5 = 0x%x\n", taskContext->a5); + PRINTK("a6 = 0x%x\n", taskContext->a6); + PRINTK("a7 = 0x%x\n", taskContext->a7); + PRINTK("s2 = 0x%x\n", taskContext->s2); + PRINTK("s3 = 0x%x\n", taskContext->s3); + PRINTK("s4 = 0x%x\n", taskContext->s4); + PRINTK("s5 = 0x%x\n", taskContext->s5); + PRINTK("s6 = 0x%x\n", taskContext->s6); + PRINTK("s7 = 0x%x\n", taskContext->s7); + PRINTK("s8 = 0x%x\n", taskContext->s8); + PRINTK("s9 = 0x%x\n", taskContext->s9); + PRINTK("s10 = 0x%x\n", taskContext->s10); + PRINTK("s11 = 0x%x\n", taskContext->s11); + PRINTK("t3 = 0x%x\n", taskContext->t3); + PRINTK("t4 = 0x%x\n", taskContext->t4); + PRINTK("t5 = 0x%x\n", taskContext->t5); + PRINTK("t6 = 0x%x\n", taskContext->t6); + + OsExcBackTrace(taskContext->s0, taskContext->ra); +} + +LITE_OS_SEC_TEXT VOID OsExcInfoDisplay(const LosExcContext *excBufAddr) +{ + g_excInfo.type = excBufAddr->mcause; + g_excInfo.context = (LosExcContext *)excBufAddr; + + PRINTK("\r\nException Information \n\r"); + + if (excBufAddr->mcause < RISCV_EXC_TYPE_NUM) { + PRINTK("Exc type : Oops - %s\n\r", g_excInformation[excBufAddr->mcause]); + } else { + PRINTK("Exc type : Oops - Invalid\n\r"); + } + + PRINTK("taskName = %s\n\r", g_losTask.runTask->taskName); + PRINTK("taskID = %u\n\r", g_losTask.runTask->taskID); + PRINTK("system mem addr:0x%x\n\r", (UINTPTR)OS_SYS_MEM_ADDR); + OsExcInfoDisplayContext(&g_excInfo); +} + +VOID OsExcEntry(const LosExcContext *excBufAddr) +{ + if (g_excInfo.nestCnt > 2) { + PRINTK("hard faule!\n\r"); + goto SYSTEM_DEATH; + } + + OsExcInfoDisplay(excBufAddr); + + PRINTK("----------------All Task infomation ------------\n\r"); + OsDisplayTaskInfo(); + +SYSTEM_DEATH: + while (1) { + } +} + +/* stack protector */ +UINT32 __stack_chk_guard = 0xd00a0dff; + +VOID __stack_chk_fail(VOID) +{ + /* __builtin_return_address is a builtin function, building in gcc */ + LOS_Panic("stack-protector: Kernel stack is corrupted in: %p\n", + __builtin_return_address(0)); +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/kernel/arch/risc-v/rvm32/src/los_hw.c b/kernel/arch/risc-v/rvm32/src/los_hw.c new file mode 100644 index 00000000..b43db88b --- /dev/null +++ b/kernel/arch/risc-v/rvm32/src/los_hw.c @@ -0,0 +1,127 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "los_hw.h" +#include "los_hw_pri.h" +#include "los_task_pri.h" +#include "los_memory.h" +#include "los_priqueue_pri.h" +#include "soc.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +LITE_OS_SEC_TEXT_MINOR VOID OsTaskExit(VOID) +{ + OsDisableIRQ(); + while (1) { + } +} + +LITE_OS_SEC_TEXT_INIT VOID *OsTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) +{ + UINT32 index; + TaskContext *context = NULL; + + /* initialize the task stack, write magic num to stack top */ + for (index = 1; index < (stackSize / sizeof(UINT32)); index++) { + *((UINT32 *)topStack + index) = OS_TASK_STACK_INIT; + } + *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD; + + context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext)); + + context->mstatus = RISCV_MSTATUS_MPP | RISCV_MSTATUS_MPIE; + context->mepc = (UINT32)(UINTPTR)OsTaskEntry; + context->tp = TP_INIT_VALUE; + context->sp = SP_INIT_VALUE; + context->s11 = S11_INIT_VALUE; + context->s10 = S10_INIT_VALUE; + context->s9 = S9_INIT_VALUE; + context->s8 = S8_INIT_VALUE; + context->s7 = S7_INIT_VALUE; + context->s6 = S6_INIT_VALUE; + context->s5 = S5_INIT_VALUE; + context->s4 = S4_INIT_VALUE; + context->s3 = S3_INIT_VALUE; + context->s2 = S2_INIT_VALUE; + context->s1 = S1_INIT_VALUE; + context->s0 = FP_INIT_VALUE; + context->t6 = T6_INIT_VALUE; + context->t5 = T5_INIT_VALUE; + context->t4 = T4_INIT_VALUE; + context->t3 = T3_INIT_VALUE; + context->a7 = A7_INIT_VALUE; + context->a6 = A6_INIT_VALUE; + context->a5 = A5_INIT_VALUE; + context->a4 = A4_INIT_VALUE; + context->a3 = A3_INIT_VALUE; + context->a2 = A2_INIT_VALUE; + context->a1 = A1_INIT_VALUE; + context->a0 = taskID; + context->t2 = T2_INIT_VALUE; + context->t1 = T1_INIT_VALUE; + context->t0 = T0_INIT_VALUE; + context->ra = (UINT32)(UINTPTR)OsTaskExit; + return (VOID *)context; +} + +LITE_OS_SEC_TEXT VOID OsTaskScheduleCheck(VOID) +{ +#if (LOSCFG_BASE_CORE_TSK_MONITOR == YES) + OsTaskSwitchCheck(); +#endif + return; +} + +LITE_OS_SEC_TEXT VOID wfi(VOID) +{ + __asm__ __volatile__("wfi"); +} + +LITE_OS_SEC_TEXT VOID mb(VOID) +{ + __asm__ __volatile__("fence":::"memory"); +} + +LITE_OS_SEC_TEXT VOID dsb(VOID) +{ + __asm__ __volatile__("fence":::"memory"); +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/kernel/arch/risc-v/rvm32/src/los_hw_tick.c b/kernel/arch/risc-v/rvm32/src/los_hw_tick.c new file mode 100644 index 00000000..f4ff7b8e --- /dev/null +++ b/kernel/arch/risc-v/rvm32/src/los_hw_tick.c @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "los_hw_tick_pri.h" +#include "los_hwi.h" +#include "los_tick_pri.h" +#include "riscv_hal.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define NS_PER_SECOND 1000000000.0 + +LITE_OS_SEC_TEXT_INIT UINT32 OsTickStart(VOID) +{ + g_sysClock = OS_SYS_CLOCK; + g_cyclesPerTick = g_sysClock / LOSCFG_BASE_CORE_TICK_PER_SECOND; + g_intCount = 0; + + SysClockInit(g_cyclesPerTick); + + return LOS_OK; +} + +LITE_OS_SEC_TEXT_MINOR VOID LOS_GetCpuCycle(UINT32 *cntHi, UINT32 *cntLo) +{ + OsGetCpuCycle(cntHi, cntLo); + return; +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/kernel/arch/risc-v/rvm32/src/los_hwi.c b/kernel/arch/risc-v/rvm32/src/los_hwi.c new file mode 100644 index 00000000..4d801d42 --- /dev/null +++ b/kernel/arch/risc-v/rvm32/src/los_hwi.c @@ -0,0 +1,191 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "los_base.h" +#include "los_hwi_pri.h" +#include "riscv_hal.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +LITE_OS_SEC_BSS UINT32 g_intCount = 0; +LITE_OS_SEC_BSS UINT32 g_hwiFormCnt[OS_HWI_MAX_NUM]; + +LITE_OS_SEC_DATA_INIT HWI_HANDLE_FORM_S g_hwiForm[OS_HWI_MAX_NUM] = { + { .pfnHook = NULL, .uwParam = 0 }, // 0 User software interrupt handler + { .pfnHook = NULL, .uwParam = 0 }, // 1 Supervisor software interrupt handler + { .pfnHook = NULL, .uwParam = 0 }, // 2 Reserved + { .pfnHook = OsHwiDefaultHandler, .uwParam = 0 }, // 3 Machine software interrupt handler + { .pfnHook = NULL, .uwParam = 0 }, // 4 User timer interrupt handler + { .pfnHook = NULL, .uwParam = 0 }, // 5 Supervisor timer interrupt handler + { .pfnHook = NULL, .uwParam = 0 }, // 6 Reserved + { .pfnHook = OsHwiDefaultHandler, .uwParam = 0 }, // 7 Machine timer interrupt handler + { .pfnHook = NULL, .uwParam = 0 }, // 8 User external interrupt handler + { .pfnHook = NULL, .uwParam = 0 }, // 9 Supervisor external interrupt handler + { .pfnHook = NULL, .uwParam = 0 }, // 10 Reserved + { .pfnHook = OsHwiDefaultHandler, .uwParam = 0 }, // 11 Machine external interrupt handler + { .pfnHook = OsHwiDefaultHandler, .uwParam = 0 }, // 12 NMI handler + { .pfnHook = NULL, .uwParam = 0 }, // 13 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 14 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 15 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 16 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 17 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 18 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 19 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 20 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 21 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 22 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 23 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 24 Reserved + { .pfnHook = NULL, .uwParam = 0 }, // 25 Reserved +}; + +LITE_OS_SEC_TEXT_INIT VOID OsHwiDefaultHandler(UINTPTR arg) +{ + (VOID)arg; + PRINT_ERR("default handler\n"); + while (1) { + } +} + +LITE_OS_SEC_TEXT_INIT VOID OsHwiInit(VOID) +{ + UINT32 index; + for (index = OS_RISCV_SYS_VECTOR_CNT; index < OS_HWI_MAX_NUM; index++) { + g_hwiForm[index].pfnHook = OsHwiDefaultHandler; + g_hwiForm[index].uwParam = 0; + } +} + +typedef VOID (*HwiProcFunc)(UINTPTR); +LITE_OS_SEC_TEXT_INIT VOID OsHwiInterruptDone(HWI_HANDLE_T hwiNum) +{ + g_intCount++; + + HWI_HANDLE_FORM_S *hwiForm = &g_hwiForm[hwiNum]; + HwiProcFunc func = (HwiProcFunc)(hwiForm->pfnHook); + func(hwiForm->uwParam); + + ++g_hwiFormCnt[hwiNum]; + + g_intCount--; +} + +LITE_OS_SEC_TEXT UINT32 OsGetHwiFormCnt(HWI_HANDLE_T hwiNum) +{ + if (hwiNum < OS_HWI_MAX_NUM) { + return g_hwiFormCnt[hwiNum]; + } + + return LOS_NOK; +} + +LITE_OS_SEC_TEXT HWI_HANDLE_FORM_S *OsGetHwiForm(VOID) +{ + return g_hwiForm; +} + +/***************************************************************************** + Function : LOS_HwiCreate + Description : create hardware interrupt + Input : hwiNum --- hwi num to create + hwiPrio --- priority of the hwi + hwiMode --- hwi interrupt mode + hwiHandler --- hwi handler + irqParam --- param of the hwi handler + Output : None + Return : LOS_OK on success or error code on failure + *****************************************************************************/ +LITE_OS_SEC_TEXT UINT32 LOS_HwiCreate(HWI_HANDLE_T hwiNum, + HWI_PRIOR_T hwiPrio, + HWI_MODE_T hwiMode, + HWI_PROC_FUNC hwiHandler, + HWI_IRQ_PARAM_S irqParam) +{ + UINT32 intSave; + + if (hwiHandler == NULL) { + return OS_ERRNO_HWI_PROC_FUNC_NULL; + } + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + if (g_hwiForm[hwiNum].pfnHook == NULL) { + return OS_ERRNO_HWI_NUM_INVALID; + } else if (g_hwiForm[hwiNum].pfnHook != OsHwiDefaultHandler) { + return OS_ERRNO_HWI_NUM_INVALID; + } + if ((hwiPrio < OS_HWI_PRIO_LOWEST) || (hwiPrio > OS_HWI_PRIO_HIGHEST)) { + return OS_ERRNO_HWI_PRIO_INVALID; + } + + intSave = LOS_IntLock(); + g_hwiForm[hwiNum].pfnHook = hwiHandler; + g_hwiForm[hwiNum].uwParam = irqParam; + + if (hwiNum >= OS_RISCV_SYS_VECTOR_CNT) { + OsSetLocalInterPri(hwiNum, hwiPrio); + } + + LOS_IntRestore(intSave); + + return LOS_OK; +} + +/***************************************************************************** + Function : LOS_HwiDelete + Description : Delete hardware interrupt + Input : hwiNum --- hwi num to delete + Return : LOS_OK on success or error code on failure + *****************************************************************************/ +LITE_OS_SEC_TEXT UINT32 LOS_HwiDelete(HWI_HANDLE_T hwiNum, HWI_IRQ_PARAM_S irqParam) +{ + UINT32 intSave; + + if (hwiNum >= OS_HWI_MAX_NUM) { + return OS_ERRNO_HWI_NUM_INVALID; + } + + intSave = LOS_IntLock(); + g_hwiForm[hwiNum].pfnHook = OsHwiDefaultHandler; + g_hwiForm[hwiNum].uwParam = 0; + LOS_IntRestore(intSave); + return LOS_OK; +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/kernel/arch/risc-v/rvm32/src/los_trap.S b/kernel/arch/risc-v/rvm32/src/los_trap.S new file mode 100755 index 00000000..94294b37 --- /dev/null +++ b/kernel/arch/risc-v/rvm32/src/los_trap.S @@ -0,0 +1,178 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _LOS_TRAP_S +#define _LOS_TRAP_S +#include "soc.h" + +.macro PUSH_ECALL_CALLER_REG + addi sp, sp, -16 * REGBYTES + SREG a7, 2 * REGBYTES(sp) + SREG a6, 3 * REGBYTES(sp) + SREG a5, 4 * REGBYTES(sp) + SREG a4, 5 * REGBYTES(sp) + SREG a3, 6 * REGBYTES(sp) + SREG a2, 7 * REGBYTES(sp) + SREG a1, 8 * REGBYTES(sp) + SREG a0, 9 * REGBYTES(sp) + SREG ra, 15 * REGBYTES(sp) +.endm + +.macro PUSH_OTHER_CALLER_REG + addi sp, sp, -16 * REGBYTES + SREG t6, 2 * REGBYTES(sp) + SREG t5, 3 * REGBYTES(sp) + SREG t4, 4 * REGBYTES(sp) + SREG t3, 5 * REGBYTES(sp) + SREG t2, 6 * REGBYTES(sp) + SREG t1, 7 * REGBYTES(sp) + SREG t0, 8 * REGBYTES(sp) +.endm + + +.macro PUSH_OTHER_REG + addi sp, sp, -16 * REGBYTES + SREG t6, 2 * REGBYTES(sp) + SREG t5, 3 * REGBYTES(sp) + SREG t4, 4 * REGBYTES(sp) + SREG t3, 5 * REGBYTES(sp) + SREG t2, 6 * REGBYTES(sp) + SREG t1, 7 * REGBYTES(sp) + SREG t0, 8 * REGBYTES(sp) + SREG s11, 9 * REGBYTES(sp) + SREG s10, 10 * REGBYTES(sp) + SREG s9, 11 * REGBYTES(sp) + SREG s8, 12 * REGBYTES(sp) + SREG s7, 13 * REGBYTES(sp) + SREG s6, 14 * REGBYTES(sp) + SREG s5, 15 * REGBYTES(sp) + SREG s4, 26 * REGBYTES(sp) + SREG s3, 27 * REGBYTES(sp) + SREG s2, 28 * REGBYTES(sp) + SREG s1, 29 * REGBYTES(sp) + SREG s0, 30 * REGBYTES(sp) +.endm + +.macro POP_ALL_REG + LREG t6, 2 * REGBYTES(sp) + LREG t5, 3 * REGBYTES(sp) + LREG t4, 4 * REGBYTES(sp) + LREG t3, 5 * REGBYTES(sp) + LREG t2, 6 * REGBYTES(sp) + LREG t1, 7 * REGBYTES(sp) + LREG t0, 8 * REGBYTES(sp) + LREG s11, 9 * REGBYTES(sp) + LREG s10, 10 * REGBYTES(sp) + LREG s9, 11 * REGBYTES(sp) + LREG s8, 12 * REGBYTES(sp) + LREG s7, 13 * REGBYTES(sp) + LREG s6, 14 * REGBYTES(sp) + LREG s5, 15 * REGBYTES(sp) + LREG a7, 18 * REGBYTES(sp) + LREG a6, 19 * REGBYTES(sp) + LREG a5, 20 * REGBYTES(sp) + LREG a4, 21 * REGBYTES(sp) + LREG a3, 22 * REGBYTES(sp) + LREG a2, 23 * REGBYTES(sp) + LREG a1, 24 * REGBYTES(sp) + LREG a0, 25 * REGBYTES(sp) + LREG s4, 26 * REGBYTES(sp) + LREG s3, 27 * REGBYTES(sp) + LREG s2, 28 * REGBYTES(sp) + LREG s1, 29 * REGBYTES(sp) + LREG s0, 30 * REGBYTES(sp) + LREG ra, 31 * REGBYTES(sp) + addi sp, sp, 32 * REGBYTES +.endm + +.section .interrupt.text +.extern OsExcEntry +.extern g_excInfo +.global TrapEntry +.align 4 +TrapEntry: + PUSH_OTHER_REG + addi sp, sp, -4 * REGBYTES + sw a0, 0 * REGBYTES(sp) + csrr t0, mtval + sw t0, 1 * REGBYTES(sp) + csrr t0, medeleg + sw t0, 2 * REGBYTES(sp) + sw gp, 3 * REGBYTES(sp) + sw sp, 4 * REGBYTES(sp) + sw tp, 5 * REGBYTES(sp) + csrr t0, mstatus + sw t0, 20 * REGBYTES(sp) + csrr t0, mepc + sw t0, 21 * REGBYTES(sp) + mv a0, sp + csrw mscratch, sp + la t0, g_excInfo + lh t1, 0(t0) + bnez t1, 1f + la sp, __except_stack_top +1: + addi t1, t1, 0x1 + sh t1, 0(t0) + call OsExcEntry + la t0, g_excInfo + sh zero, 0(t0) + csrr sp, mscratch + addi sp, sp, 4 * REGBYTES + lw t0, 16 * REGBYTES(sp) + csrw mstatus, t0 + lw t0, 17 * REGBYTES(sp) + csrw mepc, t0 + POP_ALL_REG + mret + + +.section .interrupt.text +.extern TrapEntry +.global TrapVector +.equ TRAP_INTERRUPT_MODE_MASK, 0x80000000 +.equ TRAP_INTERRUPT_NUM_MASK, 0x7FFFFFFF +.align 4 +TrapVector: + PUSH_ECALL_CALLER_REG + csrr a0, mcause + li a1, TRAP_INTERRUPT_MODE_MASK + li a2, TRAP_INTERRUPT_NUM_MASK + and a1, a0, a1 + and a0, a2, a0 + beqz a1, TrapEntry + PUSH_OTHER_CALLER_REG + csrw mscratch, sp + la sp, __start_and_irq_stack_top + jal OsHwiInterruptDone + j TaskSwitch + +#endif /* _LOS_TRAP_S */ diff --git a/kernel/include/los_compiler.h b/kernel/include/los_compiler.h index f013c311..e3ac96c0 100755 --- a/kernel/include/los_compiler.h +++ b/kernel/include/los_compiler.h @@ -110,6 +110,10 @@ extern "C" { #define INLINE inline #endif +#ifndef STATIC +#define STATIC static +#endif + #ifndef STATIC_INLINE #define STATIC_INLINE static inline #endif diff --git a/kernel/src/los_swtmr.c b/kernel/src/los_swtmr.c index c06746fd..fc53a333 100755 --- a/kernel/src/los_swtmr.c +++ b/kernel/src/los_swtmr.c @@ -90,6 +90,7 @@ LITE_OS_SEC_TEXT VOID OsSwtmrTask(VOID) UINT32 ret; UINT64 tick; readSzie = sizeof(SwtmrHandlerItem); + for (;;) { ret = LOS_QueueReadCopy(g_swtmrHandlerQueue, &swtmrHandle, &readSzie, LOS_WAIT_FOREVER); if ((ret == LOS_OK) && (readSzie == sizeof(SwtmrHandlerItem))) { diff --git a/kernel/src/los_task.c b/kernel/src/los_task.c index 0300f6c9..b512e73f 100755 --- a/kernel/src/los_task.c +++ b/kernel/src/los_task.c @@ -1567,7 +1567,7 @@ VOID LOS_Schedule(VOID) /* In case that running is not highest then reschedule */ if (g_losTask.runTask != g_losTask.newTask) { - if (!g_losTaskLock) { + if (LOS_CHECK_SCHEDULE) { LOS_IntRestore(intSave); osTaskSchedule(); diff --git a/targets/riscv_sifive_fe310/Liteos.ld b/targets/riscv_sifive_fe310/Liteos.ld new file mode 100644 index 00000000..f7e88326 --- /dev/null +++ b/targets/riscv_sifive_fe310/Liteos.ld @@ -0,0 +1,62 @@ +OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", "elf32-littleriscv") +OUTPUT_ARCH("riscv") +ENTRY(_start) +INCLUDE board.ld.S +MEMORY +{ + ram(rwx) : ORIGIN = RAM_ADDR_START, LENGTH = RAM_ADDR_SIZE + flash(rwx) : ORIGIN = FLASH_LOAD_START, LENGTH = FLASH_LOAD_SIZE +} +SECTIONS +{ + .text : ALIGN(0x20) + { + __text_start = .; + . = ALIGN(0x10); + *(.start.text) + *(.interrupt.text) + *(.text.*) + . = ALIGN(0x20); + __rodata_start = .; + . = ALIGN(0x10); + *(.rodata.* .srodata.*) + . = ALIGN(0x20); + __text_end = .; + } > ram AT > flash + .data : ALIGN(0x20) + { + __global_pointer$ = . + 0x800; + __data_load_start = LOADADDR(.data); + __data_start = .; + . = ALIGN(0x10); + *(.data.* .sdata.*) + . = ALIGN(0x20); + __data_end = .; + } > ram AT > flash + __data_load_size = SIZEOF(.data); + .bss (NOLOAD): ALIGN(0x20) + { + __bss_start = .; + . = ALIGN(0x10); + *(.kernel.bss*) + *(.bss.* .sbss.*) + . = ALIGN(0x20); + __bss_end = .; + } > ram + .stack (NOLOAD): ALIGN(0x40) + { + __stack_bootom = .; + . += EXCEPT_STACK_SIZE; + __except_stack_top = .; + . += START_AND_IRQ_STACK_SIZE; + __start_and_irq_stack_top = .; + } > ram +/* + .heap (NOLOAD): ALIGN(0x40) + { + __heap_start = .; + . += HEAP_SIZE; + __heap_end = .; + } > ram +*/ +} diff --git a/targets/riscv_sifive_fe310/Makefile b/targets/riscv_sifive_fe310/Makefile new file mode 100644 index 00000000..84d1de22 --- /dev/null +++ b/targets/riscv_sifive_fe310/Makefile @@ -0,0 +1,134 @@ +LITEOSTOPDIR := $(shell if [ "$$PWD" != "" ]; then echo $$PWD; else pwd; fi) +export OS=$(shell uname -s) +LITEOSTOPDIR := ../../ +LITEOSTOPDIR := $(realpath $(LITEOSTOPDIR)) +export LITEOSTOPDIR + +# Selective compiler +COMPILE_NAME := riscv32-unknown-elf +#COMPILE_NAME = riscv-none-embed +ifeq ($(COMPILE_NAME), riscv-none-embed) +CROSS_COMPILE = riscv-none-embed- +VERSION_NUM = 8.1.0 +else +CROSS_COMPILE := riscv32-unknown-elf- +VERSION_NUM = 7.3.0 +endif + +# Select instruction set +MARCH := rv32imac +MABI := ilp32 + +LITEOS_PLATFORM := riscv_sifive_fe310 + + + +# System default +CFLAGS := -I $(LITEOSTOPDIR)/kernel/base/include \ + -I $(LITEOSTOPDIR)/kernel/include \ + -I $(LITEOSTOPDIR)/kernel/src \ + -I $(LITEOSTOPDIR)/kernel/arch/risc-v/include \ + -I $(LITEOSTOPDIR)/kernel/arch/risc-v/rvm32/include \ + -I $(LITEOSTOPDIR)/kernel/arch/risc-v/rvm32/include/asm \ + -I $(LITEOSTOPDIR)/components/cpup \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/include \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/include/asm \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/driver \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM) + +LOCAL_CSRCS := $(wildcard $(LITEOSTOPDIR)/kernel/src/*.c) \ + $(wildcard $(LITEOSTOPDIR)/kernel/src/mm/*.c) \ + $(wildcard $(LITEOSTOPDIR)/kernel/arch/risc-v/rvm32/src/*.c) \ + $(wildcard $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/*.c) \ + $(wildcard $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/driver/*.c) \ + $(wildcard $(LITEOSTOPDIR)/components/cpup/*.c) \ + $(wildcard $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/libc/*.c) + +LOCAL_ASMSRCS := $(wildcard $(LITEOSTOPDIR)/kernel/arch/risc-v/rvm32/src/*.S) \ + $(wildcard $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/los_start.S) \ + $(wildcard $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/libc/*.S) + +LOCAL_CSRCS += $(wildcard $(LITEOSTOPDIR)/components/bounds_checking_function/src/*.c) +CFLAGS += -I $(LITEOSTOPDIR)/components/bounds_checking_function/include + +CC = $(CROSS_COMPILE)gcc +AS = $(CROSS_COMPILE)as +AR = $(CROSS_COMPILE)ar +LD = $(CROSS_COMPILE)ld +GPP = $(CROSS_COMPILE)g++ +OBJCOPY = $(CROSS_COMPILE)objcopy +OBJDUMP = $(CROSS_COMPILE)objdump +SIZE = $(CROSS_COMPILE)size +NM = $(CROSS_COMPILE)nm +ARFLAGS = cr +OBJ_MKDIR = if [ ! -d $(dir $@) ]; then mkdir -p $(dir $@); fi + +HIDE = @ +RM = rm -rf +MAKE = make +OUT := out +OBJOUT := $(OUT)/obj +LIBA = $(OUT)/libs/libkernel.a +LITEOS_LIBS_DIR := -L$(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/$(OUT)/libs +LITEOS_GCCLIB := libgcc.a +LITEOS_TARGET = liteos +LITEOS_LIBDEP := -lkernel -lgcc -lc + +LITEOS_SSP = -fno-stack-protector +LITEOS_COPTS_BASE := -march=$(MARCH) -mabi=$(MABI) -static -fno-common -O2 $(LITEOS_SSP) +LITEOS_COPTS_EXTRA := -ffunction-sections -fdata-sections -fno-omit-frame-pointer -Wall -Wno-format-truncation +LITEOS_ASOPTS := -march=$(MARCH) -mabi=$(MABI) -static -O2 +LITEOS_LD_OPTS := --build-id=none -static -nostartfiles --gc-sections + +LITEOS_COMPILER_PATH := $(realpath $(shell $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/compiler_dir.sh $(CC))) +LITEOS_COMPILER_CXX_PATH = $(LITEOS_COMPILER_PATH)/$(COMPILE_NAME)/include +LITEOS_COMPILER_CXXLIB_PATH = $(LITEOS_COMPILER_PATH)/$(COMPILE_NAME)/lib/$(LITEOS_GCCLIB) +ifeq ($(COMPILE_NAME), riscv-none-embed) +LITEOS_COMPILER_GCCLIB_PATH = -L$(LITEOS_COMPILER_PATH)/lib/gcc/$(COMPILE_NAME)/$(VERSION_NUM)/$(MARCH)/$(MABI)/ \ + -L$(LITEOS_COMPILER_PATH)/$(COMPILE_NAME)/lib/$(MARCH)/$(MABI)/ +LITEOS_LD_OPTS += -mcmodel=medany -melf32lriscv +else +LITEOS_COMPILER_GCCLIB_PATH = -L$(LITEOS_COMPILER_PATH)/lib/gcc/$(COMPILE_NAME)/$(VERSION_NUM)/ \ + -L$(LITEOS_COMPILER_PATH)/$(COMPILE_NAME)/lib/ +endif +LITEOS_COMPILER_GCC_INCLUDE = -I $(LITEOS_COMPILER_PATH)/lib/gcc/$(COMPILE_NAME)/$(VERSION_NUM)/include \ + -I $(LITEOS_COMPILER_PATH)/$(COMPILE_NAME)/include + +LITEOS_LD_SCRIPT := $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/Liteos.ld +LITEOS_LDFLAGS := $(LITEOS_LD_OPTS) -T$(LITEOS_LD_SCRIPT) $(LITEOS_LIBS_DIR) $(LITEOS_COMPILER_GCCLIB_PATH) + +LITEOS_CFLAGS := $(LITEOS_COPTS_BASE) $(LITEOS_COPTS_EXTRA) -DLOSCFG_LIB_LIBC +LITEOS_ASFLAGS := $(LITEOS_ASOPTS) +LOCAL_FLAGS := $(CFLAGS) $(LITEOS_COMPILER_GCC_INCLUDE) +LOCAL_COBJS := $(patsubst %.c,$(OBJOUT)/%.o,$(LOCAL_CSRCS)) +LOCAL_ASMOBJS := $(patsubst %.S,$(OBJOUT)/%.o,$(LOCAL_ASMSRCS)) + +all: $(LITEOS_TARGET) + +$(LITEOS_TARGET): $(LIBA) + $(LD) $(LITEOS_LDFLAGS) $(LITEOS_TABLES_LDFLAGS) --start-group $(LITEOS_LIBDEP) --end-group -o $(OUT)/$@ + $(OBJCOPY) -S $(OUT)/$@ -Obinary $(OUT)/$@.bin + $(OBJDUMP) -hd $(OUT)/$@ >$(OUT)/$@.asm + $(OBJDUMP) -stD $(OUT)/$@ >$(OUT)/$@.map + +$(LOCAL_COBJS): $(OBJOUT)/%.o: %.c + $(HIDE)$(OBJ_MKDIR) + $(HIDE)$(CC) $(LITEOS_CFLAGS) $(LOCAL_FLAGS) -c $< -o $@ + +$(LOCAL_ASMOBJS): $(OBJOUT)/%.o: %.S + $(HIDE)$(OBJ_MKDIR) + $(HIDE)$(CC) $(LITEOS_ASFLAGS) $(LOCAL_FLAGS) -c $< -o $@ + +$(LIBA): $(LOCAL_COBJS) $(LOCAL_ASMOBJS) + $(HIDE)$(OBJ_MKDIR) + $(HIDE)$(AR) $(ARFLAGS) $@ $(LOCAL_COBJS) $(LOCAL_ASMOBJS) + +clean: + $(HIDE)$(RM) $(__OBJS) $(LITEOS_TARGET) $(OUT) $(BUILD) *.bak *~ + $(HIDE)echo "clean $(LITEOS_PLATFORM) finish" + +cleanall: + $(HIDE)rm -rf $(LITEOSTOPDIR)/out + $(HIDE)echo "clean all" + +.PHONY: all lib clean cleanall $(LITEOS_TARGET) diff --git a/targets/riscv_sifive_fe310/board.ld.S b/targets/riscv_sifive_fe310/board.ld.S new file mode 100644 index 00000000..06c3907d --- /dev/null +++ b/targets/riscv_sifive_fe310/board.ld.S @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +RAM_ADDR_START = 0x80000000; +RAM_ADDR_SIZE = 128M; +FLASH_LOAD_START = RAM_ADDR_START; +FLASH_LOAD_SIZE = RAM_ADDR_SIZE; +EXCEPT_STACK_SIZE = 2K; +NMI_STACK_SIZE = 1K; +START_AND_IRQ_STACK_SIZE = 8K; +HEAP_SIZE = 100M; + diff --git a/targets/riscv_sifive_fe310/compiler_dir.sh b/targets/riscv_sifive_fe310/compiler_dir.sh new file mode 100755 index 00000000..58ceda00 --- /dev/null +++ b/targets/riscv_sifive_fe310/compiler_dir.sh @@ -0,0 +1,42 @@ +#!/bin/bash + +#Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. +#Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. +# +#Redistribution and use in source and binary forms, with or without modification, +#are permitted provided that the following conditions are met: +# +#1. Redistributions of source code must retain the above copyright notice, this list of +# conditions and the following disclaimer. +# +#2. Redistributions in binary form must reproduce the above copyright notice, this list +# of conditions and the following disclaimer in the documentation and/or other materials +# provided with the distribution. +# +#3. Neither the name of the copyright holder nor the names of its contributors may be used +# to endorse or promote products derived from this software without specific prior written +# permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR +# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +set -e + +declare GCC="$1" +function compiler_dir() +{ + gcc_path=$(dirname $(which ${GCC}))/.. + echo "${gcc_path}" +} + +compiler_dir + diff --git a/targets/riscv_sifive_fe310/driver/mtimer.c b/targets/riscv_sifive_fe310/driver/mtimer.c new file mode 100644 index 00000000..c2d48efc --- /dev/null +++ b/targets/riscv_sifive_fe310/driver/mtimer.c @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "mtimer.h" +#include "los_base.h" +#include "los_hwi.h" +#include "los_tick_pri.h" +#include "riscv_hal.h" +#include "soc.h" +#include "plic.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +VOID MTimerCpuCycle(UINT32 *contHi, UINT32 *contLo) +{ + READ_UINT32(*contLo, MTIMER); + READ_UINT32(*contHi, MTIMER + 4); + return; +} + +STATIC INLINE VOID UpdateMtimerCmp(UINT32 tick) +{ + unsigned long long timer; + unsigned timerL, timerH; + READ_UINT32(timerL, MTIMER); + READ_UINT32(timerH, MTIMER + 4); + timer = (UINT64)(((UINT64)timerH << 32) + timerL); + timer += tick; + WRITE_UINT32(0xffffffff, MTIMERCMP + 4); + WRITE_UINT32((UINT32)timer, MTIMERCMP); + WRITE_UINT32((UINT32)(timer >> 32), MTIMERCMP + 4); +} + +STATIC VOID OsMachineTimerInterrupt(UINT32 sysCycle) +{ + OsTickHandler(); + UpdateMtimerCmp(sysCycle); +} + +UINT32 MTimerTickInit(UINT32 period) +{ + unsigned int ret; + ret = LOS_HwiCreate(RISCV_MACH_TIMER_IRQ, 0x1, 0, OsMachineTimerInterrupt, period); + if (ret != LOS_OK) { + return ret; + } + + WRITE_UINT32(0xffffffff, MTIMERCMP + 4); + WRITE_UINT32(period, MTIMERCMP); + WRITE_UINT32(0x0, MTIMERCMP + 4); + + OsIrqEnable(RISCV_MACH_TIMER_IRQ); + return LOS_OK; +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/targets/riscv_sifive_fe310/driver/mtimer.h b/targets/riscv_sifive_fe310/driver/mtimer.h new file mode 100644 index 00000000..1129e1d9 --- /dev/null +++ b/targets/riscv_sifive_fe310/driver/mtimer.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _MTIMER_H +#define _MTIMER_H + +#include "los_typedef.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +extern VOID MTimerCpuCycle(UINT32 *contHi, UINT32 *contLo); +extern UINT32 MTimerTickInit(UINT32 period); + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ +#endif diff --git a/targets/riscv_sifive_fe310/driver/plic.c b/targets/riscv_sifive_fe310/driver/plic.c new file mode 100644 index 00000000..83f5bb85 --- /dev/null +++ b/targets/riscv_sifive_fe310/driver/plic.c @@ -0,0 +1,125 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "plic.h" +#include "soc.h" +#include "los_base.h" +#include "los_hwi_pri.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +static VOID OsMachineExternalInterrupt(UINT32 arg) +{ + volatile UINT32 *plicReg = (volatile UINT32 *)(PLIC_REG_BASE + 0x4); + UINT32 irqNum, saveIrqNum; + + READ_UINT32(irqNum, plicReg); + saveIrqNum = irqNum; + + if ((irqNum >= OS_RISCV_CUSTOM_IRQ_VECTOR_CNT) || (irqNum == 0)) { + OsHwiDefaultHandler(irqNum); + } + + irqNum += RISCV_SYS_MAX_IRQ; + + g_hwiForm[irqNum].pfnHook(g_hwiForm[irqNum].uwParam); + + WRITE_UINT32(saveIrqNum, plicReg); +} + +VOID PlicIrqInit() +{ + volatile UINT32 *plicPrioReg = (volatile UINT32 *)PLIC_PRIO_BASE; + volatile UINT32 *plicEnReg = (volatile UINT32 *)PLIC_ENABLE_BASE; + volatile UINT32 *plicReg = (volatile UINT32 *)PLIC_REG_BASE; + INT32 i; + UINT32 ret; + + for (i = 0; i < ((OS_RISCV_CUSTOM_IRQ_VECTOR_CNT >> 5) + 1); i++) { + WRITE_UINT32(0x0, plicEnReg); + plicEnReg++; + } + + for (i = 0; i < OS_RISCV_CUSTOM_IRQ_VECTOR_CNT; i++) { + WRITE_UINT32(0x0, plicPrioReg); + plicPrioReg++; + } + + WRITE_UINT32(0, plicReg); + + ret = LOS_HwiCreate(RISCV_MACH_EXT_IRQ, 0x1, 0, OsMachineExternalInterrupt, 0); + if (ret != LOS_OK) { + PRINT_ERR("Creat machine external failed! ret : 0x%x\n", ret); + } +} + +VOID PlicIrqSetPrio(UINT32 vector, UINT32 pri) +{ + volatile UINT32 *plicReg = (volatile UINT32 *)PLIC_PRIO_BASE; + + plicReg += (vector - RISCV_SYS_MAX_IRQ); + WRITE_UINT32(pri, plicReg); +} + +VOID PlicIrqEnable(UINT32 vector) +{ + UINT32 irqValue; + UINT32 locIrq = vector - RISCV_SYS_MAX_IRQ; + volatile UINT32 *plicReg = (volatile UINT32 *)PLIC_ENABLE_BASE; + + plicReg += (locIrq >> 5); + READ_UINT32(irqValue, plicReg); + irqValue |= (1 << (locIrq & 31)); + WRITE_UINT32(irqValue, plicReg); +} + +VOID PlicIrqDisable(UINT32 vector) +{ + UINT32 irqValue; + UINT32 locIrq = vector - RISCV_SYS_MAX_IRQ; + volatile UINT32 *plicReg = (volatile UINT32 *)PLIC_ENABLE_BASE; + + plicReg += (locIrq >> 5); + READ_UINT32(irqValue, plicReg); + irqValue &= ~(1 << (locIrq & 31)); + WRITE_UINT32(irqValue, plicReg); +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + diff --git a/targets/riscv_sifive_fe310/driver/plic.h b/targets/riscv_sifive_fe310/driver/plic.h new file mode 100644 index 00000000..701f138e --- /dev/null +++ b/targets/riscv_sifive_fe310/driver/plic.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _PLIC_H +#define _PLIC_H + +#include "los_typedef.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +extern VOID PlicIrqInit(VOID); +extern VOID PlicIrqSetPrio(UINT32 vector, UINT32 pri); +extern VOID PlicIrqEnable(UINT32 vector); +extern VOID PlicIrqDisable(UINT32 vector); + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ +#endif diff --git a/targets/riscv_sifive_fe310/driver/uart.c b/targets/riscv_sifive_fe310/driver/uart.c new file mode 100644 index 00000000..5da7ee11 --- /dev/null +++ b/targets/riscv_sifive_fe310/driver/uart.c @@ -0,0 +1,93 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "uart.h" +#include "soc.h" +#include "los_base.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +/******* uart register offset *****/ +#define UART_TX_DATA 0x00 +#define UART_RX_DATA 0x04 +#define UART_TX_CTRL 0x08 +#define UART_RX_CTRL 0x0C +#define UART_IN_ENAB 0x10 +#define UART_IN_PEND 0x14 +#define UART_BR_DIV 0x18 + +INT32 UartPutc(INT32 c, VOID *file) +{ + (VOID)file; + + while (GET_UINT32(UART0_BASE + UART_TX_DATA) & 0x80000000) { + + } + + WRITE_UINT32((INT32)(c & 0xFF), UART0_BASE + UART_TX_DATA); + + return c; +} + +INT32 UartOut(INT32 c, VOID *file) +{ + if (c == '\n') { + return UartPutc('\r', file); + } + + return UartPutc(c, file); +} + +VOID UartInit() +{ + UINT32 uartDiv; + + /* Enable TX and RX channels */ + WRITE_UINT32(1 << 0, UART0_BASE + UART_TX_CTRL); + WRITE_UINT32(1 << 0, UART0_BASE + UART_RX_CTRL); + + /* Set baud rate */ + uartDiv = UART0_CLK_FREQ / UART0_BAUDRAT - 1; + WRITE_UINT32(uartDiv, UART0_BASE + UART_BR_DIV); + + /* Ensure that uart IRQ is disabled initially */ + WRITE_UINT32(0, UART0_BASE + UART_IN_ENAB); +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/targets/riscv_sifive_fe310/driver/uart.h b/targets/riscv_sifive_fe310/driver/uart.h new file mode 100644 index 00000000..e98593dc --- /dev/null +++ b/targets/riscv_sifive_fe310/driver/uart.h @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _UART_H +#define _UART_H +#include "los_typedef.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +extern INT32 UartPutc(INT32 c, VOID *file); +extern INT32 UartOut(INT32 c, VOID *file); +extern VOID UartInit(VOID); + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ +#endif diff --git a/targets/riscv_sifive_fe310/include/asm/soc.h b/targets/riscv_sifive_fe310/include/asm/soc.h new file mode 100644 index 00000000..470c4b17 --- /dev/null +++ b/targets/riscv_sifive_fe310/include/asm/soc.h @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef _SOC_H +#define _SOC_H +#include "soc_common.h" + +#define MSIP 0x2000000 +#define MTIMERCMP 0x2004000 +#define MTIMER 0x200BFF8 +#define CLOCK_CONTRAL_REG 0x10008000 + +/* interrupt base addr : 0xc000000 + 4 * interrupt ID + * [2:0] priority + * [31:3] reserved + */ +#define PLIC_PRIO_BASE 0xC000000 +#define PLIC_PEND_BASE 0xC001000 //interrupt 0-31 +#define PLIC_PEND_REG2 0xC001004 //interrupt 32-52 +#define PLIC_ENABLE_BASE 0xC002000 //interrupt 0-31 +#define PLIC_ENABLE_REG2 0xC002004 //interrupt 32-52 +#define PLIC_REG_BASE 0xC200000 + +#define UART0_BASE 0x10013000 +#define UART1_BASE 0x10023000 + +#define UART0_CLK_FREQ 0x32000000 +#define UART1_CLK_FREQ 0x32000000 +#define UART0_BAUDRAT 115200 + +#define RISCV_SYS_MAX_IRQ 11 +#define RISCV_WDOGCMP_IRQ (RISCV_SYS_MAX_IRQ + 1) +#define RISCV_RTCCMP_IRQ (RISCV_SYS_MAX_IRQ + 2) +#define RISCV_UART0_IRQ (RISCV_SYS_MAX_IRQ + 3) +#define RISCV_UART1_IRQ (RISCV_SYS_MAX_IRQ + 4) + +#define RISCV_PLIC_VECTOR_CNT 53 + +#endif diff --git a/targets/riscv_sifive_fe310/include/riscv_hal.h b/targets/riscv_sifive_fe310/include/riscv_hal.h new file mode 100644 index 00000000..cc331ebb --- /dev/null +++ b/targets/riscv_sifive_fe310/include/riscv_hal.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RISCV_HAL_H +#define _RISCV_HAL_H + +#include "los_typedef.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +/* + * backtrace + */ +extern CHAR *__except_stack_top; +extern CHAR *__start_and_irq_stack_top; +extern CHAR *__text_start; +extern CHAR *__text_end; +extern CHAR *__bss_end; + +extern BOOL OsBackTraceRaCheck(UINT32 value); +extern BOOL OsBackTraceFpCheck(UINT32 value); + +extern VOID OsIrqDisable(UINT32 vector); +extern VOID OsIrqEnable(UINT32 vector); +extern VOID OsSetLocalInterPri(UINT32 vector, UINT16 prior); + +extern VOID OsGetCpuCycle(UINT32 *cntHi, UINT32 *cntLo); +extern VOID SysClockInit(UINT32 period); + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif + +#endif /* _RISCV_HAL_H */ diff --git a/targets/riscv_sifive_fe310/libc/dprintf.c b/targets/riscv_sifive_fe310/libc/dprintf.c new file mode 100644 index 00000000..fd7ecc1d --- /dev/null +++ b/targets/riscv_sifive_fe310/libc/dprintf.c @@ -0,0 +1,175 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "stdarg.h" +#include +#include "los_printf.h" +#include "uart.h" + +int putchar(int n) +{ + return UartOut(n, NULL); +} + +int puts(const char *string) +{ + int count = 0; + char *s = (char *)string; + while (*s != '\0') { + putchar(*s); + s++; + count++; + } + + return count; +} + +static int hex2asc(int n) +{ + n &= 15; + if(n > 9){ + return ('a' - 10) + n; + } else { + return '0' + n; + } +} + +static void dputs(char const *s, int (*pFputc)(int n, void *cookie), void *cookie) +{ + while (*s) { + pFputc(*s++, cookie); + } +} + +void __dprintf(char const *fmt, va_list ap, + int (*pFputc)(int n, void *cookie), + void *cookie) +{ + char scratch[256]; + + for(;;){ + switch(*fmt){ + case 0: + va_end(ap); + return; + case '%': + switch(fmt[1]) { + case 'c': { + unsigned n = va_arg(ap, unsigned); + pFputc(n, cookie); + fmt += 2; + continue; + } + case 'h': { + unsigned n = va_arg(ap, unsigned); + pFputc(hex2asc(n >> 12), cookie); + pFputc(hex2asc(n >> 8), cookie); + pFputc(hex2asc(n >> 4), cookie); + pFputc(hex2asc(n >> 0), cookie); + fmt += 2; + continue; + } + case 'b': { + unsigned n = va_arg(ap, unsigned); + pFputc(hex2asc(n >> 4), cookie); + pFputc(hex2asc(n >> 0), cookie); + fmt += 2; + continue; + } + case 'p': + case 'X': + case 'x': { + unsigned n = va_arg(ap, unsigned); + char *p = scratch + 15; + *p = 0; + do { + *--p = hex2asc(n); + n = n >> 4; + } while(n != 0); + while(p > (scratch + 7)) *--p = '0'; + dputs(p, pFputc, cookie); + fmt += 2; + continue; + } + case 'd': { + int n = va_arg(ap, int); + char *p = scratch + 15; + *p = 0; + if(n < 0) { + pFputc('-', cookie); + n = -n; + } + do { + *--p = (n % 10) + '0'; + n /= 10; + } while(n != 0); + dputs(p, pFputc, cookie); + fmt += 2; + continue; + } + case 'u': { + unsigned int n = va_arg(ap, unsigned int); + char *p = scratch + 15; + *p = 0; + do { + *--p = (n % 10) + '0'; + n /= 10; + } while(n != 0); + dputs(p, pFputc, cookie); + fmt += 2; + continue; + } + case 's': { + char *s = va_arg(ap, char*); /*lint !e64*/ + if(s == 0) s = "(null)"; + dputs(s, pFputc, cookie); + fmt += 2; + continue; + } + } + pFputc(*fmt++, cookie); + break; + case '\n': + pFputc('\r', cookie); + default: /*lint !e616*/ + pFputc(*fmt++, cookie); + } + } +} + +int printf(char const *str, ...) +{ + va_list ap; + va_start(ap, str); + __dprintf(str, ap, UartPutc, 0); + va_end(ap); + return 0; +} diff --git a/targets/riscv_sifive_fe310/los_start.S b/targets/riscv_sifive_fe310/los_start.S new file mode 100644 index 00000000..d6a2420f --- /dev/null +++ b/targets/riscv_sifive_fe310/los_start.S @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "soc.h" + +.macro PUSH_CALLER_REG + addi sp, sp, -(INT_SIZE_ON_STACK) + SREG t6, 16 * REGBYTES(sp) + SREG t5, 17 * REGBYTES(sp) + SREG t4, 18 * REGBYTES(sp) + SREG t3, 19 * REGBYTES(sp) + SREG a7, 20 * REGBYTES(sp) + SREG a6, 21 * REGBYTES(sp) + SREG a5, 22 * REGBYTES(sp) + SREG a4, 23 * REGBYTES(sp) + SREG a3, 24 * REGBYTES(sp) + SREG a2, 25 * REGBYTES(sp) + SREG a1, 26 * REGBYTES(sp) + SREG a0, 27 * REGBYTES(sp) + SREG t2, 28 * REGBYTES(sp) + SREG t1, 29 * REGBYTES(sp) + SREG t0, 30 * REGBYTES(sp) + SREG ra, 31 * REGBYTES(sp) +.endm + +.extern memset +.global _start +.section .start.text +.align 4 +_start: + li t0, RISCV_MSTATUS_MPP + csrw mstatus, t0 + csrw mie, zero + la t0, TrapVector + csrw mtvec, t0 # direct mode + + .option push + .option norelax + la gp, __global_pointer$ + .option pop + + la t0, __bss_start + la t1, __bss_end +2: + sw zero, 0x0(t0) + addi t0, t0, 0x4 + bgtu t1, t0, 2b + + la sp, __start_and_irq_stack_top + + tail main diff --git a/targets/riscv_sifive_fe310/main.c b/targets/riscv_sifive_fe310/main.c new file mode 100644 index 00000000..cdd516b9 --- /dev/null +++ b/targets/riscv_sifive_fe310/main.c @@ -0,0 +1,122 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "los_sys.h" +#include "los_tick.h" +#include "los_task.h" +#include "los_config.h" +#include "los_exc.h" +#include "los_printf.h" +#include "uart.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cpluscplus */ +#endif /* __cpluscplus */ + +UINT8 g_memStart[OS_SYS_MEM_SIZE]; + +VOID TaskSampleEntry2(VOID) +{ + while(1) { + LOS_TaskDelay(1000); + printf("TaskSampleEntry2 running...\n\r"); + } +} + + +VOID TaskSampleEntry1(VOID) +{ + while(1) { + LOS_TaskDelay(1000); + printf("TaskSampleEntry1 running...\n\r"); + } + +} + +UINT32 TaskSample(VOID) +{ + UINT32 ret; + UINT32 taskID1, taskID2; + TSK_INIT_PARAM_S task1 = { 0 }; + task1.pfnTaskEntry = (TSK_ENTRY_FUNC)TaskSampleEntry1; + task1.uwStackSize = 0x1000; + task1.pcName = "TaskSampleEntry1"; + task1.usTaskPrio = 6; + ret = LOS_TaskCreate(&taskID1, &task1); + + task1.pfnTaskEntry = (TSK_ENTRY_FUNC)TaskSampleEntry2; + task1.uwStackSize = 0x1000; + task1.pcName = "TaskSampleEntry2"; + task1.usTaskPrio = 7; + ret = LOS_TaskCreate(&taskID2, &task1); + + return ret; +} + +/***************************************************************************** + Function : main + Description : Main function entry + Input : None + Output : None + Return : None + *****************************************************************************/ +LITE_OS_SEC_TEXT_INIT INT32 main(VOID) +{ + UINT32 ret; + + UartInit(); + + PRINTK("\n OHOS start \n\r"); + + ret = LOS_KernelInit(); + if (ret != LOS_OK) { + goto START_FAILED; + } + + TaskSample(); + + PRINTK("\n OHOS scheduler!!! \n\r"); + + LOS_Start(); + +START_FAILED: + while (1) { + __asm volatile("wfi"); + } +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cpluscplus */ +#endif /* __cpluscplus */ diff --git a/targets/riscv_sifive_fe310/qemu_sifive_run.sh b/targets/riscv_sifive_fe310/qemu_sifive_run.sh new file mode 100755 index 00000000..950b3acf --- /dev/null +++ b/targets/riscv_sifive_fe310/qemu_sifive_run.sh @@ -0,0 +1,39 @@ +#!/bin/bash + +#Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. +#Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. +# +#Redistribution and use in source and binary forms, with or without modification, +#are permitted provided that the following conditions are met: +# +#1. Redistributions of source code must retain the above copyright notice, this list of +# conditions and the following disclaimer. +# +#2. Redistributions in binary form must reproduce the above copyright notice, this list +# of conditions and the following disclaimer in the documentation and/or other materials +# provided with the distribution. +# +#3. Neither the name of the copyright holder nor the names of its contributors may be used +# to endorse or promote products derived from this software without specific prior written +# permission. +# +# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, +# THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR +# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR +# CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, +# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, +# PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +# OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +# WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR +# OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF +# ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +set -e + +qemu-system-riscv32 \ + -m 128M \ + -kernel out/liteos \ + -machine sifive_u \ + -nographic \ + -append "root=/dev/vda or console=ttyS0" diff --git a/targets/riscv_sifive_fe310/riscv_hal.c b/targets/riscv_sifive_fe310/riscv_hal.c new file mode 100644 index 00000000..a11ff494 --- /dev/null +++ b/targets/riscv_sifive_fe310/riscv_hal.c @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "riscv_hal.h" +#include "los_printf.h" +#include "soc.h" +#include "plic.h" +#include "mtimer.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +VOID OsIrqDisable(UINT32 vector) +{ + if (vector <= RISCV_SYS_MAX_IRQ) { + CLEAR_CSR(mie, 1 << vector); + } else { + PlicIrqDisable(vector); + } +} + +VOID OsIrqEnable(UINT32 vector) +{ + if (vector <= RISCV_SYS_MAX_IRQ) { + SET_CSR(mie, 1 << vector); + } else { + PlicIrqEnable(vector); + } +} + +VOID OsSetLocalInterPri(UINT32 interPriNum, UINT16 prior) +{ + PlicIrqSetPrio(interPriNum, prior); +} + +VOID OsGetCpuCycle(UINT32 *cntHi, UINT32 *cntLo) +{ + if ((cntHi == NULL) || (cntLo == NULL)) { + return; + } + + MTimerCpuCycle(cntHi, cntLo); +} + +BOOL OsBackTraceFpCheck(UINT32 value) +{ + if (value >= (UINT32)(UINTPTR)(&__bss_end)) { + return TRUE; + } + + if ((value >= (UINT32)(UINTPTR)(&__start_and_irq_stack_top)) && (value < (UINT32)(UINTPTR)(&__except_stack_top))) { + return TRUE; + } + + return FALSE; +} + +BOOL OsBackTraceRaCheck(UINT32 value) +{ + BOOL ret = FALSE; + + if ((value >= (UINT32)(UINTPTR)(&__text_start)) && + (value < (UINT32)(UINTPTR)(&__text_end))) { + ret = TRUE; + } + + return ret; +} + +VOID SysClockInit(UINT32 period) +{ + UINT32 ret; + ret = MTimerTickInit(period); + if (ret != LOS_OK) { + PRINT_ERR("Creat Mtimer failed! ret : 0x%x \n", ret); + return; + } + + PlicIrqInit(); + + OsIrqEnable(RISCV_MACH_EXT_IRQ); +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif +#endif diff --git a/targets/riscv_sifive_fe310/target_config.h b/targets/riscv_sifive_fe310/target_config.h new file mode 100644 index 00000000..4f563763 --- /dev/null +++ b/targets/riscv_sifive_fe310/target_config.h @@ -0,0 +1,200 @@ +/* + * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. + * Copyright (c) 2020, Huawei Device Co., Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _TARGETS_CONFIG_H +#define _TARGETS_CONFIG_H +#include "soc.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define OS_SYS_CLOCK 10000000UL + +#define LOSCFG_BASE_CORE_TICK_PER_SECOND 1000 + +/****************************** System clock module configuration ****************************/ +#define LOSCFG_BASE_CORE_TIMER_NUM 7 + +/****************************** Task module configuration ********************************/ +/** + * @ingroup los_config + * Default task priority + */ +#define LOSCFG_BASE_CORE_TSK_DEFAULT_PRIO 10 + +/** + * @ingroup los_config + * Maximum supported number of tasks except the idle task rather than the number of usable tasks + */ +#define LOSCFG_BASE_CORE_TSK_LIMIT 20 // max num task + +/** + * @ingroup los_config + * Size of the idle task stack + */ +#define LOSCFG_BASE_CORE_TSK_IDLE_STACK_SIZE SIZE(0x500) // IDLE task stack + +/** + * @ingroup los_config + * Default task stack size + */ +#define LOSCFG_BASE_CORE_TSK_DEFAULT_STACK_SIZE SIZE(0x2D0) // default stack + +/** + * @ingroup los_config + * Minimum stack size. + */ +#define LOS_TASK_MIN_STACK_SIZE (ALIGN(0x130, 16)) + +/** + * @ingroup los_config + * Configuration item for task Robin tailoring + */ +#define LOSCFG_BASE_CORE_TIMESLICE YES // task-ROBIN moduel cutting switch + +/** + * @ingroup los_config + * Longest execution time of tasks with the same priorities + */ +#define LOSCFG_BASE_CORE_TIMESLICE_TIMEOUT 10 + +/** + * @ingroup los_config + * Configuration item for task (stack) monitoring module tailoring + */ +#define LOSCFG_BASE_CORE_TSK_MONITOR YES + +/** + * @ingroup los_config + * Define a usable task priority.Highest task priority. + */ +#define LOS_TASK_PRIORITY_HIGHEST 0 + +/** + * @ingroup los_config + * Define a usable task priority.Lowest task priority. + */ +#define LOS_TASK_PRIORITY_LOWEST 31 + +/****************************** Semaphore module configuration ******************************/ +/** + * @ingroup los_config + * Configuration item for semaphore module tailoring + */ +#define LOSCFG_BASE_IPC_SEM YES + +/** + * @ingroup los_config + * Maximum supported number of semaphores + */ +#define LOSCFG_BASE_IPC_SEM_LIMIT 10 // the max sem-numb + +/****************************** mutex module configuration ******************************/ +/** + * @ingroup los_config + * Configuration item for mutex module tailoring + */ +#define LOSCFG_BASE_IPC_MUX YES + +/** + * @ingroup los_config + * Maximum supported number of mutexes + */ +#define LOSCFG_BASE_IPC_MUX_LIMIT 10 // the max mutex-num + +/****************************** Queue module configuration ********************************/ +/** + * @ingroup los_config + * Configuration item for queue module tailoring + */ +#define LOSCFG_BASE_IPC_QUEUE YES + +/** + * @ingroup los_config + * Maximum supported number of queues rather than the number of usable queues + */ +#define LOSCFG_BASE_IPC_QUEUE_LIMIT 10 //the max queue-numb + +/****************************** Software timer module configuration **************************/ +/** + * @ingroup los_config + * Configuration item for software timer module tailoring + */ +#define LOSCFG_BASE_CORE_SWTMR YES + +/** + * @ingroup los_config + * Maximum supported number of software timers rather than the number of usable software timers + */ +#define LOSCFG_BASE_CORE_SWTMR_LIMIT 10 // the max SWTMR numb + +/****************************** Memory module configuration **************************/ +/** + * @ingroup los_config + * Configuration module tailoring of mem node integrity checking + */ +#define LOSCFG_BASE_MEM_NODE_INTEGRITY_CHECK YES + +/** + * @ingroup los_config + * Configuration module tailoring of mem node size checking + */ +#define LOSCFG_BASE_MEM_NODE_SIZE_CHECK YES + +/** + * @ingroup los_config + * Number of memory checking blocks + */ +#define OS_SYS_MEM_NUM 20 + +#define LOSCFG_KERNEL_MEM_SLAB NO + +#ifdef LITEOSCFG_EXTENDED_KERNEL +#define LOSCFG_KERNEL_TICKLESS NO +#define LOSCFG_BASE_CORE_CPUP YES +#endif + +#ifdef LITEOSCFG_CMSIS +#define CMSIS_OS_VER 1 +#define LOSCFG_COMPAT_CMSIS_FW YES +#endif + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + + +#endif /* _TARGETS_CONFIG_H */