diff --git a/arch/BUILD.gn b/arch/BUILD.gn index f1bed67e..b027c2e1 100644 --- a/arch/BUILD.gn +++ b/arch/BUILD.gn @@ -39,7 +39,8 @@ module_group("arch") { "$board_cpu" == "cortex-m4" || "$board_cpu" == "cortex-m7" || "$board_cpu" == "cortex-m33" || "$board_cpu" == "cortex-m55") { modules += [ "arm" ] - } else if ("$board_cpu" == "ck802" || "$board_cpu" == "e802") { + } else if ("$board_cpu" == "ck802" || "$board_cpu" == "e802" || + "$board_cpu" == "ck804ef") { modules += [ "csky" ] } else if ("$board_cpu" == "") { if ("$board_arch" == "rv32imac" || "$board_arch" == "rv32imafdc") { diff --git a/arch/csky/v2/gcc/los_arch_context.h b/arch/csky/v2/gcc/los_arch_context.h index bbff2cf3..04c25c67 100644 --- a/arch/csky/v2/gcc/los_arch_context.h +++ b/arch/csky/v2/gcc/los_arch_context.h @@ -59,13 +59,33 @@ typedef struct TagTskContext { UINT32 R12; UINT32 R13; UINT32 R15; +#ifdef CPU_CK804 + UINT32 R16; + UINT32 R17; + UINT32 R18; + UINT32 R19; + UINT32 R20; + UINT32 R21; + UINT32 R22; + UINT32 R23; + UINT32 R24; + UINT32 R25; + UINT32 R26; + UINT32 R27; + UINT32 R28; + UINT32 R29; + UINT32 R30; + UINT32 R31; +#endif UINT32 EPSR; UINT32 EPC; } TaskContext; VOID HalStartToRun(VOID); VOID HalTaskContextSwitch(VOID); +#ifndef CPU_CK804 VOID HalIrqEndCheckNeedSched(VOID); +#endif #ifdef __cplusplus #if __cplusplus diff --git a/arch/csky/v2/gcc/los_arch_interrupt.h b/arch/csky/v2/gcc/los_arch_interrupt.h index c9db621a..bcd5728e 100644 --- a/arch/csky/v2/gcc/los_arch_interrupt.h +++ b/arch/csky/v2/gcc/los_arch_interrupt.h @@ -82,7 +82,7 @@ typedef VOID (**HWI_VECTOR_FUNC)(VOID); * @ingroup los_arch_interrupt * Count of interrupts. */ -extern UINT32 g_intCount; +extern volatile UINT32 g_intCount; /* * * @ingroup los_arch_interrupt diff --git a/arch/csky/v2/gcc/los_context.c b/arch/csky/v2/gcc/los_context.c index 6a82b9cd..7fc61e49 100644 --- a/arch/csky/v2/gcc/los_context.c +++ b/arch/csky/v2/gcc/los_context.c @@ -38,7 +38,9 @@ #include "los_interrupt.h" #include "los_debug.h" +#ifndef CPU_CK804 STATIC UINT32 g_sysNeedSched = FALSE; +#endif /* **************************************************************************** Function : ArchInit @@ -93,8 +95,29 @@ LITE_OS_SEC_TEXT_INIT VOID *ArchTskStackInit(UINT32 taskID, UINT32 stackSize, VO context->R11 = 0x11111111L; context->R12 = 0x12121212L; context->R13 = 0x13131313L; +#ifdef CPU_CK804 + context->R15 = (UINT32)ArchSysExit; + context->R16 = 0x16161616L; + context->R17 = 0x17171717L; + context->R18 = 0x18181818L; + context->R19 = 0x19191919L; + context->R20 = 0x20202020L; + context->R21 = 0x21212121L; + context->R22 = 0x22222222L; + context->R23 = 0x23232323L; + context->R24 = 0x24242424L; + context->R25 = 0x25252525L; + context->R26 = 0x26262626L; + context->R27 = 0x27272727L; + context->R28 = 0x28282828L; + context->R29 = 0x29292929L; + context->R30 = 0x30303030L; + context->R31 = 0x31313131L; + context->EPSR = 0x80000340L; +#else context->R15 = (UINT32)ArchSysExit; context->EPSR = 0xe0000144L; +#endif context->EPC = (UINT32)OsTaskEntry; return (VOID *)context; } @@ -107,6 +130,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 ArchStartSchedule(VOID) return LOS_OK; /* never return */ } +#ifndef CPU_CK804 VOID HalIrqEndCheckNeedSched(VOID) { if (g_sysNeedSched && g_taskScheduled && LOS_CHECK_SCHEDULE) { @@ -132,3 +156,10 @@ VOID ArchTaskSchedule(VOID) LOS_IntRestore(intSave); return; } +#else +VOID ArchTaskSchedule(VOID) +{ + HalTaskContextSwitch(); +} +#endif + diff --git a/arch/csky/v2/gcc/los_dispatch.S b/arch/csky/v2/gcc/los_dispatch.S index 3ce7bb07..7c89e880 100644 --- a/arch/csky/v2/gcc/los_dispatch.S +++ b/arch/csky/v2/gcc/los_dispatch.S @@ -32,6 +32,89 @@ #define OS_TASK_STATUS_RUNNING 0x0010 #define VIC_TSPDR 0XE000EC08 +#ifdef CPU_CK804 +.section .text +.align 2 +.type HalStartToRun, %function +.global HalStartToRun +HalStartToRun: + lrw r1, g_losTask + lrw r2, g_losTask + 4 + + ldw r0, (r2) + + st.w r0, (r1) + st.w r0, (r2) + + ldw sp, (r0) + + ldw r0, (sp, 128) + mtcr r0, epc + ldw r0, (sp, 124) + mtcr r0, epsr + ldw r15, (sp, 56) + ldm r0-r13, (sp) + addi sp, 60 + ldm r16-r31, (sp) + addi sp, 72 + + rte + +.align 2 +.type HalTaskContextSwitch, %function +.global HalTaskContextSwitch +HalTaskContextSwitch: + lrw r0, VIC_TSPDR + bgeni r1, 0 + stw r1, (r0) + nop + nop + nop + rts + +.align 2 +.type tspend_handler, %function +.global tspend_handler +tspend_handler: + + subi sp, 132 + stm r0-r13, (sp) + stw r15, (sp, 56) + addi r0, sp, 60 + stm r16-r31, (r0) + mfcr r1, epsr + stw r1, (sp, 124) + mfcr r1, epc + stw r1, (sp, 128) + + jbsr OsSchedTaskSwitch + bez r0, ret_con + + lrw r2, g_losTask + ldw r0, (r2) + stw sp, (r0) + + lrw r3, g_losTask + 4 + ldw r0, (r3) + stw r0, (r2) + + ldw sp, (r0) + + ret_con: + ldw r0, (sp, 128) + mtcr r0, epc + ldw r0, (sp, 124) + mtcr r0, epsr + ldw r15, (sp, 56) + ldm r0-r13, (sp) + addi sp, 60 + ldm r16-r31, (sp) + + addi sp, 72 + + rte + +#else .section .text .align 2 .type HalStartToRun, %function @@ -87,3 +170,4 @@ HalTaskContextSwitch: rte +#endif diff --git a/arch/csky/v2/gcc/los_exc.S b/arch/csky/v2/gcc/los_exc.S index 23f2a33f..46fe8b24 100644 --- a/arch/csky/v2/gcc/los_exc.S +++ b/arch/csky/v2/gcc/los_exc.S @@ -32,6 +32,57 @@ .import HalExcHandleEntry .extern g_trapStackBase +#ifdef CPU_CK804 +.section .text +.align 2 +.global HandleEntry +HandleEntry: + mov r10, sp + lrw r14, g_trapStackBase + + stm r0-r15, (sp) + stw r10, (sp, 56) + addi r0, sp, 64 + stm r16-r31, (r0) + mfcr r0, epsr + stw r0, (sp, 128) + mfcr r0, epc + stw r0, (sp, 132) + mov r0, sp + + mfcr r1, epc + + mov sp, r10 + lrw r2, HalExcHandleEntry + jmp r2 + +.section .text +.align 2 +.global IrqEntry +IrqEntry: + psrset ee + subi sp, 136 + stm r0-r15, (sp) + addi r0, sp, 64 + stm r16-r31, (r0) + mfcr r0, epsr + stw r0, (sp, 128) + mfcr r0, epc + stw r0, (sp, 132) + + jbsr HalInterrupt + + ldw r0, (sp, 132) + mtcr r0, epc + ldw r0, (sp, 128) + bseti r0, r0, 6 + mtcr r0, epsr + ldm r0-r15, (sp) + addi sp, 64 + ldm r16-r31, (sp) + addi sp, 72 + rte +#else .section .text .align 2 .global HandleEntry @@ -75,3 +126,4 @@ IrqEntry: ldm r0-r15, (sp) addi sp, 72 rte +#endif \ No newline at end of file diff --git a/arch/csky/v2/gcc/los_interrupt.c b/arch/csky/v2/gcc/los_interrupt.c index 7131fd40..2bea0454 100644 --- a/arch/csky/v2/gcc/los_interrupt.c +++ b/arch/csky/v2/gcc/los_interrupt.c @@ -52,13 +52,12 @@ #define MASK_8_BITS 0xFF #define MASK_32_BITS 0xFFFFFFFF #define BYTES_OF_128_INT 4 -#define TIM_INT_NUM 1 #define OS_USER_HWI_MIN 0 #define OS_USER_HWI_MAX (LOSCFG_PLATFORM_HWI_LIMIT - 1) #define HWI_ALIGNSIZE 0x400 -UINT32 g_intCount = 0; +UINT32 volatile g_intCount = 0; CHAR g_trapStackBase[OS_TRAP_STACK_SIZE]; VIC_TYPE *VIC_REG = (VIC_TYPE *)VIC_REG_BASE; @@ -334,7 +333,9 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) intSave = LOS_IntLock(); g_intCount--; +#ifndef CPU_CK804 HalIrqEndCheckNeedSched(); +#endif LOS_IntRestore(intSave); } @@ -586,6 +587,10 @@ WEAK VOID __stack_chk_fail(VOID) __builtin_return_address(0)); } +WEAK void HalHwiHandleReInit(UINT32 hwiFormAddr) +{ +} + /* **************************************************************************** Function : HalHwiInit Description : initialization of the hardware interrupt @@ -604,6 +609,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) for (i = OS_SYS_VECTOR_CNT; i < (LOSCFG_PLATFORM_HWI_LIMIT + OS_SYS_VECTOR_CNT); i++) { g_hwiForm[i] = (HWI_PROC_FUNC)IrqEntry; } + HalHwiHandleReInit((UINT32)&g_hwiForm); HalSetVbr((UINT32)&g_hwiForm); for (int i = 0; i < BYTES_OF_128_INT; i++) { diff --git a/arch/csky/v2/gcc/los_timer.c b/arch/csky/v2/gcc/los_timer.c index f572c12a..99bd2b69 100644 --- a/arch/csky/v2/gcc/los_timer.c +++ b/arch/csky/v2/gcc/los_timer.c @@ -50,7 +50,11 @@ typedef struct { #define CORETIM_SOURCE (1UL << 2) #define CORETIM_MODE (1UL << 16) +#ifdef CPU_CK804 +#define TIM_INT_NUM 25 +#else #define TIM_INT_NUM 1 +#endif STATIC UINT32 SysTickStart(HWI_PROC_FUNC handler); STATIC UINT64 SysTickReload(UINT64 nextResponseTime);