fix: correct the counter of exception type

correct the counter of exception type from 19 to 21

close https://gitee.com/openharmony/kernel_liteos_m/issues/I3SR54

Signed-off-by: kenneth <459864689@qq.com>

kernel/arch/arm/cortex-m3/keil/los_arch_interrupt.h

@@ -687,7 +687,7 @@ VOID HalHwiInit();
 typedef struct TagExcInfo {
     /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
     UINT16 phase;
-    /**< Exception type. When exceptions occur, check the numbers 1 - 19 listed above */
+    /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
     UINT16 type;
     /**< If the exact address access error indicates the wrong access address when the exception occurred */
     UINT32 faultAddr;

kernel/arch/arm/cortex-m33/gcc/los_arch_interrupt.h

@@ -687,7 +687,7 @@ VOID HalHwiInit();
 typedef struct TagExcInfo {
     /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
     UINT16 phase;
-    /**< Exception type. When exceptions occur, check the numbers 1 - 19 listed above */
+    /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
     UINT16 type;
     /**< If the exact address access error indicates the wrong access address when the exception occurred */
     UINT32 faultAddr;

kernel/arch/arm/cortex-m33/iar/NTZ/los_arch_interrupt.h

@@ -687,7 +687,7 @@ VOID HalHwiInit();
 typedef struct TagExcInfo {
     /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
     UINT16 phase;
-    /**< Exception type. When exceptions occur, check the numbers 1 - 19 listed above */
+    /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
     UINT16 type;
     /**< If the exact address access error indicates the wrong access address when the exception occurred */
     UINT32 faultAddr;

kernel/arch/arm/cortex-m33/iar/TZ/non_secure/los_arch_interrupt.h

@@ -687,7 +687,7 @@ VOID HalHwiInit();
 typedef struct TagExcInfo {
     /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
     UINT16 phase;
-    /**< Exception type. When exceptions occur, check the numbers 1 - 19 listed above */
+    /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
     UINT16 type;
     /**< If the exact address access error indicates the wrong access address when the exception occurred */
     UINT32 faultAddr;

kernel/arch/arm/cortex-m4/gcc/los_arch_interrupt.h

@@ -687,7 +687,7 @@ VOID HalHwiInit();
 typedef struct TagExcInfo {
     /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
     UINT16 phase;
-    /**< Exception type. When exceptions occur, check the numbers 1 - 19 listed above */
+    /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
     UINT16 type;
     /**< If the exact address access error indicates the wrong access address when the exception occurred */
     UINT32 faultAddr;

kernel/arch/arm/cortex-m4/iar/los_arch_interrupt.h

@@ -687,7 +687,7 @@ VOID HalHwiInit();
 typedef struct TagExcInfo {
     /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
     UINT16 phase;
-    /**< Exception type. When exceptions occur, check the numbers 1 - 19 listed above */
+    /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
     UINT16 type;
     /**< If the exact address access error indicates the wrong access address when the exception occurred */
     UINT32 faultAddr;

kernel/arch/arm/cortex-m7/gcc/los_arch_interrupt.h

@@ -687,7 +687,7 @@ VOID HalHwiInit();
 typedef struct TagExcInfo {
     /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
     UINT16 phase;
-    /**< Exception type. When exceptions occur, check the numbers 1 - 19 listed above */
+    /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
     UINT16 type;
     /**< If the exact address access error indicates the wrong access address when the exception occurred */
     UINT32 faultAddr;

kernel/arch/arm/cortex-m7/iar/los_arch_interrupt.h

@@ -687,7 +687,7 @@ VOID HalHwiInit();
 typedef struct TagExcInfo {
     /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */
     UINT16 phase;
-    /**< Exception type. When exceptions occur, check the numbers 1 - 19 listed above */
+    /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */
     UINT16 type;
     /**< If the exact address access error indicates the wrong access address when the exception occurred */
     UINT32 faultAddr;