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适配xtensa和csky qemu版本，并修复一些已知问题 

Signed-off-by: LiteOS2021 <dinglu@huawei.com>
This commit is contained in:
LiteOS2021 2021-09-28 13:46:49 +08:00
parent 8dfcf71288
commit a7765e2a83
13 changed files with 198 additions and 79 deletions
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2
kernel/BUILD.gn
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@ -67,7 +67,7 @@ static_library("kernel") {
} else { } else {
deps = [ "arch/arm/cortex-m33/gcc/NTZ:arch" ] deps = [ "arch/arm/cortex-m33/gcc/NTZ:arch" ]
} }
} else if ("$board_cpu" == "ck802") { } else if ("$board_cpu" == "ck802" || "$board_cpu" == "e802") {
deps = [ "arch/csky/v2/gcc:arch" ] deps = [ "arch/csky/v2/gcc:arch" ]
} else if ("$board_cpu" == "") { } else if ("$board_cpu" == "") {
if ("$board_arch" == "rv32imac" || "$board_arch" == "rv32imafdc") { if ("$board_arch" == "rv32imac" || "$board_arch" == "rv32imafdc") {

1
kernel/arch/csky/v2/gcc/los_context.c
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@ -145,7 +145,6 @@ VOID HalTaskSchedule(VOID)
BOOL isSwitch = OsSchedTaskSwitch(); BOOL isSwitch = OsSchedTaskSwitch();
if (isSwitch) { if (isSwitch) {
HalTaskContextSwitch(); HalTaskContextSwitch();
return;
} }
LOS_IntRestore(intSave); LOS_IntRestore(intSave);
return; return;

5
kernel/arch/csky/v2/gcc/los_interrupt.c
View File

@ -62,6 +62,7 @@ extern "C" {
#define OS_USER_HWI_MIN 0 #define OS_USER_HWI_MIN 0
#define OS_USER_HWI_MAX (LOSCFG_PLATFORM_HWI_LIMIT - 1) #define OS_USER_HWI_MAX (LOSCFG_PLATFORM_HWI_LIMIT - 1)
#define HWI_ALIGNSIZE 0x400
UINT32 g_intCount = 0; UINT32 g_intCount = 0;
CHAR g_trapStackBase[OS_TRAP_STACK_SIZE]; CHAR g_trapStackBase[OS_TRAP_STACK_SIZE];
@ -98,7 +99,7 @@ UINT32 HalIntLock(VOID)
return intSave; return intSave;
} }
UINT32 HalIntUnlock(VOID) UINT32 HalIntUnLock(VOID)
{ {
UINT32 intSave; UINT32 intSave;
__asm__ __volatile__( __asm__ __volatile__(
@ -187,7 +188,7 @@ UINT32 HalIrqClear(UINT32 hwiNum)
* @ingroup los_hwi * @ingroup los_hwi
* Hardware interrupt form mapping handling function array. * Hardware interrupt form mapping handling function array.
*/ */
STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0}; STATIC HWI_PROC_FUNC __attribute__((aligned(HWI_ALIGNSIZE))) g_hwiForm[OS_VECTOR_CNT] = {0};
#if (OS_HWI_WITH_ARG == 1) #if (OS_HWI_WITH_ARG == 1)

11
kernel/arch/xtensa/lx6/gcc/los_arch_context.h
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@ -52,8 +52,15 @@ typedef struct {
UINT32 lbeg; UINT32 lbeg;
UINT32 lend; UINT32 lend;
UINT32 lcount; UINT32 lcount;
UINT32 temp[4]; #if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
UINT32 res[8]; UINT32 temp;
UINT16 cpenable;
UINT16 cpstored;
UINT32 fcr;
UINT32 fsr;
UINT32 regF[16];
#endif
UINT32 res[4];
} TaskContext; } TaskContext;
#ifdef __cplusplus #ifdef __cplusplus

11
kernel/arch/xtensa/lx6/gcc/los_arch_interrupt.h
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@ -52,8 +52,15 @@ typedef struct {
UINT32 lbeg; UINT32 lbeg;
UINT32 lend; UINT32 lend;
UINT32 lcount; UINT32 lcount;
UINT32 temp[4]; #if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
UINT32 res[8]; UINT32 temp;
UINT16 cpenable;
UINT16 cpstored;
UINT32 fcr;
UINT32 fsr;
UINT32 regF[16];
#endif
UINT32 res[4];
} EXC_CONTEXT_S; } EXC_CONTEXT_S;
#define VECTOR_START _init_start #define VECTOR_START _init_start

70
kernel/arch/xtensa/lx6/gcc/los_arch_macro.h
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@ -38,7 +38,40 @@ extern "C" {
#endif /* __cplusplus */ #endif /* __cplusplus */
#endif /* __cplusplus */ #endif /* __cplusplus */
.macro POP_ALL_REG SP .macro POP_ALL_REG SP PC PState
#if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
l16ui a3, \SP, CONTEXT_OFF_CPENABLE
wsr a3, CPENABLE
rsync
l16ui a3, \SP, CONTEXT_OFF_CPSTORED
bbci.l a3, 0, 2f
l32i a3, \SP, CONTEXT_OFF_FCR
wur.FCR a3
l32i a3, \SP, CONTEXT_OFF_FSR
wur.FSR a3
lsi f0, \SP, CONTEXT_OFF_F0
lsi f1, \SP, CONTEXT_OFF_F1
lsi f2, \SP, CONTEXT_OFF_F2
lsi f3, \SP, CONTEXT_OFF_F3
lsi f4, \SP, CONTEXT_OFF_F4
lsi f5, \SP, CONTEXT_OFF_F5
lsi f6, \SP, CONTEXT_OFF_F6
lsi f7, \SP, CONTEXT_OFF_F7
lsi f8, \SP, CONTEXT_OFF_F8
lsi f9, \SP, CONTEXT_OFF_F9
lsi f10, \SP, CONTEXT_OFF_F10
lsi f11, \SP, CONTEXT_OFF_F11
lsi f12, \SP, CONTEXT_OFF_F12
lsi f13, \SP, CONTEXT_OFF_F13
lsi f14, \SP, CONTEXT_OFF_F14
lsi f15, \SP, CONTEXT_OFF_F15
2:
movi a4, 0
s16i a4, \SP, CONTEXT_OFF_CPSTORED
#endif
l32i a3, \SP, CONTEXT_OFF_LBEG l32i a3, \SP, CONTEXT_OFF_LBEG
l32i a4, \SP, CONTEXT_OFF_LEND l32i a4, \SP, CONTEXT_OFF_LEND
wsr a3, LBEG wsr a3, LBEG
@ -62,12 +95,11 @@ extern "C" {
l32i a14, \SP, CONTEXT_OFF_A14 l32i a14, \SP, CONTEXT_OFF_A14
l32i a15, \SP, CONTEXT_OFF_A15 l32i a15, \SP, CONTEXT_OFF_A15
l32i a0, \SP, CONTEXT_OFF_PS l32i a0, \SP, CONTEXT_OFF_PS
wsr a0, PS wsr a0, \PState
l32i a0, \SP, CONTEXT_OFF_PC l32i a0, \SP, CONTEXT_OFF_PC
wsr a0, EPC1 wsr a0, \PC
l32i a0, \SP, CONTEXT_OFF_A0 l32i a0, \SP, CONTEXT_OFF_A0
l32i a2, \SP, CONTEXT_OFF_A2 l32i a2, \SP, CONTEXT_OFF_A2
rsync
.endm .endm
.macro PUSH_ALL_REG SP .macro PUSH_ALL_REG SP
@ -97,6 +129,36 @@ extern "C" {
s32i a3, \SP, CONTEXT_OFF_LCOUNT s32i a3, \SP, CONTEXT_OFF_LCOUNT
rsr a3, PS rsr a3, PS
s32i a3, \SP, CONTEXT_OFF_PS s32i a3, \SP, CONTEXT_OFF_PS
#if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
rsr a3, CPENABLE
beqz a3, 1f
s16i a3, \SP, CONTEXT_OFF_CPSTORED
s16i a3, \SP, CONTEXT_OFF_CPENABLE
bbci.l a3, 0, 1f
rur.FCR a3
s32i a3, \SP, CONTEXT_OFF_FCR
rur.FSR a3
s32i a3, \SP, CONTEXT_OFF_FSR
ssi f0, \SP, CONTEXT_OFF_F0
ssi f1, \SP, CONTEXT_OFF_F1
ssi f2, \SP, CONTEXT_OFF_F2
ssi f3, \SP, CONTEXT_OFF_F3
ssi f4, \SP, CONTEXT_OFF_F4
ssi f5, \SP, CONTEXT_OFF_F5
ssi f6, \SP, CONTEXT_OFF_F6
ssi f7, \SP, CONTEXT_OFF_F7
ssi f8, \SP, CONTEXT_OFF_F8
ssi f9, \SP, CONTEXT_OFF_F9
ssi f10, \SP, CONTEXT_OFF_F10
ssi f11, \SP, CONTEXT_OFF_F11
ssi f12, \SP, CONTEXT_OFF_F12
ssi f13, \SP, CONTEXT_OFF_F13
ssi f14, \SP, CONTEXT_OFF_F14
ssi f15, \SP, CONTEXT_OFF_F15
1:
#endif
.endm .endm
#ifdef __cplusplus #ifdef __cplusplus

38
kernel/arch/xtensa/lx6/gcc/los_arch_regs.h
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@ -49,7 +49,7 @@ extern "C" {
#define SPREG_PS_DEPC SPREG_PS_DEPC_MASK #define SPREG_PS_DEPC SPREG_PS_DEPC_MASK
/* PS register -- interrupt part */ /* PS register -- interrupt part */
#define SPREG_PS_DI_SHIFT 3 #define SPREG_PS_DI_SHIFT 3
#define SPREG_PS_DI_MASK 0x00000008 #define SPREG_PS_DI_MASK 0x0000000F
#define SPREG_PS_DI SPREG_PS_DI_MASK #define SPREG_PS_DI SPREG_PS_DI_MASK
#define SPREG_PS_DI_DEPC 0x0000000C #define SPREG_PS_DI_DEPC 0x0000000C
/* PS register -- stack part */ /* PS register -- stack part */
@ -115,19 +115,41 @@ extern "C" {
#define CONTEXT_OFF_LBEG 84 #define CONTEXT_OFF_LBEG 84
#define CONTEXT_OFF_LEND 88 #define CONTEXT_OFF_LEND 88
#define CONTEXT_OFF_LCOUNT 92 #define CONTEXT_OFF_LCOUNT 92
#if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
#define CONTEXT_OFF_TMP0 96 #define CONTEXT_OFF_TMP0 96
#define CONTEXT_OFF_TMP1 100 #define CONTEXT_OFF_CPENABLE 100
#define CONTEXT_OFF_TMP2 104 #define CONTEXT_OFF_CPSTORED 102
#define CONTEXT_OFF_EXIT 108 #define CONTEXT_OFF_FCR 104
#define CONTEXT_SIZE 144 #define CONTEXT_OFF_FSR 108
#define CONTEXT_OFF_F0 112
#define CONTEXT_OFF_F1 116
#define CONTEXT_OFF_F2 120
#define CONTEXT_OFF_F3 124
#define CONTEXT_OFF_F4 128
#define CONTEXT_OFF_F5 132
#define CONTEXT_OFF_F6 136
#define CONTEXT_OFF_F7 140
#define CONTEXT_OFF_F8 144
#define CONTEXT_OFF_F9 148
#define CONTEXT_OFF_F10 152
#define CONTEXT_OFF_F11 156
#define CONTEXT_OFF_F12 160
#define CONTEXT_OFF_F13 164
#define CONTEXT_OFF_F14 168
#define CONTEXT_OFF_F15 172
#define CONTEXT_SIZE 192
#else
#define CONTEXT_SIZE 112
#endif
#define EXCCAUSE_LEVEL1INTERRUPT 4 #define EXCCAUSE_LEVEL1INTERRUPT 4
#define XTENSA_LOGREG_NUM 16 #define XTENSA_LOGREG_NUM 16
#define INDEX_OF_SP 1 #define INDEX_OF_SP 1
#define INDEX_OF_ARGS0 6 #define INDEX_OF_ARGS0 6
#define WINDOWSTARTBITS 16 #define WINDOWSTARTBITS 16
#define WINDOWBASEBITS 4 #define WINDOWBASEBITS 4
#define WINDOWSTARTMASK ((1 << WINDOWSTARTBITS) - 1) #define WINDOWSTARTMASK ((1 << WINDOWSTARTBITS) - 1)
#define WOE_ENABLE 0x40000 #define WOE_ENABLE 0x40000
#define BIT_CALLINC 16 #define BIT_CALLINC 16

31
kernel/arch/xtensa/lx6/gcc/los_context.c
View File

@ -68,14 +68,28 @@ UINT32 g_stackDefault[] = {
0x00000000, /* REG_OFF_LCOUNT */ 0x00000000, /* REG_OFF_LCOUNT */
0x00000000, /* REG_OFF_LEND */ 0x00000000, /* REG_OFF_LEND */
0x00000000, /* REG_OFF_LBEG */ 0x00000000, /* REG_OFF_LBEG */
0x00000000, /* REG_OFF_TMP */ #if (defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U))
0x00000000, /* REG_OFF_TMP */ 0x00000000, /* REG_OFF_TMP0 */
0x00000000, /* REG_OFF_TMP */ 0x00000001, /* REG_OFF_CPENABLE | CONTEXT_OFF_CPSTORED */
0x00000000, /* REG_OFF_TMP */ 0x00000000, /* REG_OFF_FCR */
0x00000000, /* REG_OFF_SPILL_RESERVED */ 0x00000000, /* REG_OFF_FSR */
0x00000000, /* REG_OFF_SPILL_RESERVED */ 0x00000000, /* REG_OFF_F0 */
0x00000000, /* REG_OFF_SPILL_RESERVED */ 0x00000000, /* REG_OFF_F1 */
0x00000000, /* REG_OFF_SPILL_RESERVED */ 0x00000000, /* REG_OFF_F2 */
0x00000000, /* REG_OFF_F3 */
0x00000000, /* REG_OFF_F4 */
0x00000000, /* REG_OFF_F5 */
0x00000000, /* REG_OFF_F6 */
0x00000000, /* REG_OFF_F7 */
0x00000000, /* REG_OFF_F8 */
0x00000000, /* REG_OFF_F9 */
0x00000000, /* REG_OFF_F10 */
0x00000000, /* REG_OFF_F11 */
0x00000000, /* REG_OFF_F12 */
0x00000000, /* REG_OFF_F13 */
0x00000000, /* REG_OFF_F14 */
0x00000000, /* REG_OFF_F15 */
#endif
0x00000000, /* REG_OFF_SPILL_RESERVED */ 0x00000000, /* REG_OFF_SPILL_RESERVED */
0x00000000, /* REG_OFF_SPILL_RESERVED */ 0x00000000, /* REG_OFF_SPILL_RESERVED */
0x00000000, /* REG_OFF_SPILL_RESERVED */ 0x00000000, /* REG_OFF_SPILL_RESERVED */
@ -157,7 +171,6 @@ VOID HalTaskSchedule(VOID)
BOOL isSwitch = OsSchedTaskSwitch(); BOOL isSwitch = OsSchedTaskSwitch();
if (isSwitch) { if (isSwitch) {
HalTaskContextSwitch(); HalTaskContextSwitch();
return;
} }
LOS_IntRestore(intSave); LOS_IntRestore(intSave);

42
kernel/arch/xtensa/lx6/gcc/los_dispatch.S
View File

@ -39,27 +39,27 @@
.global HalTaskContextSwitch .global HalTaskContextSwitch
HalTaskContextSwitch: HalTaskContextSwitch:
entry sp, 16 entry sp, 16
addi a2, sp, -CONTEXT_SIZE addi a2, sp, -CONTEXT_SIZE
PUSH_ALL_REG a2 PUSH_ALL_REG a2
call0 SaveRetAddr call0 SaveRetAddr
beqi a3, 1, .switchdone beqi a3, 1, .switchdone
movi a4, g_losTask movi a4, g_losTask
l32i a5, a4, 0 /* get run task */ l32i a5, a4, 0 /* get run task */
s32i a2, a5, 0 /* store sp */ s32i a2, a5, 0 /* store sp */
l32i a5, a4, 4 /* get new task */ l32i a5, a4, 4 /* get new task */
s32i a5, a4, 0 /* run task = new task */ s32i a5, a4, 0 /* run task = new task */
l32i a4, a5, 0 /* get new sp */ l32i a4, a5, 0 /* get new sp */
rsr a5, PS rsr a5, PS
movi a3, ~(WOE_ENABLE | LEVEL_MASK) movi a3, ~(WOE_ENABLE | LEVEL_MASK)
and a2, a5, a3 and a2, a5, a3
addi a2, a2, 3 addi a2, a2, 3
wsr a2, PS wsr a2, PS
rsync rsync
call0 SpillWindow call0 SpillWindow
mov a2, a4 mov a2, a4
POP_ALL_REG a2 POP_ALL_REG a2 EPC5 EPS5
rfe rfi 5
.switchdone: .switchdone:
retw retw
@ -68,14 +68,14 @@ HalTaskContextSwitch:
.global HakSpillWindow .global HakSpillWindow
HakSpillWindow: HakSpillWindow:
entry sp, 16 entry sp, 32
addi a2, sp, -CONTEXT_SIZE addi a2, sp, -CONTEXT_SIZE
PUSH_ALL_REG a2 PUSH_ALL_REG a2
rsr a5, PS rsr a5, PS
movi a3, ~(WOE_ENABLE | LEVEL_MASK) /* disable woe and int */ movi a3, ~(WOE_ENABLE | LEVEL_MASK) /* disable woe and int */
and a3, a5, a3 and a3, a5, a3
addi a3, a3, LEVEL3 addi a3, a3, LEVEL3
wsr a3, PS wsr a3, PS
rsync rsync
@ -84,10 +84,10 @@ HakSpillWindow:
call0 SpillWindow call0 SpillWindow
l32i a5, a4, CONTEXT_OFF_PS /* restroe PS */ l32i a5, a4, CONTEXT_OFF_PS /* restroe PS */
wsr a5, PS wsr a5, PS
rsync rsync
l32i a0, a4, CONTEXT_OFF_A0 l32i a0, a4, CONTEXT_OFF_A0
l32i a1, a4, CONTEXT_OFF_A1 l32i a1, a4, CONTEXT_OFF_A1
retw retw
@ -101,7 +101,7 @@ OsStartToRun:
rsr a4, PS rsr a4, PS
movi a3, ~(WOE_ENABLE | LEVEL_MASK) movi a3, ~(WOE_ENABLE | LEVEL_MASK)
and a2, a4, a3 and a2, a4, a3
addi a2, a2, LEVEL3 addi a2, a2, LEVEL3
wsr a2, PS wsr a2, PS
rsync rsync
@ -111,8 +111,8 @@ OsStartToRun:
call0 SpillWindow call0 SpillWindow
mov a2, a5 mov a2, a5
POP_ALL_REG a2 POP_ALL_REG a2 EPC5 EPS5
rfe rfi 5
.global SaveRetAddr .global SaveRetAddr
.type SaveRetAddr, @function .type SaveRetAddr, @function
@ -121,8 +121,8 @@ OsStartToRun:
SaveRetAddr: SaveRetAddr:
movi a3, 1 movi a3, 1
s32i a3, a2, CONTEXT_OFF_A3 s32i a3, a2, CONTEXT_OFF_A3
s32i a0, a2, CONTEXT_OFF_PC /* save pc */ s32i a0, a2, CONTEXT_OFF_PC /* save pc */
movi a3, 0 movi a3, 0
ret ret

18
kernel/arch/xtensa/lx6/gcc/los_exc.S
View File

@ -177,7 +177,7 @@ InterruptEntry1:
call4 HalInterrupt call4 HalInterrupt
mov a2, a1 mov a2, a1
POP_ALL_REG a2 POP_ALL_REG a2 EPC1 PS
rfe rfe
.begin literal_prefix .InterruptEntry2 .begin literal_prefix .InterruptEntry2
@ -294,7 +294,7 @@ UnderFlowGroup2:
l32i a3, a9, 12 l32i a3, a9, 12
l32i a2, a9, 8 l32i a2, a9, 8
l32i a1, a9, 4 l32i a1, a9, 4
l32i a0, a9, 0 l32i a0, a9, 0
addi a9, a9, 16 addi a9, a9, 16
addi a1, a1, -12 addi a1, a1, -12
@ -329,7 +329,7 @@ OverFlowGroup3:
s32i a10, a0, 24 s32i a10, a0, 24
s32i a9, a0, 20 s32i a9, a0, 20
s32i a8, a0, 16 s32i a8, a0, 16
s32i a7, a0, 12 s32i a7, a0, 12
s32i a6, a0, 8 s32i a6, a0, 8
s32i a5, a0, 4 s32i a5, a0, 4
s32i a4, a0, 0 s32i a4, a0, 0
@ -343,7 +343,7 @@ UnderFlowGroup3:
l32i a3, a13, 12 l32i a3, a13, 12
l32i a2, a13, 8 l32i a2, a13, 8
l32i a1, a13, 4 l32i a1, a13, 4
l32i a0, a13, 0 l32i a0, a13, 0
addi a13, a13, 16 addi a13, a13, 16
addi a1, a1, -12 addi a1, a1, -12
@ -355,8 +355,16 @@ UnderFlowGroup3:
l32i a10, a0, 24 l32i a10, a0, 24
l32i a9, a0, 20 l32i a9, a0, 20
l32i a8, a0, 16 l32i a8, a0, 16
l32i a7, a4, 12 l32i a7, a4, 12
l32i a6, a4, 8 l32i a6, a4, 8
l32i a5, a4, 4 l32i a5, a4, 4
l32i a4, a4, 0 l32i a4, a4, 0
rfwu rfwu
.global EnableExceptionInterface
.section .iram,"ax"
.type EnableExceptionInterface,@function
.align 4
EnableExceptionInterface:
entry a1,16
retw

2
kernel/arch/xtensa/lx6/gcc/los_interrupt.c
View File

@ -544,6 +544,7 @@ WEAK VOID __stack_chk_fail(VOID)
**************************************************************************** */ **************************************************************************** */
VOID HalHwiInit(VOID) VOID HalHwiInit(VOID)
{ {
EnableExceptionInterface();
for (UINT32 i = 0; i < OS_HWI_MAX_NUM; i++) { for (UINT32 i = 0; i < OS_HWI_MAX_NUM; i++) {
g_hwiForm[i + OS_SYS_VECTOR_CNT] = HalHwiDefaultHandler; g_hwiForm[i + OS_SYS_VECTOR_CNT] = HalHwiDefaultHandler;
HalIrqMask(i); HalIrqMask(i);
@ -551,4 +552,3 @@ VOID HalHwiInit(VOID)
asm volatile ("wsr %0, vecbase" : : "r"(INIT_VECTOR_START)); asm volatile ("wsr %0, vecbase" : : "r"(INIT_VECTOR_START));
return; return;
} }

38
kernel/arch/xtensa/lx6/gcc/los_timer.c
View File

@ -38,14 +38,10 @@
#include "los_sched.h" #include "los_sched.h"
#include "los_debug.h" #include "los_debug.h"
#define OVERFLOW_MAX 0xFFFFFFFF
UINT32 GetCcount(VOID) UINT32 GetCcount(VOID)
{ {
UINT32 intSave; UINT32 intSave;
__asm__ __volatile__("rsr %0, ccount" : "=a"(intSave) :); __asm__ __volatile__("rsr %0, ccount" : "=a"(intSave) :);
return intSave; return intSave;
} }
@ -57,9 +53,7 @@ VOID ResetCcount(VOID)
UINT32 GetCcompare(VOID) UINT32 GetCcompare(VOID)
{ {
UINT32 intSave; UINT32 intSave;
__asm__ __volatile__("rsr %0, ccompare0" : "=a"(intSave) :); __asm__ __volatile__("rsr %0, ccompare0" : "=a"(intSave) :);
return intSave; return intSave;
} }
@ -68,12 +62,6 @@ VOID SetCcompare(UINT32 newCompareVal)
__asm__ __volatile__("wsr %0, ccompare0; rsync" : : "a"(newCompareVal)); __asm__ __volatile__("wsr %0, ccompare0; rsync" : : "a"(newCompareVal));
} }
VOID HalUpdateTimerCmpVal(UINT32 newCompareVal)
{
SetCcompare(newCompareVal);
ResetCcount();
}
/* **************************************************************************** /* ****************************************************************************
Function : HalTickStart Function : HalTickStart
Description : Configure Tick Interrupt Start Description : Configure Tick Interrupt Start
@ -104,8 +92,8 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
g_sysClock = OS_SYS_CLOCK; g_sysClock = OS_SYS_CLOCK;
g_cyclesPerTick = OS_SYS_CLOCK / LOSCFG_BASE_CORE_TICK_PER_SECOND; g_cyclesPerTick = OS_SYS_CLOCK / LOSCFG_BASE_CORE_TICK_PER_SECOND;
SetCcompare(g_cyclesPerTick);
ResetCcount(); ResetCcount();
SetCcompare(LOSCFG_BASE_CORE_TICK_RESPONSE_MAX);
__asm__ __volatile__("wsr %0, ccompare1; rsync" : : "a"(0)); __asm__ __volatile__("wsr %0, ccompare1; rsync" : : "a"(0));
__asm__ __volatile__("wsr %0, ccompare2; rsync" : : "a"(0)); __asm__ __volatile__("wsr %0, ccompare2; rsync" : : "a"(0));
@ -116,20 +104,32 @@ WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler)
WEAK VOID HalSysTickReload(UINT64 nextResponseTime) WEAK VOID HalSysTickReload(UINT64 nextResponseTime)
{ {
HalUpdateTimerCmpVal(nextResponseTime); UINT32 timerL;
timerL = GetCcount();
timerL += nextResponseTime;
SetCcompare(timerL);
} }
WEAK UINT64 HalGetTickCycle(UINT32 *period) WEAK UINT64 HalGetTickCycle(UINT32 *period)
{ {
UINT32 ccount; UINT32 tickCycleH;
UINT32 intSave = LOS_IntLock(); UINT32 tickCycleL;
UINT32 temp;
static UINT64 tickCycle = 0;
ccount = GetCcount(); (VOID)period;
*period = g_cyclesPerTick; UINT32 intSave = LOS_IntLock();
temp = tickCycle & 0xFFFFFFFF;
tickCycleH = tickCycle >> SHIFT_32_BIT;
tickCycleL = GetCcount();
if (tickCycleL < temp) {
tickCycleH++;
}
tickCycle = (((UINT64)tickCycleH) << SHIFT_32_BIT) | tickCycleL;
LOS_IntRestore(intSave); LOS_IntRestore(intSave);
return ccount; return tickCycle;
} }
WEAK VOID HalTickLock(VOID) WEAK VOID HalTickLock(VOID)

8
kernel/arch/xtensa/lx6/gcc/los_window.S
View File

@ -158,13 +158,13 @@ SpillWindow:
or a2, a2, a3 or a2, a2, a3
rsr a3, WINDOWBASE rsr a3, WINDOWBASE
1: .RestoreWindowBase:
bbsi.l a2, WINDOWSTARTBITS-1, 2f bbsi.l a2, WINDOWSTARTBITS - 1, .RestoreWindow
slli a2, a2, 1 slli a2, a2, 1
addi a3, a3, -1 addi a3, a3, -1
j 1b j .RestoreWindowBase
2: .RestoreWindow:
extui a3, a3, 0, WINDOWSTARTBITS /* the original bit */ extui a3, a3, 0, WINDOWSTARTBITS /* the original bit */
addi a3, a3, 1 addi a3, a3, 1