Description: fix float-abi=soft bug

Reviewed-by: shenwei

kernel/arch/arm/cortex-m4/iar/los_dispatch.S

@@ -77,6 +77,8 @@ HalStartToRun
     STRH    R7,  [R0 , #4]
 
     LDR     R12, [R0]
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
     ADD     R12, R12, #100
 
     LDMFD   R12!, {R0-R7}
@@ -84,7 +86,12 @@ HalStartToRun
     MSR     PSP, R12
     VPUSH   S0;
     VPOP    S0;
+#else
+    ADD     R12, R12, #36
 
+    LDMFD   R12!, {R0-R7}
+    MSR     PSP, R12
+#endif
     MOV     LR, R5
    ;MSR     xPSR, R7
 
@@ -120,7 +127,10 @@ HalTaskSwitch
     MRS     R0, PSP
 
     STMFD   R0!, {R4-R12}
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
     VSTMDB  R0!, {D8-D15}
+#endif
 
     LDR     R5, =g_losTask
     LDR     R6, [R5]
@@ -144,7 +154,10 @@ HalTaskSwitch
     STRH    R7,  [R0 , #4]
 
     LDR     R1,   [R0]
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
     VLDMIA  R1!, {D8-D15}
+#endif
     LDMFD   R1!, {R4-R12}
     MSR     PSP,  R1
 

kernel/arch/arm/cortex-m4/iar/los_exc.S

@@ -204,7 +204,10 @@ _ExcInMSP
     PUSH  {R3}
     MRS   R12, PRIMASK                  ; store message-->exc: disable int?
     PUSH {R4-R12}                       ; store message-->exc: {R4-R12}
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
     VPUSH {D8-D15}
+#endif
     B     _handleEntry
 
 _NoFloatInMsp

kernel/arch/arm/cortex-m7/gcc/los_dispatch.S

@@ -77,6 +77,8 @@ HalStartToRun:
     strh    r7,  [r0 , #4]
 
     ldr     r12, [r0]
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
     add     r12, r12, #100
 
     ldmfd   r12!, {r0-r7}
@@ -84,6 +86,12 @@ HalStartToRun:
     msr     psp, r12
     vpush   {S0}
     vpop    {S0}
+#else
+    add     r12, r12, #36
+
+    ldmfd   r12!, {r0-r7}
+    msr     psp, r12
+#endif
     mov     lr, r5
     //MSR     xPSR, R7
 
@@ -155,7 +163,10 @@ HalTaskSwitch:
 
     stmfd   r0!, {r4-r12}
 
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
     vstmdb   r0!, {d8-d15}
+#endif
     ldr     r5, =g_losTask
     ldr     r6, [r5]
     str     r0, [r6]
@@ -179,7 +190,10 @@ HalTaskSwitch:
 
     ldr     r1,   [r0]
 
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
     vldmia   r1!, {d8-d15}
+#endif
     ldmfd   r1!, {r4-r12}
     msr     psp,  r1
 

kernel/arch/arm/cortex-m7/gcc/los_exc.S

@@ -282,7 +282,10 @@ _ExcInMSP:
     PUSH  {R3}
     MRS   R12, PRIMASK                  // store message-->exc: disable int?
     PUSH {R4-R12}                       // store message-->exc: {R4-R12}
+#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined(__FPU_USED) && (__FPU_USED == 1U)))
     VPUSH {D8-D15}
+#endif
     B     _handleEntry
   .fnend