diff --git a/kernel/arch/arm/arm9/gcc/los_arch_context.h b/kernel/arch/arm/arm9/gcc/los_arch_context.h index 7c60151b..675de3ef 100644 --- a/kernel/arch/arm/arm9/gcc/los_arch_context.h +++ b/kernel/arch/arm/arm9/gcc/los_arch_context.h @@ -70,6 +70,7 @@ typedef struct TagTskContext { UINT32 r10; UINT32 r11; UINT32 r12; + UINT32 sp; UINT32 lr; UINT32 pc; } TaskContext; diff --git a/kernel/arch/arm/arm9/gcc/los_context.c b/kernel/arch/arm/arm9/gcc/los_context.c index e332cbeb..92c8ec1c 100644 --- a/kernel/arch/arm/arm9/gcc/los_context.c +++ b/kernel/arch/arm/arm9/gcc/los_context.c @@ -39,8 +39,6 @@ #include "los_arch_timer.h" #include "los_debug.h" -UINT32 g_sysNeedSched = 0; - /* **************************************************************************** Function : HalArchInit Description : arch init function @@ -104,14 +102,15 @@ LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOI context->r10 = 0x10101010L; context->r11 = 0x11111111L; context->r12 = 0x12121212L; + context->sp = (UINTPTR)topStack + stackSize; context->lr = (UINTPTR)HalSysExit; if ((UINTPTR)taskCB->taskEntry & 0x01) { context->pc = (UINTPTR)OsTaskEntryThumb; - context->spsr = PSR_MODE_SVC_THUMB; /* thumb mode */ + context->spsr = PSR_MODE_SYS_THUMB; /* thumb mode */ } else { context->pc = (UINTPTR)OsTaskEntryArm; - context->spsr = PSR_MODE_SVC_ARM; /* arm mode */ + context->spsr = PSR_MODE_SYS_ARM; /* arm mode */ } return (VOID *)context; @@ -131,6 +130,11 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(OS_TICK_HANDLER handler) return LOS_OK; /* never return */ } +LITE_OS_SEC_TEXT_INIT VOID HalTaskSchedule(VOID) +{ + __asm__ __volatile__("swi 0"); +} + LITE_OS_SEC_TEXT_INIT VOID dmb(VOID) { __asm__ __volatile__("" : : : "memory"); diff --git a/kernel/arch/arm/arm9/gcc/los_dispatch.S b/kernel/arch/arm/arm9/gcc/los_dispatch.S index b83a730e..01c9afb8 100644 --- a/kernel/arch/arm/arm9/gcc/los_dispatch.S +++ b/kernel/arch/arm/arm9/gcc/los_dispatch.S @@ -42,73 +42,128 @@ .equ OS_PSR_MODE_UND, 0x1BU .equ OS_PSR_MODE_SYS, 0x1FU - .global HalExceptIrqHdl - .global HalTaskSchedule .global HalStartToRun .global OsTaskEntryArm .global OsTaskEntryThumb + .global HalExceptSwiHdl + .global HalExceptFiqHdl + .global HalExceptIrqHdl .extern OsTaskEntry .extern OsSchedTaskSwitch - .extern g_sysNeedSched + .extern HalInterrupt + .extern g_losTask .code 32 .text -HalStartToRun: - MSR CPSR_c, #(OS_PSR_INT_DIS | OS_PSR_FIQ_DIS | OS_PSR_MODE_SVC) - - LDR R1, =g_losTask - LDR R0, [R1, #4] - LDR SP, [R0] - - LDMFD SP!, {R0} - MSR SPSR_cxsf, R0 - - LDMFD SP!, {R0-R12, LR, PC}^ - -HalTaskSchedule: - STMFD SP!, {LR} - STMFD SP!, {LR} - STMFD SP!, {R0-R12} - - MRS R0, CPSR - MRS R1, CPSR - ORR R1, #OS_PSR_IRQ_DIS - MSR CPSR, R1 - - TST LR, #1 - ORRNE R0, R0, #OS_PSR_THUMB +.macro SAVE_CONTEXT STMFD SP!, {R0} - LDR R1, =g_sysNeedSched - MOV R2, #1 - STR R2, [R1] + MRS R0, SPSR + AND R0, R0, #OS_PSR_MODE_SYS + CMP R0, #OS_PSR_MODE_SYS + BNE 1f - LDR R0, =g_intCount - LDR R0, [R0] - CMP R0, #0 - BNE TaskContextLoad - STR R0, [R1] + STMFD SP!, {SP}^ + LDMFD SP!, {R0} - BLX OsSchedTaskSwitch - CMP R0, #0 - BNE NewTaskContextSwitch - B TaskContextLoad + STMFD R0!, {LR} + MOV LR, R0 + LDMFD SP!, {R0} -NewTaskContextSwitch: - LDR R0, =g_losTask - LDR R1, [R0] - STR SP, [R1] + STMFD LR, {R0-R14}^ - LDR R1, [R0, #4] - STR R1, [R0] - LDR SP, [R1] + SUB LR, LR, #60 + MRS R0, SPSR + STMFD LR!, {R0} -TaskContextLoad: + LDR R1, =g_losTask + LDR R1, [R1] + STR LR, [R1] + B 2f + +1: + LDMFD SP!, {R0} + STMFD SP!, {R0-R12, LR} + MRS R0, SPSR + STMFD SP!, {R0} + +2: +.endm + +.macro RETSORE_CONTEXT + MRS R0, SPSR + AND R0, R0, #OS_PSR_MODE_SYS + CMP R0, #OS_PSR_MODE_SYS + BNE 3f + + LDR R1, =g_losTask + LDR R1, [R1] + LDR LR, [R1] + + LDMFD LR!, {R0} + MSR SPSR_cxsf, R0 + LDMFD LR, {R0-R14}^ + ADD LR, LR, #60 + LDMFD LR!, {PC}^ +3: LDMFD SP!, {R0} MSR SPSR_cxsf, R0 - LDMFD SP!, {R0-R12, LR, PC}^ + LDMFD SP!, {R0-R12, LR} + MOVS PC, LR +.endm + +.macro TASK_SWITCH + MRS R0, CPSR + ORR R0, R0, #OS_PSR_INT_DIS + MSR CPSR, R0 + BLX OsSchedTaskSwitch + CMP R0, #0 + BEQ 4f + + LDR R0, =g_losTask + LDR R1, [R0, #4] + STR R1, [R0] + +4: +.endm + +HalStartToRun: + LDR R1, =g_losTask + LDR R0, [R1, #4] + LDR LR, [R0] + + LDMFD LR!, {R0} + MSR SPSR_cxsf, R0 + + LDMFD LR, {R0-R14}^ + ADD LR, LR, #60 + LDMFD LR!, {PC}^ + +HalExceptSwiHdl: + SAVE_CONTEXT + + TASK_SWITCH + + RETSORE_CONTEXT + +HalExceptFiqHdl: + SUB LR, LR, #4 + SAVE_CONTEXT + + BLX HalInterrupt + + RETSORE_CONTEXT + +HalExceptIrqHdl: + SUB LR, LR, #4 + + SAVE_CONTEXT + + BLX HalInterrupt + + RETSORE_CONTEXT OsTaskEntryArm: STMFD SP!, {LR} diff --git a/kernel/arch/arm/arm9/gcc/los_exc.S b/kernel/arch/arm/arm9/gcc/los_exc.S index 54f32aa6..9c082e52 100644 --- a/kernel/arch/arm/arm9/gcc/los_exc.S +++ b/kernel/arch/arm/arm9/gcc/los_exc.S @@ -50,23 +50,13 @@ .equ OS_EXCEPT_ADDR_ABORT, 0x06 .equ OS_EXCEPT_IRQ, 0x07 - - .global HalExceptFiqHdl .global HalExceptAddrAbortHdl .global HalExceptDataAbortHdl .global HalExceptPrefetchAbortHdl - .global HalExceptSwiHdl .global HalExceptUndefInstrHdl - .global HalExceptIrqHdl - .extern g_sysNeedSched - .extern g_losTaskLock .extern HalExcHandleEntry - .extern HalInterrupt - .extern OsSchedTaskSwitch - .extern __svc_stack_top .extern __exc_stack_top - .extern __irq_stack_top .code 32 .text @@ -76,19 +66,6 @@ HalExceptUndefInstrHdl: MOV R0, #OS_EXCEPT_UNDEF_INSTR B _osExceptDispatch -HalExceptSwiHdl: - STMFD SP!, {LR} - STMFD SP!, {LR} - STMFD SP!, {SP} - STMFD SP!, {R0-R12} - - MRS R1, SPSR - STMFD SP!, {R1} - - MOV R0, #OS_EXCEPT_SWI - - B _osExceptionSwi - HalExceptPrefetchAbortHdl: SUB LR, LR, #4 STMFD SP!, {R0-R5} @@ -113,72 +90,6 @@ HalExceptAddrAbortHdl: B _osExceptDispatch -HalExceptFiqHdl: - SUB LR, LR, #4 - STMFD SP!, {R0-R5} - - MOV R0, #OS_EXCEPT_FIQ - - B _osExceptDispatch - -HalExceptIrqHdl: - SUB LR, LR, #4 - STMFD SP!, {R0-R2} - - MOV R0, SP - MRS R1, SPSR - MOV R2, LR - - MSR CPSR_c, #(OS_PSR_INT_DIS | OS_PSR_FIQ_DIS | OS_PSR_MODE_SVC) - STMFD SP!, {R2} - STMFD SP!, {LR} - STMFD SP!, {R3-R12} - LDMFD R0!, {R5-R7} - STMFD SP!, {R5-R7} - STMFD SP!, {R1} - - LDR R2, =g_losTask - LDR R3, [R2] - STR SP, [R3] - - LDR SP, =__svc_stack_top - - BLX HalInterrupt - - LDR R0, =g_losTaskLock - LDR R0, [R0] - CMP R0, #0 - BNE NoTaskContextSwitch - - LDR R0, =g_sysNeedSched - LDR R0, [R0] - CMP R0, #0 - BNE NeedTaskSwitch - B NoTaskContextSwitch - -NeedTaskSwitch: - LDR R0, =g_sysNeedSched - MOV R1, #0 - STR R1, [R0] - BLX OsSchedTaskSwitch - CMP R0, #0 - BEQ NoTaskContextSwitch - LDR R0, =g_losTask - LDR R1, [R0, #4] - STR R1, [R0] - LDR SP, [R1] - B TaskContextLoad - -NoTaskContextSwitch: - LDR R1, =g_losTask - LDR R1, [R1] - LDR SP, [R1] - -TaskContextLoad: - LDMFD SP!, {R0} - MSR SPSR_cxsf, R0 - LDMFD SP!, {R0-R12, LR, PC}^ - _osExceptDispatch: MRS R1, SPSR MOV R2, LR @@ -196,8 +107,6 @@ _osExceptDispatch: LDMFD R4!, {R6-R12} STMFD SP!, {R6-R11} STMFD SP!, {R1} - -_osExceptionSwi: MOV R3, SP _osExceptionGetSP: diff --git a/kernel/arch/arm/arm9/gcc/reset_vector.S b/kernel/arch/arm/arm9/gcc/reset_vector.S index 27e40e43..ca015a17 100644 --- a/kernel/arch/arm/arm9/gcc/reset_vector.S +++ b/kernel/arch/arm/arm9/gcc/reset_vector.S @@ -79,7 +79,6 @@ _vector_start: B HalExceptIrqHdl B HalExceptFiqHdl - .globl HalResetVector .section ".boot", "ax" @@ -133,17 +132,18 @@ __abt_stack: __abt_stack_top: __irq_stack: - .space 64 + .space 1024 __irq_stack_top: __fiq_stack: - .space 64 + .space 1024 __fiq_stack_top: __svc_stack: - .space 4096 + .space 1024 __svc_stack_top: __exc_stack: .space 512 __exc_stack_top: +