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!722 修复liteos_m仓库中存在的一些拼写错误 

Merge pull request !722 from Hongjin Li/dev
This commit is contained in:
openharmony_ci 2022-06-23 04:10:35 +00:00 committed by Gitee
parent a7341d81d1 243fe55c68
commit 8a05eb6e08
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GPG Key ID: 173E9B9CA92EEF8F
34 changed files with 106 additions and 106 deletions
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2
Kconfig
View File

@ -581,7 +581,7 @@ config MEM_LEAKCHECK
depends on DEBUG_VERSION && MEM_DEBUG
select KERNEL_BACKTRACE
help
Answer Y to enable record the LR of Function call stack of Mem operation, it can check the mem leak through the informations of mem node.
Answer Y to enable record the LR of Function call stack of Mem operation, it can check the mem leak through the information of mem node.
config BASE_MEM_NODE_INTEGRITY_CHECK
bool "Enable integrity check or not"
default n

2
arch/risc-v/nuclei/gcc/los_arch_interrupt.h
View File

@ -51,7 +51,7 @@ extern "C" {
/**
* @ingroup los_hwi
* Count of Nuclei interrupt vector maxium, which is configurable.
* Count of Nuclei interrupt vector maximum, which is configurable.
*/
#define OS_RISCV_CUSTOM_IRQ_VECTOR_CNT SOC_INT_MAX

6
arch/risc-v/nuclei/gcc/los_interrupt.c
View File

@ -193,15 +193,15 @@ VOID HalDisplayTaskInfo(VOID)
/* ****************************************************************************
Function : HalUnalignedAccessFix
Description : Unaligned acess fixes are not supported by default
Description : Unaligned access fixes are not supported by default
Input : None
Output : None
Return : None
**************************************************************************** */
WEAK UINT32 HalUnalignedAccessFix(UINTPTR mcause, UINTPTR mepc, UINTPTR mtval, VOID *sp)
{
/* Unaligned acess fixes are not supported by default */
PRINTK("Unaligned acess fixes are not support by default!\r\n");
/* Unaligned access fixes are not supported by default */
PRINTK("Unaligned access fixes are not support by default!\r\n");
return LOS_NOK;
}

58
arch/risc-v/nuclei/gcc/nmsis/Core/Include/core_feature_dsp.h
View File

@ -62,9 +62,9 @@
* - ZEm(data): Zero-Extend data to m-bit.
* - ABS(x): Calculate the absolute value of `x`.
* - CONCAT(x,y): Concatinate `x` and `y` to form a value.
* - u<: Unsinged less than comparison.
* - u<=: Unsinged less than & equal comparison.
* - u>: Unsinged greater than comparison.
* - u<: Unsigned less than comparison.
* - u<=: Unsigned less than & equal comparison.
* - u>: Unsigned greater than comparison.
* - s*: Signed multiplication.
* - u*: Unsigned multiplication.
*
@ -2641,7 +2641,7 @@ __STATIC_FORCEINLINE long __RV_KHMTT(unsigned int a, unsigned int b)
/* ===== Inline Function Start for 3.38.1. KMABB ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMABB (SIMD Saturating Signed Multiply Bottom Halfs & Add)
* \brief KMABB (SIMD Saturating Signed Multiply Bottom Halves & Add)
* \details
* **Type**: SIMD
*
@ -2704,7 +2704,7 @@ __STATIC_FORCEINLINE long __RV_KMABB(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.38.2. KMABT ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMABT (SIMD Saturating Signed Multiply Bottom & Top Halfs & Add)
* \brief KMABT (SIMD Saturating Signed Multiply Bottom & Top Halves & Add)
* \details
* **Type**: SIMD
*
@ -2767,7 +2767,7 @@ __STATIC_FORCEINLINE long __RV_KMABT(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.38.3. KMATT ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMATT (SIMD Saturating Signed Multiply Top Halfs & Add)
* \brief KMATT (SIMD Saturating Signed Multiply Top Halves & Add)
* \details
* **Type**: SIMD
*
@ -2830,7 +2830,7 @@ __STATIC_FORCEINLINE long __RV_KMATT(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.39.1. KMADA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMADA (SIMD Saturating Signed Multiply Two Halfs and Two Adds)
* \brief KMADA (SIMD Saturating Signed Multiply Two Halves and Two Adds)
* \details
* **Type**: SIMD
*
@ -2894,7 +2894,7 @@ __STATIC_FORCEINLINE long __RV_KMADA(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.39.2. KMAXDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMAXDA (SIMD Saturating Signed Crossed Multiply Two Halfs and Two Adds)
* \brief KMAXDA (SIMD Saturating Signed Crossed Multiply Two Halves and Two Adds)
* \details
* **Type**: SIMD
*
@ -2958,7 +2958,7 @@ __STATIC_FORCEINLINE long __RV_KMAXDA(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.40.1. KMADS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMADS (SIMD Saturating Signed Multiply Two Halfs & Subtract & Add)
* \brief KMADS (SIMD Saturating Signed Multiply Two Halves & Subtract & Add)
* \details
* **Type**: SIMD
*
@ -3030,7 +3030,7 @@ __STATIC_FORCEINLINE long __RV_KMADS(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.40.2. KMADRS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMADRS (SIMD Saturating Signed Multiply Two Halfs & Reverse Subtract & Add)
* \brief KMADRS (SIMD Saturating Signed Multiply Two Halves & Reverse Subtract & Add)
* \details
* **Type**: SIMD
*
@ -3102,7 +3102,7 @@ __STATIC_FORCEINLINE long __RV_KMADRS(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.40.3. KMAXDS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMAXDS (SIMD Saturating Signed Crossed Multiply Two Halfs & Subtract & Add)
* \brief KMAXDS (SIMD Saturating Signed Crossed Multiply Two Halves & Subtract & Add)
* \details
* **Type**: SIMD
*
@ -3242,7 +3242,7 @@ __STATIC_FORCEINLINE long long __RV_KMAR64(long long t, long a, long b)
/* ===== Inline Function Start for 3.42.1. KMDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMDA (SIMD Signed Multiply Two Halfs and Add)
* \brief KMDA (SIMD Signed Multiply Two Halves and Add)
* \details
* **Type**: SIMD
*
@ -3293,7 +3293,7 @@ __STATIC_FORCEINLINE long __RV_KMDA(unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.42.2. KMXDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMXDA (SIMD Signed Crossed Multiply Two Halfs and Add)
* \brief KMXDA (SIMD Signed Crossed Multiply Two Halves and Add)
* \details
* **Type**: SIMD
*
@ -4330,7 +4330,7 @@ __STATIC_FORCEINLINE long __RV_KMMWT2_U(long a, unsigned long b)
/* ===== Inline Function Start for 3.51.1. KMSDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMSDA (SIMD Saturating Signed Multiply Two Halfs & Add & Subtract)
* \brief KMSDA (SIMD Saturating Signed Multiply Two Halves & Add & Subtract)
* \details
* **Type**: SIMD
*
@ -4392,7 +4392,7 @@ __STATIC_FORCEINLINE long __RV_KMSDA(long t, unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.51.2. KMSXDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief KMSXDA (SIMD Saturating Signed Crossed Multiply Two Halfs & Add & Subtract)
* \brief KMSXDA (SIMD Saturating Signed Crossed Multiply Two Halves & Add & Subtract)
* \details
* **Type**: SIMD
*
@ -5558,7 +5558,7 @@ __STATIC_FORCEINLINE long __RV_KSUBH(int a, int b)
* **Description**:\n
* The signed lower 32-bit content of Rs2 is subtracted from the signed lower 32-bit
* content of Rs1. And the result is saturated to the 32-bit signed integer range of [-2^31, 2^31-1] and then
* sign-extened and written to Rd. If saturation happens, this instruction sets the OV flag.
* sign-extended and written to Rd. If saturation happens, this instruction sets the OV flag.
*
* **Operations**:\n
* ~~~
@ -7337,7 +7337,7 @@ __STATIC_FORCEINLINE unsigned long __RV_SLL16(unsigned long a, unsigned int b)
/* ===== Inline Function Start for 3.104. SMAL ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMAL (Signed Multiply Halfs & Add 64-bit)
* \brief SMAL (Signed Multiply Halves & Add 64-bit)
* \details
* **Type**: Partial-SIMD
*
@ -7397,7 +7397,7 @@ __STATIC_FORCEINLINE long long __RV_SMAL(long long a, unsigned long b)
/* ===== Inline Function Start for 3.105.1. SMALBB ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALBB (Signed Multiply Bottom Halfs & Add 64-bit)
* \brief SMALBB (Signed Multiply Bottom Halves & Add 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@ -7561,7 +7561,7 @@ __STATIC_FORCEINLINE long long __RV_SMALBT(long long t, unsigned long a, unsigne
/* ===== Inline Function Start for 3.105.3. SMALTT ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALTT (Signed Multiply Top Halfs & Add 64-bit)
* \brief SMALTT (Signed Multiply Top Halves & Add 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@ -7643,7 +7643,7 @@ __STATIC_FORCEINLINE long long __RV_SMALTT(long long t, unsigned long a, unsigne
/* ===== Inline Function Start for 3.106.1. SMALDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALDA (Signed Multiply Two Halfs and Two Adds 64-bit)
* \brief SMALDA (Signed Multiply Two Halves and Two Adds 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@ -7727,7 +7727,7 @@ __STATIC_FORCEINLINE long long __RV_SMALDA(long long t, unsigned long a, unsigne
/* ===== Inline Function Start for 3.106.2. SMALXDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALXDA (Signed Crossed Multiply Two Halfs and Two Adds 64-bit)
* \brief SMALXDA (Signed Crossed Multiply Two Halves and Two Adds 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@ -7811,7 +7811,7 @@ __STATIC_FORCEINLINE long long __RV_SMALXDA(long long t, unsigned long a, unsign
/* ===== Inline Function Start for 3.107.1. SMALDS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALDS (Signed Multiply Two Halfs & Subtract & Add 64-bit)
* \brief SMALDS (Signed Multiply Two Halves & Subtract & Add 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@ -7902,7 +7902,7 @@ __STATIC_FORCEINLINE long long __RV_SMALDS(long long t, unsigned long a, unsigne
/* ===== Inline Function Start for 3.107.2. SMALDRS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALDRS (Signed Multiply Two Halfs & Reverse Subtract & Add 64- bit)
* \brief SMALDRS (Signed Multiply Two Halves & Reverse Subtract & Add 64- bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@ -7993,7 +7993,7 @@ __STATIC_FORCEINLINE long long __RV_SMALDRS(long long t, unsigned long a, unsign
/* ===== Inline Function Start for 3.107.3. SMALXDS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMALXDS (Signed Crossed Multiply Two Halfs & Subtract & Add 64- bit)
* \brief SMALXDS (Signed Crossed Multiply Two Halves & Subtract & Add 64- bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@ -8459,7 +8459,7 @@ __STATIC_FORCEINLINE long __RV_SMTT16(unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.114.1. SMDS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief SMDS (SIMD Signed Multiply Two Halfs and Subtract)
* \brief SMDS (SIMD Signed Multiply Two Halves and Subtract)
* \details
* **Type**: SIMD
*
@ -8518,7 +8518,7 @@ __STATIC_FORCEINLINE long __RV_SMDS(unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.114.2. SMDRS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief SMDRS (SIMD Signed Multiply Two Halfs and Reverse Subtract)
* \brief SMDRS (SIMD Signed Multiply Two Halves and Reverse Subtract)
* \details
* **Type**: SIMD
*
@ -8577,7 +8577,7 @@ __STATIC_FORCEINLINE long __RV_SMDRS(unsigned long a, unsigned long b)
/* ===== Inline Function Start for 3.114.3. SMXDS ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_32B_ADDSUB
* \brief SMXDS (SIMD Signed Crossed Multiply Two Halfs and Subtract)
* \brief SMXDS (SIMD Signed Crossed Multiply Two Halves and Subtract)
* \details
* **Type**: SIMD
*
@ -9016,7 +9016,7 @@ __STATIC_FORCEINLINE long __RV_SMMWT_U(long a, unsigned long b)
/* ===== Inline Function Start for 3.120.1. SMSLDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMSLDA (Signed Multiply Two Halfs & Add & Subtract 64-bit)
* \brief SMSLDA (Signed Multiply Two Halves & Add & Subtract 64-bit)
* \details
* **Type**: DSP (64-bit Profile)
*
@ -9098,7 +9098,7 @@ __STATIC_FORCEINLINE long long __RV_SMSLDA(long long t, unsigned long a, unsigne
/* ===== Inline Function Start for 3.120.2. SMSLXDA ===== */
/**
* \ingroup NMSIS_Core_DSP_Intrinsic_SIGNED_16B_MULT_64B_ADDSUB
* \brief SMSLXDA (Signed Crossed Multiply Two Halfs & Add & Subtract 64- bit)
* \brief SMSLXDA (Signed Crossed Multiply Two Halves & Add & Subtract 64- bit)
* \details
* **Type**: DSP (64-bit Profile)
*

2
arch/risc-v/nuclei/gcc/nmsis/Core/Include/core_feature_eclic.h
View File

@ -282,7 +282,7 @@ __STATIC_FORCEINLINE uint32_t __ECLIC_GetCfgNlbits(void)
* This function gets the hardware version information from CLICINFO register.
* \return hardware version number in CLICINFO register.
* \remarks
* - This function gets harware version information from CLICINFO register.
* - This function gets hardware version information from CLICINFO register.
* - Bit 20:17 for architecture version, bit 16:13 for implementation version.
* \sa
* - \ref ECLIC_GetInfoNum

2
arch/risc-v/nuclei/gcc/nmsis/Core/Include/core_feature_fpu.h
View File

@ -81,7 +81,7 @@
* \details
* * We can save power by disable FPU Unit.
* * When FPU Unit is disabled, any access to FPU related CSR registers
* and FPU instructions will cause illegal Instuction Exception.
* and FPU instructions will cause illegal Instruction Exception.
* */
#define __disable_FPU() __RV_CSR_CLEAR(CSR_MSTATUS, MSTATUS_FS)

2
arch/risc-v/nuclei/gcc/nmsis/Core/Include/core_feature_timer.h
View File

@ -282,7 +282,7 @@ __STATIC_FORCEINLINE void SysTimer_SoftwareReset(void)
* \details Initializes the System Timer and its non-vector interrupt, and starts the System Tick Timer.
*
* In our default implementation, the timer counter will be set to zero, and it will start a timer compare non-vector interrupt
* when it matchs the ticks user set, during the timer interrupt user should reload the system tick using \ref SysTick_Reload function
* when it matches the ticks user set, during the timer interrupt user should reload the system tick using \ref SysTick_Reload function
* or similar function written by user, so it can produce period timer interrupt.
* \param [in] ticks Number of ticks between two interrupts.
* \return 0 Function succeeded.

2
arch/risc-v/nuclei/gcc/nmsis/Core/Include/riscv_encoding.h
View File

@ -325,7 +325,7 @@
* \brief NMSIS Core CSR Register Definitions
* \details
*
* The following macros are used for CSR Register Defintions.
* The following macros are used for CSR Register Definitions.
* @{
*/
/* === Standard RISC-V CSR Registers === */

58
arch/risc-v/nuclei/gcc/nmsis/NN/Include/riscv_nnfunctions.h
View File

@ -47,7 +47,7 @@
* - Neural Network Support Functions
*
* The library has separate functions for operating on different weight and activation data
* types including 8-bit integers (q7_t) and 16-bit integers (q15_t). The descrition of the
* types including 8-bit integers (q7_t) and 16-bit integers (q15_t). The description of the
* kernels are included in the function description. The implementation details are also
* described in this paper [1].
*
@ -119,7 +119,7 @@ extern "C"
/**
* @brief Basic Q7 convolution function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -156,8 +156,8 @@ extern "C"
/**
* @brief Basic Q7 convolution function (non-sqaure shape)
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in_x input tensor dimention x
* @param[in] dim_im_in_y input tensor dimention y
* @param[in] dim_im_in_x input tensor dimension x
* @param[in] dim_im_in_y input tensor dimension y
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -202,7 +202,7 @@ extern "C"
/**
* @brief Basic Q15 convolution function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -239,7 +239,7 @@ extern "C"
/**
* @brief Fast Q7 convolution function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -257,7 +257,7 @@ extern "C"
* <code>RISCV_MATH_SIZE_MISMATCH</code> or <code>RISCV_MATH_SUCCESS</code> based on the outcome of size checking.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 4
* ch_im_out is multiple of 2
*/
@ -281,8 +281,8 @@ extern "C"
/**
* @brief Fast Q7 convolution function (non-sqaure shape)
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in_x input tensor dimention x
* @param[in] dim_im_in_y input tensor dimention y
* @param[in] dim_im_in_x input tensor dimension x
* @param[in] dim_im_in_y input tensor dimension y
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -304,7 +304,7 @@ extern "C"
* <code>RISCV_MATH_SIZE_MISMATCH</code> or <code>RISCV_MATH_SUCCESS</code> based on the outcome of size checking.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 4
* ch_im_out is multiple of 2
*/
@ -333,8 +333,8 @@ extern "C"
/**
* @brief Fast Q7 version of 1x1 convolution (non-sqaure shape)
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in_x input tensor dimention x
* @param[in] dim_im_in_y input tensor dimention y
* @param[in] dim_im_in_x input tensor dimension x
* @param[in] dim_im_in_y input tensor dimension y
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -360,7 +360,7 @@ extern "C"
* second half of MobileNets after depthwise separable convolution.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 4
* ch_im_out is multiple of 2
*/
@ -388,7 +388,7 @@ extern "C"
/**
* @brief Q7 version of convolution for RGB image
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -429,7 +429,7 @@ extern "C"
/**
* @brief Fast Q15 convolution function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -447,7 +447,7 @@ extern "C"
* <code>RISCV_MATH_SIZE_MISMATCH</code> or <code>RISCV_MATH_SUCCESS</code> based on the outcome of size checking.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 2
* ch_im_out is multiple of 2
*/
@ -471,8 +471,8 @@ extern "C"
/**
* @brief Fast Q15 convolution function (non-sqaure shape)
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in_x input tensor dimention x
* @param[in] dim_im_in_y input tensor dimention y
* @param[in] dim_im_in_x input tensor dimension x
* @param[in] dim_im_in_y input tensor dimension y
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -505,7 +505,7 @@ extern "C"
*
* ch_im_in is multiple of 2
*
* ch_im_out is multipe of 2
* ch_im_out is multiple of 2
*
*/
@ -534,7 +534,7 @@ extern "C"
/**
* @brief Q7 depthwise separable convolution function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -552,7 +552,7 @@ extern "C"
* <code>RISCV_MATH_SIZE_MISMATCH</code> or <code>RISCV_MATH_SUCCESS</code> based on the outcome of size checking.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 2
* ch_im_out is multiple of 2
*/
@ -576,8 +576,8 @@ extern "C"
/**
* @brief Q7 depthwise separable convolution function (non-square shape)
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in_x input tensor dimention x
* @param[in] dim_im_in_y input tensor dimention y
* @param[in] dim_im_in_x input tensor dimension x
* @param[in] dim_im_in_y input tensor dimension y
* @param[in] ch_im_in number of input tensor channels
* @param[in] wt pointer to kernel weights
* @param[in] ch_im_out number of filters, i.e., output tensor channels
@ -599,7 +599,7 @@ extern "C"
* <code>RISCV_MATH_SIZE_MISMATCH</code> or <code>RISCV_MATH_SUCCESS</code> based on the outcome of size checking.
*
* This function is the version with full list of optimization tricks, but with
* some contraints:
* some constraints:
* ch_im_in is multiple of 2
* ch_im_out is multiple of 2
*/
@ -986,7 +986,7 @@ extern "C"
/**
* @brief Q7 max pooling function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] dim_kernel filter kernel size
* @param[in] padding padding sizes
@ -1011,7 +1011,7 @@ extern "C"
/**
* @brief Q7 average pooling function
* @param[in] Im_in pointer to input tensor
* @param[in] dim_im_in input tensor dimention
* @param[in] dim_im_in input tensor dimension
* @param[in] ch_im_in number of input tensor channels
* @param[in] dim_kernel filter kernel size
* @param[in] padding padding sizes
@ -1043,7 +1043,7 @@ extern "C"
/**
* @brief Q7 softmax function
* @param[in] vec_in pointer to input vector
* @param[in] dim_vec input vector dimention
* @param[in] dim_vec input vector dimension
* @param[out] p_out pointer to output vector
* @return none.
*
@ -1054,7 +1054,7 @@ extern "C"
/**
* @brief Q15 softmax function
* @param[in] vec_in pointer to input vector
* @param[in] dim_vec input vector dimention
* @param[in] dim_vec input vector dimension
* @param[out] p_out pointer to output vector
* @return none.
*
@ -1081,7 +1081,7 @@ extern "C"
* @param[in] dilation_x Dilation along width. Not used and intended for future enhancement.
* @param[in] dilation_y Dilation along height. Not used and intended for future enhancement.
* @param[in] bias Pointer to optional bias values. If no bias is
* availble, NULL is expected
* available, NULL is expected
* @param[in] input_offset Input tensor zero offset
* @param[in] filter_offset Kernel tensor zero offset
* @param[in] output_offset Output tensor zero offset

2
components/debugtools/los_schedtrace.c
View File

@ -81,7 +81,7 @@ STATIC VOID DefaultRecordHandle(LosTaskCB *newTask, LosTaskCB *runTask)
STATIC VOID ShowFormat(SchedTraceInfo *buf, UINT32 count)
{
if (count == 0) {
PRINT_ERR("none shed happend\n");
PRINT_ERR("none shed happened\n");
return;
}

2
components/dynlink/los_dynlink.h
View File

@ -149,7 +149,7 @@ const SymInfo sym_##func __attribute__((section(".sym."#func))) = { \
* then the shared library will be loaded to the heap by pool.
*
* @note When the heap, pool, is not NULL, you should call LOS_MemInit() to initialize the
* pool before calling LOS_SoLoad(). By the way, the system will comsume a certain amount
* pool before calling LOS_SoLoad(). By the way, the system will consume a certain amount
* of memory to initialize the pool. LOS_SoLoad must not be called in interrupt callback.
*
* @return Return NULL if error. Return non-NULL if success.

2
components/net/lwip-2.1/porting/src/sys_arch.c
View File

@ -90,7 +90,7 @@ void sys_init(void)
u32_t sys_now(void)
{
/* Lwip docs mentioned like wraparound is not a problem in this funtion */
/* Lwip docs mentioned like wraparound is not a problem in this function */
return (u32_t)((LOS_TickCountGet() * OS_SYS_MS_PER_SECOND) /
LOSCFG_BASE_CORE_TICK_PER_SECOND);
}

4
components/shell/src/base/shcmd.c
View File

@ -86,7 +86,7 @@ CmdModInfo *OsCmdInfoGet(VOID)
* Description: Pass in the string and clear useless space ,which include:
* 1) The overmatch space which is not be marked by Quote's area
* Squeeze the overmatch space into one space
* 2) Clear all space before first vaild character
* 2) Clear all space before first valid character
* Input: cmdKey : Pass in the buff string, which is ready to be operated
* cmdOut : Pass out the buffer string ,which has already been operated
* size : cmdKey length
@ -115,7 +115,7 @@ LITE_OS_SEC_TEXT_MINOR UINT32 OsCmdKeyShift(const CHAR *cmdKey, CHAR *cmdOut, UI
(VOID)memset_s(output, len + 1, 0, len + 1);
/* Backup the 'output' start address */
outputBak = output;
/* Scan each charactor in 'cmdKey',and squeeze the overmuch space and ignore invaild charactor */
/* Scan each charactor in 'cmdKey',and squeeze the overmuch space and ignore invalid charactor */
for (; *cmdKey != '\0'; cmdKey++) {
/* Detected a Double Quotes, switch the matching status */
if (*(cmdKey) == '\"') {

2
components/trace/Kconfig
View File

@ -14,7 +14,7 @@ config TRACE_FRAME_CORE_MSG
depends on TRACE_MSG_EXTEND
config TRACE_FRAME_EVENT_COUNT
bool "Record event count, which indicate the sequence of happend events"
bool "Record event count, which indicate the sequence of happened events"
default n
depends on TRACE_MSG_EXTEND

8
components/trace/los_trace.h
View File

@ -133,7 +133,7 @@ typedef enum {
/**
* @ingroup los_trace
* Trace event type which indicate the exactly happend events, user can define own module's event type like
* Trace event type which indicate the exactly happened events, user can define own module's event type like
* TRACE_#MODULE#_FLAG | NUMBER.
* 28 4
* 0 0 0 0 0 0 0 0 X X X X X X X X 0 0 0 0 0 0
@ -241,7 +241,7 @@ typedef struct {
#endif
#if (LOSCFG_TRACE_FRAME_EVENT_COUNT == 1)
UINT32 eventCount; /**< the sequence of happend events */
UINT32 eventCount; /**< the sequence of happened events */
#endif
UINTPTR params[LOSCFG_TRACE_FRAME_MAX_PARAMS]; /**< event frame's params */
@ -350,8 +350,8 @@ extern TRACE_EVENT_HOOK g_traceEventHook;
#define QUEUE_CREATE_PARAMS(queueId, queueSz, itemSz, queueAddr, memType) \
queueId, queueSz, itemSz, queueAddr, memType
#define QUEUE_DELETE_PARAMS(queueId, state, readable) queueId, state, readable
#define QUEUE_RW_PARAMS(queueId, queueSize, bufSize, operateType, readable, writeable, timeout) \
queueId, queueSize, bufSize, operateType, readable, writeable, timeout
#define QUEUE_RW_PARAMS(queueId, queueSize, bufSize, operateType, readable, writable, timeout) \
queueId, queueSize, bufSize, operateType, readable, writable, timeout
#define SEM_CREATE_PARAMS(semId, type, count) semId, type, count
#define SEM_DELETE_PARAMS(semId, delRetCode) semId, delRetCode

4
kal/posix/src/pthread.c
View File

@ -45,7 +45,7 @@
#define PTHREAD_NAMELEN 16
#define PTHREAD_KEY_UNUSED 0
#define PTHREAD_KEY_USED 1
#define PTHREAD_TASK_INVAILD 0
#define PTHREAD_TASK_INVALID 0
typedef void (*PthreadKeyDtor)(void *);
typedef struct {
@ -399,7 +399,7 @@ STATIC UINT32 DoPthreadCancel(LosTaskCB *task)
LOS_TaskLock();
pthreadData = (PthreadData *)(UINTPTR)task->arg;
pthreadData->canceled = 0;
if ((task->taskStatus == PTHREAD_TASK_INVAILD) || (LOS_TaskSuspend(task->taskID) != LOS_OK)) {
if ((task->taskStatus == PTHREAD_TASK_INVALID) || (LOS_TaskSuspend(task->taskID) != LOS_OK)) {
ret = LOS_NOK;
goto OUT;
}

2
kernel/include/los_membox.h
View File

@ -238,7 +238,7 @@ extern VOID LOS_ShowBox(VOID *pool);
*
* @param boxMem [IN] Type #VOID* Pointer to the calculate membox.
* @param maxBlk [OUT] Type #UINT32* Record membox max block.
* @param blkCnt [OUT] Type #UINT32* Record membox block count alreay allocated.
* @param blkCnt [OUT] Type #UINT32* Record membox block count already allocated.
* @param blkSize [OUT] Type #UINT32* Record membox block size.
*
* @retval #LOS_OK The heap status calculate success.

2
targets/riscv_nuclei_demo_soc_gcc/SoC/demosoc/Common/Include/demosoc.h
View File

@ -181,7 +181,7 @@ typedef enum EXCn {
#define __ICACHE_PRESENT 0 /*!< Set to 1 if I-Cache is present */
#define __DCACHE_PRESENT 0 /*!< Set to 1 if D-Cache is present */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
#define __Vendor_EXCEPTION 0 /*!< Set to 1 if vendor exception hander is present */
#define __Vendor_EXCEPTION 0 /*!< Set to 1 if vendor exception handler is present */
/** @} */ /* End of group Configuration_of_CMSIS */

2
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Include/Usb/usb_conf.h
View File

@ -84,7 +84,7 @@
#endif
#endif
/****************** C Compilers dependant keywords ****************************/
/****************** C Compilers dependent keywords ****************************/
/* In HS mode and when the DMA is used, all variables and data structures dealing
with the DMA during the transaction process should be 4-bytes aligned */
#ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED

2
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Include/gd32vf103.h
View File

@ -195,7 +195,7 @@ typedef enum EXCn {
#define __ICACHE_PRESENT 0 /*!< Set to 1 if I-Cache is present */
#define __DCACHE_PRESENT 0 /*!< Set to 1 if D-Cache is present */
#define __Vendor_SysTickConfig 0 /*!< Set to 1 if different SysTick Config is used */
#define __Vendor_EXCEPTION 0 /*!< Set to 1 if vendor exception hander is present */
#define __Vendor_EXCEPTION 0 /*!< Set to 1 if vendor exception handler is present */
/** @} */ /* End of group Configuration_of_CMSIS */

2
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Include/gd32vf103_usart.h
View File

@ -94,7 +94,7 @@ OF SUCH DAMAGE.
/* USARTx_CTL1 */
#define USART_CTL1_ADDR BITS(0,3) /*!< address of USART */
#define USART_CTL1_LBLEN BIT(5) /*!< LIN break frame length */
#define USART_CTL1_LBDIE BIT(6) /*!< LIN break detected interrupt eanble */
#define USART_CTL1_LBDIE BIT(6) /*!< LIN break detected interrupt enable */
#define USART_CTL1_CLEN BIT(8) /*!< CK length */
#define USART_CTL1_CPH BIT(9) /*!< CK phase */
#define USART_CTL1_CPL BIT(10) /*!< CK polarity */

4
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/Usb/drv_usbd_int.c
View File

@ -386,11 +386,11 @@ static uint32_t usbd_int_rxfifo (usb_core_driver *udev)
break;
case RSTAT_XFER_COMP:
/* trigger the OUT enpoint interrupt */
/* trigger the OUT endpoint interrupt */
break;
case RSTAT_SETUP_COMP:
/* trigger the OUT enpoint interrupt */
/* trigger the OUT endpoint interrupt */
break;
case RSTAT_SETUP_UPDT:

2
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/Usb/usbd_core.c
View File

@ -56,7 +56,7 @@ void usbd_init (usb_core_driver *udev, usb_core_enum core, usb_class_core *class
/* device descriptor, class and user callbacks */
udev->dev.class_core = class_core;
/* configure USB capabilites */
/* configure USB capabilities */
usb_basic_init (&udev->bp, &udev->regs, core);
/* initailizes the USB core*/

2
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/Usb/usbh_core.c
View File

@ -214,7 +214,7 @@ void usbh_core_task (usb_core_driver *pudev, usbh_host *puhost)
break;
case HOST_CLASS_ENUM:
/* process class standard contol requests state machine */
/* process class standard control requests state machine */
status = puhost->class_cb->class_requests(pudev, puhost);
if (USBH_OK == status) {

2
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/gd32vf103_can.c
View File

@ -182,7 +182,7 @@ ErrStatus can_init(uint32_t can_periph, can_parameter_struct* can_parameter_init
}else{
CAN_CTL(can_periph) &= ~CAN_CTL_TTC;
}
/* automatic bus-off managment */
/* automatic bus-off management */
if(ENABLE == can_parameter_init->auto_bus_off_recovery){
CAN_CTL(can_periph) |= CAN_CTL_ABOR;
}else{

4
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/gd32vf103_dma.c
View File

@ -665,7 +665,7 @@ void dma_interrupt_flag_clear(uint32_t dma_periph, dma_channel_enum channelx, ui
\param[in] channelx: specify which DMA channel
only one parameter can be selected which is shown as below:
\arg DMA0: DMA_CHx(x=0..6), DMA1: DMA_CHx(x=0..4)
\param[in] source: specify which interrupt to enbale
\param[in] source: specify which interrupt to enable
one or more parameters can be selected which are shown as below
\arg DMA_INT_FTF: channel full transfer finish interrupt
\arg DMA_INT_HTF: channel half transfer finish interrupt
@ -689,7 +689,7 @@ void dma_interrupt_enable(uint32_t dma_periph, dma_channel_enum channelx, uint32
\param[in] channelx: specify which DMA channel
only one parameter can be selected which is shown as below:
\arg DMA0: DMA_CHx(x=0..6), DMA1: DMA_CHx(x=0..4)
\param[in] source: specify which interrupt to disbale
\param[in] source: specify which interrupt to disable
one or more parameters can be selected which are shown as below
\arg DMA_INT_FTF: channel full transfer finish interrupt
\arg DMA_INT_HTF: channel half transfer finish interrupt

4
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/gd32vf103_rtc.c
View File

@ -244,7 +244,7 @@ void rtc_interrupt_flag_clear(uint32_t flag)
/*!
\brief enable RTC interrupt
\param[in] interrupt: specify which interrupt to enbale
\param[in] interrupt: specify which interrupt to enable
one or more parameters can be selected which are shown as below:
\arg RTC_INT_SECOND: second interrupt
\arg RTC_INT_ALARM: alarm interrupt
@ -259,7 +259,7 @@ void rtc_interrupt_enable(uint32_t interrupt)
/*!
\brief disable RTC interrupt
\param[in] interrupt: specify which interrupt to disbale
\param[in] interrupt: specify which interrupt to disable
one or more parameters can be selected which are shown as below:
\arg RTC_INT_SECOND: second interrupt
\arg RTC_INT_ALARM: alarm interrupt

2
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/gd32vf103_spi.c
View File

@ -80,7 +80,7 @@ void spi_i2s_deinit(uint32_t spi_periph)
/*!
\brief initialize the parameters of SPI struct with the default values
\param[in] spi_struct: SPI parameter stuct
\param[in] spi_struct: SPI parameter struct
\param[out] none
\retval none
*/

4
targets/riscv_nuclei_gd32vf103_soc_gcc/SoC/gd32vf103/Common/Source/Drivers/gd32vf103_timer.c
View File

@ -407,7 +407,7 @@ void timer_dma_enable(uint32_t timer_periph, uint16_t dma)
/*!
\brief disable the TIMER DMA
\param[in] timer_periph: TIMERxTIMERx(x=0..6)
\param[in] dma: specify which DMA to disbale
\param[in] dma: specify which DMA to disable
one or more parameters can be selected which are shown as below:
\arg TIMER_DMA_UPD: update DMA enable, TIMERx(x=0..6)
\arg TIMER_DMA_CH0D: channel 0 DMA enable, TIMERx(x=0..4)
@ -1844,7 +1844,7 @@ void timer_interrupt_enable(uint32_t timer_periph, uint32_t interrupt)
/*!
\brief disable the TIMER interrupt
\param[in] timer_periph: TIMERx(x=0..6)
\param[in] interrupt: specify which interrupt to disbale
\param[in] interrupt: specify which interrupt to disable
one or more parameters can be selected which are shown as below:
\arg TIMER_INT_UP: update interrupt enable, TIMERx(x=0..6)
\arg TIMER_INT_CH0: channel 0 interrupt enable, TIMERx(x=0..4)

2
testsuites/include/osTest.h
View File

@ -300,7 +300,7 @@ extern UINT32 TaskUsedCountGet(VOID);
#define HWI_NUM_TEST 31 // csky_v2 only support one software interrupt number
#define LOS_KERNEL_MULTI_HWI_TEST 0 // csky_v2 not support multiple hwi number test case
#elif __XTENSA_LX6__
#define HWI_NUM_TEST 7 // xtensa_lx6 only suppport one software interrupt number
#define HWI_NUM_TEST 7 // xtensa_lx6 only support one software interrupt number
#define LOS_KERNEL_MULTI_HWI_TEST 0 // xtensa_lx6 not support multiple hwi number test case
#else
#define HWI_NUM_TEST HWI_NUM_INT7

2
testsuites/sample/kernel/task/It_los_task_049.c
View File

@ -56,7 +56,7 @@ static VOID TaskF01(VOID)
ICUNIT_GOTO_STRING_EQUAL(g_taskInfo.acName, "Tsk049A", g_taskInfo.acName, EXIT1);
ICUNIT_GOTO_EQUAL(g_taskInfo.uwTaskID, g_testTaskID01, g_taskInfo.uwTaskID, EXIT1);
// 2, Assert that current task`s priority is equal to the priority was setted.
// 2, Assert that current task`s priority is equal to the priority was set.
ICUNIT_GOTO_EQUAL(g_taskInfo.usTaskPrio, TASK_PRIO_TEST - 2, g_taskInfo.usTaskPrio, EXIT1);
ICUNIT_GOTO_EQUAL(OS_TASK_STATUS_RUNNING & g_taskInfo.usTaskStatus, OS_TASK_STATUS_RUNNING,
OS_TASK_STATUS_RUNNING & g_taskInfo.usTaskStatus, EXIT1);

2
testsuites/unittest/posix/src/mqueue/mqueue_func_test.c
View File

@ -93,7 +93,7 @@ static BOOL MqueueFuncTestSuiteTearDown(void)
/**
* @tc.number : SUB_KERNEL_PTHREAD_OPERATION_001
* @tc.name : event operation for creat
* @tc.name : event operation for create
* @tc.desc : [C- SOFTWARE -0200]
*/
LITE_TEST_CASE(MqueueFuncTestSuite, testMqueue001, Function | MediumTest | Level1)

2
testsuites/unittest/posix/src/semaphore/semaphore_func_test.c
View File

@ -154,7 +154,7 @@ LITE_TEST_CASE(PosixSemaphoreFuncTestSuite, testIpcSem_Timedwait002, Function |
LOG("\n timeDiff %d", timeDiff);
TEST_ASSERT_LESS_THAN_INT(20, timeDiff);
// try get semphore again
// try get semaphore again
ts = GetDelayedTime(100);
LOG("\n ts %d, %d", ts.tv_sec, ts.tv_nsec);
ret = sem_timedwait((sem_t *)&sem, &ts);

8
testsuites/unittest/posix/src/time/time_func_test_01.c
View File

@ -96,12 +96,12 @@ static int KeepRun(int msec)
clock_gettime(CLOCK_MONOTONIC, &time1);
LOG("KeepRun start : tv_sec=%ld, tv_nsec=%ld\n", time1.tv_sec, time1.tv_nsec);
int loop = 0;
int runned = 0;
while (runned < msec) {
int ran = 0;
while (ran < msec) {
++loop;
clock_gettime(CLOCK_MONOTONIC, &time2);
runned = (time2.tv_sec - time1.tv_sec) * MILLISECONDS_PER_SECOND;
runned += (time2.tv_nsec - time1.tv_nsec) / NANOSECONDS_PER_MILLISECOND;
ran = (time2.tv_sec - time1.tv_sec) * MILLISECONDS_PER_SECOND;
ran += (time2.tv_nsec - time1.tv_nsec) / NANOSECONDS_PER_MILLISECOND;
}
LOG("KeepRun end : tv_sec=%ld, tv_nsec=%ld\n", time2.tv_sec, time2.tv_nsec);