yystopf/openharmony_kernel_liteos_m
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Description: support original vector base address

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Reviewed-by: shenwei
This commit is contained in:
likailong
2021-01-08 19:04:35 +08:00
parent 4c6ccb42f2
commit 5cee04fb0c
9 changed files with 46 additions and 3 deletions
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2
kernel/arch/arm/cortex-m3/keil/los_interrupt.c
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@@ -355,6 +355,7 @@ VOID HalExcRegister(ExcInfoType type, EXC_INFO_SAVE_CALLBACK func, VOID *arg)
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalHwiInit()
{
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
UINT32 index;
g_hwiForm[0] = 0; /* [0] Top of Stack */
g_hwiForm[1] = Reset_Handler; /* [1] reset */
@@ -372,6 +373,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit()
/* Interrupt vector table location */
SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
#endif
#if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
#endif

2
kernel/arch/arm/cortex-m3/keil/los_timer.c
View File

@@ -59,10 +59,12 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalTickStart(OS_TICK_HANDLER *handler)
return LOS_ERRNO_TICK_CFG_INVALID;
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
#endif
#endif
g_cyclesPerTick = OS_SYS_CLOCK / LOSCFG_BASE_CORE_TICK_PER_SECOND;

3
kernel/arch/arm/cortex-m4/iar/los_interrupt.c
View File

@@ -34,6 +34,7 @@
#include <stdarg.h>
#include "los_debug.h"
#include "los_task.h"
#include "los_tick.h"
#ifdef __cplusplus
#if __cplusplus
@@ -355,6 +356,7 @@ VOID HalExcRegister(ExcInfoType type, EXC_INFO_SAVE_CALLBACK func, VOID *arg)
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalHwiInit()
{
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
UINT32 index;
g_hwiForm[0] = 0; /* [0] Top of Stack */
g_hwiForm[1] = Reset_Handler; /* [1] reset */
@@ -372,6 +374,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit()
/* Interrupt vector table location */
SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
#endif
#if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
#endif

3
kernel/arch/arm/cortex-m4/iar/los_timer.c
View File

@@ -58,12 +58,13 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalTickStart(OS_TICK_HANDLER *handler)
return LOS_ERRNO_TICK_CFG_INVALID;
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
#endif
#endif
g_cyclesPerTick = OS_SYS_CLOCK / LOSCFG_BASE_CORE_TICK_PER_SECOND;
g_ullTickCount = 0;

2
kernel/arch/arm/cortex-m7/gcc/los_interrupt.c
View File

@@ -350,6 +350,7 @@ VOID HalExcRegister(ExcInfoType type, EXC_INFO_SAVE_CALLBACK func, VOID *arg)
**************************************************************************** */
LITE_OS_SEC_TEXT_INIT VOID HalHwiInit()
{
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
UINT32 index;
g_hwiForm[0] = 0; /* [0] Top of Stack */
g_hwiForm[1] = Reset_Handler; /* [1] reset */
@@ -368,6 +369,7 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit()
/* Interrupt vector table location */
SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
#endif
#if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
#endif

2
kernel/arch/arm/cortex-m7/gcc/los_timer.c
View File

@@ -58,10 +58,12 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalTickStart(OS_TICK_HANDLER *handler)
return LOS_ERRNO_TICK_CFG_INVALID;
}
#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
#if (OS_HWI_WITH_ARG == 1)
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL);
#else
OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler);
#endif
#endif
g_cyclesPerTick = OS_SYS_CLOCK / LOSCFG_BASE_CORE_TICK_PER_SECOND;