From 7a6242549f56861815a69649f1624623078dd053 Mon Sep 17 00:00:00 2001 From: kenneth Date: Wed, 20 Oct 2021 16:49:43 +0800 Subject: [PATCH] =?UTF-8?q?fixed=202da043c=20from=20https://gitee.com/rtos?= =?UTF-8?q?=5Fyuan/kernel=5Fliteos=5Fm/pulls/367=20fix=EF=BC=9A=E4=BF=AE?= =?UTF-8?q?=E5=A4=8DFault=E5=BC=82=E5=B8=B8=E6=A8=A1=E5=9D=97=E4=B8=ADFPU?= =?UTF-8?q?=E5=AE=8F=E7=AD=89=E9=97=AE=E9=A2=98?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit 去掉不必要的宏判断__FPU_PRESENT;参数变量名称 uwPid改为pid,和函数HalExcHandleEntry的参数保持一致 close #I4D575 Signed-off-by: kenneth --- kernel/arch/arm/cortex-m3/keil/los_exc.S | 2 +- kernel/arch/arm/cortex-m33/gcc/NTZ/los_exc.S | 8 +------- kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_exc.S | 8 +------- kernel/arch/arm/cortex-m33/gcc/los_exc.S | 8 +------- kernel/arch/arm/cortex-m33/iar/TZ/non_secure/los_exc.S | 2 +- kernel/arch/arm/cortex-m4/gcc/los_exc.S | 2 +- kernel/arch/arm/cortex-m4/iar/los_exc.S | 2 +- kernel/arch/arm/cortex-m7/gcc/los_exc.S | 5 +---- kernel/arch/arm/cortex-m7/iar/los_exc.S | 2 +- 9 files changed, 9 insertions(+), 30 deletions(-) diff --git a/kernel/arch/arm/cortex-m3/keil/los_exc.S b/kernel/arch/arm/cortex-m3/keil/los_exc.S index 96f338db..c37cc67b 100644 --- a/kernel/arch/arm/cortex-m3/keil/los_exc.S +++ b/kernel/arch/arm/cortex-m3/keil/los_exc.S @@ -195,7 +195,7 @@ _hwiActiveCheck RBIT R2, R3 CLZ R2, R2 AND R12, R12, #1 - ADD R2, R2, R12, LSL #5 ; calculate R2 (hwi number) as uwPid + ADD R2, R2, R12, LSL #5 ; calculate R2 (hwi number) as pid _ExcInMSP CMP LR, #0XFFFFFFED diff --git a/kernel/arch/arm/cortex-m33/gcc/NTZ/los_exc.S b/kernel/arch/arm/cortex-m33/gcc/NTZ/los_exc.S index 5660c577..bfe407da 100755 --- a/kernel/arch/arm/cortex-m33/gcc/NTZ/los_exc.S +++ b/kernel/arch/arm/cortex-m33/gcc/NTZ/los_exc.S @@ -268,7 +268,7 @@ _hwiActiveCheck: RBIT R2, R3 CLZ R2, R2 AND R12, R12, #1 - ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as uwPid + ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as pid .fnend .type _ExcInMSP, %function @@ -282,10 +282,7 @@ _ExcInMSP: PUSH {R3} MRS R12, PRIMASK // store message-->exc: disable int? PUSH {R4-R12} // store message-->exc: {R4-R12} -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) VPUSH {D8-D15} -#endif B _handleEntry .fnend @@ -341,10 +338,7 @@ _hwiActiveCheckNext: MRS R12, PRIMASK PUSH {R4-R12} -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) VPUSH {D8-D15} -#endif // copy auto saved task register diff --git a/kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_exc.S b/kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_exc.S index e95b12c5..654a75c6 100755 --- a/kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_exc.S +++ b/kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_exc.S @@ -252,7 +252,7 @@ _hwiActiveCheck: RBIT R2, R3 CLZ R2, R2 AND R12, R12, #1 - ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as uwPid + ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as pid .fnend .type _ExcInMSP, %function @@ -266,10 +266,7 @@ _ExcInMSP: PUSH {R3} MRS R12, PRIMASK // store message-->exc: disable int? PUSH {R4-R12} // store message-->exc: {R4-R12} -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) VPUSH {D8-D15} -#endif B _handleEntry .fnend @@ -325,10 +322,7 @@ _hwiActiveCheckNext: MRS R12, PRIMASK PUSH {R4-R12} -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) VPUSH {D8-D15} -#endif // copy auto saved task register diff --git a/kernel/arch/arm/cortex-m33/gcc/los_exc.S b/kernel/arch/arm/cortex-m33/gcc/los_exc.S index af0753ab..ac963eec 100644 --- a/kernel/arch/arm/cortex-m33/gcc/los_exc.S +++ b/kernel/arch/arm/cortex-m33/gcc/los_exc.S @@ -268,7 +268,7 @@ _hwiActiveCheck: RBIT R2, R3 CLZ R2, R2 AND R12, R12, #1 - ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as uwPid + ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as pid .fnend .type _ExcInMSP, %function @@ -282,10 +282,7 @@ _ExcInMSP: PUSH {R3} MRS R12, PRIMASK // store message-->exc: disable int? PUSH {R4-R12} // store message-->exc: {R4-R12} -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) VPUSH {D8-D15} -#endif B _handleEntry .fnend @@ -341,10 +338,7 @@ _hwiActiveCheckNext: MRS R12, PRIMASK PUSH {R4-R12} -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) VPUSH {D8-D15} -#endif // copy auto saved task register diff --git a/kernel/arch/arm/cortex-m33/iar/TZ/non_secure/los_exc.S b/kernel/arch/arm/cortex-m33/iar/TZ/non_secure/los_exc.S index d954304d..c46912ca 100644 --- a/kernel/arch/arm/cortex-m33/iar/TZ/non_secure/los_exc.S +++ b/kernel/arch/arm/cortex-m33/iar/TZ/non_secure/los_exc.S @@ -184,7 +184,7 @@ _hwiActiveCheck RBIT R2, R3 CLZ R2, R2 AND R12, R12, #1 - ADD R2, R2, R12, LSL #5 ; calculate R2 (hwi number) as uwPid + ADD R2, R2, R12, LSL #5 ; calculate R2 (hwi number) as pid _ExcInMSP CMP LR, #0XFFFFFFED diff --git a/kernel/arch/arm/cortex-m4/gcc/los_exc.S b/kernel/arch/arm/cortex-m4/gcc/los_exc.S index b2106500..d1aefe68 100644 --- a/kernel/arch/arm/cortex-m4/gcc/los_exc.S +++ b/kernel/arch/arm/cortex-m4/gcc/los_exc.S @@ -267,7 +267,7 @@ _hwiActiveCheck: RBIT R2, R3 CLZ R2, R2 AND R12, R12, #1 - ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as uwPid + ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as pid .fnend .type _ExcInMSP, %function diff --git a/kernel/arch/arm/cortex-m4/iar/los_exc.S b/kernel/arch/arm/cortex-m4/iar/los_exc.S index 7c26aba9..8d4d71f4 100644 --- a/kernel/arch/arm/cortex-m4/iar/los_exc.S +++ b/kernel/arch/arm/cortex-m4/iar/los_exc.S @@ -195,7 +195,7 @@ _hwiActiveCheck RBIT R2, R3 CLZ R2, R2 AND R12, R12, #1 - ADD R2, R2, R12, LSL #5 ; calculate R2 (hwi number) as uwPid + ADD R2, R2, R12, LSL #5 ; calculate R2 (hwi number) as pid _ExcInMSP CMP LR, #0xFFFFFFED diff --git a/kernel/arch/arm/cortex-m7/gcc/los_exc.S b/kernel/arch/arm/cortex-m7/gcc/los_exc.S index bef3bc89..ac963eec 100644 --- a/kernel/arch/arm/cortex-m7/gcc/los_exc.S +++ b/kernel/arch/arm/cortex-m7/gcc/los_exc.S @@ -268,7 +268,7 @@ _hwiActiveCheck: RBIT R2, R3 CLZ R2, R2 AND R12, R12, #1 - ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as uwPid + ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as pid .fnend .type _ExcInMSP, %function @@ -282,10 +282,7 @@ _ExcInMSP: PUSH {R3} MRS R12, PRIMASK // store message-->exc: disable int? PUSH {R4-R12} // store message-->exc: {R4-R12} -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) VPUSH {D8-D15} -#endif B _handleEntry .fnend diff --git a/kernel/arch/arm/cortex-m7/iar/los_exc.S b/kernel/arch/arm/cortex-m7/iar/los_exc.S index f1efbf3c..28bd44db 100644 --- a/kernel/arch/arm/cortex-m7/iar/los_exc.S +++ b/kernel/arch/arm/cortex-m7/iar/los_exc.S @@ -195,7 +195,7 @@ _hwiActiveCheck RBIT R2, R3 CLZ R2, R2 AND R12, R12, #1 - ADD R2, R2, R12, LSL #5 ; calculate R2 (hwi number) as uwPid + ADD R2, R2, R12, LSL #5 ; calculate R2 (hwi number) as pid _ExcInMSP CMP LR, #0XFFFFFFED