diff --git a/kernel/arch/arm/cortex-m33/gcc/los_arch_atomic.h b/kernel/arch/arm/cortex-m33/gcc/los_arch_atomic.h deleted file mode 100644 index 74ac4ff7..00000000 --- a/kernel/arch/arm/cortex-m33/gcc/los_arch_atomic.h +++ /dev/null @@ -1,157 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _LOS_ARCH_ATOMIC_H -#define _LOS_ARCH_ATOMIC_H - -#include "los_compiler.h" - -#ifdef __cplusplus -#if __cplusplus -extern "C" { -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -/** - * @ingroup los_arch_atomic - * @brief Atomic exchange for 32-bit variable. - * - * @par Description: - * This API is used to implement the atomic exchange for 32-bit variable and return the previous value of the atomic variable. - * @attention - * - * - * @param v [IN] The variable pointer. - * @param val [IN] The exchange value. - * - * @retval #INT32 The previous value of the atomic variable - * @par Dependency: - * - * @see - */ -STATIC INLINE INT32 HalAtomicXchg32bits(volatile INT32 *v, INT32 val) -{ - INT32 prevVal = 0; - UINT32 status = 0; - - do { - __asm__ __volatile__("ldrex %0, [%3]\n" - "strex %1, %4, [%3]" - : "=&r"(prevVal), "=&r"(status), "+m"(*v) - : "r"(v), "r"(val) - : "cc"); - } while (__builtin_expect(status != 0, 0)); - - return prevVal; -} - -/** - * @ingroup los_arch_atomic - * @brief Atomic auto-decrement. - * - * @par Description: - * This API is used to implement the atomic auto-decrement and return the result of auto-decrement. - * @attention - * - * - * @param v [IN] The addSelf variable pointer. - * - * @retval #INT32 The return value of variable auto-decrement. - * @par Dependency: - * - * @see - */ -STATIC INLINE INT32 HalAtomicDecRet(volatile INT32 *v) -{ - INT32 val = 0; - UINT32 status = 0; - - do { - __asm__ __volatile__("ldrex %0, [%3]\n" - "sub %0, %0, #1\n" - "strex %1, %0, [%3]" - : "=&r"(val), "=&r"(status), "+m"(*v) - : "r"(v) - : "cc"); - } while (__builtin_expect(status != 0, 0)); - - return val; -} - -/** - * @ingroup los_arch_atomic - * @brief Atomic exchange for 32-bit variable with compare. - * - * @par Description: - * This API is used to implement the atomic exchange for 32-bit variable, if the value of variable is equal to oldVal. - * @attention - * - * - * @param v [IN] The variable pointer. - * @param val [IN] The new value. - * @param oldVal [IN] The old value. - * - * @retval TRUE The previous value of the atomic variable is not equal to oldVal. - * @retval FALSE The previous value of the atomic variable is equal to oldVal. - * @par Dependency: - * - * @see - */ -STATIC INLINE BOOL HalAtomicCmpXchg32bits(volatile INT32 *v, INT32 val, INT32 oldVal) -{ - INT32 prevVal = 0; - UINT32 status = 0; - - do { - __asm__ __volatile__("1: ldrex %0, %2\n" - " mov %1, #0\n" - " cmp %0, %3\n" - " bne 2f\n" - " strex %1, %4, %2\n" - "2:" - : "=&r"(prevVal), "=&r"(status), "+Q"(*v) - : "r"(oldVal), "r"(val) - : "cc"); - } while (__builtin_expect(status != 0, 0)); - - return prevVal != oldVal; -} - -#ifdef __cplusplus -#if __cplusplus -} -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -#endif /* _LOS_ARCH_ATOMIC_H */ diff --git a/kernel/arch/arm/cortex-m33/gcc/los_arch_context.h b/kernel/arch/arm/cortex-m33/gcc/los_arch_context.h deleted file mode 100644 index fa8bc209..00000000 --- a/kernel/arch/arm/cortex-m33/gcc/los_arch_context.h +++ /dev/null @@ -1,130 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _LOS_ARCH_CONTEXT_H -#define _LOS_ARCH_CONTEXT_H - -#include "los_config.h" -#include "los_compiler.h" - -#ifdef __cplusplus -#if __cplusplus -extern "C" { -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -typedef struct TagTskContext { -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) - UINT32 S16; - UINT32 S17; - UINT32 S18; - UINT32 S19; - UINT32 S20; - UINT32 S21; - UINT32 S22; - UINT32 S23; - UINT32 S24; - UINT32 S25; - UINT32 S26; - UINT32 S27; - UINT32 S28; - UINT32 S29; - UINT32 S30; - UINT32 S31; -#endif - UINT32 uwR4; - UINT32 uwR5; - UINT32 uwR6; - UINT32 uwR7; - UINT32 uwR8; - UINT32 uwR9; - UINT32 uwR10; - UINT32 uwR11; - UINT32 uwPriMask; - UINT32 uwR0; - UINT32 uwR1; - UINT32 uwR2; - UINT32 uwR3; - UINT32 uwR12; - UINT32 uwLR; - UINT32 uwPC; - UINT32 uwxPSR; -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) - UINT32 S0; - UINT32 S1; - UINT32 S2; - UINT32 S3; - UINT32 S4; - UINT32 S5; - UINT32 S6; - UINT32 S7; - UINT32 S8; - UINT32 S9; - UINT32 S10; - UINT32 S11; - UINT32 S12; - UINT32 S13; - UINT32 S14; - UINT32 S15; - UINT32 FPSCR; - UINT32 NO_NAME; -#endif -} TaskContext; - -/** - * @ingroup los_config - * @brief: Task start running function. - * - * @par Description: - * This API is used to start a task. - * - * @attention: - * - * - * @param: None. - * - * @retval None. - * - * @par Dependency: - * - * @see None. - */ -extern VOID HalStartToRun(VOID); - -#ifdef __cplusplus -#if __cplusplus -} -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -#endif /* _LOS_ARCH_CONTEXT_H */ diff --git a/kernel/arch/arm/cortex-m33/gcc/los_arch_interrupt.h b/kernel/arch/arm/cortex-m33/gcc/los_arch_interrupt.h deleted file mode 100644 index 2e865b50..00000000 --- a/kernel/arch/arm/cortex-m33/gcc/los_arch_interrupt.h +++ /dev/null @@ -1,697 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _LOS_ARCH_INTERRUPT_H -#define _LOS_ARCH_INTERRUPT_H - -#include "los_config.h" -#include "los_compiler.h" -#include "los_interrupt.h" - -#ifdef __cplusplus -#if __cplusplus -extern "C" { -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -/* * - * @ingroup los_arch_interrupt - * Maximum number of used hardware interrupts. - */ -#ifndef OS_HWI_MAX_NUM -#define OS_HWI_MAX_NUM LOSCFG_PLATFORM_HWI_LIMIT -#endif - -/* * - * @ingroup los_arch_interrupt - * Highest priority of a hardware interrupt. - */ -#ifndef OS_HWI_PRIO_HIGHEST -#define OS_HWI_PRIO_HIGHEST 0 -#endif - -/* * - * @ingroup los_arch_interrupt - * Lowest priority of a hardware interrupt. - */ -#ifndef OS_HWI_PRIO_LOWEST -#define OS_HWI_PRIO_LOWEST 7 -#endif - - -/* * - * @ingroup los_arch_interrupt - * Define the type of a hardware interrupt vector table function. - */ -typedef VOID (**HWI_VECTOR_FUNC)(void); - -/* * - * @ingroup los_arch_interrupt - * Count of interrupts. - */ -extern UINT32 g_intCount; - -/* * - * @ingroup los_arch_interrupt - * Count of M-Core system interrupt vector. - */ -#define OS_SYS_VECTOR_CNT 16 - -/* * - * @ingroup los_arch_interrupt - * Count of M-Core interrupt vector. - */ -#define OS_VECTOR_CNT (OS_SYS_VECTOR_CNT + OS_HWI_MAX_NUM) - -/* * - * @ingroup los_arch_interrupt - * AIRCR register priority group parameter . - */ -#define OS_NVIC_AIRCR_PRIGROUP 7 - -/* * - * @ingroup los_arch_interrupt - * Boot interrupt vector table. - */ -extern UINT32 _BootVectors[]; - -/* * - * @ingroup los_arch_interrupt - * Hardware interrupt error code: Invalid interrupt number. - * - * Value: 0x02000900 - * - * Solution: Ensure that the interrupt number is valid. The value range of the interrupt number applicable for a Cortex-A7 platform is [OS_USER_HWI_MIN,OS_USER_HWI_MAX]. - */ -#define OS_ERRNO_HWI_NUM_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x00) - -/* * - * @ingroup los_arch_interrupt - * Hardware interrupt error code: Null hardware interrupt handling function. - * - * Value: 0x02000901 - * - * Solution: Pass in a valid non-null hardware interrupt handling function. - */ -#define OS_ERRNO_HWI_PROC_FUNC_NULL LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x01) - -/* * - * @ingroup los_arch_interrupt - * Hardware interrupt error code: Insufficient interrupt resources for hardware interrupt creation. - * - * Value: 0x02000902 - * - * Solution: Increase the configured maximum number of supported hardware interrupts. - */ -#define OS_ERRNO_HWI_CB_UNAVAILABLE LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x02) - -/* * - * @ingroup los_arch_interrupt - * Hardware interrupt error code: Insufficient memory for hardware interrupt initialization. - * - * Value: 0x02000903 - * - * Solution: Expand the configured memory. - */ -#define OS_ERRNO_HWI_NO_MEMORY LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x03) - -/* * - * @ingroup los_arch_interrupt - * Hardware interrupt error code: The interrupt has already been created. - * - * Value: 0x02000904 - * - * Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created. - */ -#define OS_ERRNO_HWI_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x04) - -/* * - * @ingroup los_arch_interrupt - * Hardware interrupt error code: Invalid interrupt priority. - * - * Value: 0x02000905 - * - * Solution: Ensure that the interrupt priority is valid. The value range of the interrupt priority applicable for a Cortex-A7 platform is [0,15]. - */ -#define OS_ERRNO_HWI_PRIO_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x05) - -/* * - * @ingroup los_arch_interrupt - * Hardware interrupt error code: Incorrect interrupt creation mode. - * - * Value: 0x02000906 - * - * Solution: The interrupt creation mode can be only set to OS_HWI_MODE_COMM or OS_HWI_MODE_FAST of which the value can be 0 or 1. - */ -#define OS_ERRNO_HWI_MODE_INVALID LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x06) - -/* * - * @ingroup los_arch_interrupt - * Hardware interrupt error code: The interrupt has already been created as a fast interrupt. - * - * Value: 0x02000907 - * - * Solution: Check whether the interrupt specified by the passed-in interrupt number has already been created. - */ -#define OS_ERRNO_HWI_FASTMODE_ALREADY_CREATED LOS_ERRNO_OS_ERROR(LOS_MOD_HWI, 0x07) - -/* * - * @ingroup los_arch_interrupt - * SysTick control and status register. - */ -#define OS_SYSTICK_CONTROL_REG 0xE000E010 - -/* * - * @ingroup los_hw - * SysTick current value register. - */ -#define OS_SYSTICK_CURRENT_REG 0xE000E018 - -/* * - * @ingroup los_arch_interrupt - * Interrupt Priority-Level Registers. - */ -#define OS_NVIC_PRI_BASE 0xE000E400 - -/* * - * @ingroup los_arch_interrupt - * Interrupt enable register for 0-31. - */ -#define OS_NVIC_SETENA_BASE 0xE000E100 - -/* * - * @ingroup los_arch_interrupt - * interrupt pending register. - */ -#define OS_NVIC_SETPEND_BASE 0xE000E200 - -/* * - * @ingroup los_arch_interrupt - * Interrupt active register. - */ -#define OS_NVIC_INT_ACT_BASE 0xE000E300 - -/* * - * @ingroup los_arch_interrupt - * Interrupt disable register for 0-31. - */ -#define OS_NVIC_CLRENA_BASE 0xE000E180 - -/* * - * @ingroup los_arch_interrupt - * Interrupt control and status register. - */ -#define OS_NVIC_INT_CTRL 0xE000ED04 - -/* * - * @ingroup los_arch_interrupt - * Vector table offset register. - */ -#define OS_NVIC_VTOR 0xE000ED08 - -/* * - * @ingroup los_arch_interrupt - * Application interrupt and reset control register - */ -#define OS_NVIC_AIRCR 0xE000ED0C - -/* * - * @ingroup los_arch_interrupt - * System exception priority register. - */ -#define OS_NVIC_EXCPRI_BASE 0xE000ED18 - -/* * - * @ingroup los_arch_interrupt - * Interrupt No. 1 :reset. - */ -#define OS_EXC_RESET 1 - -/* * - * @ingroup los_arch_interrupt - * Interrupt No. 2 :Non-Maskable Interrupt. - */ -#define OS_EXC_NMI 2 - -/* * - * @ingroup los_arch_interrupt - * Interrupt No. 3 :(hard)fault. - */ -#define OS_EXC_HARD_FAULT 3 - -/* * - * @ingroup los_arch_interrupt - * Interrupt No. 4 :MemManage fault. - */ -#define OS_EXC_MPU_FAULT 4 - -/* * - * @ingroup los_arch_interrupt - * Interrupt No. 5 :Bus fault. - */ -#define OS_EXC_BUS_FAULT 5 - -/* * - * @ingroup los_arch_interrupt - * Interrupt No. 6 :Usage fault. - */ -#define OS_EXC_USAGE_FAULT 6 - -/* * - * @ingroup los_arch_interrupt - * Interrupt No. 11 :SVCall. - */ -#define OS_EXC_SVC_CALL 11 - -/* * - * @ingroup los_arch_interrupt - * Interrupt No. 12 :Debug monitor. - */ -#define OS_EXC_DBG_MONITOR 12 - -/* * - * @ingroup los_arch_interrupt - * Interrupt No. 14 :PendSV. - */ -#define OS_EXC_PEND_SV 14 - -/* * - * @ingroup los_arch_interrupt - * Interrupt No. 15 :SysTick. - */ -#define OS_EXC_SYS_TICK 15 - -#if (OS_HWI_WITH_ARG == 1) -/* * - * @ingroup los_arch_interrupt - * Set interrupt vector table. - */ -extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg); -#else -/* * - * @ingroup los_arch_interrupt - * Set interrupt vector table. - */ -extern VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector); -#endif - -/* * - * @ingroup los_arch_interrupt - * @brief: Hardware interrupt entry function. - * - * @par Description: - * This API is used as all hardware interrupt handling function entry. - * - * @attention: - * - * - * @param:None. - * - * @retval:None. - * @par Dependency: - * - * @see None. - */ -extern VOID HalInterrupt(VOID); - -/* * - * @ingroup los_arch_interrupt - * @brief: Get an interrupt number. - * - * @par Description: - * This API is used to get the current interrupt number. - * - * @attention: - * - * - * @param: None. - * - * @retval: Interrupt Indexes number. - * @par Dependency: - * - * @see None. - */ -extern UINT32 HalIntNumGet(VOID); - -/* * - * @ingroup los_arch_interrupt - * @brief: Default vector handling function. - * - * @par Description: - * This API is used to configure interrupt for null function. - * - * @attention: - * - * - * @param:None. - * - * @retval:None. - * @par Dependency: - * - * @see None. - */ -extern VOID HalHwiDefaultHandler(VOID); - -/* * - * @ingroup los_arch_interrupt - * @brief: Reset the vector table. - * - * @par Description: - * This API is used to reset the vector table. - * - * @attention: - * - * - * @param:None. - * - * @retval:None. - * @par Dependency: - * - * @see None. - */ -extern VOID Reset_Handler(VOID); - -/* * - * @ingroup los_arch_interrupt - * @brief: Pended System Call. - * - * @par Description: - * PendSV can be pended and is useful for an OS to pend an exception - * so that an action can be performed after other important tasks are completed. - * - * @attention: - * - * - * @param:None. - * - * @retval:None. - * @par Dependency: - * - * @see None. - */ -extern VOID HalPendSV(VOID); - - -#define OS_EXC_IN_INIT 0 -#define OS_EXC_IN_TASK 1 -#define OS_EXC_IN_HWI 2 - -#define OS_EXC_MAX_BUF_LEN 25 -#define OS_EXC_MAX_NEST_DEPTH 1 - -#define OS_NVIC_SHCSR 0xE000ED24 -#define OS_NVIC_CCR 0xE000ED14 - -#define OS_NVIC_INT_ENABLE_SIZE 0x20 -#define OS_NVIC_INT_PRI_SIZE 0xF0 -#define OS_NVIC_EXCPRI_SIZE 0xC -#define OS_NVIC_INT_CTRL_SIZE 4 -#define OS_NVIC_SHCSR_SIZE 4 - -#define OS_NVIC_INT_PEND_SIZE OS_NVIC_INT_ACT_SIZE -#define OS_NVIC_INT_ACT_SIZE OS_NVIC_INT_ENABLE_SIZE - -#define OS_EXC_FLAG_NO_FLOAT 0x10000000 -#define OS_EXC_FLAG_FAULTADDR_VALID 0x01 -#define OS_EXC_FLAG_IN_HWI 0x02 - -#define OS_EXC_IMPRECISE_ACCESS_ADDR 0xABABABAB - -#define OS_EXC_EVENT 0x00000001 - -/** - * @ingroup los_exc - * the struct of register files - * - * description: the register files that saved when exception triggered - * - * notes:the following register with prefix 'uw' correspond to the registers in the cpu data sheet. - */ -typedef struct TagExcContext { -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) - UINT32 S16; - UINT32 S17; - UINT32 S18; - UINT32 S19; - UINT32 S20; - UINT32 S21; - UINT32 S22; - UINT32 S23; - UINT32 S24; - UINT32 S25; - UINT32 S26; - UINT32 S27; - UINT32 S28; - UINT32 S29; - UINT32 S30; - UINT32 S31; -#endif - UINT32 uwR4; - UINT32 uwR5; - UINT32 uwR6; - UINT32 uwR7; - UINT32 uwR8; - UINT32 uwR9; - UINT32 uwR10; - UINT32 uwR11; - UINT32 uwPriMask; - /* auto save */ - UINT32 uwSP; - UINT32 uwR0; - UINT32 uwR1; - UINT32 uwR2; - UINT32 uwR3; - UINT32 uwR12; - UINT32 uwLR; - UINT32 uwPC; - UINT32 uwxPSR; -#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined (__FPU_USED) && (__FPU_USED== 1U))) - UINT32 S0; - UINT32 S1; - UINT32 S2; - UINT32 S3; - UINT32 S4; - UINT32 S5; - UINT32 S6; - UINT32 S7; - UINT32 S8; - UINT32 S9; - UINT32 S10; - UINT32 S11; - UINT32 S12; - UINT32 S13; - UINT32 S14; - UINT32 S15; - UINT32 FPSCR; - UINT32 NO_NAME; -#endif -} EXC_CONTEXT_S; - -typedef VOID (*EXC_PROC_FUNC)(UINT32, EXC_CONTEXT_S *); -VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr); - -VOID HalExcNMI(VOID); -VOID HalExcHardFault(VOID); -VOID HalExcMemFault(VOID); -VOID HalExcBusFault(VOID); -VOID HalExcUsageFault(VOID); -VOID HalExcSvcCall(VOID); -VOID HalHwiInit(VOID); - - -/** - * @ingroup los_exc - * Cortex-M exception types: An error occurred while the bus status register was being pushed. - */ -#define OS_EXC_BF_STKERR 1 - -/** - * @ingroup los_exc - * Cortex-M exception types: An error occurred while the bus status register was out of the stack. - */ -#define OS_EXC_BF_UNSTKERR 2 - -/** - * @ingroup los_exc - * Cortex-M exception types: Bus status register imprecise data access violation. - */ -#define OS_EXC_BF_IMPRECISERR 3 - -/** - * @ingroup los_exc - * Cortex-M exception types: Bus status register exact data access violation. - */ -#define OS_EXC_BF_PRECISERR 4 - -/** - * @ingroup los_exc - * Cortex-M exception types: Bus status register access violation while pointing. - */ -#define OS_EXC_BF_IBUSERR 5 - -/** - * @ingroup los_exc - * Cortex-M exception types: An error occurred while the memory management status register was being pushed. - */ -#define OS_EXC_MF_MSTKERR 6 - -/** - * @ingroup los_exc - * Cortex-M exception types: An error occurred while the memory management status register was out of the stack. - */ -#define OS_EXC_MF_MUNSTKERR 7 - -/** - * @ingroup los_exc - * Cortex-M exception types: Memory management status register data access violation. - */ -#define OS_EXC_MF_DACCVIOL 8 - -/** - * @ingroup los_exc - * Cortex-M exception types: Memory management status register access violation. - */ -#define OS_EXC_MF_IACCVIOL 9 - - -/** - * @ingroup los_exc - * Cortex-M exception types: Incorrect usage indicating that the divisor is zero during the division operation. - */ -#define OS_EXC_UF_DIVBYZERO 10 - -/** - * @ingroup los_exc - * Cortex-M exception types: Usage error, error caused by unaligned access. - */ -#define OS_EXC_UF_UNALIGNED 11 - -/** - * @ingroup los_exc - * Cortex-M exception types: Incorrect usage attempting to execute coprocessor related instruction. - */ -#define OS_EXC_UF_NOCP 12 - -/** - * @ingroup los_exc - * Cortex-M exception types: Usage error attempting to load EXC_RETURN to PC illegally on exception return. - */ -#define OS_EXC_UF_INVPC 13 - -/** - * @ingroup los_exc - * Cortex-M exception types: Incorrect usage, attempting to cut to ARM state. - */ -#define OS_EXC_UF_INVSTATE 14 - -/** - * @ingroup los_exc - * Cortex-M exception types: Incorrect usage. Executed instruction whose code is undefined. - */ -#define OS_EXC_UF_UNDEFINSTR 15 - -/** - * @ingroup los_exc - * Cortex-M exception types: NMI - */ - -#define OS_EXC_CAUSE_NMI 16 - -/** - * @ingroup los_exc - * Cortex-M exception types: hard fault - */ -#define OS_EXC_CAUSE_HARDFAULT 17 - -/** - * @ingroup los_exc - * Cortex-M exception types: The task handler exits. - */ -#define OS_EXC_CAUSE_TASK_EXIT 18 - -/** - * @ingroup los_exc - * Cortex-M exception types: A fatal error. - */ -#define OS_EXC_CAUSE_FATAL_ERR 19 - -/** - * @ingroup los_exc - * Cortex-M exception types: Hard Fault caused by a debug event. - */ -#define OS_EXC_CAUSE_DEBUGEVT 20 - -/** - * @ingroup los_exc - * Cortex-M exception types: A hard fault that occurs when a quantity is oriented. - */ -#define OS_EXC_CAUSE_VECTBL 21 - -/** - * @ingroup los_exc - * Exception information structure - * - * Description: Exception information saved when an exception is triggered on the Cortex-M33 platform. - * - */ -typedef struct TagExcInfo { - /**< Exception occurrence phase: 0 means that an exception occurs in initialization, 1 means that an exception occurs in a task, and 2 means that an exception occurs in an interrupt */ - UINT16 phase; - /**< Exception type. When exceptions occur, check the numbers 1 - 21 listed above */ - UINT16 type; - /**< If the exact address access error indicates the wrong access address when the exception occurred */ - UINT32 faultAddr; - /**< An exception occurs in an interrupt, indicating the interrupt number. An exception occurs in the task, indicating the task ID, or 0xFFFFFFFF if it occurs during initialization */ - UINT32 thrdPid; - /**< Number of nested exceptions. Currently only registered hook functions are supported when an exception is entered for the first time */ - UINT16 nestCnt; - /**< reserve */ - UINT16 reserved; - /**< Hardware context at the time an exception to the automatic stack floating-point register occurs */ - EXC_CONTEXT_S *context; -} ExcInfo; - -extern UINT32 g_curNestCount; -extern UINT32 g_intCount; -extern UINT8 g_uwExcTbl[32]; -extern ExcInfo g_excInfo; - -#define MAX_INT_INFO_SIZE (8 + 0x164) - -#ifdef __cplusplus -#if __cplusplus -} -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -#endif /* _LOS_ARCH_INTERRUPT_H */ diff --git a/kernel/arch/arm/cortex-m33/gcc/los_arch_timer.h b/kernel/arch/arm/cortex-m33/gcc/los_arch_timer.h deleted file mode 100644 index 97ec28d1..00000000 --- a/kernel/arch/arm/cortex-m33/gcc/los_arch_timer.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef _LOS_ARCH_TIMER_H -#define _LOS_ARCH_TIMER_H - -#include "los_config.h" -#include "los_compiler.h" -#include "los_context.h" - -#ifdef __cplusplus -#if __cplusplus -extern "C" { -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -UINT32 HalTickStart(OS_TICK_HANDLER handler); - -#ifdef __cplusplus -#if __cplusplus -} -#endif /* __cplusplus */ -#endif /* __cplusplus */ - -#endif /* _LOS_ARCH_TIMER_H */ diff --git a/kernel/arch/arm/cortex-m33/gcc/los_context.c b/kernel/arch/arm/cortex-m33/gcc/los_context.c deleted file mode 100644 index a00fc73d..00000000 --- a/kernel/arch/arm/cortex-m33/gcc/los_context.c +++ /dev/null @@ -1,163 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "los_context.h" -#include "securec.h" -#include "los_arch_context.h" -#include "los_arch_interrupt.h" -#include "los_task.h" -#include "los_sched.h" -#include "los_interrupt.h" -#include "los_arch_timer.h" -#include "los_debug.h" - -/* **************************************************************************** - Function : HalArchInit - Description : arch init function - Input : None - Output : None - Return : None - **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalArchInit(VOID) -{ - UINT32 ret; - - HalHwiInit(); - - ret = HalTickStart(OsTickHandler); - if (ret != LOS_OK) { - PRINT_ERR("Tick start failed!\n"); - } -} - -/* **************************************************************************** - Function : HalSysExit - Description : Task exit function - Input : None - Output : None - Return : None - **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR VOID HalSysExit(VOID) -{ - LOS_IntLock(); - while (1) { - } -} - -/* **************************************************************************** - Function : HalTskStackInit - Description : Task stack initialization function - Input : taskID --- TaskID - stackSize --- Total size of the stack - topStack --- Top of task's stack - Output : None - Return : Context pointer - **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID *HalTskStackInit(UINT32 taskID, UINT32 stackSize, VOID *topStack) -{ - TaskContext *context = NULL; - errno_t result; - - /* initialize the task stack, write magic num to stack top */ - result = memset_s(topStack, stackSize, (INT32)(OS_TASK_STACK_INIT & 0xFF), stackSize); - if (result != EOK) { - printf("memset_s is failed:%s[%d]\r\n", __FUNCTION__, __LINE__); - } - *((UINT32 *)(topStack)) = OS_TASK_MAGIC_WORD; - - context = (TaskContext *)(((UINTPTR)topStack + stackSize) - sizeof(TaskContext)); - -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) - context->S16 = 0xAA000010; - context->S17 = 0xAA000011; - context->S18 = 0xAA000012; - context->S19 = 0xAA000013; - context->S20 = 0xAA000014; - context->S21 = 0xAA000015; - context->S22 = 0xAA000016; - context->S23 = 0xAA000017; - context->S24 = 0xAA000018; - context->S25 = 0xAA000019; - context->S26 = 0xAA00001A; - context->S27 = 0xAA00001B; - context->S28 = 0xAA00001C; - context->S29 = 0xAA00001D; - context->S30 = 0xAA00001E; - context->S31 = 0xAA00001F; - context->S0 = 0xAA000000; - context->S1 = 0xAA000001; - context->S2 = 0xAA000002; - context->S3 = 0xAA000003; - context->S4 = 0xAA000004; - context->S5 = 0xAA000005; - context->S6 = 0xAA000006; - context->S7 = 0xAA000007; - context->S8 = 0xAA000008; - context->S9 = 0xAA000009; - context->S10 = 0xAA00000A; - context->S11 = 0xAA00000B; - context->S12 = 0xAA00000C; - context->S13 = 0xAA00000D; - context->S14 = 0xAA00000E; - context->S15 = 0xAA00000F; - context->FPSCR = 0x00000000; - context->NO_NAME = 0xAA000011; -#endif - - context->uwR4 = 0x04040404L; - context->uwR5 = 0x05050505L; - context->uwR6 = 0x06060606L; - context->uwR7 = 0x07070707L; - context->uwR8 = 0x08080808L; - context->uwR9 = 0x09090909L; - context->uwR10 = 0x10101010L; - context->uwR11 = 0x11111111L; - context->uwPriMask = 0; - context->uwR0 = taskID; - context->uwR1 = 0x01010101L; - context->uwR2 = 0x02020202L; - context->uwR3 = 0x03030303L; - context->uwR12 = 0x12121212L; - context->uwLR = (UINT32)(UINTPTR)HalSysExit; - context->uwPC = (UINT32)(UINTPTR)OsTaskEntry; - context->uwxPSR = 0x01000000L; - - return (VOID *)context; -} - -LITE_OS_SEC_TEXT_INIT UINT32 HalStartSchedule(VOID) -{ - (VOID)LOS_IntLock(); - OsSchedStart(); - HalStartToRun(); - return LOS_OK; /* never return */ -} diff --git a/kernel/arch/arm/cortex-m33/gcc/los_dispatch.S b/kernel/arch/arm/cortex-m33/gcc/los_dispatch.S deleted file mode 100644 index 6446eb93..00000000 --- a/kernel/arch/arm/cortex-m33/gcc/los_dispatch.S +++ /dev/null @@ -1,187 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - .syntax unified - .arch armv7e-m - .thumb - .fpu fpv5-d16 -//;.arch_extension sec - - - -.equ OS_NVIC_INT_CTRL, 0xE000ED04 -.equ OS_NVIC_SYSPRI2, 0xE000ED20 -.equ OS_NVIC_PENDSV_PRI, 0xF0F00000 -.equ OS_NVIC_PENDSVSET, 0x10000000 -.equ OS_TASK_STATUS_RUNNING, 0x0010 - - .section .text - .thumb - - .type HalStartToRun, %function - .global HalStartToRun -HalStartToRun: - .fnstart - .cantunwind - - ldr r4, =OS_NVIC_SYSPRI2 - ldr r5, =OS_NVIC_PENDSV_PRI - str r5, [r4] - - mov r0, #2 - msr CONTROL, r0 - - ldr r1, =g_losTask - ldr r0, [r1, #4] - ldr r12, [r0] -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) - add r12, r12, #100 - - ldmfd r12!, {r0-r7} - add r12, r12, #72 - msr psp, r12 - vpush {S0} - vpop {S0} -#else - add r12, r12, #36 - - ldmfd r12!, {r0-r7} - msr psp, r12 -#endif - mov lr, r5 - //MSR xPSR, R7 - - cpsie I - bx r6 - - .fnend - - - .type HalIntLock, %function - .global HalIntLock -HalIntLock: - .fnstart - .cantunwind - - MRS R0, PRIMASK - CPSID I - BX LR - .fnend - - .type HalIntUnLock, %function - .global HalIntUnLock -HalIntUnLock: - .fnstart - .cantunwind - - MRS R0, PRIMASK - CPSIE I - BX LR - .fnend - - .type HalIntRestore, %function - .global HalIntRestore -HalIntRestore: - .fnstart - .cantunwind - - MSR PRIMASK, R0 - BX LR - .fnend - - .type HalTaskSchedule, %function - .global HalTaskSchedule -HalTaskSchedule: - .fnstart - .cantunwind - - ldr r0, =OS_NVIC_INT_CTRL - ldr r1, =OS_NVIC_PENDSVSET - str r1, [r0] - dsb - isb - bx lr - .fnend - - - - - .type HalPendSV, %function - .global HalPendSV -HalPendSV: - .fnstart - .cantunwind - - mrs r12, PRIMASK - cpsid I - -HalTaskSwitch: - push {r12, lr} - blx OsSchedTaskSwitch - pop {r12, lr} - cmp r0, #0 - mov r0, lr - bne TaskContextSwitch - msr PRIMASK, r12 - bx lr - -TaskContextSwitch: - mov lr, r0 - mrs r0, psp - - stmfd r0!, {r4-r12} - -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) - vstmdb r0!, {d8-d15} -#endif - ldr r5, =g_losTask - ldr r6, [r5] - str r0, [r6] - - ldr r0, [r5, #4] - str r0, [r5] - - ldr r1, [r0] - -#if ((defined(__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ - (defined(__FPU_USED) && (__FPU_USED == 1U))) - vldmia r1!, {d8-d15} -#endif - ldmfd r1!, {r4-r12} - msr psp, r1 - - msr PRIMASK, r12 - - - bx lr - .fnend diff --git a/kernel/arch/arm/cortex-m33/gcc/los_exc.S b/kernel/arch/arm/cortex-m33/gcc/los_exc.S deleted file mode 100644 index 74cfaa98..00000000 --- a/kernel/arch/arm/cortex-m33/gcc/los_exc.S +++ /dev/null @@ -1,384 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - - .syntax unified - .arch armv7e-m - .thumb -.fpu fpv5-d16 -.section .text - - - .global HalExcNMI - .global HalExcHardFault - .global HalExcMemFault - .global HalExcBusFault - .global HalExcUsageFault - .global HalExcSvcCall - - .extern HalExcHandleEntry - .extern g_uwExcTbl - .extern g_taskScheduled - -.equ OS_FLG_BGD_ACTIVE, 0x0002 - -.equ OS_EXC_CAUSE_NMI, 16 -.equ OS_EXC_CAUSE_HARDFAULT, 17 - -.equ HF_DEBUGEVT, 20 -.equ HF_VECTBL, 21 - -.equ FLAG_ADDR_VALID, 0x10000 -.equ FLAG_HWI_ACTIVE, 0x20000 -.equ FLAG_NO_FLOAT, 0x10000000 - -.equ OS_NVIC_FSR , 0xE000ED28 //include BusFault/MemFault/UsageFault State Register -.equ OS_NVIC_HFSR , 0xE000ED2C //HardFault State Register -.equ OS_NVIC_BFAR , 0xE000ED38 -.equ OS_NVIC_MMAR , 0xE000ED34 -.equ OS_NVIC_ACT_BASE , 0xE000E300 -.equ OS_NVIC_SHCSRS , 0xE000ED24 -.equ OS_NVIC_SHCSR_MASK , 0xC00 - - .type HalExcNMI, %function - .global HalExcNMI -HalExcNMI: - .fnstart - .cantunwind - MOV R0, #OS_EXC_CAUSE_NMI - MOV R1, #0 - B osExcDispatch - .fnend - - .type HalExcHardFault, %function - .global HalExcHardFault -HalExcHardFault: - .fnstart - .cantunwind - MOV R0, #OS_EXC_CAUSE_HARDFAULT - LDR R2, =OS_NVIC_HFSR - LDR R2, [R2] - - MOV R1, #HF_DEBUGEVT - ORR R0, R0, R1, LSL #0x8 - TST R2, #0x80000000 - BNE osExcDispatch // DEBUGEVT - - AND R0, R0 , #0x000000FF - MOV R1, #HF_VECTBL - ORR R0, R0, R1, LSL #0x8 - TST R2, #0x00000002 - BNE osExcDispatch // VECTBL - - //if not DEBUGEVT and VECTBL then is FORCED - AND R0, R0, #0x000000FF - - LDR R2, =OS_NVIC_FSR - LDR R2, [R2] - - TST R2, #0x8000 // BFARVALID - BNE _HFBusFault // BusFault - - TST R2, #0x80 // MMARVALID - BNE _HFMemFault // MemFault - - MOV R12,#0 - B osHFExcCommonBMU - .fnend - - .type _HFBusFault, %function - -_HFBusFault: - .fnstart - .cantunwind - LDR R1, =OS_NVIC_BFAR - LDR R1, [R1] - MOV R12, #FLAG_ADDR_VALID - B osHFExcCommonBMU - .fnend - - .type _HFMemFault, %function - -_HFMemFault: - .fnstart - .cantunwind - LDR R1, =OS_NVIC_MMAR - LDR R1, [R1] - MOV R12, #FLAG_ADDR_VALID - .fnend - - .type osHFExcCommonBMU, %function - .global osHFExcCommonBMU -osHFExcCommonBMU: - .fnstart - .cantunwind - CLZ R2, R2 - LDR R3, =g_uwExcTbl - ADD R3, R3, R2 - LDRB R2, [R3] - ORR R0, R0, R2, LSL #0x8 - ORR R0, R0 ,R12 - B osExcDispatch - .fnend - - .type HalExcSvcCall, %function - .global HalExcSvcCall -HalExcSvcCall: - .fnstart - .cantunwind - TST LR, #0x4 - ITE EQ - MRSEQ R0, MSP - MRSNE R0, PSP - LDR R1, [R0,#24] - LDRB R0, [R1,#-2] - MOV R1, #0 - B osExcDispatch - .fnend - - .type HalExcBusFault, %function - .global HalExcBusFault -HalExcBusFault: - .fnstart - .cantunwind - LDR R0, =OS_NVIC_FSR - LDR R0, [R0] - - TST R0, #0x8000 // BFARVALID - BEQ _ExcBusNoADDR - LDR R1, =OS_NVIC_BFAR - LDR R1, [R1] - MOV R12, #FLAG_ADDR_VALID - AND R0, R0, #0x1F00 - - B osExcCommonBMU - .fnend - - .type _ExcBusNoADDR, %function - .global _ExcBusNoADDR -_ExcBusNoADDR: - .fnstart - .cantunwind - MOV R12,#0 - B osExcCommonBMU - .fnend - - .type HalExcMemFault, %function - .global HalExcMemFault -HalExcMemFault: - .fnstart - .cantunwind - LDR R0, =OS_NVIC_FSR - LDR R0, [R0] - - TST R0, #0x80 // MMARVALID - BEQ _ExcMemNoADDR - LDR R1, =OS_NVIC_MMAR - LDR R1, [R1] - MOV R12, #FLAG_ADDR_VALID - AND R0, R0, #0x1B - - B osExcCommonBMU - .fnend - - .type _ExcMemNoADDR, %function - .global _ExcMemNoADDR -_ExcMemNoADDR: - .fnstart - .cantunwind - MOV R12,#0 - B osExcCommonBMU - .fnend - - .type HalExcUsageFault, %function - .global HalExcUsageFault -HalExcUsageFault: - .fnstart - .cantunwind - LDR R0, =OS_NVIC_FSR - LDR R0, [R0] - - MOVW R1, #0x030F - LSL R1, R1, #16 - AND R0, R0, R1 - MOV R12, #0 - - .fnend - - .type osExcCommonBMU, %function - .global osExcCommonBMU -osExcCommonBMU: - .fnstart - .cantunwind - CLZ R0, R0 - LDR R3, =g_uwExcTbl - ADD R3, R3, R0 - LDRB R0, [R3] - ORR R0, R0, R12 - .fnend -// R0 -- EXCCAUSE(bit 16 is 1 if EXCADDR valid), R1 -- EXCADDR - - .type osExcDispatch, %function - .global osExcDispatch -osExcDispatch: - .fnstart - .cantunwind - LDR R2, =OS_NVIC_ACT_BASE - MOV R12, #8 // R12 is hwi check loop counter - .fnend - - .type _hwiActiveCheck, %function - .global _hwiActiveCheck -_hwiActiveCheck: - .fnstart - .cantunwind - LDR R3, [R2] // R3 store active hwi register when exc - CMP R3, #0 - BEQ _hwiActiveCheckNext - - // exc occured in IRQ - ORR R0, R0, #FLAG_HWI_ACTIVE - RBIT R2, R3 - CLZ R2, R2 - AND R12, R12, #1 - ADD R2, R2, R12, LSL #5 // calculate R2 (hwi number) as pid - .fnend - - .type _ExcInMSP, %function - .global _ExcInMSP -_ExcInMSP: - .fnstart - .cantunwind - CMP LR, #0xFFFFFFE9 - BNE _NoFloatInMsp - ADD R3, R13, #104 - PUSH {R3} - MRS R12, PRIMASK // store message-->exc: disable int? - PUSH {R4-R12} // store message-->exc: {R4-R12} - VPUSH {D8-D15} - B _handleEntry - .fnend - - .type _NoFloatInMsp, %function - .global _NoFloatInMsp -_NoFloatInMsp: - .fnstart - .cantunwind - ADD R3, R13, #32 - PUSH {R3} // save IRQ SP // store message-->exc: MSP(R13) - - MRS R12, PRIMASK // store message-->exc: disable int? - PUSH {R4-R12} // store message-->exc: {R4-R12} - ORR R0, R0, #FLAG_NO_FLOAT - B _handleEntry - .fnend - - .type _hwiActiveCheckNext, %function - .global _hwiActiveCheckNext -_hwiActiveCheckNext: - .fnstart - .cantunwind - ADD R2, R2, #4 // next NVIC ACT ADDR - SUBS R12, R12, #1 - BNE _hwiActiveCheck - - /*NMI interrupt excption*/ - LDR R2, =OS_NVIC_SHCSRS - LDRH R2,[R2] - LDR R3,=OS_NVIC_SHCSR_MASK - AND R2, R2,R3 - CMP R2,#0 - BNE _ExcInMSP - // exc occured in Task or Init or exc - // reserved for register info from task stack - - LDR R2, =g_taskScheduled - LDR R2, [R2] - TST R2, #1 // OS_FLG_BGD_ACTIVE - BEQ _ExcInMSP // if exc occured in Init then branch - - - CMP LR, #0xFFFFFFED //auto push floating registers - BNE _NoFloatInPsp - - // exc occured in Task - MOV R2, R13 - SUB R13, #96 // add 8 Bytes reg(for STMFD) - - MRS R3, PSP - ADD R12, R3, #104 - PUSH {R12} // save task SP - - MRS R12, PRIMASK - PUSH {R4-R12} - VPUSH {D8-D15} - - // copy auto saved task register - - LDMFD R3!, {R4-R11} // R4-R11 store PSP reg(auto push when exc in task) - VLDMIA R3!, {D8-D15} - VSTMDB R2!, {D8-D15} - STMFD R2!, {R4-R11} - B _handleEntry - .fnend - - .type _NoFloatInPsp, %function - .global _NoFloatInPsp -_NoFloatInPsp: - .fnstart - .cantunwind - MOV R2, R13 // no auto push floating registers - SUB R13, #32 // add 8 Bytes reg(for STMFD) - - MRS R3, PSP - ADD R12, R3, #32 - PUSH {R12} // save task SP - - MRS R12, PRIMASK - PUSH {R4-R12} - - LDMFD R3, {R4-R11} // R4-R11 store PSP reg(auto push when exc in task) - STMFD R2!, {R4-R11} - ORR R0, R0, #FLAG_NO_FLOAT - .fnend - - .type _handleEntry, %function - .global _handleEntry -_handleEntry: - .fnstart - .cantunwind - MOV R3, R13 // R13:the 4th param - CPSID I - CPSID F - B HalExcHandleEntry - - NOP - .fnend - diff --git a/kernel/arch/arm/cortex-m33/gcc/los_interrupt.c b/kernel/arch/arm/cortex-m33/gcc/los_interrupt.c deleted file mode 100644 index 68c7ff8e..00000000 --- a/kernel/arch/arm/cortex-m33/gcc/los_interrupt.c +++ /dev/null @@ -1,520 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -#include "los_interrupt.h" -#include -#include "securec.h" -#include "los_context.h" -#include "los_arch_interrupt.h" -#include "los_debug.h" -#include "los_hook.h" -#include "los_task.h" -#include "los_sched.h" -#include "los_memory.h" -#include "los_membox.h" - -/*lint -save -e40 -e522 -e533*/ -UINT32 g_intCount = 0; - -/*lint -restore*/ - -/* * - * @ingroup los_hwi - * Hardware interrupt form mapping handling function array. - */ -STATIC HWI_PROC_FUNC __attribute__((aligned(0x100))) g_hwiForm[OS_VECTOR_CNT] = {0}; - -#if (OS_HWI_WITH_ARG == 1) - -typedef struct { - HWI_PROC_FUNC pfnHandler; - VOID *pParm; -} HWI_HANDLER_FUNC; - -/* * - * @ingroup los_hwi - * Hardware interrupt handler form mapping handling function array. - */ -STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }}; - -/* * - * @ingroup los_hwi - * Set interrupt vector table. - */ -VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg) -{ - if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) { - g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt; - g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector; - g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg; - } -} - -#else -/* * - * @ingroup los_hwi - * hardware interrupt handler form mapping handling function array. - */ -STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0}; - -/* * - * @ingroup los_hwi - * Set interrupt vector table. - */ -VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector) -{ - if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) { - g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt; - g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector; - } -} -#endif - -/* **************************************************************************** - Function : HalIntNumGet - Description : Get an interrupt number - Input : None - Output : None - Return : Interrupt Indexes number - **************************************************************************** */ -LITE_OS_SEC_TEXT_MINOR UINT32 HalIntNumGet(VOID) -{ - return __get_IPSR(); -} - -inline UINT32 HalIsIntActive(VOID) -{ - return (g_intCount > 0); -} -/* **************************************************************************** - Function : HalHwiDefaultHandler - Description : default handler of the hardware interrupt - Input : None - Output : None - Return : None - **************************************************************************** */ -/*lint -e529*/ -LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID) -{ - UINT32 irqNum = HalIntNumGet(); - PRINT_ERR("%s irqnum:%d\n", __FUNCTION__, irqNum); - while (1) {} -} - -WEAK VOID HalPreInterruptHandler(UINT32 arg) -{ - return; -} - -WEAK VOID HalAftInterruptHandler(UINT32 arg) -{ - return; -} - -/* **************************************************************************** - Function : HalInterrupt - Description : Hardware interrupt entry function - Input : None - Output : None - Return : None - **************************************************************************** */ -LITE_OS_SEC_TEXT VOID HalInterrupt(VOID) -{ - UINT32 hwiIndex; - UINT32 intSave; - -#if (LOSCFG_KERNEL_RUNSTOP == 1) - SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk); -#endif - - intSave = LOS_IntLock(); - g_intCount++; - LOS_IntRestore(intSave); - - hwiIndex = HalIntNumGet(); - - OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex); - - HalPreInterruptHandler(hwiIndex); - -#if (OS_HWI_WITH_ARG == 1) - if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) { - g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm); - } -#else - if (g_hwiHandlerForm[hwiIndex] != 0) { - g_hwiHandlerForm[hwiIndex](); - } -#endif - - HalAftInterruptHandler(hwiIndex); - - OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex); - - intSave = LOS_IntLock(); - g_intCount--; - LOS_IntRestore(intSave); -} - -/* **************************************************************************** - Function : HalHwiCreate - Description : create hardware interrupt - Input : hwiNum --- hwi num to create - hwiPrio --- priority of the hwi - mode --- unused - handler --- hwi handler - arg --- param of the hwi handler - Output : None - Return : LOS_OK on success or error code on failure - **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiCreate(HWI_HANDLE_T hwiNum, - HWI_PRIOR_T hwiPrio, - HWI_MODE_T mode, - HWI_PROC_FUNC handler, - HWI_ARG_T arg) -{ - UINT32 intSave; - - if (handler == NULL) { - return OS_ERRNO_HWI_PROC_FUNC_NULL; - } - - if (hwiNum >= OS_HWI_MAX_NUM) { - return OS_ERRNO_HWI_NUM_INVALID; - } - - if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) { - return OS_ERRNO_HWI_ALREADY_CREATED; - } - - if (hwiPrio > OS_HWI_PRIO_LOWEST) { - return OS_ERRNO_HWI_PRIO_INVALID; - } - - intSave = LOS_IntLock(); -#if (OS_HWI_WITH_ARG == 1) - OsSetVector(hwiNum, handler, arg); -#else - OsSetVector(hwiNum, handler); -#endif - NVIC_EnableIRQ((IRQn_Type)hwiNum); - NVIC_SetPriority((IRQn_Type)hwiNum, hwiPrio); - - LOS_IntRestore(intSave); - - return LOS_OK; -} - -/* **************************************************************************** - Function : HalHwiDelete - Description : Delete hardware interrupt - Input : hwiNum --- hwi num to delete - Output : None - Return : LOS_OK on success or error code on failure - **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum) -{ - UINT32 intSave; - - if (hwiNum >= OS_HWI_MAX_NUM) { - return OS_ERRNO_HWI_NUM_INVALID; - } - - NVIC_DisableIRQ((IRQn_Type)hwiNum); - - intSave = LOS_IntLock(); - - g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler; - - LOS_IntRestore(intSave); - - return LOS_OK; -} - -#define FAULT_STATUS_REG_BIT 32 -#define USGFAULT (1 << 18) -#define BUSFAULT (1 << 17) -#define MEMFAULT (1 << 16) -#define DIV0FAULT (1 << 4) -#define UNALIGNFAULT (1 << 3) -#define HARDFAULT_IRQN (-13) - -ExcInfo g_excInfo = {0}; - -UINT8 g_uwExcTbl[FAULT_STATUS_REG_BIT] = { - 0, 0, 0, 0, 0, 0, OS_EXC_UF_DIVBYZERO, OS_EXC_UF_UNALIGNED, - 0, 0, 0, 0, OS_EXC_UF_NOCP, OS_EXC_UF_INVPC, OS_EXC_UF_INVSTATE, OS_EXC_UF_UNDEFINSTR, - 0, 0, 0, OS_EXC_BF_STKERR, OS_EXC_BF_UNSTKERR, OS_EXC_BF_IMPRECISERR, OS_EXC_BF_PRECISERR, OS_EXC_BF_IBUSERR, - 0, 0, 0, OS_EXC_MF_MSTKERR, OS_EXC_MF_MUNSTKERR, 0, OS_EXC_MF_DACCVIOL, OS_EXC_MF_IACCVIOL -}; - -#if (LOSCFG_KERNEL_PRINTF != 0) -STATIC VOID OsExcNvicDump(VOID) -{ -#define OS_NR_NVIC_EXC_DUMP_TYPES 7 - UINT32 *base = NULL; - UINT32 len, i, j; - UINT32 rgNvicBases[OS_NR_NVIC_EXC_DUMP_TYPES] = { - OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE, - OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL - }; - UINT32 rgNvicLens[OS_NR_NVIC_EXC_DUMP_TYPES] = { - OS_NVIC_INT_ENABLE_SIZE, OS_NVIC_INT_PEND_SIZE, OS_NVIC_INT_ACT_SIZE, - OS_NVIC_INT_PRI_SIZE, OS_NVIC_EXCPRI_SIZE, OS_NVIC_SHCSR_SIZE, - OS_NVIC_INT_CTRL_SIZE - }; - CHAR strRgEnable[] = "enable"; - CHAR strRgPending[] = "pending"; - CHAR strRgActive[] = "active"; - CHAR strRgPriority[] = "priority"; - CHAR strRgException[] = "exception"; - CHAR strRgShcsr[] = "shcsr"; - CHAR strRgIntCtrl[] = "control"; - CHAR *strRgs[] = { - strRgEnable, strRgPending, strRgActive, strRgPriority, - strRgException, strRgShcsr, strRgIntCtrl - }; - - PRINTK("\r\nOS exception NVIC dump:\n"); - for (i = 0; i < OS_NR_NVIC_EXC_DUMP_TYPES; i++) { - base = (UINT32 *)rgNvicBases[i]; - len = rgNvicLens[i]; - PRINTK("interrupt %s register, base address: %p, size: 0x%x\n", strRgs[i], base, len); - len = (len >> 2); /* 2: Gets the next register offset */ - for (j = 0; j < len; j++) { - PRINTK("0x%x ", *(base + j)); - if ((j != 0) && ((j % 16) == 0)) { /* 16: print wrap line */ - PRINTK("\n"); - } - } - PRINTK("\n"); - } -} - -STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo) -{ - CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"}; - - PRINTK("Type = %d\n", excInfo->type); - PRINTK("ThrdPid = %d\n", excInfo->thrdPid); - PRINTK("Phase = %s\n", phaseStr[excInfo->phase]); - PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr); -} - -STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo) -{ - PRINTK("Current task info:\n"); - if (excInfo->phase == OS_EXC_IN_TASK) { - LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet()); - PRINTK("Task name = %s\n", taskCB->taskName); - PRINTK("Task ID = %d\n", taskCB->taskID); - PRINTK("Task SP = %p\n", taskCB->stackPointer); - PRINTK("Task ST = 0x%x\n", taskCB->topOfStack); - PRINTK("Task SS = 0x%x\n", taskCB->stackSize); - } else if (excInfo->phase == OS_EXC_IN_HWI) { - PRINTK("Exception occur in interrupt phase!\n"); - } else { - PRINTK("Exception occur in system init phase!\n"); - } -} - -STATIC VOID OsExcRegInfo(const ExcInfo *excInfo) -{ - PRINTK("Exception reg dump:\n"); - PRINTK("PC = 0x%x\n", excInfo->context->uwPC); - PRINTK("LR = 0x%x\n", excInfo->context->uwLR); - PRINTK("SP = 0x%x\n", excInfo->context->uwSP); - PRINTK("R0 = 0x%x\n", excInfo->context->uwR0); - PRINTK("R1 = 0x%x\n", excInfo->context->uwR1); - PRINTK("R2 = 0x%x\n", excInfo->context->uwR2); - PRINTK("R3 = 0x%x\n", excInfo->context->uwR3); - PRINTK("R4 = 0x%x\n", excInfo->context->uwR4); - PRINTK("R5 = 0x%x\n", excInfo->context->uwR5); - PRINTK("R6 = 0x%x\n", excInfo->context->uwR6); - PRINTK("R7 = 0x%x\n", excInfo->context->uwR7); - PRINTK("R8 = 0x%x\n", excInfo->context->uwR8); - PRINTK("R9 = 0x%x\n", excInfo->context->uwR9); - PRINTK("R10 = 0x%x\n", excInfo->context->uwR10); - PRINTK("R11 = 0x%x\n", excInfo->context->uwR11); - PRINTK("R12 = 0x%x\n", excInfo->context->uwR12); - PRINTK("PriMask = 0x%x\n", excInfo->context->uwPriMask); - PRINTK("xPSR = 0x%x\n", excInfo->context->uwxPSR); -} - -STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo) -{ - UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0}; - UINT32 index; - - OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->uwSP); - - PRINTK("----- backtrace start -----\n"); - for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) { - if (LR[index] == 0) { - break; - } - PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]); - } - PRINTK("----- backtrace end -----\n"); -} - -STATIC VOID OsExcMemPoolCheckInfo(VOID) -{ - PRINTK("\r\nmemory pools check:\n"); -#if (LOSCFG_PLATFORM_EXC == 1) - MemInfoCB memExcInfo[OS_SYS_MEM_NUM]; - UINT32 errCnt; - UINT32 i; - - (VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo)); - - errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo); - if (errCnt < OS_SYS_MEM_NUM) { - errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt); - } - - if (errCnt == 0) { - PRINTK("all memory pool check passed!\n"); - return; - } - - for (i = 0; i < errCnt; i++) { - PRINTK("pool num = %d\n", i); - PRINTK("pool type = %d\n", memExcInfo[i].type); - PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr); - PRINTK("pool size = 0x%x\n", memExcInfo[i].size); - PRINTK("pool free = 0x%x\n", memExcInfo[i].free); - PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize); - PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr); - PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen); - PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner); - } -#endif - UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR); - if (ret == LOS_OK) { - PRINTK("system heap memcheck over, all passed!\n"); - } - - PRINTK("memory pool check end!\n"); -} -#endif - -STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo) -{ -#if (LOSCFG_KERNEL_PRINTF != 0) - PRINTK("*************Exception Information**************\n"); - OsExcTypeInfo(excInfo); - OsExcCurTaskInfo(excInfo); - OsExcRegInfo(excInfo); - OsExcBackTraceInfo(excInfo); - OsGetAllTskInfo(); - OsExcNvicDump(); - OsExcMemPoolCheckInfo(); -#endif -} - -LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr) -{ - UINT16 tmpFlag = (excType >> 16) & OS_NULL_SHORT; /* 16: Get Exception Type */ - g_intCount++; - g_excInfo.nestCnt++; - - g_excInfo.type = excType & OS_NULL_SHORT; - - if (tmpFlag & OS_EXC_FLAG_FAULTADDR_VALID) { - g_excInfo.faultAddr = faultAddr; - } else { - g_excInfo.faultAddr = OS_EXC_IMPRECISE_ACCESS_ADDR; - } - if (g_losTask.runTask != NULL) { - if (tmpFlag & OS_EXC_FLAG_IN_HWI) { - g_excInfo.phase = OS_EXC_IN_HWI; - g_excInfo.thrdPid = pid; - } else { - g_excInfo.phase = OS_EXC_IN_TASK; - g_excInfo.thrdPid = g_losTask.runTask->taskID; - } - } else { - g_excInfo.phase = OS_EXC_IN_INIT; - g_excInfo.thrdPid = OS_NULL_INT; - } - if (excType & OS_EXC_FLAG_NO_FLOAT) { - g_excInfo.context = (EXC_CONTEXT_S *)((CHAR *)excBufAddr - LOS_OFF_SET_OF(EXC_CONTEXT_S, uwR4)); - } else { - g_excInfo.context = excBufAddr; - } - - OsDoExcHook(EXC_INTERRUPT); - OsExcInfoDisplay(&g_excInfo); - HalSysExit(); -} - -/* **************************************************************************** - Function : HalHwiInit - Description : initialization of the hardware interrupt - Input : None - Output : None - Return : None - **************************************************************************** */ -LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID) -{ -#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) - UINT32 index; - g_hwiForm[0] = 0; /* [0] Top of Stack */ - g_hwiForm[1] = 0; /* [1] reset */ - for (index = 2; index < OS_VECTOR_CNT; index++) { - g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler; - } - /* Exception handler register */ - g_hwiForm[NonMaskableInt_IRQn + OS_SYS_VECTOR_CNT] = HalExcNMI; - g_hwiForm[HARDFAULT_IRQN + OS_SYS_VECTOR_CNT] = HalExcHardFault; - g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = HalExcMemFault; - g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT] = HalExcBusFault; - g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT] = HalExcUsageFault; - g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = HalExcSvcCall; - g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT] = HalPendSV; - g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT] = OsTickHandler; - - /* Interrupt vector table location */ - SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm; -#endif -#if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */ - NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP); -#endif - - /* Enable USGFAULT, BUSFAULT, MEMFAULT */ - *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT); - - /* Enable DIV 0 and unaligned exception */ - *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT); - - return; -} - diff --git a/kernel/arch/arm/cortex-m33/gcc/los_timer.c b/kernel/arch/arm/cortex-m33/gcc/los_timer.c deleted file mode 100644 index 66e1f0de..00000000 --- a/kernel/arch/arm/cortex-m33/gcc/los_timer.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. - * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without modification, - * are permitted provided that the following conditions are met: - * - * 1. Redistributions of source code must retain the above copyright notice, this list of - * conditions and the following disclaimer. - * - * 2. Redistributions in binary form must reproduce the above copyright notice, this list - * of conditions and the following disclaimer in the documentation and/or other materials - * provided with the distribution. - * - * 3. Neither the name of the copyright holder nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific prior written - * permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; - * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, - * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF - * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include "los_timer.h" -#include "los_config.h" -#include "los_tick.h" -#include "los_arch_interrupt.h" -#include "los_context.h" -#include "los_sched.h" -#include "los_debug.h" - -/* **************************************************************************** -Function : HalTickStart -Description : Configure Tick Interrupt Start -Input : none -output : none -return : LOS_OK - Success , or LOS_ERRNO_TICK_CFG_INVALID - failed -**************************************************************************** */ -WEAK UINT32 HalTickStart(OS_TICK_HANDLER handler) -{ - UINT32 ret; - - if ((OS_SYS_CLOCK == 0) || - (LOSCFG_BASE_CORE_TICK_PER_SECOND == 0) || - (LOSCFG_BASE_CORE_TICK_PER_SECOND > OS_SYS_CLOCK)) { - return LOS_ERRNO_TICK_CFG_INVALID; - } - -#if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1) -#if (OS_HWI_WITH_ARG == 1) - OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler, NULL); -#else - OsSetVector(SysTick_IRQn, (HWI_PROC_FUNC)handler); -#endif -#endif - - g_sysClock = OS_SYS_CLOCK; - g_cyclesPerTick = OS_SYS_CLOCK / LOSCFG_BASE_CORE_TICK_PER_SECOND; - - ret = SysTick_Config(LOSCFG_BASE_CORE_TICK_RESPONSE_MAX); - if (ret == 1) { - return LOS_ERRNO_TICK_PER_SEC_TOO_SMALL; - } - - return LOS_OK; -} - -WEAK VOID HalSysTickReload(UINT64 nextResponseTime) -{ - SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; - SysTick->LOAD = (UINT32)(nextResponseTime - 1UL); /* set reload register */ - SysTick->VAL = 0UL; /* Load the SysTick Counter Value */ - NVIC_ClearPendingIRQ(SysTick_IRQn); - SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; -} - -WEAK UINT64 HalGetTickCycle(UINT32 *period) -{ - UINT32 hwCycle = 0; - UINT32 intSave = LOS_IntLock(); - UINT32 val = SysTick->VAL; - *period = SysTick->LOAD; - if (val != 0) { - hwCycle = *period - val; - } - LOS_IntRestore(intSave); - return (UINT64)hwCycle; -} - -WEAK VOID HalTickLock(VOID) -{ - SysTick->CTRL &= ~SysTick_CTRL_ENABLE_Msk; -} - -WEAK VOID HalTickUnlock(VOID) -{ - SysTick->CTRL |= SysTick_CTRL_ENABLE_Msk; -} - -UINT32 HalEnterSleep(VOID) -{ - __DSB(); - __WFI(); - __ISB(); - - return LOS_OK; -}