diff --git a/kernel/arch/arm/cortex-m3/keil/los_interrupt.c b/kernel/arch/arm/cortex-m3/keil/los_interrupt.c
index 2b7384f2..92d2cbc9 100644
--- a/kernel/arch/arm/cortex-m3/keil/los_interrupt.c
+++ b/kernel/arch/arm/cortex-m3/keil/los_interrupt.c
@@ -273,6 +273,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
 #define BUSFAULT                        (1 << 17)
 #define MEMFAULT                        (1 << 16)
 #define DIV0FAULT                       (1 << 4)
+#define UNALIGNFAULT                    (1 << 3)
 #define HARDFAULT_IRQN                  (-13)
 
 ExcInfo g_excInfo = {0};
@@ -520,8 +521,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
+	
     /* Enable DIV 0 and unaligned exception */
-    *(volatile UINT32 *)OS_NVIC_CCR |= DIV0FAULT;
+    *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
 
     return;
 }
diff --git a/kernel/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c b/kernel/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c
index ca5fc647..489abf21 100755
--- a/kernel/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c
+++ b/kernel/arch/arm/cortex-m33/gcc/NTZ/los_interrupt.c
@@ -263,6 +263,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
 #define BUSFAULT                        (1 << 17)
 #define MEMFAULT                        (1 << 16)
 #define DIV0FAULT                       (1 << 4)
+#define UNALIGNFAULT                    (1 << 3)
 #define HARDFAULT_IRQN                  (-13)
 
 ExcInfo g_excInfo = {0};
@@ -510,8 +511,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
+	
     /* Enable DIV 0 and unaligned exception */
-    *(volatile UINT32 *)OS_NVIC_CCR |= DIV0FAULT;
+    *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
 
     return;
 }
diff --git a/kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c b/kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c
index ca5fc647..489abf21 100755
--- a/kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c
+++ b/kernel/arch/arm/cortex-m33/gcc/TZ/non_secure/los_interrupt.c
@@ -263,6 +263,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
 #define BUSFAULT                        (1 << 17)
 #define MEMFAULT                        (1 << 16)
 #define DIV0FAULT                       (1 << 4)
+#define UNALIGNFAULT                    (1 << 3)
 #define HARDFAULT_IRQN                  (-13)
 
 ExcInfo g_excInfo = {0};
@@ -510,8 +511,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
+	
     /* Enable DIV 0 and unaligned exception */
-    *(volatile UINT32 *)OS_NVIC_CCR |= DIV0FAULT;
+    *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
 
     return;
 }
diff --git a/kernel/arch/arm/cortex-m33/gcc/los_interrupt.c b/kernel/arch/arm/cortex-m33/gcc/los_interrupt.c
index 364fd1f5..68c7ff8e 100644
--- a/kernel/arch/arm/cortex-m33/gcc/los_interrupt.c
+++ b/kernel/arch/arm/cortex-m33/gcc/los_interrupt.c
@@ -263,6 +263,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
 #define BUSFAULT                        (1 << 17)
 #define MEMFAULT                        (1 << 16)
 #define DIV0FAULT                       (1 << 4)
+#define UNALIGNFAULT                    (1 << 3)
 #define HARDFAULT_IRQN                  (-13)
 
 ExcInfo g_excInfo = {0};
@@ -510,8 +511,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
+	
     /* Enable DIV 0 and unaligned exception */
-    *(volatile UINT32 *)OS_NVIC_CCR |= DIV0FAULT;
+    *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
 
     return;
 }
diff --git a/kernel/arch/arm/cortex-m4/gcc/los_interrupt.c b/kernel/arch/arm/cortex-m4/gcc/los_interrupt.c
index 51007500..8fadd0b4 100644
--- a/kernel/arch/arm/cortex-m4/gcc/los_interrupt.c
+++ b/kernel/arch/arm/cortex-m4/gcc/los_interrupt.c
@@ -273,6 +273,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
 #define BUSFAULT                        (1 << 17)
 #define MEMFAULT                        (1 << 16)
 #define DIV0FAULT                       (1 << 4)
+#define UNALIGNFAULT                    (1 << 3)
 #define HARDFAULT_IRQN                  (-13)
 
 ExcInfo g_excInfo = {0};
@@ -530,8 +531,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
+	
     /* Enable DIV 0 and unaligned exception */
-    *(volatile UINT32 *)OS_NVIC_CCR |= DIV0FAULT;
+    *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
 
     return;
 }
diff --git a/kernel/arch/arm/cortex-m4/iar/los_interrupt.c b/kernel/arch/arm/cortex-m4/iar/los_interrupt.c
index 1530fbe3..1a6e66e0 100644
--- a/kernel/arch/arm/cortex-m4/iar/los_interrupt.c
+++ b/kernel/arch/arm/cortex-m4/iar/los_interrupt.c
@@ -166,9 +166,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
 #endif
 
     intSave = LOS_IntLock();
-
     g_intCount++;
-
     LOS_IntRestore(intSave);
 
     hwiIndex = HalIntNumGet();
@@ -276,6 +274,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
 #define BUSFAULT                        (1 << 17)
 #define MEMFAULT                        (1 << 16)
 #define DIV0FAULT                       (1 << 4)
+#define UNALIGNFAULT                    (1 << 3)
 #define HARDFAULT_IRQN                  (-13)
 
 ExcInfo g_excInfo = {0};
@@ -523,8 +522,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
+	
     /* Enable DIV 0 and unaligned exception */
-    *(volatile UINT32 *)OS_NVIC_CCR |= DIV0FAULT;
+    *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
 
     return;
 }
diff --git a/kernel/arch/arm/cortex-m7/gcc/los_interrupt.c b/kernel/arch/arm/cortex-m7/gcc/los_interrupt.c
index 17e9fab7..4d3340dc 100644
--- a/kernel/arch/arm/cortex-m7/gcc/los_interrupt.c
+++ b/kernel/arch/arm/cortex-m7/gcc/los_interrupt.c
@@ -263,6 +263,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
 #define BUSFAULT                        (1 << 17)
 #define MEMFAULT                        (1 << 16)
 #define DIV0FAULT                       (1 << 4)
+#define UNALIGNFAULT                    (1 << 3)
 #define HARDFAULT_IRQN                  (-13)
 
 ExcInfo g_excInfo = {0};
@@ -510,8 +511,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
+	
     /* Enable DIV 0 and unaligned exception */
-    *(volatile UINT32 *)OS_NVIC_CCR |= DIV0FAULT;
+    *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
 
     return;
 }
diff --git a/kernel/arch/arm/cortex-m7/iar/los_interrupt.c b/kernel/arch/arm/cortex-m7/iar/los_interrupt.c
index 04028be4..69326c97 100644
--- a/kernel/arch/arm/cortex-m7/iar/los_interrupt.c
+++ b/kernel/arch/arm/cortex-m7/iar/los_interrupt.c
@@ -162,9 +162,7 @@ LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
 #endif
 
     intSave = LOS_IntLock();
-
     g_intCount++;
-
     LOS_IntRestore(intSave);
 
     hwiIndex = HalIntNumGet();
@@ -272,6 +270,7 @@ LITE_OS_SEC_TEXT_INIT UINT32 HalHwiDelete(HWI_HANDLE_T hwiNum)
 #define BUSFAULT                        (1 << 17)
 #define MEMFAULT                        (1 << 16)
 #define DIV0FAULT                       (1 << 4)
+#define UNALIGNFAULT                    (1 << 3)
 #define HARDFAULT_IRQN                  (-13)
 
 ExcInfo g_excInfo = {0};
@@ -519,8 +518,9 @@ LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
 
     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
+	
     /* Enable DIV 0 and unaligned exception */
-    *(volatile UINT32 *)OS_NVIC_CCR |= DIV0FAULT;
+    *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
 
     return;
 }