Target:Update demo soc config file and fix typo
Signed-off-by: linzewen <linzewen@nucleisys.com>
This commit is contained in:
parent
24a847a111
commit
2f3ea928df
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@ -35,7 +35,8 @@ MEMORY
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SECTIONS
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SECTIONS
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{
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{
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__stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
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__stack_size = DEFINED(__stack_size) ? __stack_size : 10K;
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__heap_size = DEFINED(__heap_size) ? __heap_size : 10K;
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.init :
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.init :
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{
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{
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@ -179,6 +180,10 @@ SECTIONS
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*(.srodata.cst4)
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*(.srodata.cst4)
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*(.srodata.cst2)
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*(.srodata.cst2)
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*(.srodata .srodata.*)
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*(.srodata .srodata.*)
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. = ALIGN(4);
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__osdriv_start = .;
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KEEP (*(osdriv))
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__osdriv_end = .;
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} >ram AT>ilm
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} >ram AT>ilm
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. = ALIGN(4);
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. = ALIGN(4);
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@ -198,13 +203,20 @@ SECTIONS
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} >ram AT>ram
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} >ram AT>ram
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. = ALIGN(8);
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. = ALIGN(8);
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PROVIDE( _end = . );
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PROVIDE( end = . );
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PROVIDE( end = . );
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.stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
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.stack : ALIGN(0x10)
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{
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{
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PROVIDE( _heap_end = . );
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. = __stack_size;
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. = __stack_size;
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PROVIDE( _sp = . );
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PROVIDE( _sp = . );
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} >ram AT>ram
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} >ram AT>ram
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}
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PROVIDE( _end = . );
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.heap : ALIGN(0x10)
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{
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. = __heap_size;
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PROVIDE( _heap_end = . );
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PROVIDE( __los_heap_addr_start__ = . );
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. = __heap_size == 0 ? 0 : ORIGIN(ram) + LENGTH(ram);
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PROVIDE( __los_heap_addr_end__ = . );
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} >ram AT>ram
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}
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@ -15,6 +15,12 @@ C_INCLUDES += -I$(LITEOSTOPDIR)/utils \
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-I$(LITEOSTOPDIR)/components/los_backtrace \
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-I$(LITEOSTOPDIR)/components/los_backtrace \
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-I$(LITEOSTOPDIR)/components/bounds_checking_function/include
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-I$(LITEOSTOPDIR)/components/bounds_checking_function/include
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#third party related
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C_INCLUDES += -I$(LITEOSTOPDIR)/third_party/bounds_checking_function/include \
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-I$(LITEOSTOPDIR)/third_party/bounds_checking_function/src
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C_SOURCES += $(wildcard $(LITEOSTOPDIR)/third_party/bounds_checking_function/src/*.c)
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# NMSIS related
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# NMSIS related
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C_INCLUDES += -I$(LITEOSTOPDIR)/kernel/arch/risc-v/nuclei/gcc/nmsis/Core/Include \
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C_INCLUDES += -I$(LITEOSTOPDIR)/kernel/arch/risc-v/nuclei/gcc/nmsis/Core/Include \
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-I$(LITEOSTOPDIR)/kernel/arch/risc-v/nuclei/gcc/nmsis/DSP/Include \
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-I$(LITEOSTOPDIR)/kernel/arch/risc-v/nuclei/gcc/nmsis/DSP/Include \
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@ -43,12 +43,16 @@ extern "C" {
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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#include "nuclei_sdk_soc.h"
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/*=============================================================================
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/*=============================================================================
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System clock module configuration
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System clock module configuration
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=============================================================================*/
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=============================================================================*/
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#define OS_SYS_CLOCK (8000000)
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#define OS_SYS_CLOCK SOC_TIMER_FREQ
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#define LOSCFG_BASE_CORE_TICK_PER_SECOND (1000UL)
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#define LOSCFG_BASE_CORE_TICK_PER_SECOND (1000UL)
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#define LOSCFG_BASE_CORE_TICK_HW_TIME 0
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#define LOSCFG_BASE_CORE_TICK_HW_TIME 0
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#define LOSCFG_BASE_CORE_TICK_WTIMER 1
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#define LOSCFG_BASE_CORE_SCHED_SLEEP 1
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/*=============================================================================
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/*=============================================================================
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Hardware interrupt module configuration
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Hardware interrupt module configuration
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=============================================================================*/
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=============================================================================*/
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@ -63,7 +67,8 @@ extern "C" {
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#define LOSCFG_BASE_CORE_TSK_DEFAULT_STACK_SIZE (0x2E0U)
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#define LOSCFG_BASE_CORE_TSK_DEFAULT_STACK_SIZE (0x2E0U)
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#define LOSCFG_BASE_CORE_TSK_MIN_STACK_SIZE (0x130U)
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#define LOSCFG_BASE_CORE_TSK_MIN_STACK_SIZE (0x130U)
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#define LOSCFG_BASE_CORE_TIMESLICE 1
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#define LOSCFG_BASE_CORE_TIMESLICE 1
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#define LOSCFG_BASE_CORE_TIMESLICE_TIMEOUT 10
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#define LOSCFG_BASE_CORE_TIMESLICE_TIMEOUT 20000
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#define LOSCFG_BASE_CORE_TICK_RESPONSE_MAX 0xFFFFFF
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/*=============================================================================
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/*=============================================================================
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Semaphore module configuration
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Semaphore module configuration
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=============================================================================*/
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=============================================================================*/
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@ -131,6 +131,8 @@ Nuclei DDR200T开发板是一款集成了FPGA和通用MCU的RISC-V评估开发
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### 编译源码<a name="sectionb2"></a>
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### 编译源码<a name="sectionb2"></a>
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使用`git clone`复制代码到任意目录下,打开进入到工程根目录下,输入`git submodule update --init --recursive`下载更新子模块。
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编译前请在当前控制台中配置`NUCLEI_TOOL_ROOT`路径,假设`Nuclei`文件夹所在路径为`/home/Nuclei`,输入`export NUCLEI_TOOL_ROOT=/home/Nuclei` 。或者使用时make选项增加`NUCLEI_TOOL_ROOT=/home/Nuclei`。
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编译前请在当前控制台中配置`NUCLEI_TOOL_ROOT`路径,假设`Nuclei`文件夹所在路径为`/home/Nuclei`,输入`export NUCLEI_TOOL_ROOT=/home/Nuclei` 。或者使用时make选项增加`NUCLEI_TOOL_ROOT=/home/Nuclei`。
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配置路径后打开至代码根目录下的/target/riscv_nuclei_demo_soc_gcc/GCC位置,输入如下指令开始编译:
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配置路径后打开至代码根目录下的/target/riscv_nuclei_demo_soc_gcc/GCC位置,输入如下指令开始编译:
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@ -28,8 +28,7 @@ int main(void)
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{
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{
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/* USER CODE BEGIN Init */
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/* USER CODE BEGIN Init */
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RunTaskSample();
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RunTaskSample();
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while (1)
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while (1) {
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{
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}
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}
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}
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}
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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@ -33,7 +33,6 @@
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*/
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*/
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#include "task_sample.h"
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#include "task_sample.h"
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#include "los_config.h"
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#include "los_config.h"
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#include "los_debug.h"
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#include "los_debug.h"
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#include "los_interrupt.h"
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#include "los_interrupt.h"
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@ -51,16 +50,16 @@ UINT8 __attribute__ ((aligned (8))) g_memStart[OS_SYS_MEM_SIZE];
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VOID TaskSampleEntry2(VOID)
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VOID TaskSampleEntry2(VOID)
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{
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{
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while (1) {
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while (1) {
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LOS_TaskDelay(10000); /* 10 Seconds */
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printf("TaskSampleEntry2 running...\n");
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printf("TaskSampleEntry2 running...\n");
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LOS_TaskDelay(10000); /* 10 Seconds */
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}
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}
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}
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}
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VOID TaskSampleEntry1(VOID)
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VOID TaskSampleEntry1(VOID)
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{
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{
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while (1) {
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while (1) {
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LOS_TaskDelay(2000); /* 2 Seconds */
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printf("TaskSampleEntry1 running...\n");
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printf("TaskSampleEntry1 running...\n");
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LOS_TaskDelay(2000); /* 2 Seconds */
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}
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}
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}
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}
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